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Patent 2203172 Summary

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(12) Patent Application: (11) CA 2203172
(54) English Title: PROCESS FOR MANUFACTURING ELECTRICAL CIRCUIT BASES
(54) French Title: PROCEDE DE FABRICATION DE SUPPORTS DE CIRCUITS ELECTRIQUES
Status: Dead
Bibliographic Data
(51) International Patent Classification (IPC):
  • H05K 3/00 (2006.01)
  • C23C 16/18 (2006.01)
  • C23C 18/30 (2006.01)
  • H05K 3/38 (2006.01)
  • H05K 3/42 (2006.01)
(72) Inventors :
  • MEYER, HEINRICH (Germany)
(73) Owners :
  • ATOTECH DEUTSCHLAND GMBH (Germany)
(71) Applicants :
  • ATOTECH DEUTSCHLAND GMBH (Germany)
(74) Agent: RICHES, MCKENZIE & HERBERT LLP
(74) Associate agent:
(45) Issued:
(86) PCT Filing Date: 1995-10-18
(87) Open to Public Inspection: 1996-04-25
Availability of licence: N/A
(25) Language of filing: English

Patent Cooperation Treaty (PCT): Yes
(86) PCT Filing Number: PCT/DE1995/001500
(87) International Publication Number: WO1996/012392
(85) National Entry: 1997-04-18

(30) Application Priority Data:
Application No. Country/Territory Date
P 44 38 777.6 Germany 1994-10-18

Abstracts

English Abstract




To manufacture electrical circuit bases with extremely fine conducting paths,
laminates without metal foil coverings are used as the initial materials; to
produce the holes, a temporary metal layer is applied to the laminate
surfaces, that metal layer is structured and etched and removed from the
laminate surfaces once the holes have been etched in the laminate. A
foundation metal layer is then deposited on the laminate surfaces, including
the hole walls, to create the conducting paths; this is done by the glow
discharge decomposition of volatile metal compounds. Further metal layers are
applied to those layers without current and/or electrolytically. The metal
layers are structured using photomask techniques.


French Abstract

L'invention concerne un procédé de fabrication de supports de circuits électriques présentant des tracés conducteurs extrêmement fins. Ledit procédé consiste à utiliser, comme matériaux de départ, des stratifiés sans feuilles métalliques, à déposer, afin de produire les trous, une couche métallique provisoire sur les surfaces du stratifié, à la structurer, à l'attaquer chimiquement puis à la séparer à nouveau des surfaces du stratifié après attaque des trous dans le stratifié. Ce procédé consiste ensuite à déposer une couche métallique de base, par décomposition de composés métalliques volatils au moyen d'une décharge lumineuse, sur les surfaces du stratifié, y compris les parois des trous, pour former des tracés conducteurs. D'autres couches métalliques sont appliquées, sans courant et/ou par voie électrolytique, sur ces couches. Les couches métalliques sont structurées au moyen de masques de photogravure.

Claims

Note: Claims are shown in the official language in which they were submitted.






Claims

1. Method of manufacturing electrical circuit bases with
the finest conductor tracks and for high wiring density
from single or multilayer laminates through a combination
of the following essential steps in the process:

- the introduction of holes with diameters below 100 µm
into the laminates by

- the application of a temporary metal layer,
limited to a thickness of approximately 10 to 100
nm, to at least one laminate surface,
- the application of a liquid photoresist or dry
film,
- the structuring of the photoresist and of the
metal layer with a photomask technique
- the etching of the holes into the metal layer and
the laminate and
- the removal of the metal layer,

- the formation of conductor track structures and
distances of below 100 µm on at least one laminate
surface and the metallisation of the hole walls by

- the deposition of an adhesive first metal layer with a
thickness of approximately 0.01 to 1 µm on the laminate
surface and the hole walls by the decomposition of
volatile metal compounds by means of glow discharge,
- the deposition of further metal layers from acid to
neutral metallisation baths on the first metal layer by
electroless and/or electrolytical metallisation and

31

- the structuring of individual metal layers by means of
a photomask technique.

2. Method according to claim 1, characterised in that a
positive photoresist layer is used as photomask.

3. Method according to one of the preceding claims,
characterised in that the holes are created by a vacuum
etching process.

4. Method according to one of the preceding claims,
characterised in that the hole walls and the laminate
surfaces are pre-treated before metallisation by means of
glow discharge.

5. Method according to one of the preceding claims,
characterised in that a nickel/boron alloy is deposited
on the first metal layer as a further metal layer.

6. Method according to one of the preceding claims,
characterised in that copper is deposited as a further
metal layer on the first metal layer from a electroless
copper bath with hypophosphite as reducing agent.

7. Method according to one of the preceding claims,
characterised in that the conductor track structures and
the metal layers on the hole walls are essentially formed
by electroless deposition of palladium.

8. Method according to one of the preceding claims,
characterised by a temporary metal layer made of
aluminium.

9. Use of a single-layer or multi-layer substrate, formed
from films and/or boards, consisting of a non-conductor
suitable for the application of metal coatings and having

32

an aluminium or copper layer of approximately 10 to 100
nm in thickness, which layer is covered by a 5 to 12 µm
thickphotoresist, for the manufacture of electrical
circuit bases with very high wiring density and the
finest conductor tracks.

10. Process for manufacturing electrical circuit bases,
characterised by individual new features or all of these,
or combinations of the disclosed features.

Description

Note: Descriptions are shown in the official language in which they were submitted.


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Process for Manufacturinq Electrical Circuit Bases

The invention relates to a process for manufacturing
electrical circuit bases.




The conductor tracks found on electrical circuit bases,
for instance on printed circuit boards, are generally
produced by a combination of etching processes and
electrolytic deposition processes from layered laminates
covered with copper films. The process techniques which
are used here have been much described in the literature
(e.g. Handbuch der Leiterplattentechnik, ed. G. Hermannn,
Vol. 2, Eugen G. Leuze-Verlag, Saulgau, 1991).

Usually, the pattern plating technique is used in which
the conductor tracks and the copper layers are generated
in the holes by electrolytic copper deposition in
channels in a structured resist and the subsequent
removal of the copper regions which do not form the
conductor tracks by etching.

In the panel plating technique, first of all a thick
copper layer is deposited flat on to the laminate
surfaces and the hole walls. Then the conductor tracks
are formed from the copper layer through an etching
process. A combination of the pattern plating t~c~n; que
with the panel plating technique is also possible.

Methods of this kind are appropriate for the manufacture
of conductor boards, however the width of the finest
conductor tracks which can be manufactured using these
techniques lies in the region of about loO ~m.

In the case of polyimide laminates as base material for
electrical circuit bases there is also the disadvantage
that the copper films are conventionally joined by being

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glued to the polyimide surfaces. However the bonding
layer softens when it undergoes thermal treatment and is
also not sufficiently stable in relation to the chemical
baths which are used for the metallisation of the holes
in the polyimide laminates.

In order to avoid the bonding layers, the cast-on
technique, familiar to the expert, for manufacturing
glue-free polyimide laminates was developed in which the
fluid polyamide acid solution is poured before
dehydration and cyclisation to a polyimide on to a copper
film so that once the polyimide has been formed on the
copper film an adhesive polymer metal bond can be
produced.
However, this method has the disadvantage that only
relatively thick, for instance 17 ~m thick, copper films
can be used so that the finest conductor track structures
cannot be manufactured from these materials.
Materials layered with thin copper films have indeed been
manufactured. However, the expense of manufacturing these
materials is extraordinarily high so that their material
costs are also very considerable. Moreover the handling
of these materials is problematic. In the case of the
~cast on~ technique for the manufacture of polyimide
circuit bases, thin films of this kind cannot be used at
all since the material would distort strongly during
manufacture.
Finer conductor tracks can i~ necessary be created by not
using as initial material any layered laminates which are
provided with copper films on the surface. The conductor
tracks are in this case formed by metal deposition
directly on the laminate surfaces and subsequent
structuring with photoresists.

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For the above mentioned reasons, other processes for the
securely adhesive metallisation of laminates, for
instance from epoxy resins and polyimides, were
developed. In respect of the requirement of achieving an
adequate adhesiveness of the deposited metal layers, also
during and after thermal stress of the materials, and the
additional requirement that the laminate surfaces should
not be excessively roughened during the metallisation
process, the process of depositing metal by decomposing
volatile metal compounds by means of glow discharge
represents a superior process. In metallisation the
average roughening depth of the laminate surfaces should
not be larger than 7 ~m.

In DE-P 35 10 982 A1 a method of this kind for
manufacturing electrically conductive structures on non-
conductors through the deposition of metallic films on
the non-conductive surfaces through decomposition o~
organo-metallic connections in a glow discharge zone is
disclosed. The deposited metal films serve preferably as
catalytically active nucleus layers for the subsecluent
electroless metallisation of the surfaces.

In DE-P 37 16 235 Al a method of manufacturing
electrically conductive polymer metal compo~nds on
anorganic or organic substrates is described. In this
method, too, gaseous organo-metallic compounds are
flecomposed in a glow discharge zone, additional gaseous
organic compounds such as for example ethene, propene or
acrylonitrile are polymerised so that a conductive
polymer metal compound is formed from the two components.

In DE-P 37 44 062 A1 a method of manufacturing metallic
structures on fluoro carbon resins or thermoplastic
plastics is described through the decomposition of
organo-metallic compounds in a glow discharge.

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In DE-P 38 06 587 Al a method of manufacturing metallic
structures on polyimide by the decomposition of organo-
metallic compounds in a glow discharge is clescribed.
With these methods it is possible to create adhesive
metal layers on non-conductors, for example laminates, in
order to form out of them the finest conductor tracks by
structuring with photoresists. For the manufacture of
high density circuits as well as the finest conductor
tracks, however, the finest holes are also needed.

It has been established that holes manufactured according
to conventional methods for connecting different
conducting planes are too expensive since the holes are
drilled one after the other and the known methods of
creating the necessary very fine holes with diameters of
below 100 ~m are not appropriate. Holes of this kind can
be manufactured by etching processes if suitable etching
masks are available for this with which the regions on
the laminate surface can be covered which are not to be
affected during the etching process.

In US-PS 32 65 546 a method of chemically etching holes
in an electric circuit board is described in which holes
are first etched chemically into the copper films on the
outer sides of the circuit board laminate and then, in a
further chemical etching step, in the free copper film
regions holes are created in the laminate itself.

In DE-OS 20 59 425 a method of this type for the partial
construction of printed multilayer circuits is disclosed
in which insulating films, preferably glass fibre
reinforced epoxy resins films, provided with metal films,
are coated with an etch resistant cover, in the regions
of the later holes the covering is removed and through a
preferably chemical etching process first the holes in
the metal films and then the holes in the insulating

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films themselves are created. The metal films remain on
the insulating films during the subsequent metallisation
process of the holes.

In US-PS 48 89 585 a method of forming holes of
predetermined size and shape in a polyimide/polyamide
substrate is described, the substrate having on at least
one side an adhesive metal layer. For forming the holes
first of all the holes are formed by appropriate etching
means in the metal layer and then with hot concentrated
sulphuric acid in the substrate.

In EP 0 168 509 Al a method of manufacturing a pattern in
~lass fibre reinforced plastic boards, preferably made of
epoxy resin, is described in which, as in the previous
examples, a plastic board is first provided with a copper
film, in this case with a thickness of 5 ~m, for example,
and a photosensitive resist, and both (copper film and
photosensitive resist film), are then etched away at the
places intended for the holes. Then the resin of the
plastic board is removed in a dry etching process by
means of plasma technology, the glass fibres in the board
not being removed and therefore projecting into the hole.
~hese are metallised together with the ho]e walls in a
subsequent process step. In this way, however,
particularly the finest holes are blocked up so that the
subsequent metallisation in the holes cannot be carried
out sufficiently reliably without for instance gas
hubbles forming inside the holes. The copper film
remains during the metallisation of the holes on the
plastic board surface.

In EP 0 283 546 A1 there is described a method of
manufacturing micro-mechanical components of any shape
from plane parallel boards made of polymer substrate
material or of any shaped feed-through apertures in these

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~oards. To this end, first of all an etching mask made
of an organic polymer which is preferably treated by
~eans of cyclical organosilicon compounds, is applied to
the substrate surface, this then being photostructured
and developed. The holes in the substrate are
manufactured by means of a reactive ionic etching process
at the places of the holes in the etching mask. The
etching mask is taken away again from the substrate
surface once the holes have been created. It is stated
1hat the subsequent removal of the photoresist poses
considerable problems.

]n WO 92/15408 a method of manufacturing circuit boards
~rom thin films is disclosed. In this method, a plastic
~ilm provided with metal layers is first provided with a
photoresist layer, this layer is structured according to
conventional methods, then the holes are ~ormed in the
substrate in a wet-chemical or plasma etching process and
finally the photoresist layer and the metal layer are
removed again from the substrate surface. The option is
given for unlayered films of also applying a photoresist
layer or a metal layer to the substrate. The layer in
this case is used as an etching resist layer for the hole
formation process. For the formation of the conductor
tracks usual wet-chemical activation and metallisation
processes are to be used. Metal layers of 7 to 12 ~m in
thickness are here to be laminated or created by
sputtering.

In the essay ~New multilayer polyimide technology teams
with multilayer ceramics to form multichip modules" by G.
Lehman-Lamer et al., Hybrid Circuit Technology, October
lg90, Pages 21 to 26, a process for the creation of
polyimide multilayers from ceramics and polyimide for
multichip modules is described. What is involved here
are so-called ~spin-coatings" from polyimide, poured out

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of solutions on to secure bases and spread out by quick
rotating of the bases into thin layers. These "spin-
coatings" are first covered with a vapour-deposited metal
layer. At the places of subsequent holes, the metal
layer is perforated by means of photoresist and a
subsequent etching process and the exposed polyimide
layer is selectively removed in a process for reactive
ionic etching. Then the metal is removed again and a
metal layer is vapour-deposited on the whole polyimide
surface. To create the conductor tracks, a further
~hotoresist is then applied to this layer, exposed,
developed and then, for instance, gold-electrolyticly
deposited on the first metal layer. Since the first
metal layer is vapour-deposited to form the conductor
~racks on the polyimide surfaces, the latter do not
adhere adequately to the base.

What is disadvantageous about these methods for the
manufacturing of multichip modules is also the fact that
1_he manufacture of polyimide layers by the spin coating
1~echnique is very expensive and that only small shapes
can be manufactured and these only in one-off use. For
this reason the technique is very expensive.

The methods described above are, however, not suitable
for providing laminates, which can also consist of a
plurality of laminate layers, with an adhesive metal
]ayer for the creation of the finest conductor track
structures (structure widths below lOo ~m) and the finest
holes (diameter below 100 ~m). With the known methods,
either only relatively wide conductor tracks can be
created in which the requirements for adhesion to the
laminate surface on account of the larger surface area
involved are smaller, or no high density circuits with
very fine bore holes can be created. In the known
methods, laminates with relatively thick metal films on

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the outer sides are mostly used, which films are applied
to the laminate surfaces for instance by pressing. In
this case it is not possible to create the finest
conductor tracks.




Therefore the problem underlying the present invention
was to avoid the abovementioned disadvantages of the
prior art and to find a method of manufacturing
electrical circuit bases out of single-layer or
-multilayer laminates with adhesive conductor tracks,
which cannot be detached again, on the laminate surfaces
with conductor track widths and distances of below lOo ~m
and metallised holes in the laminates with diameters of
below lO0 ~m.
The problem is solved by claim l. Preferred developments
of the invention are given in the dependent claims.

The electrical circuit bases are manufactured from the
laminates according to the following main process course:

-- introduction of holes with diameters under lO0 ~m into
1:he laminates by
- application of a metal layer to at least one
laminate surface,
- structuring of the metal layer with a photomask
t:echnique through the following process steps:
- covering the metal layer with a
photosensitive resist,
- exposure and development of the photomask,
the photomask being removed during
clevelopment in those regions in which holes are
intended in the laminate,
- if necessary, removal of the photomask,


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- etching of the holes in the laminate preferably with a
vacuum etching process, and

- removing the metal layer and other parts of the
photomask that are still present,

- forming of conductor track structures with structure
widths and distances of below 100 ~m on at least one
laminate surface and metallisation of the hole walls by
- the deposition of an adhesive first or base metal
layer, which cannot be removed again, on the
laminate surfaces and the hole walls through the
decomposition of volatile metal compounds by
means of glow discharge,
- the deposition of further metal layers on the base
metal layer by electroless and/or electrolytic
metallisation and
- the structuring of individual metal layers by
means of photomask techniques.

With the method according to the invention the finest
holes, with diameters of below 100 ~m, can be
manufactured in the laminate and then metallised. ]:n
1_his way a very high wiring density becomes possible in
the circuits.

The metal layer which is applied for manufacturing the
etching mask (hole mask) for the creation of the holes on
the laminate surfaces, is only temporarily applied to the
laminate surfaces, i.e. before the creation of the
conductor tracks from the laminate it is removed again
and does not serve as base metal layer for the formation
of the conductor tracks. Thus any possible impairment of
the bond between the etching mask and the laminate
surface when the holes are etched does not have a

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disadvantageous effect on the adhesion of the conductor
tracks which are created later.

Only through the combination of the different methods
according to the invention for creating the holes and for
creating the conductor track structures can the finest
conductor tracks and holes be formed, so that high
density circuit bases are created. Because of the fact
that laminates without any copper coating are used,
~referably films or thin laminates reinforced with
organic polymer fibres, the circuit bases can be
~anufactured very inexpensively and simply.

The method makes do with relatively simple and cheap
initial materials. For example laminates without metal
layers on the surfaces can be used as base substrates.

Since no laminates provided with copper fil~s are used,
1_he direct build-up of metal through the use of
metallisation by means of basically any glow discharge is
possible so that the finest conductor track structures
below lO0 ~m in width can be manufactured.

Through the decomposition of the volatile metal compounds
by means of glow discharge for the creation of the
conductive layer, a very adhesive bond is achieved, which
cannot be detached again, between the conductor track
structures and the laminate surface, thus in this way
even the finest conductor tracks can be manufactured.
Moreover, the adhesion remains even during and after the
usual thermal treatments, such as soldering for instance.

In the manufacture of the finest conductor tracks,
~articular requirements are made of the adhesion of the
conductor tracks to the laminate surface. The reason for
this is that a sufficient adhesion of the conductor

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tracks to the laminate surface can only be achieved
through an extremely low bearing surface of the conductor
tracks. Treatment with corrosive solutions or gaseous
materials which attack this bond from the side, can very
5 quickly lead to the lower edges of the conductor tracks
rising in a wedge shape away from the laminate surface.
In contrast to wide conductor tracks, wedge shaped
delaminations of this kind therefore have a greater
effect on the adhesion of fine conductor tracks
altogether than on wide conductor tracks.

Moreover, through the metallisation process in the glow
discharge, on account of the adhesion that is achievable,
it is possible to use laminates of different materials as
base substrates. By using materials with a low relative
permittivity, shorter signal delays in the electrical
circuits can be achieved.

The hole masks on the laminate surfaces formed for the
creation of the holes, are created photochemically with
photomasks. Through the preferred use of a positive
photoresist as photomask, a considerably higher optical
resolution and thus finer structures are achieved~ since
thinner layers can be manufactured with a photoresist (5
to 10 ~m in thickness) than for instance with dry films
(30 to 50 ~m in thickness of the photoresist layers), and
thus the light that falls on to the layer on exposure is
scattered less. On account of the smaller thickness
particularly of fluid photoresist layers, the latter also
adhere better to the base. By using positive resists,
moreover, a positive original pattern can be used in the
exposure of the resist layer with the result that
exposure errors have less effect. Resists which can be
deposited electrophoretically can also be used.


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The holes are then formed preferably in a vacuum or
plasma etching process. An etching process by means of
glow discharge or a laser drilling process has also been
proved to be technically favourable.




After the holes have been generated in the temporary
metal layer and in the laminate, the hole walls and the
laminate surfaces are pre-treated to create an adhesive
base metal layer, which cannot be detached again,
preferably by means of glow discharge. For instance the
surfaces are etched, cleaned and/or functionalised with
reactive groups, by gases reacting with the chemical
groups on the surface.

A photomask is likewise used for the structuring of the
metal layer in the creation of the conductive pattern.
In a particularly advantageous development of the
invention, as in the manufacture of the hole mask so too
in this case, a positive photoresist layer is used. A
resist that can be deposited electrophoretically can also
be used.

In order to avoid the bond between the base metal layer
and the laminate surface being impaired, for the further
metallisation of the laminates a metal is deposited from
a preferably acid or neutral electroless or electrolytic
metallisation bath on the base metal layer. Alkaline
baths, such as, for example, electroless copper baths
with formaldehyde as a reducing agent, reduce the
adhesion of the base metal layer to the laminate surface
or dissolve this bond altogether.

A nickel/boron alloy layer is particularly suitable as
the next metal layer on the base metal layer. As an
alternative to this, a copper layer can also be deposited

-
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from an acid or neutral electroless copper bath with
hypophospite as a reducing agent on the base metal layer.

Both the nickel/boron alloy and the copper layer have,
moreover, the advantage that they can if necessary be
easily etched away again from the base metal layer in the
structuring of the conductor track structures.

Palladium layers deposited from acid or neutral
electroless palladium baths offer the advantage that the
adhesive bond between the base metal layer and the
l~m;n~te surface is not affected in the deposition of the
metal. However, palladium can only be etched with
difficulty and can therefore only be deposited on the
base metal layer in those cases where this metal layer
does not have to be removed any more by etching in
subsequent process steps.

The conductor track structures and metal layers in the
holes are, however, in those regions in which they do not
have to be removed by etching, basically formed by
electroless palladium deposition, since palladium can be
easily deposited, layers of sufficient depth can easily
be obtained and the conductivity and the resistance to
corrosion correspond to the requirements for conductor
track structures.

Examples of different developments:

As laminates for the manufacture of high density circuit
bases, preferably films made of polyimide,
polyimide/polyamide, of aramide, of fluorocarbon
polymers, cyanate esters or epoxy resins are used. The
films can be used without fillers such as in the case of
polyimide, or with fillers, such as for example paper,
glass or carbon fibres, as well as organic polymer

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14

fibres. However rigid boards can also be used. For
example, epoxy resin boards made of FR4 material or
ceramic materials can be considered here.

T.~m; n~tes already worked into multilayer circuits and
without copper layers on the outer sides can serve as
base materials, in which the inner layers have been
manufactured by the method according to the invention or
in the conventional manner, for instance by etching.

The laminates can be cleaned before treatment, for
example in solutions contA;n;ng wetting agents. Then the
hole mask is applied to at least one of the laminate
surfaces. For the formation of the holes in the
laminate, aluminium or copper are used by preference as
hole mask materials. The metals are deposited
preferably in a vacuum process, for instance through
vapour deposition or by another method. A different
metal can also be vapourised or applied in a sputtering
process or electrochemically. Aluminium is cheap and the
vapour depositing process is not expensive. For instance
in a suitable vapour deposition installation, the
laminate surfaces can be vapourised on both sides by
being worked in a continuous operation from roller to
roller with the metal.

Only relatively thin aluminium and copper layers are
needed (10 to 100 nm). The requirements of the adhesion
of the aluminium to the laminate surface are small; only
a sufficiently low porosity of the vapourised metal film
is necessary, in order to prevent the subsequent etching
effect on the laminate material lying below it. The
etching mask must not be too thick, since on the one hand
otherwise material transport problems can occur in the
subsequent etching of the holes (transport to and from of
reactive gases and of the products of reaction). On the

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other hand, in thick metal etching masks e~dy currents
can occur during etching in the glow discharge and the
efficacy and the speed of the etching process can be
reduced. Moreover, the metal layer may not come away
from the base in the etching process for manufacturing
the hole mask. With hole masks made of aluminium and
copper layers these problems do not arise.

To form the hole grid on the laminate surfaces, the
latter are then coated with a photomask, preferably with
a positive photoresist. Dry films are used for instance
for low and medium image resolution and for high image
resolution preferably positive liquid photoresist. The
liquid resists can be applied to the laminate surfaces by
dipping the laminate, by electrostatic spraying, in a
curtain coating process or by other techniques.

By means of the subsequent exposure of the surfaces
covered with the photomask and the following development
in an appropriate development solution, the regions of
the metal surfaces are exposed again corresponding to the
pattern of holes. Development of the photomask layer
follows exposure. For example an organic solvent can be
used for this or an aqueous sodium carbonate solution. A
mixture of the organic solvent with sodium carbonate can
also be used.

Next the exposed metal surfaces are removed by an etching
process. The metal surface serves in the subsequent
etching process as a hole mask. A chemical etching
solution is for instance used to remove the metal. In
the case of aluminium, an acid etching solution which
contains iron (III) chloride and if necessary hydrogen
peroxide, is suitable. Then the photoresist layer is
again removed from the laminate surface. Xf the
photomask layer is not removed before the laminate

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etching process, the etching process is too slow since
the polymer photomask layer is also etched away and the
plasma of the glow discharge is essentially already used
by reaction with the photomask layer.




The holes in the laminate are then formed in a dry
etching process. To this end, the laminate is treated
with the hole masks located on it in a suitable device
with a gas, for instance oxygen and if necessary in a
mixture with argon and/or nitrogen by means of glow
discharge.

If the laminate is coated on both sides with the
photomask, the patterns of holes on both sides are to be
arranged in such a way that the holes in the hole mask
are exactly opposite one another. If this is the case,
the holes can be created from both sides at the same time
by the plasma treatment.

By optimisation of the treatment parameters, for instance
the composition of the gas and the gas pressure as well
as the power of the glow discharge, the temperature and
time of treatment, sufficiently steep hole walls are
produced without back etched under-cuts underneath the
hole mask, and in this way very fine holes can also be
formed in thicker laminates.

Example (hole creation with aluminium as the hole mask,
manufactured by means of glow discharge):
1. Vapour depositing or sputtering of an aluminium
layer (10 to 100 nm)
2. Layering with photomask, exposure of the photomask
and development in 1% Na2CO3 solution,
3. Chemical etching of holes in the aluminium layer:
etching solution: 15% FeCl3, 3% HCl,

CA 02203172 1997-04-18
.




temperature: room temperature,
treatment time: 30 seconds,
4. Removal of photomask in acetone,
5. Etching of the holes by means of glow discharge in a
plasma etching appliance (for example from the
company Technics Plasma GmbH, Kirchheim, DE),
6. Removal of the aluminium layer by etching:
etching solution: 15~ FeCl3, 3~ HCl,
temperature: room temperature,
treatment time: 30 seconds.

Once the holes have been created in the laminate, as far
as is still necessary, the photomask layer and then the
hole mask are again removed from the laminate surface.
This step in the treatment is followed by the
metallisation of the laminate surfaces to form the
conductor tracks and the metal layers on the hole walls.

To create the conductor track structures, the surfaces to
be coated can be pre-treated first of all by means of
glow discharge. The treatment conditions for pre-
treatment are given for instance in DE-P 37 44 062 Al.
The surfaces are etched preferably in oxygen or in an
oxygen/argon or oxygen/CF~ mixture.
The first base metal layer, which also acts catalytically
and ensures adhesion, is applied to the pre-treated
surfaces by the decomposition of volatile metal
compounds. In this process a thin metal layer is
produced according to coating conditions of 0.01 ~m to 1
~m layer thickness.

To form the base metal layers, especially volatile
copper, palladium, gold or platinum compounds or mixtures
of these are decomposed in the glow discharge. Palladium
has proved to be particularly advantageous. In this

CA 02203172 1997-04-18
.


18

process metal layers are produced which act catalytically
for the subsequent electroless deposition of metal and
thus further activation of these metal layers for
instance with solutions cont~;n;ng noble metals is mostly
not necessary.

The compounds described in the publications DE-P 35 10
982 Al, DE--P 37 44 062 Al, DE--P 38 06 587 Al, DE--P 37 16
235 Al and DE-P 38 28 211 C2 are used as volatile metal
compounds for example copper hexafluoro acetyl acetonate,
dimethyl-~-cyclopentadienyl-platinum, dimethyl-gold-
acetyl acetate, 2-perfluoro butene-2-, 2-perfluoro
propene-1-, pentafluoro phenyl-silver and in particular
~r--allyl--7~--cyclopentadienyl--palladium--( II). The
deposition conditions given there can be correspondingly
transferred to the creation of the metal layers as per
the method according to the invention.

For the metallisation, normal parallel plate reactors are
used which can be designed as tunnel or tube reactors.
The glow discharge can be created both with direct
current and with alternating current (high frequency in
the kHz- or MHz- range). The pressure in the treatment
chamber generally amounts to 0.1 to 50 hPa. A
temperature lying close to ambient temperature is
normally set on the laminate by variation of the
electrical power of the glow discharge.

E. G. palladium, a nickel/boron alloy or copper can be
applied to this base metal layer by electroless
metallisation. The metals gold and cobalt or their
alloys as well as nickel or other alloys of nickel can
also be used for this purpose. This layer is by
preference deposited from an acid solution. Palladium is
by preference deposited electroless for the fully
additive build-up of metal.

CA 02203172 1997-04-18
.




Further metal layers in the desired layer thickness can
be applied to these base metal layers through further
electroless or electrolytic metal deposition. The
conductor tracks can, however, also be created by
electrolytic deposition of the metals copper, palladium,
~old, nickel, cobalt, tin or lead or alloys of these.

~ifferent variations of the method can be used for
production of the conductor tracks:
Method 1 (~Lift-offn Process):

covering at least one of the laminate surfaces with
~hotomasks,
- exposure and development of the photomasks, the
~hotomasks being removed on development in those areas in
which it is intended that the conductor track structures
,hould be and in which the holes are located,
- preferably pre-treatment of the laminate surfaces and
the hole walls by means of glow discharge,
- creation of the base metal layers on the photomasks in
the areas that remain free on the laminate surfaces and
on the hole walls by the decomposition of volatile metal
compounds by means of glow discharge,
- if necessary, the thin electroless deposition of metal,
- removal of the photomask together with the metal layers
deposited on it,
- electroless deposition of metal, preferably palladium,
up to the desired conductor track thickness for the
creation of the conductor tracks and the metal layers on
the hole walls in the regions on the laminate surfaces in
which the metal layers are located.

'~he advantage of this method consists in the fact that at
1:hose places where no conductor tracks are formed only
t:he metal used for creating the hole mask is applied and

CA 02203172 1997-04-18
.




later removed again. However, at these points no metal
layer, used for the creation of the conductor tracks, is
deposited by decomposition of the volatile metal
compounds in the glow discharge. For this reason no
metal contamination on the laminate surface can occur at
these points an~ thus the insulation resistance between
the conductor tracks is particularly high.

The base metal layers on the photomask areas are chosen
to be so thin, for example approximately Ool ~m, that
their removal is easily achieved together with the
photomasks lying under them, i.e. without individual
points of the polymer film remaining on the laminate
surfaces. Normal chemical solutions are used to remove
the polymer films.

Example (Lift-off technology, substrate polyimide film,
KAPTON E, DuPont de Nemours, Inc., Wilmington, Del.,
USA):
1. Coating of a perforated film with liquid
photoresist, exposing, developing in 1% Na2CO3
solution,

2. Pre-treatment by means of glow discharge:
Gas: oxygen
Pressure: 0.25 hPa,
Gas flow: 100 Standard-cm3/min,
High frequency output: 1000 W,
Treatment time: 90 seconds,

3. Palladium deposition by means of glow discharge:
organo metallic compound: ~-allyl-~-
cyclopentadienyl- palladium-(II),
Gas: Ar/02 or N2/02, each in a mixture of 3:1,
Pressure: 0.1 hPa,

CA 02203172 1997-04-18
.




Gas ~low: 25 St~n~rd-cm3/min,
Vaporiser temperature: 45C
Treatment time: 10 to 15 minutes,

4. If necessary, the electroless deposition of
palladium:
Bath: Pallatech (Atotech Deutschland GmbH,Berlin
DE).
Temperature: 70C,
pH-Value 6.0,
Treatment time: 5 to 8 minutes,

5. Removal of the photomask in acetone,

6. Conductor track construction with electroless
deposition of palladium, as method step 4, up to the
desired layer thickness.

CA 02203172 1997-04-18
.




Method 2 (Fully additive technique):

- preferably pre-treatment of the laminate surfaces and
the hole walls by means of glow discharge,
- creation of the base metal layers by the decomposition
of volatile metal compounds by means of glow discharge.
- covering the base metal layers with photomasks,
- exposing and developing the photomasks, the photomasks
remaining during development in the regions on the
laminate in which there are to be conductor track
structures and in which the holes are located,
- etching away of the exposed base metal layer,
preferably in an iron-(III)-chloride- or diluted nitric
acid/hydrochloric acid solution,
- removal of the photomask,
- electroless deposition of metal preferably palladium,
on the remaining regions of the base metal layer up to
the desired layer thickness.

As an alternative to the last mentioned option, the
photomasks can be exposed and developed in such a way
that they are removed in the regions in which there are
to be conductor track structures and in which the holes
are situated. Then the following steps are taken:
- electroless deposition of metal preferably palladium
and/or electrolytic deposition of metal in the exposed
regions on the base metal layers up to the desired layer
thickness,
- removal of the photomasks and etching away of the
exposed base metal layers.

The base metal layer can easily be removed by
differential etching since it is very thin.


CA 02203172 1997-04-18
.




Example (Fully additive technique with palladium layer
from glow-discharge deposition):

1. Pre-treatment of a perforated substrate in glow
discharge:

Gas: oxygen
Pressure: 0.25 hPa,
Gas flow: 100 standard-cm3/min,
High frequency output: 1000 W,
Treatment time: 90 seconds,

2. Deposition of palladium in the glow discharge:
Organometallic compound: ~-allyl-~-cyclopentadienyl-
palladium-(II),
Gas: Ar/02 or N2/02, each in a mixture of 3:1,
Pressure: 0.1 hPa,
Gas flow: 25 standard-cm3/min,
Vaporiser temperature: 45C,
Treatment time: lo to 15 minutes,

3. Coating of the film with dry film resist, exposure,
development in 1~ Na2CO3 solution,

4. Fully additive electroless deposition of palladium
in the resist channel:
Bath: Pallatech (Atotech Deutschland GmbH,Berlin,
DE),
Temperature: 70C,
pH-value: 6.0,
Treatment time: according to the desired thickness
of the layer,

5. Removal of the dry film resist in acetone,


CA 02203172 1997-04-18
.


24

6. Differential etching of the palladium with diluted
HNO3 /HCl--solution.

If the base metal layers already have sufficient
conductivity it is possible to carry out the
metallisation electrolyticly in the resist channels.

Method 3 (Panel-plating technique):

- preferably pre-treatment of the laminate surfaces and
the hole walls by means of glow discharge,
- creation of the base metal layers by the decomposition
of volatile metal compounds by means of glow discharge,
- electroless deposition of metal on the base metal
layers, preferably a nickel/boron alloy or a copper
layer, deposited from an acid or neutral metallisation
bath,
- the electrolytic deposition of metal preferably copper
from an acid bath,
- covering the metal layers with the photomasks,
- exposure and development of the photomasks, the regions
forming the conductor track structures and the hole walls
remaining covered with the photomasks during development,
- the etching away of the exposed metal layers,
- the removal of the photomasks.

Example (Subtractive technique, panel-plating, with
substrate polyimide film, KAPTON H):

1. Pre-treatment of the perforated film by means of
glow discharge:
Gas: oxygen
Pressure: 0.25 hPa,
Gas flow: 100 standard-cm /min,
High frequency output: 1000 W,
Treatment time: 90 seconds,

CA 02203172 1997-04-18
.




2. Palladium deposition by means of glow discharge:
organo metallic compound: ~-allyl-~-
cyclopentadienyl-palladium-(II),
Gas: Ar/02 or N2/02, in each case in a mixture of
3:1,
Pressure: 0.1 hPa,
Gas flow: 25 standard-cm3/min,
Vaporiser temperature: 45C,
Treatment time: 10 to 15 minutes,
3. Electroless deposition of nickel/boron from a
slightly acid nickel/boron bath (with dime~hyl amino
borane as reducing agent):
Temperature: 40 C
Treatment time: 2 minutes

4. Electrolytic deposition o~ copper:

Bath: Cupracid BL (Atotech Deutschland GmbH, Berlin,
DE)
Current density: 2A/dm2,

CA 02203172 1997-04-18
.


26


5. Coating of the film with dry film resist, exposure,
development in 1~ Na2C03 solution,

6. Etching away of the copper and of the nickel/boron
layer:
Etching solution CuCl2/HCl with 120 g/l Cu in total.,
3% HCl, diluted with water 1:1,

7. Etching away of the palladium layer:
Etching solution HNo3, conc./HCl, conc. in a mixture
3:1, diluted with water 1:1,
Temperature: room temperature,
Treatment time: 15 seconds
8. Removal of the dry film resist in acetone.

Method 4 (pattern-plating technique)

- preferably pre-treatment o~ the laminate surfaces and
the hole walls by means of glow discharge,
- creation of the base metal layers by the decomposition
of volatile metal compounds by means of glow discharge,
- electroless deposition of metal on the base metal
layers, preferably a nickel/boron alloy or copper layer,
deposited from an acid or neutral metallisation solution,
- covering at least one laminate surface with photomask,
- exposure and development of the photomasks, the
photomasks being removed during development in those
regions in which there are to be conductor tracks and in
which the holes are located,
- electrolytic deposition of metal in the channels and on
the hole walls, preferably copper from an acid
metallisation solution and then a metal etching resist
layer, for example made of tin or a tin/lead alloy,
- removal of the photomasks,

CA 02203172 1997-04-18
.




- etching of the metal layers deposited electroless and
of the first layers deposited electrolyticly together
with the base metal layers lying below them.

Example (semi-additive technique, pattern-plating with
nickel/boron or copper layers deposited electroless):

1. Pre-treatment of a perforated substrate by means of
glow discharge:
Gas: oxygen
Pressure: 0.25 hPa,
Gas flow: loo standard-cm3/min,
High frequency output: 1000 W,
Treatment time: 90 seconds,
2. Deposition of palladium by means of glow discharge:
Organo-metallic compound: ~-allyl-~-
cyclopentadienyl-palladium-(II),
Gas: Ar/O2 or N2/O2, in each case in a mixture of
3:1,
Pressure: 0.1 hPa,
Gas Flow: 25 standard-cm /min,
Vaporiser temperature: 45C,
Treatment Time: 10 to 15 minutes,


CA 02203172 1997-04-18




3. Electroless deposition of nickel/boron from a
nickel/boron bath (with dimethyl amino borane as
reducing agent):
Temperature: 40 C,
Treatment time: 2 minutes,
alternatively, deposition of copper from a slightly
acid or neutral electroless copper bath (of the
hypophosphite type, for example),

4. Coating of the film with dry film resist, exposure,
development in 1% Na2CO3 solution,

5. Conductor track construction by means of
electrolytic deposition of copper,

6. Deposition of a metal resist layer (for example
tin),

7. The etching away of the copper and of the
nickel/boron layer:
etching solution: CuC12/HCl with 120 g/l Cu in total,
3~ HCl, diluted with water 1:1,

8. The etching away of the palladium layer:
etching solution: HN03, conc./HCl conc. in a mixture
of 3:1, diluted with water 1:1,
Temperature: room temperature,
Treatment time: 15 seconds,
9. Removal of the dry film resist in acetone.

The adhesion of the metal layers obtained on the
substrate is increased particularly by heat treatment
after the deposition of thicker metal layers.

CA 02203172 1997-04-18
.


29

Circuit bases designed as films and manufactured by the
method according to the invention can be glued together
in appropriate processes in stacks. A double-sided or
four layer circuit can also be glued on to a rigid base,
for example a ceramic or FR4 board (for example also a
circuit board) or a silicon base. It is also possible to
glue together two or four or more multilayer circuits
manufactured by the method according to the invention,
with the use of an unlayered polyimide intermediate layer
and if necessary mechanically drill the intermediate
product obtained and wet-chemically through-contacting it
in the conventional manner. Mechanical drilling is
necessary because glues used for gluing the individual
layers or softened polymer is pressed into the holes
formed in the glow discharge. The conductor tracks in
the individual conductor track planes are then
electrically connected to one another in traditional
fashion after holes have been bored through the stack by
chemical metallisation of the hole walls.





Representative Drawing

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Administrative Status

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Administrative Status

Title Date
Forecasted Issue Date Unavailable
(86) PCT Filing Date 1995-10-18
(87) PCT Publication Date 1996-04-25
(85) National Entry 1997-04-18
Dead Application 2000-10-18

Abandonment History

Abandonment Date Reason Reinstatement Date
1999-10-18 FAILURE TO PAY APPLICATION MAINTENANCE FEE

Payment History

Fee Type Anniversary Year Due Date Amount Paid Paid Date
Registration of a document - section 124 $100.00 1997-04-18
Application Fee $300.00 1997-04-18
Maintenance Fee - Application - New Act 2 1997-10-20 $100.00 1997-09-09
Maintenance Fee - Application - New Act 3 1998-10-19 $100.00 1998-09-18
Owners on Record

Note: Records showing the ownership history in alphabetical order.

Current Owners on Record
ATOTECH DEUTSCHLAND GMBH
Past Owners on Record
MEYER, HEINRICH
Past Owners that do not appear in the "Owners on Record" listing will appear in other documentation within the application.
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Document
Description 
Date
(yyyy-mm-dd) 
Number of pages   Size of Image (KB) 
Description 1997-04-18 29 1,122
Abstract 1997-04-18 1 21
Claims 1997-04-18 3 82
Cover Page 1997-08-06 1 45
Assignment 1997-04-18 3 111
Correspondence 1997-05-20 1 39
Assignment 1997-10-31 2 66
PCT 1997-08-14 9 257
Correspondence 1997-10-31 1 38
Assignment 1997-04-18 21 729
Fees 1998-09-18 1 38
Fees 1997-09-09 1 43