METHOD OF SELECTIVELY DEPOSITING GLASS ON SEMICONDUCTOR DEVICES

METHODE DE DEPOSITION SELECTIVE DU VERRE SUR DES SEMICONDUCTEURS

English Abstract

METHOD OF SELECTIVELY DEPOSITING GLASS
ON SEMICONDUCTOR DEVICES
Abstract
A method which comprises depositing a charge of a
selected polarity on the areas coated with insulating
material of a semiconductor device having areas of "bare"
semiconductor and areas coated with insulating material,
immersing the charged device in a liquid composition
comprising an insulating liquid and dispersed glass particles
carrying a charge of selected polarity which is either the
same as or opposite to the charge on the insulating material,
such that glass particles deposit either on the semiconductor
or on the insulating material, removing the glass-coated
device from the liquid, drying and firing to fuse the glass
particles on the device.
- 1 -

Claims

The embodiments of the invention in which an exclusive
property or privilege is claimed are defined as follows
l. A method of selectively forming a layer of
glass on either bare semiconductor areas or on areas coated
with a layer of insulating material of a semiconductor
device having both types of said areas, comprising:
depositing charges of a particular polarity on said
insulating material,
immersing the charged device in a liquid
composition comprising an insulating carrier liquid and
dispersed glass particles carrying a charge of particular
polarity such that the glass particles deposit selectively
on either said bare exposed areas of semiconductor or on
said areas coated with insulating material,
removing the glass-coated device from the liquid
composition, drying and firing the coated device at a
temperature high enough to fuse said glass.
2. A method according to claim 1 in which said
charges on said insulating material have the same sign as
said charges on said glass particles so that said glass
particles are deposited on said bare exposed areas of
semiconductor.
3. A method according to claim 1 in which said
semiconductor is silicon and said insulating material is
silicon dioxide.
- 19 -

4. A method according to claim 2 in which said
insulating material is a photoresist.
5. A method according to claim 1 in which said
insulating material is silicon nitride.
6. A method according to claim 1 in which said
insulating liquid is 1,1,2-trichloro-1,2,2-trifluoroethene.
7. A method according to claim 6 in which said
liquid composition contains a charging agent and said
charging agent is zirconium octoate.
8. A method according to claim 6 in which said
liquid composition contains a charging agent and said
charging agent has the structural formula:
<IMG> where <IMG>
with nitrogen 2.10% by weight and alkalinity value of 43.
9. A method according to claim 1 in which said
glass comprises about: 30% PbO, 7% Al203, 13% B2O3 and
50% SiO2 by weight.
- 20 -

10. A method according to claim 1 in which the
relative humidity of the ambient to which the device is
exposed is controlled to a sufficiently low value to prevent
discharging of the charged surface of said insulating
material between charging and immersion in the liquid
composition.
11. A method according to claim 10 in which said
relative humidity is about 25 - 30%,
12. A method according to claim 1 in which said
gaseous ions and said glass particles are charged with
opposite polarities such that the glass particles deposit on
the insulating material.
- 21 -

13. A method of selectively forming a layer of
glass on either bare semiconductor areas or on areas coated
with an insulating material, of a semiconductor device
having both types of said areas, comprising:
subjecting said device to a gaseous corona
discharge such that ions of a particular polarity deposit on
said insulating material,
immersing the charged device in a liquid
composition comprising an insulating carrier liquid having
suspended therein a dispersion of glass particles and an
ionizable agent capable of imparting a net electrical charge
of particular polarity to the glass particles, such that the
glass particles deposit selectively on either said bare
exposed areas of semiconductor or on said areas coated with
insulating material,
removing the glass-coated device from the liquid
composition, and firing the coated device at a temperature
high enough to fuse said glass.
- 22 -

14. A method of selectively forming a layer of
glass on either bare semiconductor areas or on areas coated
with a layer of insulating material of a semiconductor
device having both types of said areas, comprising:
depositing charges of a particular polarity on said
insulating material,
immersing the charged device in a liquid
composition comprising an insulating carrier liquid and
dispersed glass particles carrying a charge of a particular
polarity such that the glass particles deposit selectively on
either said bare exposed areas of semiconductors or on said
areas coated with insulating material,
removing the glass-coated device from the liquid
composition, drying and firing the coated device at a
temperature high enough to fuse said glass,
cooling the glass-coated device,
depositing charges of a particular polarity on the
glass-coated surface,
immersing the charged device in another glass
dispersion in which the glass particles carry a charge
having a polarity opposite to that on the glass coating first
deposited, until a layer of glass particles deposits on said
glass coating,
removing the device from said dispersion, drying
and firing the coated device a second time at a temperature
high enough to fuse said glass.
- 23 -

Description

RCA 66975
1038~29 ,
1 Background of the Invention
Although silicon dioxide has been generally used
for passivating the exposed surfaces of silicon semiconductor
devices, especially the exposed edges of PN junctions,
additional protection has been found to be desirable in many
cases. The additional protection is needed to give longer
protection against atmospheric moisture and other
contaminants, for example. It is also desirable, however,
to achieve lower surface current leakage between regions of
different conductivity types such as the base and collector
regions of bipolar transistors.
Added protection against contaminants and decreased
; current leakage has been obtained by coating or encapsulating
devices with various plastics and glasses. In the case of
lS -coating or encapsulating with glass, which ls oiten required
before encapsulation with plastic, it has been found most
desirable to utilize dispersions of very small particle size
glass in a carrier liquid to deposit coatings of glass
particles on the device surfaces, and then to heat to a
temperature just high enough to fuse the glass particles
to form a continuous layer.
The glass which is used to passivate semiconductor
devices must have a number of properties such as fusion
temperature compatible with the semiconductor device, good
adherence to the device surface, a temperature coefficient
of expansion at least approximately matching that of the
semiconductor, low porosity, and an absence of ingredients
or contaminants that would adversely affect the electrical
characteristics of the device.
A number of different methods have been used to
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RCA 66975
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I deposit the glass particles. One of these methods is doctor
blading a glass powder slurry over the surface of a
semiconductor wafer having many devices built into it by
well known diffusion techniques, and then evaporating the
liquid. Another method is settling the glass particles out
of a liquid dispersion onto the device surface.
The doctor blade method has several disadvantages.
It usually is a hand operation requiring much labor and only
one side of the wafer can be done at a time. Since it
involves mechanical scraping, much wafer breakage and other
damage results. In addition, the method achieves
selectivity only through utilizing certain surface topography,
i.e., it is limited to deposition in recessed regions.
The settling method is time-consuming, wasteful of
lS glass particles and is non-selective.
Another method which also has previously been used
ls electrophoresis. In this method, the device (poled
either positive or negative) is immersed in a dispersion of
glass particles charged opposite to the device being coated
and a current is passed through the dispersion. Glass can
be deposited selectively only on the conductive parts of the
device surface. Besides being unable to deposit glass
selectively on insulating regions, another disadvantage of
this method is that it is not satisfactory for depositing
thick layers because of adherence problems. Further, to be
selective, the process uses conductive liquids which are
capable of dissolving more contaminants than non-conductive
liquids do, and therefore these liquids are more likely to
be sources of device contamination.
The present method is an improved, electrostatic
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RCA 66975
1~038329
1 method of depositing a glass coating on selected areas of a
device having areas of "bare~ semiconductor and also areas
coated with an insulating material. The method comprises
depositing charges of selected polarity on the areas coated
S with insulating material and then immersing the charged
device in a liquid dispersion of glass particles which are
charged either with the same polarity as or with polarity
opposite to the charges on the insulating material. The
glass particles deposit either on the "bare", uncoated areas
or on the coated areas of the device depending upon polarity
conditions chosên. The device is then removed from the
liquid and, after drying, the glass particles are fused by
~iring. Relatively thick, adherent coatings of glass can be
applied in a selective manner.
The Drawings
FIGURE l is a cross section view through part of a
semiconductor wafer having many transistors separated from
each other by grooves;
FIGURES 2, 3 and 4 illustrate successive steps in
applying one embodiment of the method of the invention to the
wafer of FIGURE l;
FIGURES 5-8 illustrate steps in applying an
alternative embodiment of the method to a semiconductor
device wafer;
FIGURES 9-12 are section views of a different
device and illustrate steps in coating the device by an
embodiment of the methods of the invention;
FIGURE 13 is an end view of suitable charging
apparatus for use in the present method, and
FIGURE 14 is an elevation view of part of the
-- 4 --

RCA 66975
I apparatus of FIGURE 13.
Description of Preferred Embodiments
Although the present method lS applicable to making
a number of different types of semiconductor devices, it will
be illustrated, first, in connection with making a large
number of bipolar transistors on a single semiconductor
crystal slice or wafer.
As shown in FIGURE 1, a slice 2 of a single crystal
semiconductor material, such as silicon, may have fabricated
; 10 therein by well known diffusion techniques or a combination
o~ epitaxial growth and diffusion techniques, many transistors
4. Each transistor 4 has an emitter region 6 which may be of
N conductivity type, for example, a base region 8 which may
be of P conductivity type, and a collector region 10, which
may be of N conductivity type. A layer 12 of an insulating
material covers the top surface 14 of each transistor~
Another layer of insulating material 13 covers the bottom
surface 15 of the slice. The emitter region 6 and base
region 8 are separated by a PN junction 16. The base region
8 and the collector region 10 are separated by another PN
junction 18. Grooves 20 are provided in the form of a
gridwork extending into the top surface 14 of the device
array and below the PN junction 18 so that the grooves are
on all 4 sides of each transistor 4. It is desirable to
cover the exposed portions of the PN junctions with a
dielectric material to reduce current leakage across the
junctions and to prevent deterioration due to ambient or
processing contaminants. It is much more economical to
provide the necessary protective coating over the PN
junctions while the devices 4 are still a part of the
-- 5 --

RCA 66975
10383~9
1 original slicc 2 than it is to treat each individual device
after it llaS been separated from the slice.
When grooves are etched into the silicon of a mesa
type wafer, the SiO2 covering the wafer (if this is the
insulating material) is first patterned into the groove
geometry using standard lithographic techniques. Then the
æilico1l is etched using the SiO2 as the pattern-de~ining
mask. Bocause of etch undercutting, an overhanging shelf of
SiO2 is formed. In depositing the glass by the method of
the invention voids may be formed under the shelf which may
lead to electrical degradation during further processing ~-
steps. Thus, it is advantageous to remove this overhanging
; SiO2 before charging and glass deposition.
The removal may be accomplished in either of at
least two u~ays. An oxide etch may be used by immersing the
wafer long enough to remove the overhang. In this case a
fraction of the thickness of the oxide on the mesa surface
is removed, but this is not harmful. For example, a 3 min~lte
etch in buffered HF solution purchased from the Transene
Corporation was sufficient to remove a O.OOl" overhang while
removing only about 3000 A o-f the original 12,000 A of Si02
on the mesa surface. Another procedure is to use ultrasonic
energy to remove the overhang. For example, a Branson
Model 41-4000 Ultrasonic Cleaner was used to remove the
overhang in 30 seconds with water and with Freon TF in lO
seconds.
In accordance with one embodiment of the invention,
the parts of the slice comprising "bare" silicon which are
exposed within the grooves 20 are covered with a protective
glass coating as follows. The slice 2 is placed in a corona
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RCA 66975
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1 charging device which may consist of 2 parallel arrays of
thin, vertically disposed wires held in an insulating frame.
The major surfaces of the slice should be carefully oriented
so that they are parallel to the wire arrays. The wires may
be 1.5 mil diameter tungsten wires spaced 0.5 inch apart.
The distance between the parallel arrays is such that when
the semiconductor slice 2 is positioned between them, the
wires typically are spaced 0.220 inch from the adjacent
surfaces of the slice. The spacing of the wires from the
surface to be charged can be used to vary the charge level
on the slice, although it is usually desirable to charge the
insulating region to saturation.
In order to achieve satisfactory charging results,
it is desirable to use a charging apparatus that will permit
lS accurate parallel and equidistant positioning of the
surfaces of the wafer with respect to two sets of wires in
the charging apparatus. A satisfactory charging apparatus
is shown in FIGURES 13 and 14.
As illustrated in FIGURR 13, the charging apparatus
58 may comprise a base plate 60 having disposed thereon two
frames 62 and 64 which may be made of an insulating material
such as methylmethacrylate resin. The frames are accurately
spaced on the base plate 60 so that they are facing each
other. Each of the frames 62 and 64 has a pedestal member
2S 66 and 68 respectively, a panel 70 and 72, respectively,
vertically mounted along one edge of the pedestal members
66 and 68, and a top plate 74 and 76, respectively,
horizontally mounted on the tops of vertical panels 70 and
72 so that they extend parallel to the pedestal members
66 and 68.
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RCA 66975
10;~830
1 On each of the frames 62 and 64 is an array of
wires 78 and 80, respectively. Each array consists of 9
wires spaced equidistant from each other and held under
tensiOn in a vertical plane. One end of each wire in the
arrays is attached to one of the pedestal members 66 and 68
adjacent its outer edge. The other end of each of the wires
in the arrays 78 and 80 is attached to one end of tension
spring 86. The other end of each tension spring 86 is
attached to an adjusting screw 88. The adjusting screws 88
are threadedly mounted in buss bars 92 and 94 which are set
into plastic blocks 82 and 84, respectively, which extend
longitudinally along the outer edges of top plates 74 and
76, respectively.
The wires in the arrays 78 and 80 pass over the
lS outer edges of top plates 74 and 76, respectively.
The buss bars 92 and 94 are connected to a high
voltage source (not shown).
During the charging step, the wafer 2 is vertically
held between the wire arrays 78 and 80 by a suspending means
20 96. The suspending means comprises 4 support posts 98, a
pair of horizontal metal tracks 100 and 102j disposed
parallel to and above the top plates 74 and 76, having
smooth, sloping inner surfaces 104 and 106, respectively,
and a wafer holder 108 (FIGURE 14).
The wafer holder 108 comprises a metal V-block 110
to the under side of which is fastened a pair of pivoted
jaws 112 and 114. The jaw 112 has a grooved finger 116 at
its lower end and the jaw 114 has similar spaced grooved
fingers 118 and 120. The fingers 116, 118 and 120 are
arranged to receive and hold vertical the wafer 2.
~ 8 --

RCA 66975
103~329
1 The V-block 110 has smooth sides which slope at an
angle which is the same as the angle of the sloping surfaces
104 and 106 of the tracks 100 and 102. The V-block 110 is
thus designed to ride in the tra~ks 100 and 102 and to make
electrical contact therewith. The tracks are grounded.
During the charging step, the wafer holder is
preferably moved back and forth along the tracks 100 and 102
at a speed of about 3 inches per second in order to charge
the wafer s~.lrfaces uniformly.
A voltage of about 6200 volts negative is applied
to the wires. Tlle-atmosphere is air or nitrogen but the
relative humidity is controlled so that it is about 30% at
25 C if si~icon dioxide is the insulating material. The
charging voltage preferably should be as high as possible
without causing arcing since this has been found to give
better edge definition of charge on the slice 2 and also
provides a more uniform charge. The upper level of relative
humidity permissible is a function of elapsed time between
charging the surface of the slice and subsequent immersion
in a glass dispersion. An elapsed time of one second has
been used to advantage. If the time is very short, relative
humidity may be higher since there will be less time for
charge to leak away. Also, if the insulating material on
which the charge is deposited is caused to be hydrophobic,
2S relative humidity can be higher. In fact, when using Waycoat
SC 180 photoresist (Philip A. Hunt Chemical Corp.) for the
insulatillg material, relative humidities of 65% and even
higher can be used.
The wafer held in the wafer holder is thereby
grounded by contact at the wafer edge and the slice is exposed
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RCA 66975
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1 to the corona discharge for about 5 to 15 seconds. As
indicated in FIGURE 2, this causes a layer 22 of negatively
charged gaseous ions to deposit on the insulating layer 12
whlch is on the top surface 14 of the device array and a
similar layer of ions 24 to deposit on the insulating layer
13 disposed on the bottom surface 15 of the slice 2.
The sign of the discharge may be either negative or
positive depending on whether the glass particles to be
deposited have a negative or positive charge in the liquid
and whether the glass is to be deposited on the insulator
layers 12 and 13, or on the "bare" exposed silicon. In the
present example the corona charge is negative.
The gaseous ions 22 and 24 from the corona
discharge arrive at the surfaces of the slice 2 and deposit
on the surfaces of the lnsulating layers 12 and 13 (FIGURE
2), The ions which deposit on the semiconducting surfaces
are effectively neutralized, however, and do not form a
surface charge on them. Although the "bare" silicon surfaces
in the grooves 20 immediately acquire a very thin layer of
oxide 26 having a thickness of about 20 angstroms when
exposed to air, this layer 26 is so thin that it does not act
like an insulating material toward the gaseous ions.
Therefore, a charged layer is not formed within the grooves
20. To hold a charge and also not be subject to having
pinholes, the oxide should be at least about 1000 angstroms
thick.
A suitable dispersion of glass particles is
preferably prepared about a day prior to the charging step.
Some glasses suitable for passivating semiconductor devices
30 are No. 7723 of the Corning Glass Co., also IP 760 and
-- 10 --

RCA 66975
. 10;~83Z9
1 IP 820 of the Innotech Co. Glass No. 77Z3 has the
approximate composition: 30% PbO, 7% A12O3, 13% B2O3 and
50% SiO2. Glass IP 760 has the approximate composltion:
45.75% PbO, 2.65% A12O3, 1.60% ZnO, 10.75% B2O3 and 39.25%
SiO2. Glass IP 320 has the approximate composition: 50%
PbO, 10.1% A1203 and 39.9% SiO2. A11 percentages are by
weiaht. As supplied, the IP glasses have about 75~ by
weight of the glass below 12 ~ in size and about 25% below
3 ~ in size.
The glass powder is dispersed in an insulating
liquid containing a charging agent. A suitable insulating
liquid is a halogenated hydrocarbon such as Genesolve D
(Allied Chemical Co.) or Freon TF (du Pont). Both of these
are 1,1,2-trichloro-1,2,2-trifluorethane. another suitable
1S insulating liquid is Isopar G (Exxon Corp.). This is a
mixture of liquid isopara$finic hydrocarbons and may also be
termed a narrow-cut Isoparaffinic hydrocarbon fraction of
. very high purity. Genesolve D and Freon TF are preferred
. carrier liquids because they are denser than Isopar,
evaporate rapidly, and are not flammable. When using Freo~
TF, the evaporation is so rapid that the wafer may be
placed in the furnace at once. When using Isopar G it is
.
necessary to allow the wafer to dry for several minutes
before placing it in the furnace.
The charging agent may be a surfactant such as one
~ of those given in the Table below.
Table
Sign of charge induced
Surfactant on glass particles
1. Zirconium octoate
-- 11 --

RCA 66975
1038329
1- 2. Petroleum magnesium su].fonate~ (shifts to -
. .after several days)
3. Petrolcum barium sulfonate - ~.
4. Zinc octoate -
5. *OLO~ 1200 (Chevron, Inc.)
6. Pctroleum ammonium sulfonate +
7. N-alkylpiporizene monalkenyl +
succinimide
8. RNHCH2CH2NH2 where R is polybutyl
io radical
*OLOA ].200 has the structural formula:
H O - H
R - 1 - C H H H H H H IH - C - H
/ I 1 ~1 I C - N R =- î ~
1S H - C - C H H H H H H - I - H n2
H O
with nitrogen 2.10% by weight and alkalinity value of 43.
With certain lots of IP 820 glass it has been found
advantageous to use about 5 minutes of ultrasonic agitation
with power input of 100 watts in the glass dispersion to
break up agglomerates of fine particles. If this is not-
done the agglomerates tend to give a bumpy appearance to the
deposited glass, and, more seriously, sometimes stick to
regions where no glass is desired.
. 25 For use in the following examples a stock solution
is prepared by (1) dissolving 100 g OLOA1200 in 100:ml Freon
TF and (2) adding 8 ml of this solution to 392 ml of Freon TF.
Example 1
To deposit IP 760 glass on power transistor wafers
of the mesa structure, the mesa surfaces are given a double
- 12 -

RCA 66975
~ 10383Z9
l coat of phot:oresist havillg a total thickness of 5 ~. Glass
is to be deposited within the grooves as described above.
A mix-ture ol' glass powder is prepared by adding
7 ml of the stock solution to 450 ml of Freon, then adding
4 ~ of glass powder and shaking 2 minutes. This is permitted
to stand for at least one day to stabilize it.
Deposition is carried out by charging the wafer
with a negative corona and immersing in a Pyrex beaker
containing the above mixture for 6 seconds. The contents of
the beaker are stirred at moderate speed while the glass is
depositing.
As shown in FIGURE 3, a layer of glass 28
deposits in the grooves 20 but not on the insulating ].ayers
12 and 13.
After the glass is deposited, volatile material
(including photoresist) is burlJed off at about 525 C and
the glass i8 then fused to form a layer 28' (FIGURE 4).
After fusing, the layer of glass 28' is about 40 ~ thick.
Example 2
In this example, IP820 glass is deposited on
thyristor wafers (not shown) having a mesa structure.
Grooves are formed on both surfaces of the wafer so that
there are mesa structures on both sides. The mesas are
coated with about 1.2 ~ of SiO2.
A dispersion of glass powder is made up by adding
lO ml of the stock solution to 400 ml of Freon, then adding
8 g of glass powder and shaking for 2 minutes.
After allowing the glass dispersion to stand for
one day, deposition of the glass is carried out as in
Example 1 except that the charged wafers are immersed in
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~i ,,

RCA 66975
103B329
I the glass mixture for 10 seconds. After deposition, the
volatile material is permitted to evaporate off and the
glass is fused.
Samples made as in this example had excellent
junction coverage with a layer of fused glass about 30
thick. Electrical tests of the collector-base junction
showed breakdown voltage in excess of 1000 V, leakage
currents o~ about 4 ~ A at room temperature and about 38
A at 100 C.
_xample 3
Sometimes it is desirable to passivate a
semiconductor device with a glass that is selected because
it has a temperature coefficient of expansion closely
matching that of the semiconductor. Such a glass may contain
boron and may require such a high fusion temperature that
the doping pattern of the silicon may be affected. In such
cases it is desirable to deposit the glass on a layer-of
SiO2 instead of directly on the silicon, to shield the
silicon from the doping effect of the glass.
In this example, (FIGURE 5) the wafer 2 has a
coating 30 of 8000 A thickness of SiO2 present only in the
grooves 20. This can be accomplished by conventional
masking techniques. The wafer also (inherently, because of
exposure to air) has a very thin coating of oxide 31 on the
top mesa surface and a similar coating of oxide 33 on the
bottom surface. The coated wafer is then subjected to a
positive corona discharge in dry air (relative humidity
27%). This lays down a layer of positive gaseous ions 32
(FIGURE 6) on the SiO2 layer 30 within the grooves 20, No
charge is deposited on the very thin oxide layers 31 and 33.
- 14 -

RCA 66975
10383Z9
1 A mixture is made up of 4.5 ml of the above
descri~ed stock solution of solvent and charging agent added
to 300 ml of Freon. To this solution is added 9 g of
Corning No~ 7723 glass powder and the mixture is shaken for
2 ~ninutes to disperse the powder.
The charged wafer is immersed in the above
dispersion for 10 seconds which causes a layer of glass
particles 34 to deposit only on the SiO2 layers 30
(FIGURE 7).
The wafer is removed from the dispersion, the
residual volatila material is burned off and the glass is
fused to form a layer 34' (FIGURE 8). Thickness of the
fused layer is about 35 ~.
Example 4
In this example, a layer of glass is deposited in
the grooves o$ a mesa type diode wafer to increase the
breakdown voltage of the diodes.
As shown in FIGURE 9, a silicon diode wafer 36 has
a P type lower layer 38 and an N type upper layer 40
separated by a PN junction 41. A gridwork of grooves 43 is
formed in the wafer 36. The grooves extend into the P type
layer 38.
A relatively thick layer 42 of SiO2 covers the
. silicon in the grooves and the wafer is charged with a
positive corona so that a layer of positively charged ions
forms on the SiO2 surfaces as in Example 3. The to? mesa
surfaces 46 acquire a very thin oxide layer 48 and the
bottom surface 50 Oe the wafer acquires a very thin layer
of oxide 52 but these thin layers do not act as charge
storage layers. A dispersion made up by adding 10 ml of
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RCA 66975
1038329
1 the stock solution of carrier and charging agent to 400 mlof Freon and then adding 6 g of IP760 glass powder and
shaking for 2 minutes is used to deposit the glass.
The charged wafer is immersed in this dispersion
for 6 seconds while the mixture is stirred. The wafer is
then removed with a coating of glass particles 44 deposited
only on the thick SiO2 surfaces 42. The volatile material is
allowed to evaporate off and the glass is fused to form a
layer 44' (FIGURE 10). The charging and glass deposition
process is then repeated to deposit a second layer of glass
particles 54 on top of the first layer of glass 44' (FIGURE
11) and this second layer is fused so that the two layers
form a composite layer of glass 56 (FIGURE 12). In the glass
dispersion which is used to deposit the second layer of glass
particles, the glass particles carry a charge opposite to the
charge on the first gla~s layer.
Breakdown voltages of up to 1700 V have been
measured on these diodes at room temperature.
Dry nitrogen as well as dry air can be used as the
ambient for the corona charging step and dry nitrogen is
somewhat preferable since ozone production by the corona is
much less and since slightly higher voltages can be used
without arcing.
The quantity of charging agent used in the carrier
liquid mixture should be just enough to develop the same
sign of charge on every glass particle if the heaviest
deposit of glass is desired. Adding more than the optimum
amount introduces excess ions which decrease the amount of
glass that can be deposited since the excess ions neutralize
the charge on the insulating regions of the wafer. However,
~ 16 -

RCA 66975
10383~9
1 the quantity of charging agent used can be utilized to vary
the thickness of the glass deposit.
In determining how much charging agent to use, a
suitable glass dispersion is prepared, a small amount of
charging agent is added and a slice with a pattern of
charges is immersed in the dispersion. If the amount of
charging agent is too small, glass will deposit on both
charged insulating areas and uncharged areas. Another
quantity of glass dispersion is then taken and a somewhat
larger amount of charging agent is added. Again, a slice
with a pattern of charges on it is dipped in the dispersion
and the results noted. Charging agent is added in small
incremental steps to fresh portions of dispersion until the
glass deposits only on either the charged areas or on the
uncharged areas, depending on charge polarities. Once the
proper amount o~ charging agent has been found for a given
weight of a certain glass in Freon it is possible to
approximate the charging agent required for other quantities
of glass by making a linear approximation.
Although silicon dioxide and photoresists have been
mentioned in the examples as suitable insulating layer
materials, other insulating materials conventionally used on
semiconductor devices, such as silicon nitride, may al90 be
used. If the insulating material is organic (as in Example
l), it must be removed before fusion of the glass particles.
The method can also be used to simultaneously
deposit glass particles on the insulator-coated areas of
one side of a semiconductor slice (where the insulator is
inorganic) and on the "bare" semiconductor areas on the
opposite side of the slice. This can be done by depositing
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RCA 66975 ~ .
~0~329
l charges of opposite polarities on insulator-coated areas on
the opposite sides and then immersing the slice in a glass
dispersion.
.
_ _ -
:
,, .
., .
~: :
~0
. .
.
:, 25 --
1~ 2~ 3~ 4~ 5~ 6~ 7~ 8 ~ Reg~stexed Tr~demarks
- 18 -
~;