Note: Descriptions are shown in the official language in which they were submitted.
10~L76~:i0
~ACKGROIlND OF ~ IE INVENTION
I The present invention is generally related to phototypesetting and
mor~ particularly to an improved photocomposition machine which is
convenient to operate in an error-free manner and with a minimum amount
of operator training.
Over the years, many photocomposition machines have been proposed or
manufactured. The earliest machines were an adaptation of the hot metal
line casting, in which the metal casting was replaced by individual
photographic character elements. Later machines used photomechanical and
electronic methods to select, expose, and space the characters on a
photographic film or paper. Some of these machines took ;the form of
manual typewriters with permutation bars to generate width codes for the
various characters via a mechanical memory coupled to control circuitry
and counters. In these machines, the photographic unit included a
continuously rotating disk, flash lamp and stepping film carriage for
leadiog. These earlier systems in which the keyboard interfaced directly
with the machine, required the skilled operators to compose copy in
justified lines.
~ith the introduction of computer technology, machines were later
introduced which provided justification by way of computer controller.
Highly complex machines were developed which could accommodate input
from several operators. Such machines also have the capability of
handling several thousand characters per second and providing automatic
hyphenation and line justification. Typically with such machines, the
operator types on the keyboard which develops a punched tape which is
,5 read and the information therefrom stored in a memory for appropriate
processing under the control of a computer program.
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l~lile Lllese sophisticated macllines provide many altomatic functions~
tlley are very costly to manufacture and still requirc considerable training
to operate. rlhus, the total cost of instal]ing such photocomposition
machines is often beyond the financial means of the smk~ller printing
operations.
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SUMMARY OF THE INVENTIQN
llle present invention provides an improved photocomposition machiae
which is relatively inexpensive to manufacture and whirh may be operated
proficiently with a minimum a~ount oP training. Thus, the photocomposition
machine of the present invention meets the needs of many small printing
operations. Features of the machine are such that the probability of
operator error is significantly reduced by providing the operator with
a visual record of his work product in the form of commands and type
;~ characters which he has entered through a keyboard. This allows convenient
correction of errors and the entry of changes in commands, such as font
and point si~e vaiues.
More particularly, it is an object of the present invention to provlde
a versatile photocomposition machine having a CRT display which provides
the operator with a continuously updated visual record of his command and
type character entries.
Another object oP the present invention is to provide a unique photo-
composition machine with a CRT ~which displays operator-selected function
f : values in a predetermined function Pield area which is readily visible to
the operator, whereby he may refer to such to discern values previously
enlercd o. t~ eck 1~ r~rs during initial entry.
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IL iS ~ ~urtller objcc~ of ~lle prc:ent invcntion to provide n novcl
pllotocomposition machine with m~ans for displaying in a "current" type
line area both selected type characters and col~lands, including point
size and font values, as they are entered by the operator.
Still another object of the present invention is to provide a versatile
photocomposition machine including means for shifting a completed type
line to a predetermined area on the display, whereby the operator has a
visual record of all commands and type characters entered on the "previous"
type line.
Yet a further object of the present invention is to provide a unique
photocomposition machine including means for automatically changing the
point size and font values displayed in the function field area to correspond
to the last selected values of a completed type line.
It is yet another object of the present invention to provide a novel
photocomposition machine including means ~or inhibiting the entry of -
characters from the keyboard in a type line until the operator has
selected values for required command functions, such as line length,
point size, font, and leading.
Still a further object of the present invention is to provide a
~0 photocomposition machine which is relatively inexpensive to manufacture
and maintain, yet which has many of the features of much more costly and
comple~ machines.
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IN rHE DRAWING
¦ Fig. 1 is a perspective view of a preferred embodiment of the
photocomposition machine of the present invention.
Fig. 2 is a layout view of a typical keyboard configuration which'
may be utilized with the present invention.
, Fig. 3 is an elevational view of the cathode ray tube display screen,
~ showing the various functions which appear in the function field.
IFig. 4 is a block diagram of the entire photocomposer system of
the present invention.
Fig. 5a is a plan view of a broken portion of the character disc
associated with the present invention.
Fig. 5b is a simplified perspective view of the ~ariator/coll~nator
i1 lens and escapement system of the present invention.
Fig. 6a is a block diagram of a first portion of the keyboard
interface board,
' Fig. 6b is a block diagram of a second portion of the keyboard
' interface board.
l Fig. 7 is a block diagram of a portion of the character generator
., ,
s board.
,I Fig. 8 is a block diagram of the font interface board.
1~ Fig. 9 is a sehematic logie diagram of the stepper escapement/eircuitry.
Fig. 10a is a schematie logic diagrc~m of the row select circuitry of
¦¦ the stepper boardO
g. 10b is a schematic logic diagram of the variator/collimator lens
control circuitry of the stepper board.
,,Pig. 10c 1S a shcematic logic diagram of the leading control eircuitry
of the stepper board. t
Flg. 11 is a flow chart showing the variator/collimator program
routine s~ociated c~ntrol clrcuitry.
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¦~ ESCRIPTION OF TIIE PREFEl~R~D EMBODIMhNT
Referring IIOW, more particularly, ~ Fig. 1 of the drawings, i~ will
¦ be observed that the photocomposi~ion machine of the present invention
¦ inclucles an input unit generally indicated by the numeral 209 comprising
l an entry keyboard 22 and cathode ray tube (CRT) display screen 24. The
! keyboard and display screen arc mounted adjacent to each other such that
the operator may conveniently view both thé current and previous keyboard
entries on the screen. The photo-typesetter unit is generally indicated
I by the numeral 26 and includes a cassette 27 for receiving the exposed
; !l film or other photosensitive material produced by the typesetting process,
1¦ hereina~ter explained. Preferably, the film cassette is o~ the type
¦¦ described in U. S. Patent No. 3,724,g45, which issued April 3, 1973 in
!¦ the name of F. R. Massiello, and which is assigned to the assignee of the
¦¦ present invention.
ll A major portion of the control circuitry associated with the present
-~ 15 1l invention is located on a plurality of circuit boards at a card file
location generally indicated by the numeral 28. The varlous character
ll selection components and optical system are housed within the machine at
; a location generally indicated by the numeral 29. The motor interfacing
! and power equipment is located in the area generally indicated by the 7
~I numeral 30.
Referring now to Figs. 2 and 39 the preferred embodiment of the
¦¦ keyboard configuration and CRT~display screen may be seen in ~ore detail~
he keyboard comprises 70 keys, with each key providing an alpha/numeric ¦ ¦
character or a command when actuated by the operator~ Each ke~ comprises
25~ a Hall effect solid state switch in the form of a magnetically actuated
integrated circuit providing an 8 bit encoded data line plus a strobe
pulse. ~be e~ oded dat~ g ~ erated by each key etroke i~ ~iti~lly entered
(6)
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into a data buf~er associated wi~ll a ralldom access m~nory (R~M). The typc
character and command data from ~lle keyboard are then shi~ted to a
"display" portion of the RAM under control of a central processing
l unit (CPU) and caused to be displayed on the CRT screen by a character
¦ generator. This provides the operator wi~h a visual record of each entry,
! ! whether such takes the ~orm of a co~nand or an alpha/numeric character.
!l
The data buffer is actually comprised of a pair of buffers, one which is
loaded from the keyboard while the other is being read into the display
~l portion of ~he memory. This allows the operator to continuously key
1 in data.
~e first two lines of the CRT display provide a function field for
displaying various functions and their values, which the operator is
apprised of during and after making entries. Abbreviations or appropriate
I! s~nbols for the various functions are caused to be displayed in a
1~ predetermined format within the function field by the character generator.
I l~here required, space is provided adjacent each displayed ~unction to
- 1, display numerical values selected by the operator or supplied from the CPU.
For example, the character point size function is displayed at 31 and is
¦ p~ovided with appropria~e spaees at 32 for a numerical value ~o be displayed
1l which have been selected by the operator through the entry keyboard.
Value spaces are provided within the first line of the function field for
the Font, Line Length (LL), Primary Leading (PL), Secondary Leading (SL),
and Accumulated Leading (ACL). On the second line of the function field,
appropriate value spaces are provided for Line Length remaining (LLR),
ju~tification zone (JSP _to _) 9 Letter Space Units ~LST), Leader (LDR),
j Fixed Space (FS) for tab, and tab usage accumulation (TAB)~ Corresponding
j~ function keys are provided on the keyboard for Size, Font, Line Length, tPr~nary Leading, Secondary Leading, Justification Zone (JSP & to),
~¦ Letter Spacing, Leader, and Fixed Space ~or tab functions.
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Preferably, when tlle machine ~s irst turned on, the value spaces
~ next to each of these functions are filled with "X's" indicating to the
; ~ operator that the values must be selected, These spaces are shown blank
¦ in Fig. 3, however, for the sake of clarity. The spaces provided next
~ to ACL, LLR, and TAB are provided with values through the CPU control.
I For example, as the line length is used up, the value occuring next to
'I LLR is correspondingly updated. Similarly, as each line is leaded, the
ACL value is changed. Usage of the TAB is also kept track of by the CPU
'I and such is displayed at the end of the second Function Field line. The
;-~ 10 il~ "A" appearing on line 1 of the Function Field indicates that the machine
~¦ is in the "~utoma~ic" mode of operation. An '~" is displayed at this
location when the machine is in a "Manual" mode of operation. When in
the Automatic mode of operation~ the machine, under control of the CPU
program, will automatically complete the type linè, whereby the Erase,
Roll and other operations described above are automatically carried out.
If the last word entered will not fit within the line, it is automatically
sllifted to the beginning of the next line. In the Manual mode of operaticn~
the operator must make a decision ~here to tenminate the line and ~hether
or not to hyphenate the last word. l~e line is completed and the Erase,
~ Roll and other operations are initiated only upon depression of the Reset
key by the operator. A character point size is entered by depressing the
"Size" key indicated at 33 in ~ig. 2, followed by depression of numerical
~¦ keys corresponding to the size val~e. A similar routine is follo~ed to
! enter the line length by first depressing the key 34. Primary and secondary
, leading commands are entered through keys 35 and 36? respectively.
Similarly, font size is selected by the operator by first depressing the
key indicated at 38.
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I It is necessary that the operator provide appropriate values for
¦ several of the functions before tlle keyboard is enabled to provide type
line characters to the display portion of the memory. The operator must
~ select values for point si~e, line length, font, and primary and secondary
1l leading before the photocomposer will accept type character entries. It
is apparent to the operator when he has failed to select or properly enter
~¦ the value, because his keyed type character selections wi]l not appear on
the CRT screen.
¦ Once the operator has made the required function value selections, the
l¦ keyboard is enabled to enter the first type line character information
selected by the operator. The selected type characters will appear at
a "Current Line" location on lines 7-10 as they are keyed in by the
operator. A cursor 40, preferably in the form of a small rectangular mark~
¦ is displayed on the screen to indicate to the operator the space to be
,l ~yped next. Erasure of previous entries may be effected through operation
'! ~ of the 'ISingle Erase" and "Word Erase" keys 42 and 44, respectively. When
the operator has made type line entries extending into the justification
¦ zone an appropriate marker, such as that indicated at 46~ appears in
; blinking fashion on the screen as an indication to the operator. The
value displayed in the "Line Length Remaining" location 48 apprises the
operator of the space remainin8 and the operator makes the decision when
Il to hyphenate or terminate the line. The line is committed for setting by
; 1, actuation of the "Return" key 49 by the operator-when in the Manual mode.
¦i This also causes the completed type line to be erased from screen lines
¦ 7-10 and displayed at a "Previous Line" location defined by lines 3-6 on
; I the display screen.
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will be appreciated tha~ as tlle op~rator is keying in a type line,
he may make ch;mges in point 9iZ~ and font. In order that the opcrator
can keep track of these changes, eacll stlch c~mmand and value is displayed
l within the typed line, as indicated by way of example at 50 and S2 in
¦ Fig. 2. The point siæe and font c~mmands and values appear in the san2e
sequence in which they were entered by the operator. Furthermore, these
¦ c~mmands and values are retained when the line is shifted or rolled to the
"Previous Line" location. As the line is being rolled, the point size
Il and ~ont values displayed within the function field are updated to correspond1I to the values last entered by the operator. Thus, iE the operator does
not make a point size ~5r font changes for two subsequent lines, he may
refer to the function field, if necessary, to learn what point size and
font values were last selected. The LLR and JSP values are also continuously
1~ updated for the operator.
~ig. 4 is a simplified block diagram o the photocomposer system
- ~l including the input unit, Control of the system is provided through an
appropriately programmed central processing unit (CPU) 53 and a read only
il memory (ROM) 54 containing an application program. In the preferred
Il embodiment thç CPU is a co~mercially available microprocessor, such as the
l Intel Corp. No. 8008 Microprocessor chip. The CPU together with ROM 54
provide handling of all input commands and type character key strokes
¦, selected by the operator. In addition, the processor handles the entry
of all keyboard data into the display portion of the memory for display
¦I by the CRT. The reading of stored character width codes from the character
Ij disc, hereinafter described, and the calculating of functions related to
point size and line length are also handled by the processor. In addition,
the various commands controlling the stepper motors hereinafter described
¦l, and the flashing of selected characters is controlled through the micro-
!; processor and ROM. Sillce the CPU and ROM are so closely related to each
3~ 11 other the term CPU, as used herein, may ~e construed to iLnclude the ROM as
l~ well.
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All information displayed on the CR~ is provided from Q Character
I Gcnerator Board 56, h~reinafter described in more detail. The character
¦¦ generator board includes the above-mentioned access memory (RAM) a large
11 portion of which may be described as the "Display Memory". Other storage
1¦ locations of the RAM are used for the keyboard buffers and for scratch
¦ !¦ pad purposes, such as storing data utilized by the CPU. All functions,
¦ values, commands and type characters selected by the operator are entered
into the memory, under control of the CPU, through a Keyboard Irlterface
¦ soard 58. Data from the CPU also pasfies through the K~yboard Interface
I Board via the Main Data Buss 59 and Interface 60.
A Font Interface Board 61 contains logic which determines, on command
; from the CPU, when character width code ~t~ o be read from the
I character disc. This logic also controls the flash operation which produces
the selected character images when the proper disc character is in the
¦~ optical path, as hereinafter explainedO
Control logic registers, and controls for the collimator and variator
lens motors, disc drive, leading and row select motors are contained on
a Stepper Board indicated at 62. A Stepper Escapement Board 64 contains
~1 the logic to control the carriage escapement assembly upon receipt of
1 input commands and data from the CPU. Control signals from Stepper Board 62
and Stepper Escapement Board 64 are provided to a Motor Driver Board 66, t
which converts the signals to higher voltaga and current values for proper
motor operations.
Among the motors driven through the Motor Driver Board are a leading
. 1 25 1¦ motor 68, collimator lens motor 70, variator lens motor 72, row select
motor 74, disc drive motor 76 and escapement motor 78. A shutter solenoid
80 is also controlled by the motor driver board. Leading motor 68 is
effective to advance the photosensitive film, which is indicated schematically
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82, ul)on comp:L~Lioll Or ~ ' sel~inlr l)roces9 of cacll 1ine. 'I'he sll-lttcr
solcnoid 80 serves to shield thc film or paper to prevent further exposure
under various conditions such as when the cabinet doors ~e~g opened to
change the character disc.
S ¦ Motor 70 serves to position a collimator lens indicated diagrammatically
at 84, in response to commands from the CPU. The variator lens motor 72
is also controlled by the CPU to position a variator lens? diagrammatically
~ indicated at 86, to provide appropriate ~agnification of the character
¦¦ images in accordance with the selected point sizes. The collimator 84
- 10 ¦¦ is caused to move relative to the variator 86 such that the ~r~ image
of the variator is the object image for the collimator and projected in
¦, parallel rays to infinity.
The alpha/numeric characters are stored on a character disc 88. The
disc is formed from opaque film having alpha/numeric characters and other
! information represented in transparent patterns. A plurality of concentric
circles of varying radii each con~aining a unique type ~f font are present
on the disc. Preferably, the characters are arranged on varying radii from
the center outward, with the identical character of the various fonts
appearing within the same arcuate segment of the disc.
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'1 The disc is also provided with timing marks and width codes located
within a predetermined concentric circle around the disc. The timing
¦I marks and width codes are detectecl by a photosensor means 90, which providesI j! signals to a Font Pickup Board 92, indicative of the angular position of
i ,I the disc and, more~specifically, tell which character is in position ~or
1 exposure. When the disc is in proper position ~or exposure o a selected
character, Font Pickup Board 92 provides a command ~o the Font Interface
Board 60, which in turn effects energization of a flash power supply 94.
A high intensity flash of light fr~m the power supply causes the selected
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¦ character to be projected througll the variator lens 86 and collimator lens
¦ 84 to a de-collimating lens 96 and mirror 98 associated with the escapement.
Font selection is effected by radial movement of the disc 88 with respect
to flash power supply 94. Photosensor 90 shifts with the character disc
when physically moved to select font rows.
Referring now to Figs. 5a and 5b, operation of the optical system
Il associated character storage disc may be more fully understood. As
¦¦ mentioned above, the characters are arranged on a disc such that the
!! different fonts for each character lie within the same arcuate segment
¦ of the disc. An example of such for the letter "M" is illustrated at
I I 100 in Fig. 5a. The disc is also provided with a multiplicity of code
traclcs 102, and 104, and a timing track 106 in the form of transparent
and opaque areas. Tracks 102 and 104 contain character width codes
I¦ corresponding to the characters displayed within the same arcuate segment.
jl Preferably, these codes comprise 18 bits represented by either transparent
I I or opaque adjoining lines. The first fixed bit relates to the strobe track
¦ and each succeeding group of three bits is related to the character within
¦ the arcuate segment. Since there are two tracks providing width
~: 1! information, each character is assigned six data bits. The width codes
20 ~ i per character represent five data bits plus a parity bit. ~e~ 106
¦I contains timing marks which, preferably, alternate from transparent to
opaque 18 times per arc segment.
il The disc drive motor 76 provides a means for moving the characters
¦ cyclically through a projection area adjacent a flash lamp 108, associated
~I with the flash poweF supply 94. In actual practice, shutters and iris
means may be used to shield the actual projection area in a manner well
Icnown to those skilled in the art. A light source 110 is mounted adJacent
il the disc code tracks on one side of the disc. A plurality of photosensors
112 (pho~osensor means 90) are mounted on the opposite side of the disc
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and provide a series of pulses caused by interruption of the ~ :.
light by the opaque areas on each code track. These output ~:
pulses are sent to the Font Pickup Board 92 and ultimately
processed by the CPU. The timing pulses, :in effect, te.ll the . .
system the position of the character disc and, more specifically,
which character is in alignment with the projection area.
The width code pulses are indicative of the width of the char-
acter which is within the projection area. This information ~:
is utilized by the CPU to keep track of the width of each char-
; 10 acter flashed and provide proper character spacing through .
control of the stepper escapement. A detailed description of -~
the code track arrangement is felt to be unnecessary for the
rposes of this applicatlon. The manner in which the code
pulses may be handled is covered in applicant's U. S. Patent
No. 3,967,177 issued June 29, 1976.
Each time flash lamp 108 is energi ed, such produces ::
a -character image which is received by the variator lens 86 . ::
and projected into the collimator lens 84. The light column -~
from the collimating lens is parallel and does not come to a
focus, Focusing is achieved by the de-collimating lens 96,
:: ,
~hich. may be positioned anywhere along the optical axis to
~ring the character image into focus onto the photosensitive
film 82. The decollimating lens and associated mirror 98
are mounted to a carriage 79 which is moved hy stepping motor
78 to provide a series of character images defining a composed ~ :.
ine on the photosensitive film 82. Stepping motor 78 is moved
under control of the CPU in accordance with the equation: .
!
: Char. Width Units x Point Size
No. of Steps = 3
~ The positions of the variator and collimator lenses
il 30 determine the size of the projected image. Stepper motors 70
.l and 72 are employed to move the variator and collimator ..
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lenses along the opti.cal axis under control of the .;
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~`I'U to positions wllich will produce the selectcd pOillt siæe for each
character. Of course, it is not intended that the present inventlon be
limited to this particular lens arrangement. Other types of lenses, such
as zoom lenses, may be utilized if desired, with the focus and magnifi-
cation conditions being appropriately oontrolled through the CPU.
KEYBOARD INTERF~CE
~¦ With reference to Figs. 6a and 6b, the functions and operation o~ the
Keyboard Interface circuit board may be more Eully appreciated. This
circuit board provides interfacing between the main data buss 61 and the
~ 10 ¦I Character Generator board 56. In addition, the keyboard is interfaced
;~ with the rest of the system through this circuit board. Thus, all
! keyboard data is entered into the display memory under control of the
.1 ¦ Keyboard Interface, as hereinafter explained. The basic signals supplied
~¦ to the Generator board 56 by ~he Keyboard Interface are:
a~ Timing signals and data to the Display Memory
b) Keyboard write signals to the Display Memory
c) Address multiplexer control signals required to ir~Libit the
Display Memory ~ddressing during blank when a keyboard or
CPU input to the Display Memory is being processed. The circuit
1l board also supplies the actual addresses for these two inputs
plus data to be stored in the Display Memory.
d) Timing signals required for the Four Line Roll, hereinafter
described.
I Circui~s to control the cursox movement on the CRT screen are provided
¦ 25 1 OLI this board. As mentioned above, the operator controls cursor movements
j: Erom the keybDard with two keys being provided for this purpose. The
depressing of one key causes the cursor to move to the xight on the
display SCreeD, while the other causes movement to the left. A single key
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stroke of either of the cursor keys causes the cursor to move one character
block. If either cursor key is held down, a cursor speed counter 114
causes the cursor to move at a steady rate until the key is released. As
~ the speed counter controls the speed of movement, a cursor ItO control
! circuit 116 furnishes cursor movement commands to the main data buss
through appropriate I/O gates indicated at 118.
Cursor control circuits 120 receive right and left signals from the
keyboard in the form of level signals rather than pulses. A level change
! is generated by a single key stroke and such is transmitted to the I/O
; 10 1 control circuit 116. If either key is depressed more than a predetermined
I ~ time interval, for example 800 ms, the cursor will move automatically
¦ at a predetermined rate of, for example ten character blocks per second,
until the key is released. A keyboard counter 122 is provided for count-
l ing each key stroke by the operator. The keyboard stroke signals are
1 indicated by the symbol KBDF. A keyboard register 124 is proviaed for
j receiving the key stroke counter data ln response to an input instruction
strobe signal lIIS) generated by the CPU program. The register presents
this data to I/O gate 118 and is placed on the main data buss in response
Ij to an IIS input instruction strobe.
ll The RAM memory on the Character Generator board includes a pair of
¦~ keyboard data buffers which receive data from the keyboard one at a time.
; ¦, As one buffer is being loaded with keyboard data, the previously loaded
data of the other buffer is read into the display portlon of the memory
j for display by the CRT. This operation is handled under control of the
i CPU program which periodically goes to one vf the keyboard buffers and
pulls out the codes stored therein. It pulls out only that number of
codes contained in keyboard regis~er 124. Thus, data which may stlll
¦ remain in one of the buffers from the previous entry will not be entered ~,
into the dispiay memory. The CPU program continuously alternatPs between
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~1 ~hc two keyboard buffers s~lch t llat one buffer i8 always being unloadeid as
¦~ the other is in a condition to receive data being entered by the operator
¦I througll the keyboard. It will be appreciated that this arrangement
¦¦ permits the operator to continue keying in data without hesitating for
the CPU program to shift such into the nkain display meimory.
` ¦ The Reyboard Interface is also provicled with a data multiplexer 126
i which handles data from the CPU via the st:andard interface 59 and keyboard
¦ data from the input keyboard. This da~a is selected under control of the
Il KBDF select signal which is obtained from the keyboard control flip flop,
!I hereinafter described. This signal is normally low and transfers through
,I the CPU data when the signal goes high (KBDF). W~Len low ~KBDF), it
¦ enables the passage of keyboard data to the Character Generator board.
¦ The data multiplexer also serves a function relating to the four line
1l roll operation which moves a display of completed type line from lines
¦1 7-10 to 3-6 on the CRT screen. Before these lines are transferred, the
top four lines must be erased. This rout:ine is initiated by an "Erase"
¦ input to the data multiplexer which disables both inputs and output to
~ j ~ the Display Memory. Erase Control Circuit 128 is provided to control
ijl ; ~I tlle number of Display Memory locations to be erased by loading such with
~l 20 ~ "Zeros". The eraee~operation is initiated by an output instruction from
¦¦ the CPU and a timing signal YFD from the Character Generator board. The
., .
I Erase operation is terminated by an ENDER signal, which also eminates
I ~; ; from the Character Generator board. Display~Memory addresses are contlnu-
qosly being presented to the Display Memory. When the address correspond-
5~ ~ ~ ing to the first text line occurs, thei edge of the YFD timing signal
¦~ enables the~generation of the "Erase" signal causing "zero" data to be
selected. The~erase control~ circuite also 8enerate an "Erase B"
signal ~hich goes~to the Character Generator board to enable the writing
of zeros m~o the display memory erasing each character b1Ock as its
~ address comes~up.
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Ihc ENDEI; signal is generated 011 ~ e charac~er ge~erator board after
l ~l~c follrth line of ~he "current line" area of the CRT screen has been
erased. L1lis signal is effective to reset the Erase Control Circuit and
~ tllereby terminates the erase mode. The Erase Control Circuit also provides
! an "Erase Ready" signal during the erase operation which is sent to the
¦ data buss I/O gates 118 to inform the CPU not to write any new data during
the erase operation. After the erase is complete, this signal changes
to "Erase Complete".
After the erase operation has been completed, Roll Control Circuit 130
ll causes the bottom four text lines on the CRT screen to be transferred in
response to a CPU instruction. As hereinafter described, this operation
!¦ is effected by modifying the Y Field Address to the display memory. This
; I modification is carried out on the Character Generator board in response
! to a Roll Signal ~hich initiates the address modification. The addresses
ll remain modified until the next roll con~and is received, at which time the
! Y Field Addressing returns to its original mode. It will be appreciated
that during the roll operation no data is removed Erom the Display Memory,
but rather the sequence of displaying the information is changed.
If desired, a Buzzer Control Circuit 132 may be provided to control
li an audible alarm located on the Driver Board 66. Operation of the alarm
.. !l
informs the keyboard operator of various conditions, ~uch as keyboard
entries exceeding the line length.
The characters which are displayed on the CRT screen are the result
ll of output signals from the character generator as hereinafter explained.
l~ The character generator receives data from the display portion of the
¦' memory and generates the character signals in response thereto. In order
¦ that the display remain clean, i~ is essential that the character generator
ll not receive data from the memory ~hile data is being ~ritten in fxom the
;' l, data buss or inp~t keyboard. This problem is handled by permitting reading
1! ~
:
~ ' (18)
1 ~47~SZ~ l
and writing into the display memory during the horiæontal blank time o~
the display only. Horizontal timing signals are received by the Keyboard
Interface to ~ontrol the passage of data to the display memory during
horizontal blank time only. These unctions are diagrammatically indicated
by blocks 134 and 136 in Fig. 6b.
It is also necessary that the reading and writing into the display
¦ memory be shared between the data buss and the keyboard. This time
I sharing operation is handled by a CPV enable gate 138 and a keyboard
¦ enable gate 140, and associated control flops 142 and 144, respectively.
`- 10 1 Horizontal blank timing circuit 134 generates an output signal that
` ! controls one input to enable gate 138. The other input to the CPU enable
I
gate is a KBD~ signal from the keyboard control flop 144. This signal
indicates whether or not the keyboard is being serviced. A high output
~I jZ signal from the CPU enable gate 138 will enable the CPU flop 142. This will
ll occur only during a horizontal blank period of the CRT and when a keyboard
entry is not being processed.
I The CPU control flop 142 sets up conditions necessary for the CPU
il
¦I to read from or write into the display me.nory in the character generator.
¦1 The CPU control flop, when enabled by gate 138, is clocked by a buffered
20 li version of a CPU clock signal. The CPU control flop is reset by a write
pulse delay circuit 146 which terminates the CPU read or write processing.
The delay generated by this circuit ls necessary since the output of the
CPU control~flop~142 controls addressing of the display memory. An
` ; 1l address to the display memory must remain for a predetermined time interval
25 11 after any "fetch" or "write" pulses have been terminated. Since the
fetch (FOE1) and write (WRT) signals are used to reset flop 142, the~delay
clrcuit is required, The output (TRF) from the CPU control flop, when
I ~ high, disables the keyboard gate 140, which in turn disables the keyboard
co~t~rol flop 14~.
~ , .
- ~ .
~ ~ (19)
, l
',~ Z''
Standard lnterface 59 supplies addresses from the CPU to the displ~y
memory on the character generator board. These addresses are handled by
an address multiplexer 148, which also receives addresses from the
keyboard, The addresses whlch the multiplexer select is controlled by
¦ a select line slgnal KBDF which comes from the keyboard control flop 144.
The signal causes the multiplexer to either output addresses from the
data buss (CPV) or from the keyboard,
The keyboard interface is also provided with a 16th K Decode Gate 150
which decodes addresses from the standard interface to determlne when the
- 10 1 last K of the memory is being accessed. It is this portion of the RAM
l~ which is utilized by the CPU for scratch pad purposes, The Standard
il InterEace 59 also handles a Read/Write 16th K signal which i9 recognized
~I by a decoder indicated at 152, This signal indicates if the CPU is
¦¦ going to read from or write in the 16th K of the memory, This decode is
l¦ necessary in the event the logic is displaying a line on the CRT, the
CPU can be placed in a "Wait" condition until a horizontal blank period
lll is reached, This is carried ollt by the Wait Flop 154. When a hori~ontal
f', blank period is reached, the Wait flop is reset by the TRF signal Erom
I CPIJ control flop 142. The Read/Write 16th Decode Signal also resets
,l horizontal blank timing cireuit 134.
Four input conditions must be met in order for the keyboard enable
!I gate 140 to be enabled. As mentioned above, one of these inputs is the
TRF signal from the CPV control flop. A second signal comes from the
Standard Interface 59 through a keyboard I/0 Decoder 156 and keyboard
1 25 I/0 Fllp Flop 158. Keyboard counter 122, as mentioned above, caunts the
key strokes from the keyboard and transfers this count to register 124
¦¦ in response to an IIS input command. An error would result if the transfer
to the register occurred at the same tim~ a KBDF count pulsc was received
!l
, (20~ I
Il , .
l I
l! . I
-- li .
I
~ ~ ~t7 ~
¦I from counter 122. Therefore, the IIS input command is detected by the
¦~ Keyboard I/0 Decoder 156, which in turn resets flip Elop 158 to disable
¦ any further keyboard input (KBDF pulses) by disabling keyboard enable
gate 140. When the input command is complet.ed, the IIS signal Erom the
¦I standard interface sets flip Elop 158 and re.-enables keyboard entry. The
third enable input to gate 140 comes from a keyboard flop 160 which is
set by a keyboard strobe signal KBST. The purpose of the s~robe signal
¦ is to indicate that the keyboard input is ready to be storecl in the
¦ keyboard buffer portion of the displaying memory.
l~ A keyboard Write Pulse Generator 162 is effec~ive to reset the
keyboard control flop 144 upon completion of a timed write pulse to the
, displaying memory. The output of both control flops 142 and 144 go to a
Il display inhibit gate 164, the output of which disable display memory
¦¦ addressing and enable either CPU addresses or keyboard buffer addresses.
.. Il .
7~
-i C~RACTER GE~E~ATOR BQARD ~ t~,~
With reference to Fig. 7 of the drawings, the functions~Character
Generator board will be described in more detail. As mentioned above,
the character generator per se, together with the R~M, is located on the
Character Generator Board 56. The main purpose of the character generator
is to display symbols on the CRT screen in accordance with codes contained
, in specific locations in a 1 K memory portion of the RAM. Of the 1,024
memory locations, 640 are used to display two lines of the function field
and 8 lines of the text including the "currentl' and ~Iprevious~ line loca-
tions on the line display screen. Sixteen locations within this memory are
allocated to the two keyboard buffers described above, and the remaining
locations are available for work space as required by the CPU program. The
code bits from the RAM are used to address locations of a ROM associated with
~I the character generator.
l Preferably, all lines on the CRT screen are 64 characters in length.
: 'I
The two lines provided for the Function Field are followed by two blank
~i , !
lines which are used to separate the function field from the two text areas.
Symbols are displayed by the CRT by controlling the on-off time of an
electronic beam and its horizontal and vertical deflection. The symbols
!¦ are made up of an arrangement of lighted dots on the screen. A dot pattern,
called a character block, preferably is made up of 7 dots in width and is 11
jl dots high. Preferably the character blocks are separated by 2 dots for
horizontal spacing and 5 lines for vertical spacing. The symbols are stored
¦ in a special read only memory (ROM) which contains 128 symbols arranged in
2~5 ~I character blocksO These blocks are selected by 7 of the 8 code bits stored
.~ I
in the display portion of the RAM. Codes or the various commands and func-
tions of the~function field are retained within the ROM, such that they are
always displayed on the CRT screen. Four other address inputs allow the
'': i1 :
~ ~ 22 )
: '
,1
3 ~ 3
character generator to present data Eor 1 horizontal line slices of the
symbol selected at its output. By consecutively addressing horizontal slices,
the entire character block is accessed.
The basic functions of the character generator circuit are shown by
Fig. 7. A detailed description of the cathode ray tube and its associated
I circuit is felt to be unnecessary for the purposes of this application as
such circuits are well known in the art. The main control timing for the
CRT is de rived from a crystal oscillator 166, with each cycle of the oscil-
lator representing one dot on the screen. Preferably, the frequency of the
I oscillator is 11.059 M~IZ. One dot on the screen represents a beam of light
with a duration of 90.4 ns. The main clock from the oscillator 166 is input
to an X Dot Counter 168~ which divides the main clock freqlency by 9. It
is also used to generate 7 horizontal dots of each character block and 1
¦I dot space on either side thereoE. The output of counter 168 is loaded into
1l a video shift register 170 and is shifted under control of the main clock
input to a video control gate 172.
The X Dot Counter 168 also feeds an X Field Counter 174 which defines
which of the 64 characters on the line the X Dot slice belongs to. Outputs
of the X Field Counter supply the low order address inputs to the display
portion of RA~ 176. Eight-bit codes from the RAM select the symbols stored
in the RoM of character generator 178. The output of the X Field Counter
174 also generates a signal which is sent to the Hori~ontal Drive and Blank
j .
¦ circuit 180 of the CRT. X Field Counter 174 is a divide-by-80 counter, with
Ii 64 output counts representing 64 characters on a line and 16 counts are for
' enable time for horizontal retrace.
A Y Dot Counter 182 also receives the output of the X Field Counter
and is ~lsed to define the vertical slice of a symbol. Once the symbol to be
displayed is selected by the display memory the Y Dot Counter outputs addres-
( ~3
, ~
~7~so
~C6 of the proper Y slice of the char~cter block. This allows the proper X
clot information to be loaded into video register 170. The Y Dot Counter is
¦1 a divide-by-16 counter, with ]1 counts for the character block and 5 for the
¦~ blank in between the lines. g~i
c~ l~ Tlle Y Dot Counter feeds a Y Field Counter~&Z~ which defines which
¦ vertical line is to be displayed. The outputs from this counter form the
I¦ high order address for the display memory 176. This counter is a divide-by-
jl 16 counter, with the first two counts for two blank lines above the fixed
Function Field. The next two counts are for the two Function Field lines
1 and the two following are for the two blank lines which separate the Function
¦ Field from the line display area (Lines 3-10) on the CRT screen. The next 8
, counts are for the "current" and "previous" line locations on the screen,
! and the final t~o counts allo~ for time required for vertical retrace.
Output of the Y Field Counter ~ is also supplied to a vertical drive
I circuit 186, vertical blank circuit 188, and erase circuit 190. The vertical
, I
~ I dri ve circuit 186 and horizontal drive circuit 180 are required to present
, :,
to the CRT properly timed drive signals. Horizontal drive is derived from
the X Field Counter 174 and is timed through the horizontal drive and blank
,i .
circuits 180. The vertical drive presents a pair of drive signals to the
1 CRT in a similar fashion but they are,~r-~ve~-from the Y Field coanter 184.
sHorizontal and vertical blanking of the CRT is required for proper for-
,.
ma~ to be displayed on the scraen. The horizontal blanking signal blanks
t the video frum the ~ime the last horizontal dot of the 64th character
on a line has been displayed to the time the first horiæontal dot of the
i first character on the next line is dis~layed. This prevents streaks of
,l light and smearing before and after the lines. It also prevents streaks of
j I light through the symbols on the screen. It is during this time that key-
board and CPU addressing of the RAM memory is allowed. The horizontal blank
( 2~ )
11 .
ll
signal originates at the X Fi~ld Counter 174 and is shaped by the horizontal
drive blank circuits 180. The horizontal blank signal (HBLANK) also con-
trols one of the inputs of the video control gates 172 to disable the
Il loading of the video registers, causing video "off" signals to be shifted to
¦ ¦ the video control gates.
ll The vertical blanking signal (VBLANK) blanks out character lines and
¦ overlap the horizontal blank from one side of the line to the other. It
- also blanks out the video sign~l long enough for it to retrace from the bot-
¦¦ tom of the screen to the top of the screen. This prevents streaks of light
1I from being seen during vertical retrace. The V8LANK signal also goes to
,I the video control gates 172 and serves to shut such off during the duration
of the signal.
Addresses received by the character generator board are multiplexed in
l an address multiplexer 192 connected to the display memory address lines.
i ~o prevent streaking of the CRT, writing into the RAM memory is allowed
during horizontal blank time only. During this time, the data is entered
by way of eight data input lines and Read/Write Control Gates indicated at
194.
1 As me~tioned above, character information in the RAM is accessed by the
X Field and Y Field Counters 174 and 184 which effect reading of the char-
acter codes from the RAM to the ROM of character generator 178. In order
to compensate for propagation delays of the RAM, a buffer register 196 is
provided between the RAM and character generator 178. This register
stores the output of the RAM in order that the display memory addresses can
1' be changed to the next symbol to be displayed while the character generator
is operating on the symbol stored in the buffer register. Thus, the X-Y
addressing is actually one character ahead of the displayed character. The
( 25)
!, I
,~ I
¦ X Dot Signal is uscd Lo loa(l the bufEer rcgister just before the X Field
(`olmter changes. Also, since thc first character on the l-;ne is stored,
I I the character being displayed at this time is erroneous and must be blanked.
In the same manner the last character on the line i5 displayed one character
I late, and the horizontal aanking signal must be suppressed for this character.¦ This is done by delaying the horizontal blanking signal (HBLANK) by one
¦ character time. This allows both the display memory and its associated cir-
¦ cuitry, plus the character generator and its associated circuitry to delay
~ ! times approaching the "X Dot Frequency Rate".
; 10 ll As described above, the cursor is a completely displayed character
block used for editing and other functional purposes. By stepping the
¦ cursor across the CRT screen it appears to be a pointer which may be used
by the operator as a marker, or as a warning signal, or for editing purposes.
The cursor is controlled by the presence or absence oE the eighth bit in the
I,l addressed RAM location. If the eighth bit is present, the cursor 198 acceptssuch from buffer register 196 and inverts the output of the video register,
when so required.
The character generator is also provided wlth a Blink Control 200 which
is used to obtain the attention of the operator wben the Justification ~one
~ is reached by blinking the justification marker. The blinking rate is con-
I trolled by a blinker counter 202 which operates at a pre-selected frequency.
The blink control serves to blank out the video at a periodic rate determined
j by the frequency of the blink coun~er. This is accomplished by controlling
` ,l one of the inputs to the video control gates 17~.
The Erase and Roll operations are carried out in part by elements of the
character generator board. As described above, the erase operation is car-
ried out by first forcing a write of "zeros" to the memory for the first
four lines (lines 7-10 on the screen). At horizontal blank after the fourth
( ~6
1,
!
ll
.
1047tiS0
Line, the output of the Y Field (:ounter 17~ is modified by a Y Field Modifi-
cation Circuit 204 in rcsponse to a "Roll" signal received Erom the Roll Con-
trol circuit 130 on the Keyboard Interface board. This modifies addressing
by the Y Field Counter and causes the display of the completed type line to
be shifted to lines 3-6 on the CRT screen. The Roll is controlled indirectly
by ~he operator when he commits type line by depressing the "Return" ~ey.
In addition to ~ausing the Roll operation, depression of the Return key
causes initiation in the type setting operation under control of the CPU.
When tlle operator completes the next line, depression of the 'IReturn" key
j removes the "Roll" signal to circuit 204, thereby returning the ~ Field
Counter to its original or unmodified mode.
A Descender Control 205 is provided which modifies the Y Dot Counter
outputs. Descenders are handled by blanking of the top three rows of the
~I character block during the first scan and subseqently~ on blanking on a
1~ partial second scan, to display the descender. The descender blanks by
j controlling the third input to a video register gate 207, which inhibits
loading and forces shifting of the blank data to the video output.
, An ability to inhibit ~ype line entries from the keyboard, is achieved
1I by storing the various commands ~nd their :,elected values in RAM. The CPU
! program controls the entry of all keyboard data throu~h the two keyboard
~~ .
' buffers. Prior to each shift o~ data from one of these buEfers to the dis-
I play portion of the RAM, the program accesses the RAM to see if the required
¦ function values have been entered into the RAM. I~ they have not, the
type line data in the buffer is not allowed to pass to the 2A~. Thus, they
1~ are not displayed or processed. On the other hand, if all required values
have been entered, the type line data is read in~o the RA~ and displayed by
the CRT. In the preferred embodiment, values must be furnished by the
operator for Line Length, Font, Point Si~e~ Primary and Secondary Leading.
. !l
27 )
1,
!
. .
1~76~
FONT INTERFACE BOARD
, .
The Font Interface Board 60 performs most of the operations required
for proper character selection from the character disc and its exposure on
¦ the photosensitive film. It also controls t:he reading of width data of the
¦ disc character and provides speed reference signals which are routed to the
Stepper Board 62 to control the speed of the character disc. Speed changes
of the character disc are also handled through the Font Interface board in
response to signals from the CPU control program. Energization of the flash
power supply 94 is also controlled through the Font Inte~face board.
¦ With particular reference to Fig. 8, the various functions and operatlons
~¦ of the Font InterEace board may be more fully understood. An amplified sig-
nal from the strobe or timing track 106 of the character disc is provided
I jl to a Strobe Gne Shot circuit 206 which outputs a pair of signals. One of the
¦ signals identified as the "negative edge" (NEDG) is generated for each
I black-to-white transition detected on the strobe track. The signal is used
to reset a prescale speed control counter 208 and a "Missing Pulse" counter
210 . The output of the prescale speed control counter is provided to a
specd control counter 212, which in tura provides a speed reference signal
whicll ultimately causes the character disc motor to turn at the desired speed.
The negative edge (NEDG) input to the counter 208 synchronizes the coun- ¦
~' ter output to a master clock input, preferably of 5 M HZ. Tbe input to the
speed control counter is counted down and becomes the reference for the disc
speed. This counter is a variable module counter and its count can be changed
by ]umper wire~or by program control~ The speed reference signal from counter
'I 212 and~the negativo edge signal (NEDG) are compared in frequency on the
stepper board and serve to control the speed of the disc. If negative edges
are being generated at a rate proportional to that of the speed reference
signals, then the diec is turnin~ at the desired speed. The NEDG signal
is also used to reset counter 210 to ten. Speed reference signals will
: . ' I : ~ :
( 28 )
!
~ . : ,
~ I i! :
,!
~.~4'7~
normally count up this counter to eight. The counter is then
reset by the next negative edge signal.
At a predetermined location on the disc~ there are
four blac~ bits in a row in the timing track. When these four
bits are detected, counter 210 will be caused to overflow, thereby
p~oyiding a "missing Pulse" ~MP) signal which is utili~ed for
~lash timing purposes. This feature of the photo-composition
machine is disclosed in more detail in the aforementioned ~.S.
~atent No. 3,967,1~.
;~ 10 The MP is gated with the amplified signal from one
of the width data tracks through Origin Gate 214, containing
two gates, the first of which allows MP to pass through when
the Track 1 data is "white". This condition allows only one
pulse through per each character on the disc. This pulse is
used to define the origin and presets a character counter 216 ;~
to a count of one, representative of the first character on
the disc.
The second gate at 214 allows pulses when the Track 1
, data is "black". This condition allows a total predetermined
` 20 number of pulses, preferably 111 in number, to be gated per
disc revolution. These pulses represent the remaining char-
acters on the disc and are used to count "up" character
counter 216, The output of this counter represents, in binary
fo~m,~ the position of the disc at all times. The output of
` the character counter 216 is ~ed to a character comparator 218,
which also receives an output from a character register 220.
Data from the data buss containing the number of the next char-
`, acter to be processed is loaded into character register 220 in -
respOn$e to a command ~05D5) from ~he CPU. The output of
compa~ator 218 is fed to a flash control circuit 222 and to a
font comparator 224. This signal is used to enable the flash
ontrol circuitr~ and is used in conjunction with a font
cb/ (29)
: , . . . . , ~ .
10~7650
eqllality signal (FEQ) to cnable width reading circuitry.
I Referring back to the strobe one shot 206, it will be seen that the
I second output, defined as "Strobe Edge" (SEDG) is fed to a flash blank
I pulse flip flop 226 and to a blank gate 22~. The SEDG signal is comprised
~ of a series of pulses coincident with and generated by a transition on the
strobe timing track. These transitions may be either black-to white or
! white-to-black. Each pulse or transition is related to the center of a bit
of width data on the data tracks. A series of three bits on each track re-
presents the width data for one font. By counting sets oE three of these
strobe edges, it can be determined which font is being processed. In the
preferred embodiment there are two transitions per sector or arcuate seg-
¦ ment which do not represent font daka. These pulses are generated by white
i spaces following four consecutive black spaces and are hereinafter referred
I to as "flash windows". The flip flop 226 and blank gate 228 perform the
I function of disabling these two pulses. The MP pulse reset flip flop 226 and ¦Il thc output (BLKT) therefrom disable blank gate 228, thereby ignoring the
strobe edges of the flash window. The trailing edge of the flash window
I Lllen set Elip flop 22G and enables subsequent strobe edges to pass through.
j~ These modified edges are then divided by three through a counter 230,
1I Lhe output of which is provided to a Font counter 232. The divide-by-three
counter 230 is initialized by the MP signal, which also serves to load
' each count into font counter 232, whereby the font counter maintains the
,, ;l .
current position of the disc. A font register 234 is loaded with font
information Erom the CPU in response to an output instruction ~05B5~. Font
~; data from register 234 is fed to comparator 224, where it is compared with
the data from font counter 232 in response to the CHEQ enabling signal from
character comparator 218. Upon comparison, comparator 224 provides an out-
put defined as thefont equali~y (FEQ) signal. Character widths are read
( 30 )
' . . I
rr~m the d is c n the Eol lovin~ manner, An outp~t conm~nd ( 05D5) irom the
CPU sets up with control circuits 236 for a width reading. When font
eqllality is obtained, as indicated by the FEQ signal, font clock pulses
: are enabled and cause the shifting of Track 1 and Track 2 data into width
register 238. The FEQ signal occurs for only 3 pulses, after which width
control circuits 236 are disabled. This maintains stable data in width
register 238 until the program has time to read the width data and process
such. A "Character Ready" signal is sent to the ma~n data buss when the
first read (3 FEQ pulses~ has been accomplished. Width data from register
238 is outputted through enable gate 240 in response to an input command
¦ received from the CPU.
I The energi~atinn of the flash power supply to project a selected char-
acter from the character disc onto the photosensitive film is accomplished
¦ in the following manner. The 05D5 command from the CPU program is passed
~ to flash control circuit 222 by gate 242 only when the eighth bit of character
data and register 220 is logical low. This'~lash con~nd" sets up flash
control circuit 222, such that when the other input requirements are met, a
flasll will occur. These requirements include the input of the character
equality signal (CH~Q), indicative of a comparison by character comparator
218. In addition, it i8 essential that the lens carriages be stable to
, !l ensure a quality image on the photosensitive film. This condition is indi-
cated by a carriage ready (CARRDY) signal to the flash control circuit. In
¦ addition, the flash must be initiated at precisely at the leading edge of the
flash window on the character disc. This condition is indicated by the s~robe
1 I track input to the control circui~ from the timing track on the character disc
The flash control circuitry includes a delay counter which sends a
disable (DISA) signal to width control circui~s 236 if two consecutive flash
commands are requiredO This allows time for the flash power supply capacitor
to recharge for the second flash.
( 31 )
I!
~i
~7~
STEPPER ESCAPEMENT BOARD
Referring now to Fig. 9, the operation and functions of the Stepper
Escapement Board may be more fully ~mderstood. Ihis board may be divided
into five basic operational groups, namely:
¦ 1) Clock Interface
2) Carriage Operation Sequence Control Logic
3) Frequency Stepping Control
4) Carriage Motor Sequencer
¦ 5) Lens Constant Switches and Input/Output Control 1,ogic
The first four operational groups are related to movement of the
escapement carriage, while the last group deals wtth carriage status and
optical constants.
The clock interface, indicated by the numeral 246, comprises a clock,
¦I preferably a 16 KHZ oscillator, and a frequency divider which converts the
!¦ 16 ~HZ clock into two phase-related output frequencies of 2 KHZ and 1 KHZ
respectively. These provide the basis for stepping and settling relays
~ hereinafter described.
; 1, The carriage operation sequence control, generally indicated by the
numeral 248, controls the sequence of events from the initial call for
¦I steps until the last step has been taken and the settling delay has been
completed. It includes a Forward-Reverse control 250 which decodes data
(D8) and provides an output in the form of direction control data which is
Il fed to a motor sequencer 252. The Forward-Reverse control also inhibits
I operation of the motor sequencer by providlng an inhibit signal to carriage
~ gates 254 in the event either the right or left limit switch 256 is closed.
i ~I This prevents the escapement motor from overdriving into the right or left
limits of travel.
~1 .
~ (32)
I
,~ , I ,
- \ l
104~/~50
Sequence C~ntrol 248 1s also provided with a start control 253 whIch
¦ "Initializes" the sequence when a 05Bl com~and is received. In response to
this command, the start control releases the inhibit signal to a step/delay
control 260, thereby setting the system into a stepping mode. At the same
time a sync-control 262 is enabled to allow synchronized lKHZ pulses to
be o~tputted to gate 254. These pulses are also used by the stepping
control 264, which generate a "Last Step" signal when the t~tal number of
j¦ steps called for has been outputted. The number of steps called for is
I¦ de~ermined by the data received by the stepping control from internal data
il line 266. The "Last Step" signal causes the Step-Delay Control 260 to
generate a "Delay Mode Start" signal which terminates the step pulses to
I stepping control Z64. When the delay time interval has been completed, the
1¦ stepping control 264 sends a "Delay Complete" signal to start control 258,
¦I which resets the logic and waits for receipt of the next step data. At this
I time, a "Ready" signal is generated by start control 25~.
Stepping control 264 may be divided into two main sections, 264a and
1 264b. Section 264a is capable of accepting eight bits of input da~a and
i jI does so when a command is received to "Stop Stepping" or "Initialize". The
eight bit data which is input into section 264 are low order carriage steps,
1! with a total number of possible steps being 255.
¦ Section 264b of the stepping control is capable oE accepting 7 bits
of data when a "Start Stepping" (05DI) co~mand signal is received. These 7
bits are the high order carriage steps. The stepping control as a whole is
1 ~I capable of containing a total of 32,767 steps. In operation, the eighth
1l bits of low order data are first loaded upon recelpt of a "Stop Stepping" or
"Initialize" command. The 7 bits of high order data are then loaded when
,, ,.
'I the "Start Stepping" command is received. This command begins the stepping
1, , ,i1 ' .
~, 1 .
~ (33)
~ .
., . I
3~
¦¦ sequence under the control of the sync-control 264. The stepping control
¦¦ co~mts the input pulses, with each pulse decreasing the total count of steps
!~ by 1. ~len the count reaches 0, the "Last Step" pulse is generated, causing
I the step delay control to inhibit further pulses from being transferred
¦ and changes the delay mode. This enables a l;L<HZ pulse train to be passed
i by gate 268 to the "up" count of the stepping control. When the "Delay
Complete" pulse occurs, it places the logic in a waiting mode and also causes
¦ the generation of a "Carriage Ready" ~CARRDY).
ll The stepper escapement board is also provided with a lens constant
I! switches 270 and asisociated multiplexers 272 which provide 16 bits of data
! to Input/Output logic 274 to provide predetermined op~ical constant necessary
; for proper operation of the varia~or and collimator lenses. The input/output
control logic also serves to supply carriage limit, carriage ready, and film
I! out information to the data bus. These signals are buEfered through a data
j 15 il bus buffer 276.
, The lKHZ sync pulses are gated at 254 with a 2 KHZ signal, whereby
! the output of the gate is a signal of 1 KHZ with a positive pulse width of
I a 2 KH~ square wave. This signal serves as a clock for a Gray Code
jl Generator through motor sequences 252. The sequence of the Gray Code output
ll is determined by the Direction Control signal from the Forward/Reverse
I control 250.
ij STEPP~R BOARD
With reference to Figs. 10a, 10b, an-l 10c, the functions of the
Stepper Board may be more fully understood. Basically, the Stepper Board
l contains circuitry to provide control required for font row selection,
j l, character size and leading. Timing for all the circuitry and delay constan~s
'I is provided by - clock interiace cir~ilit 278, illustr:ted in Fig. 10b, which
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converts a 16 KHZ input signal into a number of phase-related frequencies.
Selection of font positions on the character disc is accomplished by
utilizing input from the row s~ift detector and the row shift control
illustrated in Fig. lOa. Also, the character disc speed is determined by a
font speed control circuit which utilizes a differentiated signal. ~e
selected image size is obtained by proper positioning of the collimator and
variator lenses which are controlled in part by circuitry c`ontained on the
stepper board. Similarly, leading of the photosensitive film or paper is
~I controlled by the leading motor through circuit on this board.
il With particular reference to Fig. lOa, it will be appreciated that
the row shift control includes a detector disc 280 having a plurality of
opaque segments 282 spaced around its circumference. An appropriate photo-
sensor unit 284 is mounted in operative relationship with the segmeneted disc
¦l and provides a beam of light which is transmitted by the clear postions of
ll the disc located between the opaque segments 282. The segmented disc is
¦ rotatably driven through appropriate connection to a row select motor~Y~
such that the llght beam associated of photosensor 284 is periodically in-
terrupted by the opaque segments Each light interruption by the presence
of an opaque segment is indicative of a font detent position of the character
disc. Whenever light is permitted to pass through the clear area of the disc,
Ij such indicatee that the character disc is not in a font detent position at
that moment. A row data input register 286 is provided which receives row
ll select information in the form of data bits. This data is stored in the
¦I register upon receipt of a 'ILoad'' command. This data is fed in parallei to a
1I row position comparator 288.
, !i
j A zero reference counter 290 is provided with two inputs associated
I with photosensor 284. A reset signal is provided to the counter 290 upon
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detection of an opaque segment, causing the counter logic to be reset. A
"Count Enable" signal is provided when a clear or transparent area of the
I disc is detected by the photosensor. This enables the counter to count the
I¦ square wave input, preferable of 62.5 HZ. The transparent area between the
¦¦ opaque segments corresponding to the first and last font positions is larger
¦ in arcuate distance than the transparent areas separating the other opaque
¦ segments. Thus, additional input pulses are counted by couhter 290 when the
larger transparent area is detected by the photosensor. This is indicated by
the pulse pattern generally indicated by the numeral 291. The counter
I capacity is such that it is e~ceeded during passage of this area of the disc,
and the counter overflow serves as a reset signal to a row position counter
292. The capacity of counter 290 is such ~hat this count will not be exceeded
whe}l the detector senses the smaller transparent areas separating opaque seg-
ment of the disc. The:reset on the overflow signal serves as an indication
ll of a reference or starting position of the disc.
i! Each time an opaque segment is detected by sensor 284, a count pulse
is input into row position counter 292, whereby the output is indicative of
the current font position. When the data indicative of the current font
~, position compares with t~at input from register 286, the row shiEt selector
1l is in the desired position and a "Not Drive" s gnal is outputted to motor
driver 29~. This, in turn, stops row motor ~
,i Selected fonts are provided from the character disc by radially shift-
ing with respect to the flash power supply. This shifting is carried out by
¦ appropriate mechanism which includes, among other things, a row s~ift cam,
I illustrated at This cam is driven in synchronism with the segmented
disc, and such, each opaque segment on the disc corresponds to a "Drive"
signal which allows a motor ~ to continue rotating until the disc and cam
reach the desired angular position, at which time a comparison will occur
and a "Not ~rive" signal outputted.
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Referring now~ more particularly, to Fig. lOb~ operation of the
variator lens control circuitry may be more fully understood. At this point~
it should be noted that the collimator lens control circuit is identical to
!i that for the variator lens, with the exception that the stepping control for
I the collimator lens includes single order stepping wi-thin the stepping control.
~asically~ both the variator and collimator lens control circuitry control
the sequence of events from the initial call for steps of the lens carriage
until the last step has been taken and the settling delay has been completed.
1l A start control 296 initializes the sequence when an "Initialize"
1¦ command is received. When a "Start Stepping" coi~mand is received by control
296, it releases the inhibit signal to Step/Release control 298 and at the
same time enables Sync Control 300 to provide sync pulses~ preferably of
Il 500 IIZ. These pulses are utilized by stepping control 302 and motor sequencer
; 11 304 to begin movement of the variator lens. When the total number of steps
1l have been outputted from the stepper control 302~ a "Last Step" signal is
¦ provided to the step/relay control 298 to start the delay mode. This signal
terminates step pulses to the stepping control and now directs delay pulses
Il until the delay time has been completed. The stepping control then sends a
¦1 "Delay Complete" signal to start control 296 which resets the logic. At this
1 20 1¦ time a "Ready" signal is made available by the start control to the data~bus.
j It will be appreciated that once the sequence is set and the variator (or
' collimator) lens is moving, tbe receipt of a subsequent "Initialized" command
, will terminate the se~uence to the start control 296. This stops the
, variator lens and start control 296 will generate a Ready signal, whereby the
' control is placed in a mode waiting for new data.
il Stepping control 302 includes two groups of control counters 302a and
j 302b, respectively. Group 302a is capable of inputting eight bits of data
il
I when "Initialize" command is received. These eight bits being of low order.
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¦ Group 302b receives five bits of data wllen a "Start Stepping" command is
¦ received, with the~e five bits being of high order. This high and low order
¦I stepping control arrangement is similar to that described abo~e with respect
; I to the Stepper Escapement and a further description is felt to be unnecessary.
1¦ It will be appreciated that when a "Start Stepping" command is
¦ received, it enables sync control 300 to input pulses to the "Downl' counting
input stepping control 302. The "Last Step" pulse inhibits`gate 306, whereby
further pulses are not transferred to motor sequencer 304. It also changes
the sequence of the delay mode, thereby enabling a 1 KHZ pulse train to be
passed through gate 305 to the "Up" count input of the stepping control.
When the value of 32 is reached, a "Delay Complete" pulse is generated by the
stepping control to the start control 296, whereby the seqùence is completed
~j and the logic is returned to a Wait state.
;: ¦ Gate 306 receives the 500 HZ sync pulses, together with a 1 KHZ signal,
j whereby the output of the gate is a signal of 500 HZ, with a positive pulse
width of a 1 KHZ square wave. This signal serves as a clock Eor a Gray Code
Generator through motor sequencer 304. A forward/reverse control 308 pro-
' vides~directlon signals to sequencer 304 which determines the sequence of the
Gray Code Output. The Gray Code associated with sequencer 304 convert~ each
1, input puLse from gate 306 into one motor step of the proper sequence (forwardor reverse). These inp~ut pulses may be terminated in two ways-
y completing the ~otal number of steps to be taken
("last~stsp" pulse), or
; 2) By~receipt of an '~'Initialize" low order command.
2~5 !1 It will~be appreciated that the Stepper Board is also provided with
sppropriate Input/ utput control logic for furnishing information to the
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Il
Il ~o ~llc d;lta bus. rl-is inrormatiou woulcl include data defining the condLtions
¦l of the variator and collimator home switches, plus the status of the variator,
! collimator and leading motors.
¦ The stepper board also contains Leading Control circuitry which is
¦1 illustrated in Fig. lOc. Operation of the leading control is baslcally the
¦¦ same as that of the variator/collimator control circuit, described above.
The major difference is that the entire operation is based on a single "Start
Stepping" instruction to a start control, which is indicated at 310. In
,l addition, the sync-control, which is indicated at 312, provides 125 HZ sync-
~ pulses rather than 500 HZ. This sync pulse is inputted to a motor sequencer
314 together with a 250 K~IZ signal through gate 316. It will also be appre-
ciated that the stepping controls differ in that it contains a low order
section only. This section is capable of inputting 8 bits oE data when
I a "start stepping" command is received. The counter acts in the same manner
i5 1 as the low order stepping control counter assoclated with the variator/
collimator control. The operation of the leading ~otor sequencer 314 is
identical to the above-describecl motor sequence~ except that the direction
of stepping is fixed, thus eliminating the requirement for a forwardtreverse
l, control. Of course, it will be appreciated that'if a "reverse leading" type
O ,1 f~lnction is contemplated with the photocomposition machinel an appropriate
~I reverse/forward control, such as that disclosed with the variator/collimator
jl lens control circuit, may be added. '
VARIATOR/COLLIMATOR ROUTINE
!l As mentioned abo~e? the positions of the variator and collimator lens
1~ carria~es are a function of the selected point size. Each command and
associated point size value is entered into the display portion of the RAM.
The CPU program is continuously lookinO at the data in the EUM, such that
the presence of a point size command is recognized and the variator/collimator
routine is initiated. This routine provides lens position corltrol
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¦ inrorlllcltioll in the Eorm of step da~a Lo tlle variator and collimator stepper
¦ controls.
Fig. 11 is a simplified flow chart of the variator/collimator lens
I position routine. The cPlr i8 provided wlth a look-up table in ROM for con-
li verting the keyboard code to CPU code. As the CPU looks at the data stored
~¦ in the RAM it continuously compares the codes, as indicated diagrammatic
il by block 318. Upon recognition of a point si~e command, as`indicated by
¦I block 320, the program will proceed with the routine. On the other hand, iE
there is no point si~e command present in the RAM, the program will perform
1I various other functions.
Il When a point size command is recognized, the point size value asso~
1I ciated ~ith the command is read from ~he display memory. This operation is
indicated by block 322. Since this point size value is in keyboard code, such
I, is converted into CPU code via a ROM look-up table indicated functionally at
ll 324. The program further checks to see if the point size value is a "Valid
Size", as it i5 possible that the operator may accidently enter numbers which
do not fall within the range of point size values, in which event, the rou-
I tine is terminated by a decision indicated by block 326. If the point size
il
j¦ valuc is "Valid", such is used to address another ROM look-up table, which
~ provides the "New" variator position data. This is indicated by blocks 328
and 330.
The current position of the variator lens is stored in a register, or
j the like, associated with the CPU. This data is descrlbed as the "Previous"
' select lens position data as it corresponds to the previously desired position.
,I The position data corresponding to the newly desired position is referred to
as the "New" position data. The program determines the difference between
l the "New" and "Previous" posltion data and the direction in which the variatorlens carriage must be moved. This opera~ion is indicated diagrammatically by
block 332.
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rhe "Difference Data" is used by the program to provide signals to the
variator stepper control, whereby the variator carriages are stepped in
accordance with the above description. The "new" variator position data is
loaded into a CPU register, as indicated by block 336, to provide the
I "Previous" position data when the program executes the next routine in
response to detection of a new point size command in the display memory.
After provlding the output to the variator stepper c~ntrol, the above
routine proceeds in a similar manner to provide position control signals for
the collimator lens. The point size code is used to address a look-up table
¦¦ in the CPU ROM to provide "New" collimator position data, as indicated by
blocks 338 and 340. The "Previous" position data for the collimator lens
carriage is stored in an appropriate register, of the like, of the CPU.
I Program determines the difference between the "New" position data and the
1~ "Previous" position data to provide "Difference Data" (block 342), which is
1i outputted to the collimator stepper control, as indicated by block 344. The
¦l "New" collimator position data is then loaded into the register provided for
the "Previous'r collimator position as indicated by block 346. The program
,~ '; then refers back to the RAM to repeat the routina or perform other functions
,, I
in response to commands recognized in the memory.
It will be appreciated that the routine may be modified slightly to
provide control of a lens system employing lens other than the variator and
collimator lenses dl6closed. For example, a zoom lens system may be employed
o~provide the desired ampiifi ation, with the control program changing the
relative positioDs;or conditions of the zoom lenses.
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:[t i9 not intended that the present invention be limited to the
specific embodlment disclosed Ln ~he above description and associated
: drawings. Numerous modifications and adaptations of the invention will be
. apparent to those skilled in the art. Thus, it is intended by the following
claims to cover all such modiiications and adaptations falli~g within the
~ trae :pi it ~ scope i he in~e~el~n
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