Note: Descriptions are shown in the official language in which they were submitted.
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The invention is directed to a charge coupled arrangement, in
accordance with the charge coupled principle, in which a substrate of semi-
conductor material is provided with an electrically insulated layer on
which electrodes are disposed in spaced relation, including input and output
electrodes.
Charge coupled arrangements of this general type are known, for
example, from United States Patent 3,829,884 of Borel et al, issued
Augu~t 13, 1974, which describes a charge coupled arrangement in which an
insulating layer of silicon dioxide is applied to a semiconductor substrate
of n-silicon. Al~inum electrodes are disposed on the oxide and by connect-
ing three different potentials to such electrodes, minority charge carriers
located below the electrodes can be transferred from one electrode to
another.
An input stage for a charge coupled arrangement may basically
consist of a p-conducting zone~ arranged in an n-conducting substrate, and an
input electrode arranged ahead o~ such zone. When a negative voltage is
connected to such electrode, the p-conducting zone supplies charge carriers
which accumulate below the input electrode. An output stage which is
responsive to the charges transported over the charge coupled arrangement,
basically consists of a pn-junction which is operated in the blocking
direction. When incoming charges arrive at SUCtl pn-~unction, a measurable
current flows from the p-conducting ~one over a resistor connected thereto
and a voltage source connected in series therewith, to the rear side contact
of the semiconductor substrate.
The invention has as its objective the provision of a charge
coupled arrangement in which the input stage and the output stage can be
produced in the same simple manner as the intermediate shift stage or stagesO
This sbjective is achieved by the utilization of a storage element,
of the type described, which is characterized by the utiliæation of a relati-
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vely large-area electrode as the input electrode, whereby upon the application
of voltage thereto an inversion layer will be produced beneath such electrode,
which layer functions in the substrate as a charge carrier reservoir.
An important advantage of a charge coupled arrangement of this
type resides in the fact that when the charge carriers, transported from the
charge carrier reservoir in the input stage, have passed through the charge
coupled arrangement in the output stage they can be returned to the reservoir,
whereby the charge quantity is approximately maintained.
A further advantage of a charge coupled arrangement, in accordance
with the invention, is that no zones doped oppositely to the semiconductor
substrate are required, either in the input stage or in the output stage and
it thus is possible to avoid both a masking step and a high temperature
step in the production of the structure.
The simplified process of production of charge coupled arrangements
in accordance with the invention advantageously enables a substantially
cheaper production of such arrangements in comparison to arrangements known
in the prior art.
Charge coupled arrangements in accordance with the invention are
particularly suitable for complex charge coupled arrangements such as used
in sensors of solid state camera circuits~ storage modules and the like.
Thus, in accordance with the invention, there is provided a
charge coupled arrangement, in accordance with the charge coupled principle,
comprising a substrate of semiconductor material, an electrically insulating
layer disposed on said substrate and electrodes disposed on said insulating
layer and separated from one another by gaps, forming an input stage having
an input electrode and an output stage having an output electrode, the
input electrode comprising a large-area electrode whereby, when a voltage
is applied to the input electrode~ an inversion layer will be produced
beneath said electrode which layer functions in the substrate as a charge
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carrier reservoir
In the drawing wherein like re~erence characters indicate like or
corresponding parts:
Figure 1 schematically illustrates a section through a charge
coupled arrangement in accordance with the invention; and
Figure 2 schematically illustrates a plan view of the charge
coupled arrangement illustrated in Figure 1.
Referring to Figure 1, the reference numeral 1 designates a sub-
strate of semiconductor material, preferably consisting of n-conducting
silicon. Applied to the substrate 1 is an electrically insulating layer 2,
; preferably comprised of SiO2, on which are arranged a plurality of electrodes
designated by reference numerals 30 to 39, which electrodes preferably are
fabricated of aluminum and are separated from one another by respective
gaps, or intervals. In accordance with the invention, the electrodes 30
and 31 form the electrodes of the input stage 5, the electrodes 32 to 36
comprise the electrodes of the charge shift stage 6, and the electrodes 37,
38 and 39 comprise the electrodes of the output stage 7. As will be apparent
from Figure 2, the electrode 30 of the input stage 5 is electrically
conductively connected to the electrode 39 of the output stage 7.
In known manner, as described in the aforementioned United States
Patent 3,829,884, charges located below the electrodes 32 to 36, of the
` charge shift stage 6~ are displaced through the connection to such electrodes
of three voltages ~1, U2, U3, of different magnitudes.
In accordance with the invention, the input stage 5 contains an
inversion layer which functions as a charge carrier reservoir. Such inver-
sion layer is constructed in the form of an MOS capacitance which, exactly
like the charge coupled elements of the charge shift stage 6, is produced
from the insulating layer 2 and the metal electrode 30. For the production
of-the inversion layer, the electrode 30 is connected with a voltage Us
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whose potential corresponds approximately to the potential of a pulse train
voltage U2. The voltage difference between voltage Us and the voltage U3,
which initially may be connected to the first electrode 32 of the charge
shift stage 6, is sufficient for the transfer of charge carriers from the
inversion layer under the first electrode 32 of the charge shift stage 6.
For this purpose, the electrode 31 is connected with a voltage Ue, whereby
the inversion la~er is also formed under such electrode and thus the charge
carriers lying under the input electrode 30 can M ow to the electrode 32.
The time required following connection of the voltage U to the
input electrode 30, for the formation of the inversion layer below such
electrode, is determined by the time constant for the thermal generation of
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the charge carriers. As in operation, charge carriers are constantly trans-
ported from the inversion layer, where the inversion layer has a small area,
i such thermal generation will not be sufficient to constantly replenish the
quantity of charge in the inversion layer.
In accordance with the invention, the charge carriers arriving after
the charge shift in the output stage ~, are again transported to another
inversion layer which is connected to the inversion layer in the input stage.
Such other inversion layer is disposed beneath the output electrode 39 of
the output stage 7, which electrode is electrically conductively connected to
the input electrode 30 of the input stage 5.
Upon leaving the charge shift stage 6, the charge carriers in the
output stage 7 are initially brought under the electrode 37 to which the
potential U is connected. As a result of a change in capacitance due to the
charges arriving under such electrode 37, a measurable change in voltage a Ua
results across the electrode. In the next pulse train the charge carriers
are then advanced from the electrode 37 to the inversion layer previously
mentioned. For this purpose the electrode 38 is connected with a potential
Ua which produces an inversion layer below such an electrode which permits
the shift of the charges under the output electrode 39.
Consequently, by means of a charge shift arrangement in accordance
with the invention, a closed circuit for moving charge carriers is achieved~
Only the charge carriers which, for example are supplied to the substrate,
are lost from the quantity of charge in the reservoir. However, as such loss
represents only a small p~opqrtion of the charge quantity~ it can readily
be replaced by thermal generation.
In a module employing a plurality of charge shift (charge coupled)
circuits, the charge carrier reser-voir formed by the input and output elec-
trodes 30 and 39 can be designed as an inversion layer which runs along the
edge of the chip and is common to all circuits.
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Input stages and output stages, constructioned in accordance with
the invention, can be employed not only in association with charge coupled
arrangements for three-phase operation, but also in connection with charge
coupled circuits with two-phase or single-phase operation. In this case
the charge shift stage 6, of Figure 1, should be replaced by a charge shift
circuit with two-phase operation or single-phase operation.
In a further development of the invention, the input electrode
may be electrically isolated from the output electrode, in which case the
input electrode is a large-area electrode under which, by the connection of
a suitable voltage, it is possible to produce an inversion layer functioning
in the substrate as a charge carrier reservoir. In this case the output
electrode may be designed as a Schottky contact. Where the substrate is
composed of n-silicon, the output electrode may be constructed of aluminum.
The electrodes may be formed of a metal selected from aluminum,
chrome, tungsten and molybdenum.
Having thus described our invention it will be obvious that although
various minor modifications might be suggested by those versed in the art,
it should be understood that we wish to embody within the scope of the patent
granted hereon all such modifications as reasonably, and properly come wi-thin
the scope of our contribution to the art.
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