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Patent 1065461 Summary

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(12) Patent: (11) CA 1065461
(21) Application Number: 1065461
(54) English Title: SEMICONDUCTOR LIGHT-EMITTING DEVICE AND METHOD OF MAKING OF THE SAME
(54) French Title: DISPOSITIF ELECTROLUMININESCENT A SEMICONDUCTEURS ET METHODE DE FABRICATION
Status: Term Expired - Post Grant Beyond Limit
Bibliographic Data
(51) International Patent Classification (IPC):
  • H01S 5/227 (2006.01)
  • H01L 33/00 (2010.01)
  • H01L 33/14 (2010.01)
  • H01L 33/16 (2010.01)
  • H01L 33/28 (2010.01)
  • H01L 33/30 (2010.01)
  • H01L 33/40 (2010.01)
  • H01S 5/00 (2006.01)
  • H01S 5/22 (2006.01)
  • H01S 5/323 (2006.01)
(72) Inventors :
  • ITOH, KUNIO
  • INOUE, MORIO
(73) Owners :
  • MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
(71) Applicants :
  • MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
(74) Agent:
(74) Associate agent:
(45) Issued: 1979-10-30
(22) Filed Date:
Availability of licence: N/A
Dedicated to the Public: N/A
(25) Language of filing: English

Patent Cooperation Treaty (PCT): No

(30) Application Priority Data: None

Abstracts

English Abstract


SEMICONDUCTOR LIGHT-EMITTING
DEVICE AND METHOD OF MAKING OF THE SAME
Abstract of the Disclosure
In order to decrease the threshold current of a
semiconductor laser, and to obtain single mode lasing suitable
for use in light-communication, a semiconductor laser is formed
in which the light-emitting (i.e., active) layer and the
neighboring layers are formed as stripes by mesa-etching and
then a low impurity-concentration (i.e., high resistivity)
layer of GaAs, GaAsP or GaAlAs is provided in contact with the
mesa-etched side faces by vapor phase growth, vacuum deposition,
sputtering, or molecular beam deposition. Since the wafer
temperature can be kept fairly low (e.g. 400 - 700°C) in
comparison with that (about 950°C) in the liquid phase growth
method, the stress introduced during the deposition is less
than that in liquid phase growth.


Claims

Note: Claims are shown in the official language in which they were submitted.


THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. A semiconductor light-emitting device of carrier injection
type comprising:
(a) a semiconductor substrate;
(b) a light-emitting region formed on said semi-conductor
substrate, at least one side of said region being defined by a
mesa-etched face;
(c) a high resistivity polycrystalline semiconductor
region contacting said mesa-etched face;
(d) a conductive layer provided above said light-emitting
region; and
(e) a metal electrode layer formed on said conductive
layer, said electrode layer also at least partially covering
the surface of said high resistivity polycrystalline semi-
conductor region.
2. The semiconductor device of claim 1, wherein said high-
resistivity polycrystalline semiconductor region comprises a
compound of group III - V or group II - VI or mixture thereof.
3. The semiconductor device of claim 1, wherein said high-
resistivity polycrystalline semiconductor region comprises
GaAs1-yPy or Ga1-yAlyAs, wherein O?y?l.
4. The semiconductor device of claim 1, wherein the device
has a stripe structure.
5. The semiconductor device of claim 1, wherein the device
has a heterojunction structure.
6. The semiconductor device of claim 5, wherein said
heterojunction structure comprises GaAs - Ga1-xAlxAs,
wherein O<x?l.
7. A method of making semiconductor light-emitting device
comprising the following steps:
(a) epitaxially forming a light-emitting region and an
11

electrode-contacting region on a semiconductor substrate;
(b) etching said regions in such a manner that selected
parts of said regions are etched away forming at least one
recess, the bottom of which reaches said light-emitting region
and the sides of which are defined by mesa-etched side faces
of said regions;
(c) depositing a high resistivity polycrystalline semi-
conductor in said recess; and
(d) forming a metal electrode layer on said electrode
contacting region and on at least part of said high resistivity
polycrystalline semiconductor region.
8. The method of claim 7 wherein said deposition of the
high resistivity polycrystalline semiconductor region is
effected by vapor phase reaction, vacuum deposition, sputtering
or molecular beam growth.
12

Description

Note: Descriptions are shown in the official language in which they were submitted.


1065~6~
This invention relates to semiconductor light-emitting
devices, and more particularly, concerns semiconductor
lasers of stripe type.
Hitherto, various kinds of stripe type lasers have
been proposed. Stripe type lasers have the merits of a
fairly low threshold current, and a simple lasing mode,
resulting in easy use in light-communica~ion.
Conventional stripe type lasers have the following
shortcomings. The threshold current still tends to remain
10 disadvantageously large and it is usually necessary to use r
a cylindrical lens in order to lead the light from the
active layer into a light-conducting glass fiber.
Attempts have been made to eliminate these shortcomings,
but the resulting devices are difficult to manufacture.
It is an object of the present invention to provide
improved semiconductor light-emitting devices, wherein the
abovementioned shortcomings are eliminated at least to
some extent.
According to one aspect of the invention there is
20 provided a semiconductor light-emitting device of carrier
injection type comprising: (a) a semiconductor substrate;
(b) a light-emitting region formed on said semi-conductor
substrate, at least one side of said region being defined
by a mesa-etched face; (c) a high resistivity polycrys-
talline semiconductor region contacting said mesa-etched ~;
face: (d) a conductive layer provided above said light-
emitting region; and (e) a metal electrode layer formed
on said conductive layer, said electrode layer also at
least partially covering the surface of said high resis-
tivity polycrystalline semiconductor region.
According to another aspect of the invention there is pro-
vided a method of making semiconductor light-emitting device
-- 2 -

;1065461
comprising the followlng steps: (a) epitaxially formlng a llght-
emlttlng region and an electrode-contacting region on a semi-
conductor substrate; (b) etching said regions in such a manner
that selected parts of said regions are etched away forming at
least one recess, the bottom of which reaches said light-
emlttlng reglon and the sides of which are definet by mesa-
etched side faces of sa,id regions; (c) deposltlng a high
reslstivlty polycrystalline semiconductor in sald recess; and
(d) forming a metal electrod~e layer on sald electrode contactlng
region and on at lea~t part of said high reslstlvlty poly-
crystalline semiconductor region.
By the method of the invention, at least in preferred
embodiments, the high resistivity layers can be grown without
strain, and the growth of the layers can be easily controlled.
Also it is poseible to make the growth layer highly heat-
conductive, thereby attaining low threshold value performance
and single mode performance of the semiconductor laser.
A preferred embodiment of the invention is described
in detail in the following disclosure, reference being made to
the accompanying drawings, in which:
Fig. 1 and Fig. 2 are sectional elevation views of ~
first and second conventional semiconductor lasers, respectively;
Figs. 3(a) to (d) are sectional elevation views
showing steps in the manufacture of a semiconductor device
embodying the present invention; and
Fig. 4 is a sectional elevation view showing an
example of a semiconductor device embodying the present
invention.
Fig. 1 shows an example of a typical conventional
oxide stripe type laser. In Fig. 1, the reference numerals
designate the following parts:

106546~
5 --- n-GaAs (substrate)
0.7 0.3AS
2 --- p-GsAs (active layer)
P 0.7 0.3AS
4 --- p-GaAs
8 --- SiO2 insulation film
6 --- csthode electrode (Au-Ge alloy film)
7 --- anode electrode (Au-Sn alloy film)
71 --- stripe part`(contacting part) of the electrode
7 having width "w".
In the conventional stripe type lasers of Fig. 1
the current flowing from the contacting part 71 of the electrode
7 into the semiconductor wafer disperses as shown by the dotted
arrows, and therefore, in the p-GaAs active region 2, the current
disperses in a wide area 21 indicated by the hatching. Thus,
even though the stripe part 71 of the electrode 7 is quite
- narrow, the width of the effective active region is wide, hence
making the threshold current large. In such conventional
devices, it has also been found that the minimum threshold
current is obtained when the width w of the contactlng part 71
is about 10~, and when w is smaller than 10~ the threshold
current begins to increase. The actual lasing region (i.e. the
hatched part 21 of the active layer 1 in Fig. 1) of the con-
ventlonal device as seen in elevational view (Fig. 1) is of
oval shape with a ma~or axis of about 10~ and a minor axis of
about 0.5~, and accordingly, it is necessary to use a cylindrical
lens in order to direct the light from the active layer 2 into
a light-conducting glass-fiber (not shown).
In order to eliminate the abovementioned shortcomings,
another burried stripe-type heterostructure semiconductor laser,
as shown in Pig. 2, has been proposed.

- 1065461
In Fig. 2, the reference numerals designate the
following parts:
5 --- n-GaAs substrate
0 7Alo 3As
2 --- p-GaAs (active layer)
P 0 7 0 3 s
4 --- p-GaAs
6 --- cathode electrode (Au-Ge alloy film)
7 --- anode electrode (Au-Sn alloy film)
9~9 --- GaO 7A10 3As (of very low impurity
concentration).
As shown in Fig. 2, the n-GaO 7Alo 3As layer 1, the
p-GaAs active layer 2, the p-GaO 7Alo 3As layer 3 and the
p-GaAs layer 4 are mesa-etched away on both sides so as to
leave a central stripe part. The low-impurity concentration
GaO 7Alo 3As layers 9,9 are then formed by liquid phase epitaxial
growth in place of the etched away parts.
In the conventional device of Fig. 2, the width of
the actual active region is limited to the width w of the
stripe part, and hence is limited to the thickness ~which is
about 1~) of the active layer 2. Therefore9 the lasing region
can be made round, and hence the light produced can be easily
led into a light-conducting fiber without the use of a
cylindrical lens. Therefore, the matching between the active
reglon and the light-conducting fiber can be improved. More-
over, the width w of the layers 4, 3, 2, 1 and the protruding
part 51 of the substrate 5 are clearly limited to a predeter-
mined value, so that no dispersion of injection current takes
place, thereby enabling lasing with such a low current as 10 mA.
However, the device of Fig. 2 is very difficult to
manufacture, since due to spontaneously formed oxidized films
_ 5 _

~ 106546~
on the mesa-etched side-surfaces of the layers 1 snd 3 (the
oxidized film bein8 most likely to form when a layer contains
Al), the low impurity concentration region 9 can not adhere
regularly to these etched side-surfaces, and since the
components of the GaAs regions 2 and 4 are likely to melt in
the regions where they contact the layers 9,9, the width of
the active layer 2 changes from the predetermined designed
width. Furthermore, it is very difficult to obtain a flat
surface on the wafer by stoprping the growth of the layers 9,9
at an appropriate time in order to make the upper faces of the
low impurity concentration layers 9,9 flush with that of the
stripe shaped layer 4. Besides, the p-GaAs active layer 2
and the GaO 7Alo 3As layers 9,9 have a mutual difference of
about 26% in thermal expansion coefficient, and therefore,
during cooling from a temperature of 800C necessary for forming
the layers 9,9 by liquid phase epitaxial growth, to room
temperature, a considerable strain is made at their interface,
resulting in an adverse effect on the life of the laser device.
Furthermore, the GsO 7Alo 3As layers 9,9 have a heat conduction
coefficient as low as 1/10 of that of the GaAs layer 2, and
hence, the heat produced in the active layer 2 can not escape
through the layers 9,9,but is forced to escape upwards and
downwards only.
The steps in the manufacture of a semiconductor
device embodying the present invention are described with
reference to Figs. 3(a) to (d).
First, as shown in Fig. 3(a),
a first layer 1 of n-type GsO 7Alo 3As,
a second layer 2 (light-emitting layer) of p-type GaAs,
a third layer 3 of p-type GsO 7Alo 3As and
a fourth layer 4 of p type GaAs (intended to contact

`` 1065461
the electrode).
are ~equentially formed on an n-type GaAs substrate 5, by the
known liquid phase epitaxial growth method.
Then SiO2 films 8,8 (see Fig. 3(b)) of about 5000A
ln thlckness are formed with a pattern of rows of stripes
having a width of 3~ and a pitch of 250~, the stripes being
formed in the (110) dir~ction of the substrate by means of
known photoetching methods utilizing an etchant comprising
fluoric acid and ammonium fl~uoride.
Next, by utilizing a mixture of solutions of sulfuric
acid snd hydrogen peroxide, the wafer i9 mesa-etched to remove
the parts of the layers 4, 3, 2 and the upper part of layer 1
which are not covered by the SiO2 films 8. In this etching
step, the layers 4, 3 and 2 must be etched away, but the layer
1 and the substrate 5 may not necessarily be etched (Fig. 3(c)).
Subsequently, in the etched-out hollow parts, high
resistivity (for instance 104QCm) polycrystalline semiconductor
layers 10,10 are formed by a process wherein the substrate can
be kept at a fairly low temperature, for instance 550C (Fig.
3(d)). For the low temperature process, a molecular beam growth
method or vacuum deposition method can be used, but in the
present example the layers 10,10 are formed by a vapor phase
growth method utilizing thermal decomposition. The temperature
of the wafer in these processes can be kept fairly low, for
instance 400 - 700C, in comparison with the higher temperatures,
for instance 950C, of the liquid phase growth method. The
layers 10,10 may be formed, for example, by thermal decomposit-
ion from trimethylgallium and arsine. In this process, on
account of low temperature of the wafer, no layer is formed on
the SiO2 film 8, and hence the layers 10,10 grow only on the
0.7 0.3 1 yer 1.

~ 1~65461
In the prior art device of Fig. 2, since the liquld
phase epitaxial growth method is used for forming the low
impurity concentration layer 9, the layer 9 cannot be formed on
the layer 1 of n-GaO 7Alo 3As. Therefore, mesa-etching must be
used to expose the substrate region 5. However, in the present
invention, since the high resistance layer 10 is formed by the
vapor phase growth method, and because of the low temperature
of the etched surface of n-GaO 7Alo 3As layer 1 during the
growth, no oxide layer is formed on the etched surface.
Accordlngly, the layers 10,10 can be easily and firmly formed
on the layer 1 of n-type GaO 7Alo 3As.
The SiO2 films 8,8 are then removed by a known method,
and subsequently, the bottom face of the substrate 5 is lapped
80 that the wafer becomes 100~ thick. Then an Au-Ge alloy
film 6 is formed as a cathode electrode on the bottom face of
the substrate and an Au-Sn alloy film 7 is formed as an anode
electrode and heat conducting film on the upper faces of the
p-GaAs layer 4 and GaAs layer 10 by a vacuum deposition method.
Thus, the Au-Sn alloy film 7 extends from the p-GaAs layer 4 to
the GaAs layer 10. The resultant wafer is then cut into
individual units by a known dice-cutting method in the width-
wise direction of the stripe, the wafer being cut at 250~ pitch
along cutting lines situated mid-way between the neighboring
strlpes, and in the lengthwise direction of the stripe, the
wafer being cut at 400~ pitch.
Fig. 4 shows a semiconductor laser finished by
mounting the finished semiconductor device on a heat sink 15
of type II diamond coated with metal film 16, such as of Au,
at least on one face thereof.
Since the high resistivity polycrystalline layers
10,10 have high resistivity,such as 104QCm, there is no danger
- 8 ~

` 1065461
of current undesirably flowlng thereinto. Generally, in the
vapor phase growth methods, the growth of the layer can be
controlled precisely, and therefore, it is easy to make the
surfaces of the high resistance layers 10,10 and the p type
electrode-contacting layer 4 flush with each other.
Furthermore, since the wafer temperature does not
rise appreciably in the vapor phase growth process for forming
the layers 10,10, unlike in the liquld phase growth method,
there is less possibility of"forming adverse strain in the
device of the present invention than in the prior art devices.
Since the GaAs layers 10,10 have a heat conduction
coefficient 10 times as high as that of GaO 7Alo 3As layers 9,9
of the conventional buried type heterostructure semiconductor
device of Fig. 2, a considerable part of the heat produced in
the active layers 3 of Fig. 3(d) escapes through the GaAs
layers 10,10, thus resulting in good heat dissipation.
As has been illustrated in the foregoing example,
the semiconductor laser of the present invention can overcome
some, if not all, of the shortcomings of the prior art devices.
Furthermore, the threshold current can be made smaller and the
lasing mode simpler than in the prior art.
The aforementioned example used polycrystalline GaAs
as the high resistivity layers 10,10, but other III - V semi-
conductor polycrystalline materials of high resistivity, can
be used, for instance
Gal yAl As (O<y<l) or
GaAsl P (O<y<l)
However, the abovementioned GaAs material has better heat
dissipation than these semiconductors. Furthermore poly-
crystalline layer of group II - VI compounds, such as CdS or
CdTe, may also be used.
_ g _

106546~
For the low temperature formlng process of the high
resistivity layers 10,10, a vacuum deposition method,
sputtering method or molecular beam deposition method can be
used instead of the vapor phase growth method.
According to the manufacturing method of the present
invention, a superior semiconductor laser of very low threshold
current density can be made.
-- 10 --

Representative Drawing

Sorry, the representative drawing for patent document number 1065461 was not found.

Administrative Status

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Event History

Description Date
Inactive: IPC from PCS 2022-09-10
Inactive: IPC from PCS 2022-09-10
Inactive: IPC from PCS 2022-09-10
Inactive: IPC from PCS 2022-09-10
Inactive: IPC from PCS 2022-09-10
Inactive: IPC from PCS 2022-09-10
Inactive: IPC from PCS 2022-09-10
Inactive: IPC deactivated 2011-07-26
Inactive: IPC expired 2010-01-01
Inactive: IPC from MCD 2006-03-11
Inactive: First IPC derived 2006-03-11
Inactive: IPC from MCD 2006-03-11
Inactive: IPC from MCD 2006-03-11
Inactive: IPC from MCD 2006-03-11
Inactive: Expired (old Act Patent) latest possible expiry date 1996-10-30
Grant by Issuance 1979-10-30

Abandonment History

There is no abandonment history.

Owners on Record

Note: Records showing the ownership history in alphabetical order.

Current Owners on Record
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Past Owners on Record
KUNIO ITOH
MORIO INOUE
Past Owners that do not appear in the "Owners on Record" listing will appear in other documentation within the application.
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Document
Description 
Date
(yyyy-mm-dd) 
Number of pages   Size of Image (KB) 
Claims 1994-05-03 2 49
Cover Page 1994-05-03 1 13
Abstract 1994-05-03 1 17
Drawings 1994-05-03 1 20
Descriptions 1994-05-03 9 263