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Patent 1071713 Summary

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(12) Patent: (11) CA 1071713
(21) Application Number: 1071713
(54) English Title: CIRCUIT ARRANGEMENT FOR THE IDENTIFICATION OF A SERIES OF UNKNOWN CODE WORDS
(54) French Title: CIRCUIT D'IDENTIFICATION D'UNE SERIE DE MOTS DE CODE INCONNUS
Status: Term Expired - Post Grant Beyond Limit
Bibliographic Data
Abstracts

English Abstract


DPHN. 7807
ABSTRACT
A circuit arrangement for identifying a series of un-
known code words having two different information contents as
well as a starting signal preceding the code words in order to
identify radio call numbers and channel commands in a radio
telephony system. A first clock pulse generator; started by
the received starting signals, applies clock pulse to a first
storage device, which contains the code words of the first
information content to be identified, and to a code converter.
The code words, which are read-out in parallel one after the
other from the first storage device, are converted into serial
code words by the converter. These serial code words and the
received unknown code words to be identified are compared,
bit-wise with one another, in a comparator. The comparator
starts a second clock pulse generator when the code words of
the first information content are in agreement with the code
words read-out from the first storage device. The second
clock generator applies clock pulses to a second storage do-
vice which contains code words of the second information content
and these code words are also applied to a converter and then
compared with the received unknown code words of the second
information content. The code words which are found to be in
agreement are stored in a third storage device which can
activate a control circuit of a mobile radio telephony station.


Claims

Note: Claims are shown in the official language in which they were submitted.


D-PHN. 7807.
THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE PROPERTY
OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. A circuit arrangement for determining whether a
time sequence of code words, each of which is preceded by a
starting signal, corresponds to a predetermined sequence of code
words and for automatically storing signals representative of a
succession of bits of predetermined length which follows said
time sequence and which is also preceded by a starting signal if
correspondence should occur, said arrangement comprising an input
for said time sequence the subsequent starting signal and the
subsequent succession of bits, a first storage device which has
stored therein the code words of said predetermined sequence and
which is constructed to generate the bits of successive code
words of said predetermined sequence in parallel at an output
thereof in response to the application of successive signals to
a control signal input thereof, a code converter having parallel
information bit inputs coupled to the output of the first storage
device, which code converter is constructed to generate informa-
tion bits corresponding to those present at its parallel infor-
mation bit inputs at an output thereof in succession in response
to the application of clock pulses to a clock signal input there-
of, a first clock pulse generator circuit coupled to said control
signal input and to said clock signal input, which clock pulse
generator circuit has an activation signal input and is constructed
to feed a control signal to said control signal input and a clock
pulse train of a specific length to said clock signal input in
response to the application of an activation signal to said activa-
tion signal input, a coupling from the input of the circuit
arrangement to said activation signal input for applying an activa-
tion signal thereto in response to the occurrence of a starting

D-PHN. 7807.
signal at the input of the circuit arrangement, a comparator
a first input of which is coupled to the input of the arrange-
ment and a second input of which is coupled to the output of
the converter, for comparing successive bits applied to the
input of the circuit arrangement with successive bits occur-
ring at the output of the code converter, a second storage
device which has stored therein all possible versions of said
succession of bits of predetermined length and which is con-
structed to generate the bits of each said version in parallel
in succession in a specific order at an output thereof in
response to the application of successive signals to a control
signal input thereof, a second clock pulse generator circuit
constructed to generate clock pulses having a rate which is
higher than the rate of said clock pulse train, which second
clock pulse generator circuit is coupled to the control sig-
nal input of the second storage device, a coupling from the
output of the second storage device to the parallel information
bit inputs of the code converter, a third storage device having
an information input coupled to the output of the second storage
device couplings from the output of the comparator to inputs of
the first storage device and the second clock pulse generator
circuit for deactivating said first storage device and activating
said second clock pulse generator circuit if complete correspon-
dence should occur between the predetermined sequence of code
words read out from said first storage device and a sequence of
code words fed to the input of the circuit arrangement and for then
deactivating said second clock pulse generator circuit for so long
as bits of like value should be subsequently applied to both in-
puts of the comparator and means for then enabling said third
storage device when the code converter has generated at its output
16

D-PHN. 7807.
bits corresponding to those present at all its parallel infor-
mation bit inputs and said second clock pulse generator
circuit has been deactivated, so that signals representative
of a succession of bits which has then occurred at the input
of the circuit arrangement will become stored in the third
storage device.
2. A circuit arrangement as claimed in claim 1,
characterized in that the number of clock pulses of the first
clock pulse generator corresponds with the number of pulses
of the code words to be identified.
3. A circuit arrangement as claimed in claim 1,
characterized in that the first clock pulse generator in
response to each starting signal causes the first storing
device to be switched one step further via a control unit
for the bit-wise read-out of one of the stored code words.
4. A circuit arrangement as claimed in claim 1,
characterized in that the comparator stops and resets the
control unit when two bits which are compared with one
another are not in agreement.
5. A circuit arrangement as claimed in claim 1,
characterized in that the pulse frequency of the second
clock pulse frequency generator is a multiple of that of
the first clock pulse generator.
6. A circuit arrangement as claimed in claim 1,
for identifying a selective call number and a channel com-
mand in a mobile radio telephony station characterized in
that after identifying and storing the second information
content which retains the channel command in third storage
device, the latter activates a control circuit which effects
the switch over of the mobile radio telephony station to the
17

D-PHN. 7807.
instructed voice channel and the actuation of the first clock
pulse generator of the second storage device and of the code
converter.
7. A circuit arrangement as claimed in claim 6,
characterized in that the first clock pulse generator applies
clock pulses to the code converter and to the control unit
which releases from the first storage device one after the
other the parallel outputs of the code words of the first
information content representing the radio telephony stations
own call number and in that these code words after having
been converted to serial code words in the code converter and
after each having completed with a preceding starting signal
and conversion into two frequencies are applied to the trans-
mitter modulator of the radio telephony station and transmitted
on the carrier wave frequency of the instructed voice channel.
8. A circuit arrangement as claimed in claim 1,
characterized in that the comparator is synchronized with the
clock pulses of the first clock pulse generator via the third
input.
18

Description

Note: Descriptions are shown in the official language in which they were submitted.


DP}iN 7807
4-8-1975
1071713
"Circuit arrangement for the identification of a series
of unknown code words."
.
The invention relates to a circuit
arrangement for identifying a series of unknown code
words having two different information contents and a
starting signal which precedes each code word, parti-
cularly, in a radio telephony system, for the identifi-
cation of radio call numbers and channel commands which
are transmitted by means of a series of such code words.
In a radio telephony system of the public
land mobile-radio service of the German ~ederal Republic
a selective call is emitted from a fixed radio station in
order to establish a telephone connection between a
subscriber of the public telephony system and a mobile
radio station. Such a selective call is composed of the
radio call number (vehicle call number) and a channel
command and consists each time of a series of individual
pulse telegrams having each one code word for each figure
of the five-unit radio call number of the mobile ~adio
telephony station and a further code word for the Duplex
voice channel, on which the radio telephony connection
Z0 - can be established by the called mobile radio telephony
station. Each code word of the pulse telegram is preceded
by a starting signal with which the evaluation device is
started and the beginning of the evaluation and the
identification of the code word is exactly determined.
All mobile radio telephony stations
-2- ~J

DP~IN 7807
l~-8-1975
~1713.
.
- receiving the selective call, after demodulation, must
evaluate the pulse telegram of the radio call number
in order to detect whether their station is called.
The actually called radio telephony station must more-
over evaluate the pulse telegram with the code word
of the channel command, to determine the voice channel
to enable an automatic switch-over to said specified
voice channel to thereby establish th0 radio connection
in known manner.
However, the procedure used sofar for
the identification of the selective call requires a
considerable circuit design effort. In addition further
storage devices and a transmitter are required to transmit
the own radio call number in return after the mobile
station has switched-over to the voice channel, so as
- to thereby acknowledge the correct identification of the
received radio call number and of the channel command
and furthermore to effect the through-connection of the
radio lînk at the side of the fixed radio station.
It is therefore an object of the invention
to provide a novel circuit arrangement for evaluating and
identifying a series of unknown code words each preceded
by a starting signal and having two different information
contents and which is less complex in design. In a further
embodiment the circuit arrangement according to the invention
is also suitable to giv0 the own radio call number as an
acknowledgement signal for the correct reception, so that
special storage devices or transmitters are no longer
required.
The :in~ention realizes this object by means
--3--

Dl'~IN 7~C17
4_8-1~75
107~7~3
: of a circuit arrangment of the above mentioned type,
characterized in that a first clock pulse generator
'- which, started by the received starting signals, applies
clock pulses to a first storage device which contains
the code words of th~first information content to be
identified and to a code convertor, in that the code
words which are read-out in parallel one after the other
from said first storage device are converted into
serial code words by said code convertor, in that these
k lo serial code words and the received unknown code words
e ~
to be identified are e~-p-rt~ bit-wise with one another
in a comparator, which comparator starts a second clock
pulse generator when all the code words of the first
information content are in agreement with the code words
read-out from said first storage device, said second
clock pulse generator applying clock pulses to a second
storage device which contains the code words of the
second information content-to be identified, that the
code words which are read~out in parallel one after the
other from this second storage device are converted into
serial code words in the code convertor, in that these
serial code words, which are produced.bit-wise at the
clock frequency of the first clock pulse generator are
compared, bit-wise the one after the other with the
received unknown code words of the second information
content to be identified and in that the code words
which are found to be in agreement are stored in a third
storage device.
A further embodiment of the circuit
arrangement according to the invention has been constructed

~o7~7~3 D-PHN. 7807.
in such a way that the nu~ber of clock pulses of the first clock
pulse generator corresponds each time with the nu~ber of pulses
of the code words to be identified.
Furthermore the circuit arrangement according to
the invention has been designed in such a way that the elector
is stopped and reset by the comparator when two bits which are
cc~pared with one another are not in agreement.
The circuit arrangement according to the invention
i5 furthermore constructed in such a way that the third storage
devioe produces a further circuit criterion after reocgnizing and
storing the second information content which contains the chan-
nel command, which criterion, besides swit~hing the mabile radio
telephony station to the instructed voioe channel, also ensures
that the first clock pulse generator of the second storage device
and the code converter æe switched on via a control circuit to
give its own identification signal as acknowledgement signal.
Ihe circuit arrangement according to the invention
will be further explained with refenence to the drawing, in
which
Figure 1 shows an embcdiment of a circuit arrange-
ment for identifying a series of unknown code words for inclusion
in a mobile radio telephony station and Figure 2 is a table of
digits stored in a store in the arrangement of Figure 1.
Figure 1 shows a practical embodimi nt of a circuit
arrangement of an evaluation device for a mobile radio telephony
s~ation of the public land mDbile radio service for identifying
the radio call nu~ber and the channel command of a selective call
as well as for giving the own radio call number as ackncwledge-
ment signal.
The selective call of the fixed radio station which
is received on the call channel of the
., ~ .

l)PHN 7807
4-8~1975
~07~7~3
receiver section (not shown) of the mobile radio
telephony station, after demodulation, is applied
in digital form as pulse telegram to the input E
of the eval~ating device. The first code word
represents the first figure of the radio call number.
The starting signal which preceeds this first code
word starts via the starting signal detector 9 the
first clock pulse generator 1 whose clock pulses
control the code convertor 2 and the control unit 8.
0. At the same time the pulse telegram to be evaluated
is supplied to the first input a of the comparator 4.
The first storage device 3 contains non destructively
,_
in binary form the code words for the here 5-unit
radio call number which is permanently elocated to the
mobile radio telephony station. The first clock pulse
-- of the first clock pulse generator 1 switches the
control unit 8 to the first position. The command to
read the first code word which represents the first
figure of the radio call number is now applied to the
three outputs of the control unit 8 and consequently
to the three inputs of the first storage device 3.
The code word which is read-out in parallel from the
first storage device 3 is entered into the code converter
2 via the four second inputs b. The code convertor 2
converts the code word into a serial code word, which
is applied to the second input b of the comparator 4.
Consequently the first bit of the read-out code word
is applied to the second input b of the comparator 4
together with the first clock pulse of the first clock
pulse generator 1. The first bit of the unknown code word

DPIIN 7807
4_8-1975
.
~07~7~3
to be identified is also simultaneously applied to the
first input a of the comparator 4. The clock pulse fre-
quency of the first clock pulse generator 1 is rated so
that each time the next bit of the unknown code word to
be identified is applied to comparator 4 also the next
.i
bit of the code word of the code convertor 2 is applied.
If bits of the same value, either 0, 0 or
1, 1 are applied simultaneously to ~the two inputs a, b of
the comparator 4, then the bit-wise comparison of the
code words is continued when the next two bits are applied.
If, however, the two simultaneously applied bits are of
a different value, either 0, 1 or 1, 0 the comparator 4
- stops and resets the control unit 8. The further comparison
.. . .
of this code word and any further code words is conse-
quently prevented.
The construction of the evaluating device
becomes very simple when the first clock pulse generator 1
is designed so that each time after it has been started
it supplies only a certain number of clock pulses
whereafter it stops automatically. The number of clock
pulses corresponds each time with the number of bits of
the code word to be evaluated.
Each tirne at the occurrence of the next
(2 to 5t ) code word~o be identified of the five unit
radio call number at the input E of the evaluating device,
- the starting signal detector 9 starts the clock pulse
generator 1 by means of the detected preceding starting
- signal. Each first clock pulse always switches the control
unit 8 one step further so that the second to fifth code
word of the radio call number are supplied one after the

DPI-IN 780'7
4-~197~
. . . ~
107~713
other to the inputs of storage device 3. The supply,
conversion and comparison of these code words is
effected in the same way as for the first code word.
When all five code words of the radio
- 5 call number have been evaluated and found to be correct,
then the evaluated radio call number corresponds with
the call number which has been stored non-destructively
in the first storage device 3, and the receiving mobile
radio telephony station is consequently that station
which is called by the fixed radio station. In that case
the comparator 4 effects that the evaluating device switches
over from evaluating a radio call number to evaluating
the channel command.
The control unit ~ and the first storage
device 3 are switched off. In their place the second
storage device 6 and the second clock pulse generator 5
are switched on.
All digits 0,:1, ... 9 are stored in coded
form in the second storage de~ice 6 as binary information.
The code words~representing these digits are read-out
parallel one after the other under the control of the
clock pulses produced by the continuously operating second
clock pulse generator 5 and are f`ed to the second inputs
b of the code converter 2. The digits 0-9 have been stored
in the second storage device coded in such a way that
first those digits whose first position has the value "1'`
follow one another and subsequently all digits whose first
position has the value "0". The table in l~'igure 2 shows
the sequence in which the digits 0...9 are stored in the
second storage device 6 in the e~ample chosen.
o

DPllN 7807
4_8-1975
107~L7~3
.,
The unknown code word to be evaluated
for the channel command with preceding starting signal
'~~ is again applied to input E of the evaluating device.
Via the starting slgnal detector 9 the starting signal
` 5 starts the first clock pulse generator whose clock pulses
control the code convertor 2. At the same time the unknown
~- code word for the channel command is applied to the first
input a of the comparator 4. To the second input b
of the comparator 4 the code word of the second storage
device 6 is applied under the control of the clock pulses
produced by the second clock pulse generator 5 and
after conversion into serial form in the code converter 2.
During the time at which the first bit
of the unknown code word to be evaluated it applied to
the first input a of the comparator 4 there is also applied
to the second input b the first bit of the first code
word of the second storage device 6 via the code converter
~~ 2. If both bits have the same value then the comparator 4
stops the second clock pulse generator 5 and interrupts
the read-out of the code words from the second storage
device 6. The code word which has been read-out from
the second storage device 6 is retained. If the first
bits of the code words which are applied to the two in-
puts a, b of the comparator 4 are not in agreement then
the stored second code word of the second storage device 6
is read-out in parallel at the next clock pulse of the
second clock pulse generator 5. After having been converted
into a serial code word in the code converter 2 its first
bit is supplied to the second input b of the comparator 1,.
~0 This procedure is repeated for each following bit at each

DPIIN 7~07
4-8-1975
,
107i713
.
clock pulse of the second clock pulse generator 5 untill
as described above two bits of the same value occur at the
inputs a and b of the comparator 4 which causes the second
clock pulse generator 5 to be stopped by the comparator 4.
If the second and the next bits of the
unknown code word to be evaluated are supplied to the
first input a of the comparator 4 and synchronous there-
with in the rhythm of the first clock pulse generator 1
the second and the next bits of the comparison code
word read by the code convertor 2 to the second input b
of the comparator 4, the above procedures are repeated
for each new bit supplied. If, during the evaluation
- of the second and the next bit, a bit of the same value
is then supplied to the second input b as during the
evaluation of the proceding bit, then circuit criterion
produced by the comparator 4 remains. The second clock
pulse generator 5 remains in the stop state and the setting
of the second storage device 6 is retained. If however
a bit of a different value is applied to the second
input b of the comparator 4 then the second clock pulse
generator 5 is started and effects the read-out of the
next stored code word from the second storage device 6.
When the last bit of the unknown code word
has been evaluated this code word is available at the
output of the second storage device 6. After the last
clock pulse of the flrst cloc~pulse generator 1 a control
signal is produced via the code convertor 2. This control
signal now ac¢uates a third storage device 7 in which
the code word which was present at the output of the
second storage device 6 is stored and kept available
--10--

Dl'~IN 7807
4-~-1975
1l)7~713
- .
for further evaluation. After the code word has thus been
- stored th~ second storage device 6 is reset.
: ~ .
In order to enable if required, in the period
in which each time a bit of the unknown code word to be
evaluated is applied to the first input a of the comparator
' 4, the comparison of this bit with each time one bit of
several code words which are read-out one after the other
from the second storage device 6, the clock pulse frequency
of the second clock pulse generator has been chosen several
times lligher than that of the first clock pulse generator.
The value of the clock pulse frequency of the
second c,Lock pulse generator 5 depends in that case on
the code in which the digits are stored in the second
storage device 6. The higher th ~umber of code words
which must possibly be read-out during a clock pulse
of the first clock pulse frequency in the rhythm of the
second clock pulse frequency untill two bits of the same
value are applied to the first and,the second input a, b
of the comparator 4 the higher the second clock pulse
frequency must be. If 9 as in the code which is used for
the embodiment and which is represented in the tab]e of
Figure 2 four code words must be successively compared at
the most before agreement is obtained, the second clock
pulse frequency must be at least four times higher than
the first clock pulse frequency. The cvalusu~n device
of the embodiment uses a second clock pulse frequency
wh~ch is about ten times higher.
The evaluation de~ice according to the inven~
tion can also be used at the same time in transmitting
~30 its own radio call number which is non-destructivcly

DP~-IN 7~07
4-8~1975
.. . .
107~7~3
.' '
stored in the first storage device 3. To this end by
the additional evaluation of the information retained
in the third storage device 7, after the called radio
telephony station has automatically switched over to
the relevant voice channel, an additional control signal
switches the control circuit 10, the first clock pulse
generator 1, the first storage device 3, the code
convertor 2 and the control unit 8 on again. The clock
pulses of the first clock pulse generator 1 thus resume
to drive the code convertor 2 and the control unit 8.
As described hereinbefore the control unit 8 controls
the read.out in parallel of the code words which are
non-destructively stored in the first storage device
and which represent the radio call numbers which are
converted into serial code words in the code convertor 2.
After each serial code word has been completed with a
starting signal and after the two binary values "0"
and "1" have been converted each to be represented by
a different frequency these two frequencies are applied
to the transmitter modulator of the mobile radio telephony
station and transmitted as modulation on the carrier
frequency of the voice channe,l. After having been
demodulated the two frequencies are reconverted again
into binary code words and evaluated at the transfer
point of th~receiving fixed station and the radio
telephony connection is established with the calling
subscriber.
If the two-digit channel command is included
in one code word, as is usual in the public land~mobile
radio service, net B in which the second digit is
,
-12-

DI'I IN 7 80 7
4-8- 1 ~75
107~71~3
, . .
, arranged as the mirror image of the first digit then
the third storage device must be switched to the
receiving state via the code convertor 2 by a control
signal, already after the first part of the code word
has been evaluated in order to store the code word
which was last read by the second storage device 6.
When the code word for the first digit has been stored
into the first storage device 7 then the second storage
device 6 must be reset by a switching command for the
10 evaluation of the second part of the code word.
The second mirror-image part of the code word
to be evaluated is then evaluated in the same way as
the first part, Before the code word which is found
; at the output of the second storage device for the
15 second digit of the channel command is stored in the
third storage device 7 itis however now necessary that
the mirror-image code word is converted into the correct
code word in a further code convertor which is not shown
in the figure.
In the circuit arrangement according to the
invention the clock pulses of the~irst clock pulse
generator 1 may additionally be applied to the comparator
4 via a third input c . This enables the exact determination
of the moment of comparison of the bits which are applied
25 to the first and second input a and b of the comparator 4.
It is advantageous to choose the moment of comparison
in such a way that it is always approximately in the
middle of the bit to be compared.
The evaluating device according to the invention
30 can cf course also be used in those cases where only radio
-13-

DPIIN 7807
4-8-l97
: . . .
~ 0717~3
.
telephony numbers without channel commands must be
evaluated as for examplc in cab calling systems. In
this case the second and the third storage device 6, 7
and the second cloçk pulse generator 5 can be omitted.
In general the evaluating device according
to the invention can also be used in all those cases
where unknown code words must bA identified by comparing
them with several code words retained in a storage device.
In this case the first storage device 3 and the control
unit 8 are indispensable.
' 15
~ .
' , ' ' .

Representative Drawing

Sorry, the representative drawing for patent document number 1071713 was not found.

Administrative Status

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Event History

Description Date
Inactive: IPC from PCS 2022-09-10
Inactive: IPC expired 2009-01-01
Inactive: IPC from MCD 2006-03-11
Inactive: Multiple transfers 1997-09-26
Inactive: Multiple transfers 1997-09-26
Inactive: Expired (old Act Patent) latest possible expiry date 1997-02-12
Grant by Issuance 1980-02-12

Abandonment History

There is no abandonment history.

Owners on Record

Note: Records showing the ownership history in alphabetical order.

Current Owners on Record
N.V. PHILIPS GLOEILAMPENFABRIEKEN
Past Owners on Record
None
Past Owners that do not appear in the "Owners on Record" listing will appear in other documentation within the application.
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Document
Description 
Date
(yyyy-mm-dd) 
Number of pages   Size of Image (KB) 
Abstract 1994-03-24 1 34
Claims 1994-03-24 4 154
Drawings 1994-03-24 2 36
Descriptions 1994-03-24 13 448