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Patent 1084604 Summary

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(12) Patent: (11) CA 1084604
(21) Application Number: 1084604
(54) English Title: FOUR WIRE MULTI-SATELLITE INTRUSION ALARM CONTROL SYSTEM WITH TAMPER SWITCH
(54) French Title: SYSTEME D'ALARME MULTI-SATELLITE, A QUATRE CONDUCTEURS, SIGNALISANT LES INTRUSIONS ET LES MANIPULATIONS NON AUTORISEES
Status: Term Expired - Post Grant
Bibliographic Data
(51) International Patent Classification (IPC):
  • G08B 13/22 (2006.01)
  • G08B 29/00 (2006.01)
(72) Inventors :
  • HUMPHRIES, PETER E. (Canada)
(73) Owners :
  • CONTRONIC CONTROLS LIMITED
(71) Applicants :
  • CONTRONIC CONTROLS LIMITED
(74) Agent: SMART & BIGGAR LP
(74) Associate agent:
(45) Issued: 1980-08-26
(22) Filed Date: 1977-01-14
Availability of licence: N/A
Dedicated to the Public: N/A
(25) Language of filing: English

Patent Cooperation Treaty (PCT): No

(30) Application Priority Data: None

Abstracts

English Abstract


ABSTRACT OF THE DISCLOSURE
An intrusion alarm system has a number of satellites
each connected to a master by an unshielded cable having only
four conductors, namely two power conductors, a drive signal
conductor which supplies drive to the satellite transmitter and
the satellite control circuit, and an alarm conductor. When
an intrusion is detected by a satellite, its control circuit
transmits a high level alarm signal on the alarm conductor to
the master and also enables (but does not operated a speaker in
the satellite. The master has a rocker switch which an
investigator turns of when he arrives at the supervised
premises. This turns off the drive signal to the satellite.
The control circuit of the satellite that caused the alarm
responds by sounding its speaker, enabling determination of
where the alarm occurred. The rocker switch may also be
placed in a walk test position, enabling the system to be
walk tested, and then may be returned to its initial super-
visory position applying a reset signal to restore the satellite
control circuits all to their normal supervisory condition. A
tamper switch operates if a satellite is tampered with and
causes transmission of a high level tamper alarm signal,
different from the intrusion alarm signal, to the master.


Claims

Note: Claims are shown in the official language in which they were submitted.


THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE PROPERTY
OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. An intrusion alarm system comprising:
(1) a master control unit having:
(a) two power supply terminals and power supply
means coupled thereto for supplying power
to said power supply terminals,
(b) a master drive signal terminal, and a drive
signal generator coupled thereto for applying
a drive signal to said master driae signal
terminal,
(c) a master alarm signal terminal, and intrusion
alarm detector means coupled thereto and
responsive to receipt of a predetermined first
high level alarm signal thereat for generating
an intrusion alarm,
(d) tamper alarm detector means coupled to said
master alarm signal terminal and responsive to
receipt thereat of a second high level alarm
signal different from said first high level
alarm signal for generating a tamper alarm,
(2) a plurality of satellite units, each having:
(a) a satellite drive signal terminal, and a
transmitter coupled thereto and responsive to
receipt of said drive signal thereat for trans-
mitting a radiation field in a supervised area,
(b) a receiver for receiving a portion of said
radiation field which is reflected from objects
in said area,
(c) signal processing means coupled to said receiver
for comparing the transmitted and received fields
and responsive to disturbances in said received
field caused by a moving intruder in the supervised
area, for generating a third alarm signal upon
26

occurrence of such disturbance,
(d) a satellite alarm signal terminal,
(e) a control circuit coupled to said signal processing
means and to said satellite alarm signal terminal
and responsive to receipt of said third alarm
signal for generating said first high level alarm
signal at said satellite alarm signal terminal,
(f) a housing, a cover removable from said housing for
providing access to said housing, and a tamper switch
within said housing and operable upon removal of
said cover,
(g) said control circuit including tamper switch
detector means connected to said tamper switch
and to said satellite alarm signal terminal and
responsive to operation of said tamper switch for
generating said second high level alarm signal at
said satellite alarm signal terminal,
(h) two satellite power receiving terminals for
receiving power and coupled to said transmitter,
and to said receiver, and to said signal processing
means, and to said control circuit for supplying
power thereto,
(3) a cable having only four wires connecting each satellite
unit to said master control unit, two of said wires being
connected between said power supply terminals and said
satellite power receiving terminals, a third of said
wires being connected between said master drive signal
terminal and said satellite drive signal terminal, and
the fourth of said wires being connected to said master
alarm signal terminal and said satellite alarm signal
terminal.
2. An intrusion alarm system according to claim 1 wherein
said control circuit includes means coupled to said satellite
drive signal terminal and responsive to receipt of said
drive signal thereat for generating a high level status
27

signal and for applying said status signal to said satellite
alarm signal terminal during receipt of said drive signal at
said satellite drive signal terminal, said control circuit
including means responsive to receipt of said intrusion alarm
signal for removing said status signal from said satellite
alarm signal terminal and for substituting a first fixed voltage
signal, said first fixed voltage signal constituting said first
alarm signal.
3. An intrusion alarm system according to claim 2 wherein
said tamper switch detector means includes means responsive
to operation of said tamper switch for removing said status
signal from said satellite alarm signal terminal and for
substituting a second fixed voltage signal different from
said first fixed voltage signal, said second fixed voltage
signal constituting said second alarm signal.
4. An intrusion alarm system according to claim 3 wherein
said intrusion alarm detector means includes means responsive
to receipt of either said second alarm signal or said first
alarm signal for generating said intrusion alarm.
5. An intrusion alarm system according to claim 1 wherein
each satellite unit includes an alarm indicator, and each control
circuit includes:
(i) enable means responsive to receipt of said
third alarm signal for thereupon producing
an enable signal,
(ii) control means connected to said alarm indicator
and normally inhibiting operation of said alarm
indicator during receipt of said drive signal at
said satellite drive signal terminal,
(iii) said control means including first logic means
connected to said enable means and responsive
to termination of receipt of said drive signal
at said satellite drive signal terminal and to
28

the presence of said enable signal, for operating
said alarm indicator upon such termination of receipt
of said drive signal at said satellite drive signal
terminal if said enable signal is then present,
whereby said alarm indicator of a satellite normally
operates only when both said signal processing means
of such satellite has generated said third alarm
signal and said drive signal has also ceased to be
applied to said drive signal receiving terminal of
such satellite.
6. An intrusion alarm system according to claim 5 wherein
each control circuit further includes means responsive to
resumption of application of said drive signal to said drive
signal receiving terminal, following termination of such
application, for terminating said enable signal, and said
control means further includes:
(A) latch means operative on termination of
application of said drive signal to said
drive signal receiving terminal for pro-
ducing a latch on signal,
(B) second logic means coupled to said alarm
indicator, and to said latch means, and to
said signal processing means and responsive
to receipt of said latch on signal and said
third alarm signal together for operating
said alarm indicator,
each control circuit also including third logic means coupling
said latch means to said satellite drive signal terminal for
resetting said latch means to inoperative condition on receipt
of a reset signal at said satellite drive signal terminal,
and said master control unit includes means for selectively
applying a said rest signal to said master drive signal terminal,
whereby when application of said drive signal to said master
drive signal terminal has been terminated and then resumed,
then said alarm indicator will operate during movement in the
29

supervised area so that said system may be walk tested, and
whereby said latch means may be rest so that said control means
will inhibit operation of said alarm indicator in the supervised
area when said drive signal is present at said master drive signal
terminal, and each control circuit further includes means connected
to said first logic means and to said latch means for disabling
said tamper switch detector means upon termination of application
of said drive signal and subsequent application of said drive
signal without said reset signal, to said master drive signal
terminal.
7. An intrusion alarm system according to claim 6 wherein
said master control unit includes switch means having three
positions, namely a supervisory position, an intermediate
position, and a walk test position, and control means coupling
said switch means to said drive signal generator and to said
master drive signal terminal for producing at said drive signal
terminal:
(a) said drive signal when said switch is in said
supervisory position,
(b) an off signal when said switch is in said
intermediate position,
(c) said drive signal when said switch is in said
walk test position,
(d) said reset signal followed by said drive signal
when said switch is moved from said walk test
position through said intermediate position to
said supervisory position.
8. An intrusion alarm system according to claim 7 wherein
said means for generating said status signal is an oscillator,
said means for removing said status signal from said satellite
alarm terminal includes means for grounding said satellite alarm
terminal, said first fixed voltage signal thereby being ground.
9. An intrusion alarm system according to claim 1, 2 or
3 wherein said cable is unshielded.

Description

Note: Descriptions are shown in the official language in which they were submitted.


`-- ~
)4
This invention relates to a four wire satellite
control system ~or a multi-satellite intrustion alarm and is an
improvement to the invention disclosed in my co-pending
application serial number 742,047 filed November 15, 1976 for
"Multi-Satellite Intrustion Alarm System.
- Intrusion alarms normally operate by transmitting a
wave field (typically ultrasonic or electramagnetic radiation) -
into an area under supervision, receiving a portion of the
reflected field, and comparing the two. If a moving intruder is
present, a doppler shift is detected in the received field. The
doppler frequency is processed and is used to produce an alarm
signal.
Since each transmitter-receiver unit can supervise
only a relatively small area, such as a room or hall, therefore
in large buildings a number of separate units must be used. To
reduce duplication of equipment, it is usual to provide a master
unit and a number of separate satellites connected to the master
unit. A satellite unit is placed in ea~ch area to be supervised.
The satellites carry out some signal processing, but it is the
practice to place some of the signal processing circuits in the
master where they provide common processing for several
satellites.
~ disadvantage of conventional multi-satellite
intru~ion alarms is that the cables connecting the satellites to
the masker usually require numerous separate conductors. These
,
cable8 are therefore expensive, bulky, and dl~icult to install.
In addition, conventional systems usually require that the
connecting cables between the satellites and the master be
shielded ~since low level signals are being transmitted to the
master ~or further analysis), increasing ~urther -the expense and
bulk of the cable. The bulky shielded cables are also diEEicult
- 2 -
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,

to install unobtrusively.
A still further disadvantage of conventional intrusion
alarm systems relates to the practice, in large buildings where
many satellites are required, of connecting the satellites to the
master in groups. Each group of satellites
, j,.,.,;,
,~ ~ ' , ,
- 2a -
, . . .. . . . .. . . . . .
, . . . . . . . .
.
, . . .

constitutes a "zone". When one satellite in a zone
generates an alarm signal, it is normally difficult to
determine which o~ the:satellites in the zone actually
generated the alarm. In conventional systems, when a
security guard investigates these zones in question, his
movement usually causes other satellites in the zone to
be triggered. This adds to the difficulty of tracing the
movements of the intruder or of analyzing the false alarm
wnich caused the alarm signal.
Accordingly, it is an object of the invention to
provide an intrusion alarm control system in which, in a
preferred embodiment, each satellite is connected to the
master by only four wires, which normally need not be
shielded. One of the wires supplies power to the satellite;
a second is a common return line; the third wire is a drive
signal line which carries a drive signal from the master to
the satellite; and the fourth is an alarm line which carries
a high level alarm signal from the satellite to the master.
In a preferred embodiment of the invention a tamper switch
is provided in each satellite. If the satellite is
tampered with (by removal of its cover), the tamper switch
will cause a different high level alarm signal to be
transmitted from the satellite to the master over the
alarm line. The master dekects such different alarm
signal and generates an~appropriate alarm which is transmitted
to an alarm company or ~o police head~uarters or as desired.
Further objects and advantages of the invention will
appear from the following disclosure, taken together with
the accompanied drawings, in which:
Fig. 1 i~ a block diagram showing a conventional
.

connec-tion arrangement of satellites to a master control
unit;
Fig. 2 is a block diagram of a satellite according
to the invention;
Fig. 3 is a block diagram showing a portion of a
master control unit of the invention;
Fig. 4 is a schematic of a control circuit of a
satellite;
Fig. 5 shows a drive wave form produced at a satellite;
Fig. 6 shows a portion of the control circuit of
Fig. 4 in supervisory condition with the condition of certain
logic elements indicated thereon;
Fig. 7 shows the Fig. 6 circuit in alarm condition;
Fig. 8 shows the Fig. 6 circuit with the drive
signal off;
Fig. 9 shows the Fig. 6 circuit in walk test
condition;
Fig. 10 is a schematic of a logic circuit of a master
control unit;
Fig. 11 shows wave forms produced by the logic ~ -
circuit of Fig. 10;
Fig. 12 i5 a diagrammatic view of the housing of
a satellite showing a tamper switch in position therein;
Fig. 13 i~ a schematic of a control circuit of
the satellite of Fig. 12, similar to Fig. ~ but showing the
tamper ~witch circuitry in position;
Fig. 1~ shows wave forms on the alarm line of the
Fig. 13 circuit7
Pig. 15 i3 a block diagram of a master control unit
for use with the Fig. 13 circuit; and
: :
,
,. :" ~ ..

Fig. 16 is a schematlc of a portion of the control
unit of Fig. lS.
General Description
. _ ,
Reference is first made to Fig. l, which shows a
typical connection system for a master control unit and
satellites. The connection system of Fig. 1 has been used
in most conventional alarm systems and is preferably also
used in the alarm system of the invention. As shown, a
master control unit 22 is connected to four satellite zones - -
24, 26, 28, 30. Each satellite zone typically consists of
five satellites, which are indicated as satellites 1 to 5,
6 to 10, 11 to 15 and 16 to 20. The satellites of each zone
are connectea'together and to the master control 22 by cables ,
32.
In operation,'if an intruder is detected by any
.
sa*ellite in a zone, for,example in satellite 1 of zone
24, a signal (which in conventional systems usually
,,
; requires further analysis) is sent to the master control ~'
unit 22. The master
,
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, , ,
:,,,: ; '
: :
- 4a - :
.

control unit 22 generates an appropriate alarm signal, which
may be sent by a telephone line 34 either to the alarm company
whose duty it i5 to supervise the premises in question, or
to police headquarters, or as desired.
As indicated previously, the cables 32 connecting
the satellites to the master are usually shielded, and usually
contain numerous conductors. Because of this, installation
of the satellites is usually a di~ficult and expensive task.
According to the invention, means are provided in
the satellites and in the master control unit 22 so that the
cable 32 need contain only four conductors. These means are
shown in block diagram form in Figs. 2 and 3. Fig. 2 shows
a typical satellite, for example satellite 1 of zone 24.
Satellite 1 includes four terminals 40a, 40b, 40c, 40d
which are connected by conductors 42a, 42b, 42c, 42d to four
corresponding terminals 44a, 44b, 44c, 44d in the master 22
(Fig. 3). As will be explained, conductor 42a is a drive
conductor, conductor 42b is an alarm conductor, and conductors
42c, 42d are power supply conductors.
In the example here illustrated, it is assumed
that the transmitted field i8 ultrasonic sound at a fre~uency
of 40 KHz. Accordingly, the master 22 includes a 40 KHz
transmitter 46, which forms part of a logic circuit 48. The
transmitter 46 applies a 40 KHz drive signal to terminal 44a,
and thence through drive conductor 42a to terminal 40a of the
satellite 1. In satellite 1 the 40 KHz siynal is squared by a
., '", ,, ' " ',

1r)8~
Schmidt trigger 50, whieh improves the waveEorm o~ the drive
signal and ensures that its peak amplitude is constant. The
40 KHz signal is then sent to transmitter 52 (Fig. 2), whieh
radiates a 40 KHz ultrasonie sound field.
A portion of the reflected field is reeeived by a
transducer-receiver 54, amplified by amplifier 56, and then
directed to a synchronous detector consisting of transistor Ql.
The base of transistor Ql is driven by the 40 KHz drive signal.
The signal from the transistor Ql collector is passed to a
band pass filter 58, which removes the 40 KHz component and
also removes very low frequencies. The signal from the band
pass filter 58 is then direeted to a signal processor 60. The
signal processor 60 processes the signal from filter 58 and
produces an alarm signal if the signal from filter 58 contains
the doppler frequencies which are likely to have been generated
by a moving intruder (40 Hz to 300 Hz for a 40 KHz transmitted
sound field). Various known forms of signal processing eireuits
may be used for processor 60. A preferred signal processing
eircuit is shown in my eo-pending application serial no. 742,048
filed November 15, 1976 for "Filter system and method for
intrusion alarm"
,
The alarm signal (if any) Erom signal processor 60
may be of extremely short duration, so it is direeted into
a pul5e streteher 62 ~typieally a Sehmidt trigger) whieh
produees a pulse o~ ~lxed length when it is triygered. The
pulses (if any) ~rom the pulse streteher 62 are fed to a eontrol
eireuit 64, which then sends an appropriate high level signal
baek to the master 22 via eonduetor 66, terminal 40b, alarm
eonduetor 42b, and terminal 44b. This signal is reeeived in
in the master by a deteetor 68, whieh then provides a signal
to operate an alarm signal generator 70. The signal from
generator 70 may be of any desiréd form, e.g. it may operate
- 6 -
,

a telephone ~o alert the alarm company.
As shown in Fig. 3, the logic circuit 48 includes
a three position rocker switch 72 having a rocker element 74.
The three positions of rocker switch 72 are (i) the position
shown in Fig. 3, in which rocker element 74 contacts lower
terminal 76, (ii) a position in which rocker element 74
contacts upper terminal 78, (iii)a central position in which
rocker element 74-contacts neither of terminals 76, 78. The
position shown in Fig. 3 is the normal supervisory position.
In this position, rocker switch 72 controls logic circuit 48
so that the 40 KHz signal from oscillator 46 is applied to
terminal 44a.
If an alarm signal is produced by generator 70,
and after an authorized person arrives at the premises to
inves~igate, he will place rocker switch 72 in its central
positionj in which rocker element 74 does not contact either
of terminals 76, 78. As will be explained, the logic circuit
48 then removes the 40 KHz drive signal from terminal 44a,
so that the satellite 1 (and the other satellites in zone 1?
will no-longer generate an alarm. This enables the person
to investigate the premises protected by zone 1 without
creating additional alarms. ~He may also switch the
corresponding rocker switches for the other zones to their
central po~itons, thus also preventing any o the o-ther
satellites from generating an alarm signal. One switch
actuator may be used for the rocker switches of all the zones.)
When the authorized person switches o~ the 40 KHz
drive signal at the master 22, the control circuit 64 of
Fig. 2 responds to the combination of the terminated 40 KHz
drive signal, and the alarm signal which was previously
received from pulse stretcher 62, and operates a speaker 80
in the satelli~e. Thus, when the investigatlng person walks
through the area supervi~ed by the satellite whlch generated
,
. . .
. .
",, ",, " ",, ,, , , , , ~

the alarm signal, ho will hcar t}l0 speaker B0 and will know
which satellite generated the alarm.
When the investigator moves rocker element 74,
power is removed from terminal 82 o~ alarm signal generator 70.
This, by conventional means, places generator 70 in a constant
alarm condition, so that the alarm company will know that
the system is not in its normal supervisory condition.
After the investigating person has completed his
investigation, he can then place the system in a "walk test"
condition by moving the rocker switch 72 so that the rocker ;~ -
element 74 contacts terminal 78. This operates the logic
circuit 48 of Fig. 3 to resume supply of the 40 KHz drive
signal to the satellites, including the satellite 1 of
Fig. 2. The control circuit 6~ of satellite 1 reaats to
the resumption o~ the 40 KHz drive signal at terminal 40a
by altering the control of the speaker 80, so that the -
speaker 80 will now be operated whenever an alarm pulse -
from pulse stretcher 62 is produced. Therefore, as the
investigator walks through the area supervised by satellite 1,
he can test and determine the extent of coverage of satellite 1
and whether it is operating properly or generating false
alarms. The same applie5 to the other satellites in zone 1
~and in any other zones where rocker switches have ~een
moved to the "walk test" position).
After the walk test has b~en completed, the
investig~tor moves the rocker switch 72 back to its
original position, in which rocker element 74 contacts
terminal 76. This causes the logic circuit 98 to send a
~imed reset siynal along drive conductor 42a, as will be
described, to actuate the control circuit 64 of each satellite
to resume its original supervisory mode of operation. Power
is also reapplied via terminal 82 to the alarm signal
generator 70
As ~7ill also be described, during the time when the
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, ' '''", , ' " ;' " , '' '' ' ' , ,

^" ` l~J8~
satellite is not generating an alarm signal, its control circuit
64 sends a supervisory signal over alarm conductor 42b to the
master 22. If the supervisory signal ceases for example because
the cable 32 is cut or short circulted, this operates the
detector 68 which causes the alarm signal generator 70 to
operate. Similarly, if for some reason the 40 KHz drive
signal from the master 22 to the satellite 1 ceases, the
~~ control circuit 64 of the satellite reacts by ceasing to apply
the supervisory signal to terminal 40b, again causing detector
68 to operate.
The remaining two conductors 42c, 42d of Figs.
2, 3 supply ~6 volts and a cornrnon return respectively to the
various components shown in Fig. 2. These two conauctors
are shown as connected directly to a six volt power supply 90 ~ -
in the master 22, and are indicated as being connected to
the cornponents of Fig. 3 by the diagramatic showing of
these components as being connected to +6 volts and ground.
Detailed Description
A ~ Circui~ Description
Reference is next made to Fig. 4, which shows i~
detail the satellite control circuit 64. As shown in Fig. 4,
the 40 KHz drive signal from terminal 40a is fed through
resistor Rl to the Schmidt trigger 50, which produces a
Y~ constant peak amplitude square wave train 98 (Fig. 5) from
the drive signal. The wave train 98 is fed to the
transmitter 52 and the base of transistor Ql, as described,
and is also fed through diode Dl to the input of a second
Schmidt trigger 100. The positive side of diode Dl is
connected through resistor R2 to -the -~6 volt supply and is
also connected through capacitor Cl to ground.
The outpu~ of Schrnidt trigger lOO is fed to an
inverter 102 and also through capacitor C2 to the reset
terminal 104 of a memory latch 106. The output of the
inventer 102 i5 fed to one input 107 o~ a NAND yate 108, and
also to the ~et terrninal 109 of a second memory latch llO.
,~,
_ 9 _
,

iO4
The output of latch 110 is directed to one terminal 112 of
a NAND gate 114. The output of the NAND gate 114 is fed
to one input 116 of NOR gate 118. The output of NOR gate 18
is directed to the input of an oscillator 120 (typically 5KHz)
consisting of NAND gate 112, inverter 124, resistors R3 and R4,
and capacitor C3. The output of the oscillator 120 is fed
through amplifier 128 to the speaker 80.
The square wave train from the input trigger 50
is also fed through a second diode D2 to the input 130 of
another Schmidt t~igger 132. The input 130 of the Schmidt
t*igger 132 is connected to ground, through the parallel
combination of resistor R5 and capacitor C4. The output of
Schmidt trigger 132 is connected to the reset terminal 134
of the memory latch 110.
The output of Schmidt trigger 62 (the pulse
stretcher) is connected to the set terminal 138 of memory
latch 106 and also to an input terminal 142 of NAND
gate 114. The output of latch 106 is connected
to an input terminal 140 of NAND gate 108. The output of
NAND gate 108 is connected to input 148 of NOR gate 118.
The output o~ Schmidt trigger 62 is also connected
through resistor R6 to the base o~ transistor Q2, the
collector-emitter circuit o~ whiah is connected between
ground and terminal 42b.
Finally, the Fig. 4 circuit includes a 10 Hz oscillator
150, consisting o~ NAND gates 152, 154, timing resistors R7
R8, and timing capacitor C5. Oscillator 150 applies a
10 Hz ~ignal to terminal 40b so :Long as the 40 KHz signal
is present at terminal 40a, as w:Lll be explained.
B - Operation - Supervisor~ Condition
The detailed operation o~ the Fig. 4 circul-t is
as ~olloTns. So long a~ the 40 KHz drivlng ~iynal is present
at terminal 40a, Schmidt trigger 50 produces the square wave
-- 10 --

)4
signal 98 shown in Fig. 5, varying between -~6 volts (when
the driving signal is low), and ground (when the driving
signal is high). Signal 98 maintains capacitor Cl discharged
so long as the 40 KHz drivin~ signal is present at terminal
40a. This is because diode Dl iS reversed by the "on" half
cycles of signal 98, permitting capacitor Cl to charge
slowly through resistor R2 during "on" half cycles, but
during "off" half cycles diode Dl iS forward biased, dis-
charging capacitor Cl through diode Dl and through a low
resistance connection to ground (not shown) which is made in
the Schmidt trigger 50.
The opposite situation prevails with regard to
capaci~or C4. This capacitor is normally charged, since , - -
during "on" half cycles of signal 98, diode D2 is forward
biased, permitting rapid charging of capacitor C4, while
during "off" half cycles, diode D2 is reverse biased,
causing capacitor C4 to discharge slowly through resistor R5. -
So long as capacitor Cl remains discharged, the
I output from Schmidt trigger 100 is high (i.e. +6 volts),
since it is an inverting trigger, and the output from
; inverter 102 is low (i.e. ground), so the memory latch 110
is not set. Latch 110 therePore applies a low to input 112
of NAND gate 114. Inverter 102 also applies a low to input
107 of MAND gate 108. The output of NAND gate 108 is now
high, applying a high to the second input 148 o~ NOR gate 118.
~; So long as both inputs of NOR gate 118 are high, the output
of gate 118 is low, inhibiting oscillator 120. The speaker 80
therefore remain~ silent. This situation is shown in Fig. 6,
in which high5 are indicated by ~ signs and lo~ls are
indicated b~ - signs.
In addition, so long as the 40 Kllz driving signal
is present, a high is applied from Schmid~ triyger 100 to
NAND gate 152 of 10 Hz oscillator 15Q, and a second high 18 ~:
,~ j .
.. . . .

applied from the input of trigger 132 to NAND gate 154 of
oscillator 150. Oscillator 150 operates in conventional
manner to apply a 10 Hz square wave train of about 6 volts
amplitude to terminal 40b. The 10 Hz wave train is transmitted
to the master 22 (Fig. 3) and received by the detector 68.
So long as the detector 68 receives the 10 Hz signal, it will
not operate the alarm signal generator 70.
C - Supervisory Condition - Alarm
If an intrusion occurs, causing a high pulse (+ 6
volts) from Schmidt trigger 62, this pulse turns on transistor
Q2 for the duration of the pulse. Transistor Q2 grounds
terminal 40b, stopping transmission of the 10 Hz signal from
oscillator 150 to the detector 68. The absence of the 10 Hz
signal triggers the detector 68, causing it to operate the
alarm signal generator 70.
In addition, the high from Schmidt trigger 62 is
applied to one input 142 of NAND gate 114 (See Fig. 7).
However, since the other input 112 to gate 114 remains low
(since latch 110 has not been set), the output from gate 114
remains high. There is, therefore, no change in the output
of NAND gate 114 that would cause NOR gate 118 to remove
the inhibit signal (a low) from oscillator 120.
The high rom Schmidt trigger 62 also acts to set
latch 106 (~ee Fig. 7) placing a high on input 140 of
N~N~ gate 108. However, input 107 of NA~D gate 108 remains
low (due to inverter l0~) and the output of gate 108 remains
high, and again there i~ no change in the condition of
NOR gate 118. The speaker 80 thu~ remains silent, so a~
nok to alert the intruder, although an alarm has be~n
transmitted to the master and hence to the alarm company.
D ~ Drive Signal OFF
~ 7hen an authorized person responds to the alarm
- 12 -
,

1~3~
and arrives at the supervised prcmises to investigate, he
will move the rocker switch 72 (Fig. 3) to its intermediate - -
position to shut off the 40 KHz drive signal. This shuts
off the transmitters of all of the satellites and prevents
them from responding to further movement. In addition, when
the 40 KHz drive signal is shut off, the output from trigger 50
stays high; diode Dl remains reverse biased, and capacitor Cl
charges through resistor R2, producing a low at the output -
of trigger 100. -
The low at the output of trigger 100 produces a
high at the output o~ inverter 102 (see Fig. 8) setting
latch 110 and also applying a high to input 107 of NAND gate 108.
Since latch 106 was set by the previous alarm pulse from
trigger 60, and applies a second high to input 140 of NAND
gate 108 (see Fig. 8) gate 108 now has two high inputs.
Its output therefore goes low, applying a low to input 148
of NOR gate 118. The output of NOR gate 118 now goes-high,
enabling oscillator 120. The output of the oscillator 120
is amplified by amplifier 128 and is fed to speaker 80.
Thus, when the investigator reaches the area which the
satellite 1 supervises, he will hear its speaker and will
know that the intruder was in that area or that it generated
a false alarm. If the speakers of any other satellites are
sounding, he will also know that these satellites generated
alarm signals. No other alarm signals will be yenerated,
because the 40 KHz driving signal has been turned off. It
will be seen that speaker 80 sounded when two conditions
occurred, n~nely (1) an intrusion was previously detected,
and (2) the 40 KH~ drive signal was turned off.
E - Walk Test
... . _ _
After the investiyation has been completed, ik wlll
normally be desired to walk test the system, to ensure -that
it i5 operating properl~. At thi~ time, the rocker switch 72
- 13 -

(Fig. 3) is mov~d so that its rocker element 74 contac-ts
terminal 78. This turns on the 40 KHz drive siynal again,
again discharging capacitor Cl.
When capacitor Cl is discharged, trigger 100 goes
high (see Fig. 9), resetting memory latch 106 through
capacitor C2. Now, with the 40 KHz drive signal available
to the satellites, when the authorized person moves in the
area supervised by the satellite 1, a high is produced by
trig~er 62 and is fed directly to input 142 of NAND gate 114.
The other input 112 to NAND gate114 is also high, since
latch 110 was set when the 40 KHz drive was turned off
previously. The two high inputs to NAND gate 114 produce
a low at its output. This low is applied to input 116 of
NOR gate 118, which then removes the inhibit from the
oscillator 120. The result is that the speaker 80 sounds
during the time wh0n the authorized person is actually
moving-in the area under supervision. This enables
testing of the satellite in question and also ~acilitates
setting of the levels at which it will generate an alarm
signal.
F ~ Return to Supervisory Condition
After the walk testing has been comp].eted, and
the system iB to b0 placed back into its supervisory condition,
the rocker switch 7~ is returned to its original condition
shown in Fig. 3. By means to be described, this produces a
timed .4 second low siynal on drive conductor 42, followed
by a timed .4 second high signal, followed by the normal
40 KHz drive siynal. The timed .4 second hiyh signal is
sufficient for capacitor Cl to discharge to its normally
discharged condltion and is also sufficient time for capacitor
C4 to discharge through resi~tor R5, causiny the output of
the second triyger 132 to yo hiyh. This places a high signal
.
. . .

on the reset terminal 134 of latch 110, resetting this latch and
thereby disabling any further enunciation of the speaker 80. When
the 40 KHz drive signal resumes, after the timed signals, the
system is back in supervisory condition.
G - Description of Master Logic Circuit
The logic circuit 48 of the master 22, and the wave
forms produced thereby, are shown in detail in Figs. 10 and ll.
When the rocker switch 72 is in the position shown the 40 KHz
oscillator 46 operates and its signal is fed to input 200 of OR
gate 202 to operate driver amplifier 204. Arnplifier 204 then
feeds the amplified 40 KHz drive signal to the drive terminal 44a.
There is no input to khe second input 206 of OR gate 202 at this
time, because input 206 is fed by AND gate 208, one input 210 of
which is a single shot multivibrator 212 which is not operative
at this time. ~ -
When the rocker switch 72 is operated so that its
rocker elem~nt 74 is in its intermediate position, in which
element 74 does not contact either terminal 76, 78, then -~6 volts
is removed from the second input 214 of NAND gate 216. Gate 216
is a negative logic NAND yate which produces a hlgh at its output
only when both its inputs are low, i.e. it functions like a
positive loyic NOR gate. Both the inputs of NAND yate are now low,
thereby proaucing a high at the inpuk 218 of OR gate 220, which in
turn produce~ a hiyh at the input 222 of AND gate 224. The second
input 226 of AND yate 220 is also hiyh at this time, because of
inverter 228, the input of which i~ grounded through resistor R10.
The output of AND gate 2Z4 therefore yoes hiyh, inhibiting the 40
KHz oscillator 46, which ceases opera-tion. When oscillator 46
turns off, the drive terrninal 44a i~ yrounded by means not shown
in the driver amplifier 204.
The wave forTns thu~ produced at drive terminal 44a
- 15 -

~4t;(~
are shown in Fig. 11. The 40 KHz drive signla is shown at 230,and the ground signal produced when the 40 KHz oscillator 46 is
inhibited is shown at 232. As described, when the 40 KHz
oscillator 46 is inhibited, an investigator can walk into the
supervised area without causing a further alarm.
When the rocker switch 72 is switched to its walk
test condition, in which rocker element 74 contacts terminal 78,
this supplies a high to the input of inverter 228, causing its
output to go low, so that AND gate 224 has one high input and one
low input. AND gate 224 therefore removes the inhibit or high
signal from oscillator 46, and the drive terminal 44a now receives
the 40 KHz drive signal again. As previously described, the
satellites will now detect motion and the speakers 80 will sound
at the time when the motion occurs, so that the system can be
walk test. In addition, input 234 of NAND gate 216 goes high and
input 214 of this gate goes low.
To return the system back to supervisory position,
the rocker switch 72 is returned to its position as shown in
Fig. 10. As the rocker element 74 moves, both inputs 214, 234
to NAND gate 216 are low for a brief interval. The output of
gate 216 therefore goes high for a brief interval and triggers a
single shot multivibrator 236 which produces a .4 second high
output pulse. This high pulse at input 238 or OR gate 224
produces a .4 second high at input 222 of AND gate 224. AND gate
224 now has two high inputs (input 222 from OR gate 220 and inpu-t
226 from inverter 228), so the 40 K~z oscillator 46 is inhibited
for .4 seconds. The .4 second off pulse in the drive signal is
indicated at 250 in Fig 11.
~ 7hen the single shot multivibrator 236 times out, and
since by this time the switch 72 will have reached the position
drawn, the output of OR gate 220 goe~ low again, since i-t will
- 16 -
-
.

have lows at both its inputs. The low output or OR gate 220
triggers the second single shot multivibrator 212. Multivibrator
212 produces a .4 second high pulse at its output. And gate 208
now has two high inputs, namely input 210 from multivibrator 212,
and the other input 240 supplied directly from terminal 76 and
the +6 volts supply. AND gate 208 therefore produces a high
output for .4 second (the timing duration of multivibrator 212)
and this applied to input 206 of OR gate 202, produces a high at
its output. The high output of OR gate 202, fed to the driver
amplifier 204, produces a high pulse 252 (Fig. 11) at drive
terminal 44a for the timing duration of multivibrator 212 (.4 ~-
seconds).
As soon as multivibrator 212 times out, the high
input to input 206 o~ OR gate 202 is removed, and the normal 40 -
.
KHz drive signal 230 is reapplied to the drive terminal 44a. The -
system is now back in normal supervisory operation.
In the system described, it will be seen that the
alarm signal transmitted by the satellites to the master is a -
high level signal, i.e. it is the removal and continued absence
o the high level signal produced by oscillator 150. A "high
level" alarrn signàl as here used means a signal which differs by
a reasonably substantial amount Prom the previously prevailing
signal, to that even if the signal conductor is unshielded, it
will not norrnally pick up stray signals that would be interpreted
as an alarm siynal, For example, the difPerence will usually be
at least one volt and prePerably hiyher in a cable of leng-th not
exceeding 500 feet. For longer cables, a higher difference will
usually be employed. ~lere, ~6 volts has been used for a system
in which the cable lenyth is typically up to 1000 feet.
It ~7ill also be appreciated that certain Eeatures oP
the invention ~nay be used in systems which transmit low level
signals over shielded cables containiny more than
- 17 -

four conductors. For example, the feature of inhibiting
the speaker of a satellite which has detected a disturbance,
until the drive signal is turned off, the termination of
the drive signal causing that speaker (or other alarm
indicator) then to enunciate, may be used in other systems,
as may the walk test feature.
H - Tamper Switch
In the system so far described, it is possible that
an expert could tamper with a satellite during the day ~-
(when signals produced by the alarm signal generator are
not normally monitored) and could disable the satellite
in a manner such that it would continue to transmit a 10
Hz supervisory signal to alarm signal terminal 40b, but
would not ground this terminal when an intruder is detected.
To prevent this possibility, it is required in some systems
that a tamper switch be installed in each satellite. Such
a tamper switch operates when the cover of the satellite
is removed and causes generation of a tamper alarm signal
which is monitored 24 hours per day. In the past, the
installation of a tamper switch has required addition of
a separate pair of wires from each satellite to the master
control unit.
According to the invention, a tamper switch system
i5 provided which utilize~ the alarm signal terminal ~Ob
and the alarm conductor 42b. The oriyinal four wire cable
32 is ~till used; no additional conductors are required.
The tamper switch system will be described nexti with
reference to Figures 12 to 16.
Reference is first made to Fig. 12, whlch shows a
typical housing 300 for a satell:ite. The housing 300
includes a cap or cover 302 secured to the xemainder of
.
,, " ,, , , ~,

the housing by means not shown and which must be removed
i~ access is desired to the inside of the housing. Located
within the housing 300 is a microswitch 304, which -
constitutes a tamper switch. The tamper switch 304 is
secured (by means not shown) on a circuit board 306-which
also contains the remainder of the circuitry for each
satellite. Projecting from the tamper switch 304 is a
spring biased switch element 308 which normally rests
against the cover 302. If the cover 302 is removed, the
switch element 308 will move outwardly, opening the tamper
switch, as will now be described with reference to Fig. 13.
Fig. 13 shows the same control circuit as.that of
Fig. 4, except for the addition o~ the tamper switch 304
and associated circuitry, and except for a reversal of the
inputs to NAND gates 152 and 154, for a reason to be
explained. -In Figs. 13 to 16, corresponding reference
numerals are used to indicate parts corresponding to those
of Figs. 1 to 11.
In the Figs. 1 to 11 system, and also in the Figs.
13 to 16 system, a supervisory 10 Hz signal is normally applled
to alarm terminal 40b by oscillator 150. The 10 Hz signal
oscillates between ground ancl ~6 volts. When a satellite
detects an intruder, that satellite's transistor Q2 grounds
lts alarm terminal 40b. The ground constitutes a high level
alarm signal and is detected by detector 68 (Fig. 3~. tIt
ma~ be noted that normally only the oscillator 150 in the
last satellite of each yroup o satellites is coupled to
the drive signal terminal ~Oa for operation. For example
in satellite group 2~ of Fig. 1, only the oscilla-tor 150
o satellite 5 ~70uld be connectecl. This ensures that all
the lines are~ully supervised. If oscillators 150 o all
-- 19 --

ti(Jf~
of the satellites in the group were connected, then the
line to one satellite could be cut without this being
detected.)
The tamper switch 30~, when it opens, causes a
different high level alarm signal to be applied to the
alarm terminal 40b of its satellite. Specifically, tamper
switch 304 when it opens causes a +6 volt signal to be
applied to alarm signal terminal 40b. The operation is
as follows.
In normal supervisory condition, and with the cover
302 closed on housing 300, *amper switch 304 is normally
closed. In the normal supervisory condition ~section B -
of the foregoing description), latch 110 is not set, and
its output, being low, causes current to flow in resistor
R100. This current flows directly through switch 304 to
the +6 volt supply, since switch 304 short circuits the
base-emitter junction of transistor Q3.
If the cover 302 is now removed, allowing switch 304
to open, the current throughresistor R100 will then flow
into the base of transistor Q3, turning it on. Transistor
Q3 pulls the alarm terminal 40b up to ~6 volts. The ~6
volt signal at terminal 40b constitutes a tamper alarm
signal which, when transmitted to the master, is detected
as will be described.
When several satellltes are connected to a single
master control unit, the ~ollowing situation may occur.
During the day, when persons are moving about the premises
being supervised, several or all o~ the satellites may
tran~mit alarms by grounding thelr respective alarm
terminal~ 40b through their respective transi~tor~ Q2.
20 -
. . .
, . .

14
If at this time one satellite is tampered with and its
transistor Q3 attempts to pull its terminal 40b (and the
corresponding master terminal 44b) up to +6 volts, this
tendency will be counteractPd by those satellites which
have their transistors Q2 turned on. To ensure that the - -~
master control unit terminal 44b is pulled up to +6 volts
or to a voltage near +6 volts, means are provided to limit
the current through transistor Q2 of each satellite. These
means are constituted by transistor Q4 (Fig. 13) which is
connected with transistor Q2 to form a current mirror. In
this configuration, provided that transistors Q2 and Q4
are well matched, the collector current of transistor Q2
is essentially the same as the current flowing through
resistor R6. This current is sufficiently limited that
~even if transistors Q2 of ali five satellites connected to
a master control unit are conducting, operation of a
transistor Q3 of one of the satellites will pull terminal
44b of the master control unit sufficiently close to +~
volts to operate the tamper switch detector therein (as
will be described).-
If the 40 KHz drive signal i8 turned off (section D
o~ the foregoing description), the tamper alarm signal will
still be operative. In this condition, latch 110 is set
(Fig. 8) and it~ output is high, 90 that base current for
transistor Q3 cannot be supplied from latch 110. Hawever,
the outpuk of triyger 100 is now low, and i~ tamper switch
~; 304 is open, current flows through resistor R101 to the
base of transistor Q3, again turning on transistor ~3.
It should be noted that in the control ci.rcuit
sho~7n in Figs~ 6 to 9 inalusive, when the dxive signal is
turned off (section ~ o~ t~e foregoing descxiption), alarm
,

termina]s 40b o~ the satellites normally went to ~6
volts (this was the quiescent condition of the oscillators
150). With the tamper switch 304 included in the circuit,
this was undesirable. Therefore, as shown in Fig. 13, -
the -input to NAND gates 152, 154 of oscillator 150 have been
reversed. The upper input to NAND gate 152 iS now connected
to the cathode of diode D2, and the upper inpu~ to NAND gate
154 is now connected to the output of trigger lO0. This
reversal of the inputs causes the output of oscillator 150,
and hence terminal 40b o~ the satellites, to be grounded
through resistor R102 when the drive signal is turned of~.
If at this time a tamper switch 304 operates, its transistor
Q3 will counteract the e~fect of oscillator 150 and will
pull terminal 40b to +6 volts.
When the system is beingwalk tested (section E o~
..
the foregoing description), tamper circuit operation is -
not desirable. This is because it is often desired to
adjust the sensitivity of the satellites during the walk
testing, and the covers 302 may be removed at this time.
In the walk test condition, the outputs of both
trigger 100 and latch 110 are high (Fig; 9) and therefore
no current i8 available to operate transistor Q3. Thus,
the tamper alarm will not be operative.
The signals applled to terminal 40b o a satellite
.
are shown in Fig. 14. The normal supervisory lO Hz signal
supplied by osclllator 150 o~ the last satellite o each
group is shown ak 310 and oscillates between zero and ~6
volts. When onesatellite detects an intruder, the ~round
signal applied to terminal 40b is shown at 312. When a
satellite cover is removed, the ~6 volt tamper alarm signal
i5 shown at 314.
- 22
'
' ' . ~

~S)~t;1)4
Re~erence is next made to Fig. 15, which shows the
master control unit used when the satellites include
tamper switches. Themaster control unit of Fig. 15 is
the same as that of Fig. 1 except for minor changes as
will be described, and corresponding parts are indicated
by corresponding reference numerals. The master control
unit as a whole in Fig. 15 is indicated by reference
numeral 22'.
The differences between the master control unit 22'
and master control unit 22 o~ Fig. 2 are as follows~
Firstly, a tamper alarm detector 320 has been added. The
tamper alarm detector 320 is connected to alarm terminal
44b of the master control unit 22' and is also connected
via conductor 324 to terminal 78 o~ rocker switch 72, to
alert the supervisingstation i~ the rocker switch is moved
(as will be described).
- In additionj lead 82 from the rocker switch 72 to
alarm signal generator 70 has been replaced by a similar
lead 325 from rocker switch 72 to the alarm signal detector
.
68.
When a tamper switch 304 operates, operating a
tamper alarm signal detector 320, detector 320 in turn
operates a tamper signal generator 330 which transmits an
appropriate signal via lead 332 to an alarm company, to
police head~uarters or to another supervising station as
desired.
Detailed circuits ~or the alarm signal detector 68
and the tamper alarm signal detector 320 are shown ln Fig. 16.
As shown, the tamper alarm signal detector 320 includes a
tamper relay 340. So long as alarm terminal ~4b is low
lwhich occurs when the drive signal is turned o~ or when
_ 23 --
",,, .,, " . , ,,., " ~ , , ,, ,.~ . ... . . . ..

i~46~4
an ordinary alarm occurs), the current through resistor
Rl03 is sufficient to turn on transistor Q5 and maintain
the tamper relay 340 energized. Similarly, so long as
the system is in supervisory condition, with the drive
signal on, the average current generated by the lO Hz
square wave applied to terminal 44b is also sufficient to
turn on transistor Q5, again maintaining the tamper relay
340 energized.
When a tamper switch 304 operates, this will cause
terminal 44b to go high (-~6 volts), removing the current
from transistor Q5 and turning off relay 340. A contact
of relay 340 (not shown) then operates the tamper alarm
signal generator 330.
If the rocker switch 72 is placed in walk test -;
condition/ in which rocker arm 74 contacts terminal 78,
the base current of transistor ~5 is by-passed through-- )
diode DlO0, again turning off the tamper-relay 340 to alert
the supervising station of this condition. ~ ~ -
The alarm signal detector 68 shown in Fig. 16 will
next be described. Detector 68 includes an alarm relay
350 which is normally energized by translstor Q6. The base
of transistor Q6 is connected through resistor Rl04, diod~
DlO1, inverter 352 and capacitor ClO0 to the alarm
terminal 44b. So long as the 10 ~z supervisory signal
is received at terminal 44b, terminal 44b will oscillate
between zero and ~6 volts, Xeepingcapacito~ ClOl charged
through diode D101. So long as capacitor C101 remains
charged, sufficient base current is provided for transistor
Q6 to keep transistor Q6 turned on, keeping alarm relay 350
energized. Ho~ever, if terminal 44b remains in either a
high or low sta~e, current will cease to flow through
- 24 -
', " ' ~.

capacitor C100, and transistor Q6 will turn off, turning
off alarm relay 350. ~elay 350 will also turn off if
rocker switch 72 is moved from its supervisory condition
shown in Fig. 16, since the +6 volts supply is then removed
from the relay. When relay 350 turns off, its contact (not
shown) operates the alarm signal generator 70.
It will be seen that in the Figs. 13 to 16 embodiment,
the single alarm conductor 42b is used to transmit a high
level supervisory signal (10 Hz), a high level alarm signal
(ground)j' and a high level tamper alarm signal (+6 volts).
Because one wire is used for all three signals, a tamper
switch can be added without additional wiring between the
, .
master and the satellites, thus greatly simplifying the
installation.
,, ' ,,
,
- 25 ~
. ''' -

Representative Drawing

Sorry, the representative drawing for patent document number 1084604 was not found.

Administrative Status

2024-08-01:As part of the Next Generation Patents (NGP) transition, the Canadian Patents Database (CPD) now contains a more detailed Event History, which replicates the Event Log of our new back-office solution.

Please note that "Inactive:" events refers to events no longer in use in our new back-office solution.

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Event History

Description Date
Inactive: Expired (old Act Patent) latest possible expiry date 1997-08-26
Grant by Issuance 1980-08-26

Abandonment History

There is no abandonment history.

Owners on Record

Note: Records showing the ownership history in alphabetical order.

Current Owners on Record
CONTRONIC CONTROLS LIMITED
Past Owners on Record
PETER E. HUMPHRIES
Past Owners that do not appear in the "Owners on Record" listing will appear in other documentation within the application.
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Document
Description 
Date
(yyyy-mm-dd) 
Number of pages   Size of Image (KB) 
Claims 1994-04-07 5 202
Cover Page 1994-04-07 1 15
Abstract 1994-04-07 1 35
Drawings 1994-04-07 9 211
Descriptions 1994-04-07 26 989