Note: Descriptions are shown in the official language in which they were submitted.
10~304 RCA 70,~24
This invention relates to switched vertical
deflection circuits for a television receiver. -~
In a switched vertical de1ection circuit of
the type disclosed in Jerman Offenlegungshrift P2603162.9-31,
issued August 26, 1976, by Peter Eduard Haferl, `
entitled, SWITCHED VERTICAL DEFLECTION SYSTEM, horizontal
rate energy, in the form of horizontal retrace pulses -
from a horizontal output transformer of a horizontal
deflection circult, charges a capacitor in parallel with
a vertical deflection winding. A first switch, such as
an SCR (thyristor), couples successively smaller portions of the
horizontal rate energy to the capacitor during a first
part of the vertical trace interval and a second switch,
such as another SCR, couples successively larger portions
of the horizontal rate energy during a second part of
the vertical trace interval. The voltage across the
capacitor is integrated by the vertical deflection
winding into a sawtooth vertical deflection current. The
conduction of the two SCR switches is controlled by
horizontal rate pulse width modulated pulses coupled from
a modulator to the SCR gate electrodes.
; At the start of vertical retrace, the second
SCR switch which had previously been conducting is
maintained in cutoff. The vertical deflection winding
and the capacitor form a resonant retrace circuit. A
disconnect diode coupled to the gate of the fi~st SCR
switch is reversed biased, maintaining the SCR in cutoff
independent of the gating pulses generated by the
modulator. With both SCR's nonconducting, resonant
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1(~87304
RCA 70,824
retrace of the current in the vertical deflection
winding is accomplished. At the start of the subsequent
vertical trace interval, the disconnect diode is no
longer reverse biased. Pulse widt~ modulated gating
pulses to the first SCR enable the SCR to couple the
horizontal retrace pulses to the capacitor for generating
the sawtooth deflection current in the vertical deflection
winding.
Both SCR's conduct relatively large am~unts -
of current at the beginning and end of the vertical ~ ~ -
,~
trace interval, respectively. Neither SCR conducts
during the vertical retrace interval. Accordingly, `
loading of the horizontal deflection circuit by the
switched vertical deflection circuit will be greatest
lS at the beginning and end of the vertical trace interval,
with substantially no loading occurring during the
vertical retrace interval. Such load interruption during
the vertical retrace interval may cause undesirable
modulation of the horizontal deflection current and
undesirable oscillations within the horizontal deflection
circuit,which may be audible. These oscillations may a~pear,
for example, in the "S" shaping capacitor or in the horizontal
output transformer windings as the load impedance of the
~ertical deflection circuit abruptly changes. It is,therefore,
desirable to provide a switched vertical deflection
circuit in which undesirable oscillations within the
horizontal deflection circuit are prevented.
A switched vertical deflection circuit according to
an embodiment of the invention
comprises a horizontal deflection circuit including
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1087304 RC~ 70,824
I apparatus for ~enerating horizontal rate energy signals,a vertical deflection winding, an energy storage
capacitance, first and second switches and a switching
circuit coupled to the switches. The switching circuit
switches the conductive states of the switches for
coupling successively smaller portions of the horizontal
rate energy signals to the energy storage capacitance
during a first part of the vertical trace interval and ~ ~:
successively larger portions during a second part for
developing a vertical deflection current in the vertical
deflection winding during the vertical trace interval.
The switching circuit causes the first switch to conduct
during the vertical retrace interval for coupling sub-
stantial portions of the horizontal rate energy signals
to the energy storage capacitance during the vertical
retrace interval for preventing undesired oscillations
` within the horizontal deflection circuit.
'
FIGURE 1 illustrates a switched vertical
deflection circuit embodying the invention; and
FIGURES 2a - 2g illustrate waveforms associated
with the circuit of FIGURE 1.
In FIGURE 1, horizontal sync pulses 21,
2S repeating at a frequency l/TH, obtained from a sync
separator, not shown, are coupled to a terminal A of a
horizontal deflection circuit 20. Horizontal deflection
circuit 20 includes a horizontal deflection current
generator 22 for generating a horizontal sawtooth deflection
current in a horizontal deflection winding, not shown,
~87~4 RCA 70,824
coupled to terminals X-X. Horizontal deflection current
generator 22 may be of conventional design and may
include horizontal oscillator and driver stages and
either a transistorized or SCR hori~ontal output stage.
Horizontal retrace pulses 23a are developed in a primary
winding 24a of a horizontal output transformer 24 and are
coupled to a conventional high voltage circuit 25 for
providing the ultor voltage to a kinescope, not shown.
Secondary windings 24b and 24c of transformer
24 couple horizontal rate energy in the form of horizontal
retrace pulses 23b and 23c to a switched vertical deflection
circuit 30 embodying the invention. Switched vertical ~ -
deflection circuit 30 includes a vertical deflection
winding 26, a feedback resistor 27, and a capacitor 31.
Horizontal retrace pulses 23b and 23c are coupled to
; capacitor 31 by means of respective first and second
switches comprising SCR 32 and SCR 33 through storage
inductors 34 and 35, respectively.
During a first part of the vertical trace
interval, successively smaller portions of horizontal ~-
rate energy, that is, horizontal retrace pulses 23b,
are coupled through inductor 34 and SCR 32 to charge
capacitor 31 positively at a horizontal rate, the voltage
across capacitor 31 having a decreasing envelope, as
illustrated by waveform 36 of FIGURE 1. During a second
; part of the vertical trace interval, successively larger
!i portions of horizontal rate energy, that is, horizontal
retrace pulses 23c, are coupled through inductor 35
, and SCR 33 to charge capacitor 31 negatively. Vertical
deflection winding 26 is responsive to the voltage across
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RCA 70,824
1~)873Q4
I capacitor 31,and a sawtooth vertical deflection current
37 flows in deflection winding 26. Waveform 37 also
represents the feedback voltage waveform 38 developed
across feedback resistor 27.
The conduction of SCR 32 and 33 within each
vertical deflection cycle is synchronized with the .:.
occurrence of horizontal retrace pulses 23b and 23c
by horizontal rate pulse width modulated pulses 39 and 40
coupled to the respective SCR gate electrodes from a
modulator 41. Pulses 40 are coupled directly to the gate
of SCR 33, while pulses 39 are coupled through a
transformer 42, the secondary winding of which is coupled
across the gate and cathode of SCR 32. Load resistors 43
and 44 are coupled to the gates of SCR 32 and 33,
: 15 respectively.
In response to vertical sync pulses 45 obtained
; from a sync separator, not shown, and coupled to a - ~
terminal B, a vertical sawtooth generator 49 produces a ~ .
vertical sawtooth voltage 46 repeating at a frequency
l/Tv. ~ertical sawtooth voltage 46 is coupled through a
capacitor 47, a resistor 48 and a resistor 29 to an input
terminal C of modulator 41. The feedback voltage 38
is also coupled to input terminal C through a resistor
28. Both voltages combine to form a vertical sawtooth :-~
~ 25 component of an error voltage coupled to modulator 41
;~ at input terminal C.
The error voltage and horizontal retrace pulses
23d obtained from a secondary winding 24d of transformer
24 are used by modulator 41 to produce the appropriately
synchronized and pulse width modulated pulses 39 and 40.
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RCA 70,824
7304
I As illustrated in FIGURE 2a towards the end of a vertical
trace interval, prior to time Tl, the beginning of the
vertical retrace interval, the error voltage 101 is an
increasingly positive sawtooth voltage 101a. Modulator
41 provides horizontal rate gating pulses 40 of FIGUR~ 2c ;~
of increasing width, and, as shown in FIG~RES 2b and 2d, ;
SCR 33 conducts increasingly earlier within each
horizontal retrace interval. Incr~asinq current pulses
102 flow through SCR 33 to charge capacitor 31 negatively,
as shown in FIGURE 2g.
Similarly, during a first portion of the next
vertical trace interval, after time T3, the end of the
vertical retrace interval, the error voltage 101 is a
negative valued but increasing sawtooth voltage 101c.
Modulator 41 provides horizontal rate gating pulses 39
of FIGURE 2e of decreasing width, and, as shown in
FIGURES 2b and 2f, SCR 32 conducts increasingly later
within each horizontal retrace interval. Decreasing
amplitude current pulses 103 flow through SCR 32 to charqe
capacitor 31 positively, as shown in FIGURE 2g. It should
be noted that, although modulator 41, as illustrated in
FIGURES 2c - 2f, provides for conduction of only SCR 32
at the beginning of the vertical trace interval and
conduction of only SCR 33 at the end, switched vertical
deflection circuit 30 may be operated with both SCR 32
and 33 conducting for overlappinq periods within each r
vertical trace interval. The amount of overlap will,
for example, determine the extent of side pincushion
correction accomplished, as explained in the aforementioned
German Offenlegungshrift.
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RCA 70,824
1087304
Coupled between vertical sawtooth generator 49
and input terminal C of modulator 41 is an RC differentiating
circuit comprising a capacitor 50 and resistors 27-29,
capacitor 50 being coupled in parallel with series coupled
capacitor 47 and resistor 48. At the start of the
vertical retrace interval, time Tl of FIGURE 2a, sawtooth
voltage 46 decreases abruptly to a lower value. The
differentiating circuit adds an additional negative
component lOlb of FIGURE 2a to the error voltage 101
at input terminal C. This additional component ensures
that no gating pulses are coupled to SCR 33 during
vertical retrace, maintaining the SCR nonconducting during ;
that interval. The time constant for the differentiating `~
circuit is selected such that the duration of the negative
component lOlb of error voltage 101 is approximately
equal to the vertical retrace interval, as shown in
FIGURE 2a.
With SCR 33 nonconducting, resonant retrace
begins. As shown in FIGURE 2g, the envelope of the
voltage across capacitor 31 is substantially sinusoidal
reaching a maximum at time T2.
As mentioned previously, if during vertical
retrace, horizontal deflection circuit 20 is not loaded,
the abrupt change from maximum loading at the beginning
and end of vertical trace to substantially no loading -
during vertical retrace may produce undesired oscillations
within the horizontal deflection circuit. A feature of
the invention is to provide loading of horizontal
deflection circuit 20 by the switched vertical deflection
circuit 30 during this interval.
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1087304 RCA 70,824
I Instead of directly coupling gating pulses from
modulator 41 to the gate electrode of SCR 32, the
gating pulses are coupled through transformer 42. Thus,
even though the cathode of SCR 32 becomes increasingly -
positive during vertical retrace, the gating pulses
39a of FIGURE 2e permit SCR 32 to couple horizontal
retrace pulses to capacitor 31 independent of the SCR
cathode voltage.
As shown in FIGURE 2f, the currents through
SCR 32 are pulses 103a. Because the vertical retrace
voltage across capacitor 31 subtracts from the horizontal
retrace pulse voltage 23b, the envelope of current
pulses 104 from times Tl - T3 is inversely related to
the vertical retrace voltage envelope of capacitor 31,
with waveform 104 reaching a minimum at time T2.
Thus, substantial portions of horizontal
retrace pulses 23b are coupled to capacitor 31 during
vertical retrace. Substantial loading of horizontal
`3 deflection circuit 20 occurs, and undesired oscillatlons
' 20 within horizontal deflection circuit 20 are prevented.
~ As mentioned previously, the additional negative
; component lOlb of error voltage 101 ensures that SCR 33
remains nonconductive during vertical retrace. It also
ensures that SCR 32 conducts substantial portions of
i" 25 horizontal retrace pulses 23b. Maintaining SCR 33
nonconductive during vertical retrace is desirable
because, at the horizontal frequency, the vertical retrace
voltage across capacitor 31 represents a DC voltage that
adds to the voltage across secondary winding 24c of horl-
zontal output transformer 24. Because SCR 33 if conductive
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1087304 RCA 70,824
1 would represent a short circuit to capacitor 31 during
vertical retrace, conduction of current through SCR 33
during vertical retrace would increase the possibility `:
of undesired oscillations. -
Transformer 42 permits the positive gating `
pulses 39 and 39a to gate SCR 32 into conduction even
when the voltage across capacitor 31 is negative or,
although positive, it is rapidly changing towards zero. .
Improved immunity against kinescope arcing is also
provided because the transformer isolates the floating
SCR 32 from other television receiver processing circuits.
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