FREQUENCY DOMAIN AUTOMATIC EQUALIZER UTILIZING THE DISCRETE FOURIER TRANSFORM

EGALISEUR AUTOMATIQUE DU DOMAINE DES FREQUENCES UTILISANT LA TRANSFORMEE DE FOURIER DISCONTINUE

English Abstract

FREQUENCY DOMAIN AUTOMATIC EQUALIZER
UTILIZING THE DISCRETE FOURIER TRANSFORM
ABSTRACT
An automatic equalizer for calculating the equal-
ization transfer function and applying same to equalize received
signals. The initial calculation as well as the equalization
proper are conducted entirely within the frequency domain.
Overlapping moving window samplings are employed together
with the discrete Fourier transformation and a sparse inverse
discrete Fourier transformation to provide the equalized
time domain output signals.

Claims

WHAT IS CLAIMED IS:
1. A frequency domain equalizer for automatically
equalizing the discrete Fourier transform components Xn of a
received electrical signal x(t) comprising:
a) means for storing equalizer transfer components
Cn,
b) means for sampling said received electrical
signal x(t) to provide a set of signal sample values Xk, k
being a sample time index having values 0, 1,...N-1, and N
being an integer,
c) means for calculating the discrete Fourier
transform of said sample values xk to provide said discrete
Fourier components Xn, n = 0, 1...N-1,
d) means for calculating equalized components
Yn where
Yn = Cn . Xn n = 0, 1...N-1,
and
e) means for calculating the inverse discrete
Fourier transform of the set of components Yn to provide an
output signal corresponding to one sample time index of said
received electrical signal.
- 24 -

2, A frequency domain equalizer as recited in
Claim 1 further comprising:
a) means for sampling said signal x(t) to
provide a plurality of sets, i, of sample values Xk, k = 0,
1...N-1, said values xk corresponding to samples of the
signal x(t) time displaced by an amount ? from one another
where T is a sample time frame and N is an integer,
b) said sampling means providing the ith
sample set time delayed from the i-1th sample set by an
amount t0 where, 0< t0 ? ? , thereby providing an overlapping
sliding window sampling of said signal x(t), and
c) means for generating the discrete Fourier trans-
form components corresponding to each sample set of values
Xk of said plurality of sample sets.
3. A frequency domain equalizer as recited in Claim
2, wherein said sampling means comprises an analog delay line
having taps spaced an amount ? from one another, said sample values
Xk provided at said taps.
4. A frequency domain equalizer as recited in Claim
3, further comprising means for displaying said generated
discrete fourier transform components.
5. A frequency domain as recited in Claim 3, further
comprising means for generating a phase spectrum from said
generated discrete fourier transform components and means for dis-
playing same.
- 25 -

6. A frequency domain as recited in Claim 2,
wherein said sampling means comprises a shift register for
storing said i-1th sample set of values xk, said ith sample set
of values, x'k, formed by shifting said values xk in said shift
register such that,
X'k = xk+1 k = 0, 1...N-2
and x'N-1 is a new sample value of the signal x(t) displaced
in time from the sample value x'N-2.
7. Apparatus as recited in Claim 2, wherein said
values xk are real, N is an even integer and the discrete fourier
transform components, xn, are generated for n belonging to one of the
groups n = 0, 1...N/2 and n = 0, N/2, ? + 1, ? + 2,...N-1.
8. Apparatus as recited in Claim 2, wherein the
sampling rate of said sampling means is given by N/T, and
said sampling rate is greater than or equal to <IMG>,
where Wmax is the maximum frequency component of the signal
x(t).
- 26 -

9. A frequency domain equalizer as recited in
Claim 1 further comprising:
a) means for replacing the sample set Xk,
k = 0,1...N-1 by a sample set shifted in time an amount tO,
O < tO ? ? where T is the sample set time frame,
b) means for calculating the discrete Fourier
transform components xn of the shifted sample set,
c) means for calculating equalized components
Yn for said shifted sample set,
d) means for calculating the inverse discrete
Fourier transform of the set of components Yn for said
shifted set to provide another output signal corresponding
to said one sample time index of said received electrical
signal.
10. A frequency domain equalizer as recited in
Claim 9, wherein said sample values have only real values, N
is an even integer and said discrete Fourier transform, said
inverse discrete Fourier transform and said equalized components
are calculated for n ranging in one of the groups n = 0, 1...N/2
and n = 0, N/2, ? + 1, ? + 2,...N-1.
11. A frequency domain equalizer as recited in
Claim 10, wherein said means. for calculating said inverse
discrete Fourier transform comprises means for calculating
only one output signal per sample set.
- 27 -

12. A frequency domain equalizer as recited in
Claim 11, wherein said one output signal of the inverse dis-
crete Fourier transform corresponds to either the Oth or the
n/2th time sample index.
13. A frequency domain equalizer as recited in
Claim 11 wherein said means for calculating said inverse
discrete Fourier transform comprises a sparse inverse dis-
crete Fourier transform circuit having only real parts of
said components Yn as inputs thereto.
14. A frequency domain equalizer as recited in
Claim 9 where N/T is selected to be greater than or
equal to <IMG> where wmax is the maximum frequency component
of the signal x(t).
- 28 -

15. A frequency domain equalizer for automatically
equalizing the discrete Fourier transform components Xn of a received
electrical signal x(t) transmitted through a transmission
channel comprising:
a) means for storing distortion equalization
correction factors, Cn, associated with said signal x(t),
b) means for sampling said signal x(t) to pro-
vide a plurality of sets, i, of sample values Xk, K = 0,
1...N-1, said values xk corresponding to samples of the signal
x(t) time displaced by an amount ? from one another where T
is a sample time frame and N is an integer,
c) said sampling means providing the ith sample
set time delayed from the i-1th sample set by an amount to
where, o<t0??, thereby providing an overlapping sliding
window sampling of said signal x(t),
d) means for generating the DFT components
corresponding to each sample set of values xk of said plurality
of sample sets,
e) means for multiplying said generated components
Xn by said factors Cn for each of said sets i, such that
Yn = Xn?Cn
and
f) means for generating the inverse DFT of the
set of components Yn to provide an output signal corresponding
to one value of k for each set, i, of values xk, said value
of k being the same value for each set i.
- 29 -

16. A frequency domain equalizer as recited in
Claim 15, wherein said correction factors Cn are thediscrete fourier
transform components of the impulse response function of the equalizer
17. A frequency domain equalizer as recited in
Claim 16, wherein said means for generating the inverse discrete
fourier transform comprises means for providing only real parts of
said components Yn as inputs thereto.
18. A frequency domain equalizer as recited in
Claim 16, wherein the sampling rate of said sampling means is
given by N/T, and said sampling rate is at least equal to the
Nyquist sampling rate for said received signal x(t).
- 30 -

19. A method of equalizing the discrete Fourier
transform components Xn of a received electrical signal x(t)
comprising the steps of:
a) storing equalizer transfer components Cn,
b) sampling the received electrical signal x(t)
to provide a set of signal sample values xk, k being a sample
time index having values 0, 1...N-1, N being an integer,
c) calculating the discrete Fourier transform
of said sample values xk, k = 0,...N-1 to provide the discrete
Fourier components Xn, n = 0,...N-1,
d) multiplying each component Xn by the corresponding
component Cn thereby producing equalized components
Yn = Cn.Xn n = 0,...N-1,
e) calculating the inverse discrete Fourier
transform of the set of components Yn to provide an output signal
corresponding to one sample time index of the received electrical
signal.
- 31 -

20. A method as recited in Claim 19 further com-
prising the steps of:
a) replacing the sample set xk, k = 0,...N-1
by a sample set shifted in time an amount tO, O<tO??, where
T is the sample set time frame,
b) calculating the discrete Fourier transform
components Xn of the shifted sample set,
c) providing equalized components Yn for the
shifted sample set,
d) calculating the inverse discrete Fourier
transform of the set of components Yn for said shifted sample
set to provide an output signal corresponding to said one
sample time index of said received electrical signal.
21. A method as recited in Claim 20, wherein said
sample values have only real values, N id an even integer and
said discrete Fourier transform, said inverse discrete Fourier
transform and said equalized components are calculated for
n ranging in one of the groups, n = 0, 1...N/2 and n = 0,
N/2, ? + 1, ? + 2,...N-1.
22. A method as recited in Claim 21, wherein said
one time sample index of said inverse discrete Fourier trans-
form is either the Oth or the N/2th time sample index.
- 32 -

23. A method of equalizing the discrete Fourier
transform components X of a received electrical signal x(t)
comprising the steps of:
a) storing distortion equalization correction
factors, Cn, associated with said signal x(t),
b) sampling said signal x(t) to provide a
plurality of sets, i, of real sample values xk, k = 0, 1...N-1,
said values xk corresponding to samples of x(t) time displaced
by an amount ? from one another where T is a sample time frame
and N is an integer,
c) delaying the ith sample set with respect
to the i-1th sample set by an amount t0 where 0 <t0??, thereby
providing overlapping sliding window sampling of said signal
x(t),
d) generating the discrete Fourier transform
of said sample values xk, k - 0,...N-1 to provide the discrete
Fourier components Xn, n = 0,...N-1,
e) multiplying said generated components Xn by
said factors Cn for each of said sets i, such that
Yn = Xn?Cn
and
f) generating the inverse discrete Fourier transform
components Yn to provide an output signal corresponding to
one value k for each set of values xk, said value of k being
the same value for each set i.
- 33 -

24. A method as recited in Claim 23, wherein
correction factors Cn are the discrete Fourier transform
components of the impulse response function of the equalizer.
25. A method as recited in Claim 24, further
comprising the step of generating the inverse discrete Fourier
transform by providing only real parts of said components
Yn as inputs thereto.
26. A method as recited in Claim 24, wherein said
step of sampling comprises sampling at a rate given by N/T
wherein said sampling rate is at least equal to the Nyquist
sampling rate for the signal x(t).
- 34 -

Description

1~87~
~C~GlIO~ND OF Tll~ INV~NTION
The invention pertains to frequency-domain automatic
equalization for electrical signals used in transmission of
information.
- Ideally, it is desirable to transmit electrical
signals such that no interference occurs between successive
savmbols. In practice, however, transmission channels are
bandlimited and intersymbol interference is controlled
utilizin~ clocked systems with equalization conventionally
perforrmed in the time domain.
~0 Most conventional automatic equalizers operate in
a feedback mode so that the effects of changes in the equalizer
transfer function are monitored and used to produce further
changes in the transfer function to obtain the best output
signals. In such systems, the measurements of the output
signal are made in the time domain. Typically, the transfer
function may be constructed in the time domain by adjusting
the tap gains of a tapped delay line during an initial
training period prior to actual message transmission.
Examples of such systems are shown in U.S. ~atents 3,37~,473
and 3,292,110.
Frequency domain equalization utilizing time domain
adjustments are shown, for example, in the U.S. Patent 3,614,
673 issued to George Su Kang. Kang utilizes frequency domain
measurement and calculations to product the time domain impulse
response of a transversal filter. The impulse response of
the transversal filtcr is applied to set the weights of the
transversal filter.
SUMM~RY Ol~ Tl~ INVFNTION
Thc principal object of thc invcntion is to provide
an automa~ic cqualizcr, operable complctely in the frequcl-~Y
-2~

1087~9~
domain, to providc both frequency domain measurcments o~ the
transmittcd signal and frequency domain corrections to cqualize
channel amplitude and phase distortion.
A significant feature of the invention is in the
utilization of sliding window samplings of the input waveform
to provide a plurality of sample sets each time displaced
from successive sets by an amount T/N, where T is the sample
set window or time frame and N is the number of samples
within a sample set of the input waveform. Each sample set
forms a discrete data set which is transformed by an analog
discrete Fourier transform (AD~T) into the frequency domain.
The spectral coefficients are corrected in the frequency
domain employing component-by-component multiplication using
previously calculated correction coefficients computed
during an initial tra~ing period where ideal or test pulses
are transmitted. The corrected spectral coefficients are
inverse transformed using an analog inverse discrete Fourier
transform (AIDFT) to provide an output value correspondin~ to
one sample within the input waveform sample set. The
frequency domain corrected spectral coefficients are computed
for each window such that the sliding window sampling produces
a new output value of the AID~T N times during the sample
period T.
Another significant feature of the invention is in
the utilization of time shared multiplying circuits to
achieve both the correction factor measurements and subsequent
frequency domain adjustment or equalization.
Another objcct of the invention is to provide a
method and apparatus for continuously gcnerating thc DFT
cocfficicnts from ovcrlapping sliding window samplc sets of
--3--
' - ' ' ' ' , ' ' ' . '

1(~87~9~
the incoming signal.
Yet another object of the invention is to provide a
method and apparatus for producing the effect of an aperiodic
convolution of the incoming signal sample sets with the im-
pulse response of an equalizer wherein an overlapping sliding
window sampling is utilized in conjunction with a sparse
- inverse DFT apparatus providing a single time domain output
for each incoming sample set.
Thus, in accordance with the present teachings, a
frequency domain equalizer is provided for automatically
equalizing the discrete Fourier transform components Xn of a
received electrica] signal x(t) which comprises:
a) means for storing equalizer transfer components
Cn
b) means for sampling the received electrical signal
x(t) to provide a set of signal samples Xk, k being a sample
time index having a value 0, 1 .... N-l, and N being an integer,
c) means for calculating the discrete Fourier trans-
form of the sample value xk to provide the discrete Fourier
components Xn, n = O, 1 ...N-l,
d) means for calculating equalized components Yn
where
Y = C . X n = O, 1 ... N-l,
n n n
and
e) means for calculating the inverse discrete Fourier
transform of the set of components Y to provide an output
signal corresponding to one sample time index of the received
electrical signal.
In accordance with a further aspect of the present
teachings, a method is provided of equalizing the discrete
Fourier transform components X of a received electrical signal
x(t) which comprises the steps of:

108~7~93
a) storing equalizer transfer component Cn,
b) sampling the received electrical signal x(t) to
provide a set of signal sample values Xk, k being a sample
time index having values 0, 1 ... N-l, n being an integer,
c) calculating the discrete Fourier transform of
the sample values xk~ k=0, ... N-l to provide the discrete
Fourier component Xn, n=0, ... N-l,
d) multiplying each component Xn by the corresponding
component Cn thereby producing equalized components
n n n n=0, 1 ........ N-l,
e) calculating the inverse discrete Fourier transform
of the set of aDmponents Y to provide an output signal
corresponding to one sample time index of the received electrical
signal.
BRIEF DESCRIPTION OF THE DRAWINGS
These and other features and advantages of the invention :
will become apparent when taken in conjunction with the following
~ specification and drawings wherein:
: FIGURE 1 is a block diagram of the overall theoretical
model used in the instant invention;
FIGURE 2 is an analog circuit for performing the
discrete Fourier transform of a sample set;
FIGURE 3 is a vector diagram of the DFT components
for eight sample points;
FIGURE 4 is a folded vector diagram of the DFT
components of FIGURE 3;
FIGURES 5A-5C are vector diagrams indicating step-by-
step operations upon the vectors shown in FIGURE 4;
FIGURE 6 is a tree diagram summarizing the step-by-
step operations of FIGURES 5A-5C;
FIGURE 7A illustrates a tree graph for the inverse
discrete Fourier transform; :
-f~' -4a-
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108769~
FIGURE 7B illustrates a tree graph for the sparse
inverse discrete Fourier transform;
FIGURE 7C is an analog implementation of the tree
graph algorithm of FIGURE 7B;
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,, .
~IGUNE 8 is a tree ~raph for the complcte equalization;
~IGURE 9 is an illustration comparing results of an
aperiodic convolution with a periodic convolution;
~IGURE 10Ais a schematicfor ~ complex multiplication
and holding circuits used in the invention;
; FIGURE 10B illustrates a circuit for producing reference
voltages used in the invention;
FIGU~E 11 is a schematic for computing and storing a
multiplication parameter used in the invention;
FIGURE 12 is an analog implementation of FIGURE 8
showing the time sharing circuits of the invention;
~IGVRE 13A illustrates a block diagram for providing
the DFT coefficients of FIGURE 12 to output means;
~IGURE 13B is a block schematic diagram showing the
generation of a power spectrum for thecomponents of the discrete
Fourier transformation; and
FIGURE 13C is a block schematic diagram showing the
generation of a phase spectrum for the components of the dis-
crete Fourier transformation.
~20 DETAILED DESCRIPTION OF THE ILLUSTRATIVE EMBODI~FNT ~ -
A block diagram of the model of the transmission ~-~
system is shown in FIGURE 1. The system is assumed linear
and it is therefore theoretically immaterial where in the
system the distorting elements are located. The transfer
function H(w) is a composite of all the ideal elements of -
tl-e system and is shown in cascade with D(w~, which is a com-
posite of all the linear distorting elcments of the system.
It is assumcd that the impulse response h(t) is the ideal
symbol and that the information is rcprcsen~ed by the magnitude
~30 and/or polarity of impulscs at the input to ~(w) which impulscs
~ .
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-

`\ -~
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are spaced in time according to the requiremcnts o~ h(t)
and the detcction proccss. The output of the system is the
~ourier transform of H(w) x D(w), or the convolution of H(t)
and d(t), and is no longer ideal. The equalizer is connected
in cascade with the distortion network and functions to
eliminate the effects of D(w), i.e., the transfer function of
the equalizer is l/D(W). The equalizer precedes the decision
point at the receiver, and the system is capable of determining
D(w) and then producing the transfer function l/D(w) in the
~ 10 transmission path.
'~ ~IGURE 2 shows an analog discrete Fourier transform
(ADFT) circuit which produces a set of electrical signals
which represent the real and imaginary coef-icients respectively
t .
. o samples of the Fourier transform, i.e., frequency spectrum,
of the input signal. The input to the ADFT circuit comprises
a discrete sample set of, for example,eight samples xO, xl,...x7
of the received signal x(t). The sample set may be taken,
for example, from terminals of a tapped delay line 5. The
i discrete ith sample set [X]i=xo(i), ~l(i),.. x7(i) is trans-
formed by the ADFT circuit into the frequency domain and
represented by vectors Xn which are generally complex. Real
and imaginary parts of the vector are designated RX and IX
n n
respectively. Similarly, RH, IH and RD, ID designate
the real and imaginary parts of the transfer frunctions H(w) and
D(w).
FIGURE 2 shows a plurality of operational amplifiers
10 having input terminals markcd "+" or "-" for indicating thc
additive or su~tractive function perform~d therein. The gain
of the amplifiers is indicatcd by the multiplication factor
~30 shown. ~11 amplificrs havc unity gain cxcept thosc having
.
~ ' .
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11)~769;~
gain .707 or 0.5. Tlle ADFT circuit shown in FIGUR~ 2
receivcs N samplcs (N=~) of a real input function x(t). For
real time samples of x(t), the frequency components Xn for
n ~N/2 are the complex conjugates of Xn for n ~ N/2.
Additionally, X0 and XN/2 are real. Consequently, X0 and
X4 have real components on]y. Non-redundant information is
obtained using the folded spectral coefficients which com-
prises vectors X0 and X4 and vectors Xl, X2 and X3. The
complex vectors Xl, X2 and X3 specify six parameters, and
the real vectors X0, X4 give t~o more parameters yielding
a total of eight parameters consistent with the number of
sample points of x(t). (Alternatelv, of course, the real
values X , X4 and complex values X , X6, X may be used to
form the eight required parameters.) A~FT circ~itry is
, 15 described more generally, for example, in U.S. Patent 3,851,j 162 to Robert Munoz.
The circuitry arrangement shown in FIGURE 2 is not
unique and alternate matrix arrangements may be developed.
The circuit arrangement of FIGURE 2 is derived from an analysis
of the vector diagram of the discrete Fourier spectral com-
ponents. The DFT components may be defined by
Xn = ~ xk wnk (1)
where, W = e~i2'~r/N
Equation (1) may be written in terms of real and
imaginary components as follows:
N-l ,
~Xo Ak-O Xk
N-l
~XN/2 = ~ Xk Cost-~rk) (2)
. -7-

10~7~93
,......................................................... .
n B ~ xk cos ( 2~rkn )
IX = B x sin (-2~Ykn-)
n k=0 k N
;.
~: 5 Assuming that the input time dependent signal x(t) is real,
the spectral components may be folded and equation (2) will
hold for A = 1, B = 2 inasmuch as the folded coefficlent
spectxum will double the magnitude of all frequency components
t except the band edges X0 and X / .
FIGURE 3 illustrates a vector diagram for the general
- case (x(t) complex) of a N = 8 sample set. The frequency index
"n" runs horizontally and the time sample index "k" runs verti-
cally with the older sample taken at the zero time reference,
~; k = 0. Each vector represents one term in the summation of
equations (1) or (2) for a given value of n. The phase of
the vectors is shown by the phase angle, ~ = -2 kn/N, where
the vertical direction is taken as the zero phase reference.
Thus, vertical components are rea~ (RXn) and horizontal com-
i ponents are im~ginary (IXn). The sample weightings are simply
the sample values xk of the time signal x(t) and these samples
are used to label each row of the vector diagram to indicate
that the magnitude of each vector in the corresponding row
has a value Xk. For simplicity of illustration, each vector
row is shown as having the same magnitude, i.e., x2 = X3,
although in general different magnitudes would be present.
The vertical vector sum for each column, n, gives the spectral
component Xn as indicated in ~FIGU~E 3.
To produce the folded spectrum of equation (2) with
A = 1, B = 2, the conjugatcs of frequcncics n ~ ~ are addcd to
thcir imagcs in the lower range. This folding doublcs thc
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EF -
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~ 108769~
~ .
ma~nitude o~ all the frequencics except the band edges and
~ results in the single-sided spectrum as shown in FIGU~E 4.
!~ In order to reduee the number o~ operations requirued by
equation (2) it is desired to operate on thc m~gnitudes
S of the vectors in PIGURE 4 prior to resolving them into
their real and imaginary eomponents. The proeess is outlined
. . in Table 1 below with speeifie reference to FIGURE 5.
~ ..
. . . .
~ ' .
~, , '
',
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T~LE 1
:
Stage Ste~ Operation Figure
A Add pairwise every fourth 5A
sample.
B Subtract pairwise every 5A
fourth sample.
C Add pairwise every other 5B
result of Step A.
D Subtract pairwise every other 5B
result of Step A.
2 ~2 and I2 are produced- ,
E Subtract pairwise the odd results SB
of Step B.
F Add pairwise the odd results of 5B
Step B.
G Add pairwise the results of 5C
~- Step C.
~0 is produced.
H Subtract pairwise the results 5C
of Step C.
R4 is produced.
I Multiply result of Step E by 5C
cos 45.
J Miultipoy result of Step F by 5C
K Add result of Step I to (0-4). 5C
Rl is produced.
.i '
~;~ L Stubract result of Step 1 from 5C
~; (0-4).
R3 is produced.
M Subtract result of Step J from 5C
,;. (2-6).
, 25 I3 is produced.
N Subtract result of Step J from
' negative of (2-6).
~1 is produced. SC
.~ , .
~; .
., .
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1~)87~9;~
~or ease o~ illustration, the sum of two in-phase
vectors in FIG~R~ 5 is shown normalized, i.e., the resulting
magnitude is divided by 2.
The operations listed in Table 1 and shown step-by-
step in FIGUR~S 5A-5C are summarized in FIGURE 6. In FIGURE
6 each node represents a varia~le and each arrow indicates
by its source the variable which contributes to the node at
its arrowhead. The contribution is additive. Dotted arrows
indicate that the source variable is to be negated before
adding, i.e., it is to be subtracted. Change in weighting,
i.e., multiplication, is indicated by a constant written
close to an arrowhead. For N = 8 only one value is needed
for trigonometric we ghting since sin 45 = cos 45 = .707.
It is convenient, however, to muItiply RX and RX by 1/2
rather than multiply all the other components by 2 as indicated
in e~uation (2). Thus, equation (2) is effectively taken
with A = 1/2 and B = 1. The tree diagram of FIGURE 6 is
implemented by the circuitry shown in FIGURE 2, where operational
amplifiers 10 replace the various nodes.
The inverse of the DFT may be performed quite straight-
forwardly by reversing the DFT of FIGURE 6. The tree graph
for the IDFT is shown in FIGURE 7A where the inputs are the
real and imaginary spectral components of the non-redundant
vectors Xn. In the overlapping sliding window sampling of
the instant invention significant circuit simplicity is pro-
vided in using only a single output of the IDFT. The simplest
approach is to utilize the inverse transforms which require
only real inputs thus eliminating complex multiplication.
Accordingly, FIGU]~ 7B shows a "sparse" IDFT ~or,the 4th time
sampling, and FIGUR~ 7C 5hows an analog implcmentation of
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FIGU~ 7B. The output signal at thc 4th time sampling is
represcntative of the input signal sample X3, for an input
sample set xO...xN 1 A subsequent input sample set is
taken later, shifted in time by a fixed amount to where
S 0 C toG N to provide a sample set xO.. XN 1' and the 4
output sample is again representative of the 4th input
tLme sampling, namely X3. The input sample is again taken,
shifted by to and the process repeated to provide an overlapping
sliding window input. There is therefore a one-to-one cor-
respondence between the numbers of samples from the IDFT and
the number of signal sample sets. Thus, the output signal
can be continuous if the input is continuous, as for example,
in utilizing an analog delay line, or the output can be
sampled if the input is sampled, as, for example, in utilizing
an input shift register.
FIGU~E 8 illustrates a tree graph for the complete
~` equalization process. The DFT of the input sample set
xO...xN 1 for N = 8 is computed ir. section 7. The frequency
domain equalization is computed in section 9 and the inverse
DFT in section 11. As is readily apparent, sections 7 and 11
are identical to FIGURE 2 and FIGURE 7B respectively. The
~; frequency domain equaliztion is achieved by multiplying each
¦ spectral coefficient Xn by a correction factor Cn which is
simply a component of the transfer function of the equalizer
C ~w) . Thus,
i n n n n = 0, 1........... N/2 ~3)
Tl-e equalized spectral coef~icients, Yn, are thcn inverse
transformed by thc IDFT to provide the time domain representation
o~ the input sample set.
The multiplication in equation (3) is pcr~ormcd componcnt-~
-!1
. ~ ' :

E
1~ 1()~7~i9~ :
by-component. Indccd, within the frequency domain the
equivalent transf~r function of two transf~r functions in
series is the component-by-component product of the two
Punc~ions, and there are not cross products as in the case
of convolutions. The equalization process of FIGURE 8
takes place entirely in the frequency domain and provides
an in-line system for automatically equalizing the incoming
signals.
I~ is noted that for an input sample set stored in
an input storage means such as a shift register, the samples
within a window or sample time frame are designated xO...xk..;
XN 1~ and each subsequent sample se' is shifted relative to
the preceding set. Thus, taking the upper ~oundary case
(where the sample sets are shifted in time by to = T/N) as an
example, if ~Xk~ represents the i-l h sample set and [xlk]
the i sample set, one may write,
x' z X +1 k = 0, l...N-2
X'k = new sample k = N-l
' The sample sets overlap and in forming a new sample set, the
20 oldest sample is discarded, intermediate samples shifted, and
a new sample taken into the window. This overlapping sampling
technique in combination with the sparse inverse DFT is appro-
priate as opposed to a complete replacement o~ samples x~...xN 1
~ by a non-overlapping sample set xN.. x2 inasmuch as multi- - ~
s 25 plication in the frequency domain corresponds to a convolution -
in the time domain. Normal message transmission involves
apexiodic time functions (the message signal x(t) for example)
so that one needs the countcrpart of an aperiodic convolution
of the message signal with thc impulsc response of the equalizer.
Thc inhcrent pcriodicity of thc DFT would lcad to a pcriodic
.~ :
1 0-

108'7~3
or circular convolution i~ non-ovcrIapping samples wcre employcd.
The rclationship betwcen the overlapping sampling
technique in co~bination with the sparse IDFT and the aperiodic
convolution may be seen by way of the example illustrated in
- 5 ~IGU~E 9, where, for simplicity, N is taken to be 4. The
terms aO...a3 represent the impulse response of the equalizer
in the time domain, and the terms xO...x3 represent the samples
of the incoming signal x(t). Section A of FIGURE 9 represents
the desired aperiodic convolution in the time domain where~s
section B represents the periodic convolutions resulting
fromthe implied periodicity of the DFT. Section B of FIGURE 9
shows the four distinct product surmations which result from
convolving the first sample set which appears in the sampling
window, namely, sample set xO,0,0,0 shown at the top of
FIGURE 9 with the impulse response of the equalizer aO...a3.
In forming the "results" of the convolution, the terms aO...a3
are reversed and shifted past the incoming pattern which is
shown as periodic, namely, OOOxOOOOxO. The second pattern
for the convolution is similarly formed using sample set
OOxOxl which is made periodic as, OOxOxlOOxOxl. The other
- patterns are similarly produced to represent the various
results of a periodic convolution of the incoming sample set
as it progresses sequentially through the sampling window
which is physically the incoming delay line or input shift
register.
The "results" of the aperiodic convolution shown in
Section A of FIGU~E 9 are formed by cxtending with zeros the
incomin~ sequence xO,xl,x2,x3 so that no periodicity is
present, i.e., N-l zero values are addcd to thc sample set.
It is sccn that one term o~ the "rcsults" o~ thc apcriodic
-11
.. . . . .

,
~08~7~93
convolu~ion i5 idcntical with onc ~ixcd-time index term
of a corresp~ndinc3 "result" of a periodic convolution.
Thus, one may uti]ize the DFT together with its inherent
implied periodicity to efcctuate the desired aperiodic
convolution if one utilizes an overlapping sliding window
samplin~ of the incoming signal in combination Wit;l the
production of one term of the IDFT. The "sparse" inverse
transform is utilized to generate the one time domain output
signal as desired.
In general, the number of terms N in the window of
the equalizer, i.e., the number of taps on the incoming
delay line or the number of stages in the input s~ift
register, need not be equal to the number Nl of sa~ple
values of the incoming signal. Let the actual input to the
15 equalizer be x(i), i = 0, l,Nl-l where Nl may be greater
than N. Let x(i) be extended by at least N-l zero valued
samples (we use N for convenience) to form x'(i), i = 0,
1,2---(N+Nl-l). Extending by zeros is equivalent to restricting
any repetition of the input signal so that the non-zero re-
sponse is separated by at least the length of the equalizer.
Referring again to the boundary case (to = T/N)
such that the input sampling rate equals the transform
sampling rate, if the signal x'(i) is shifted one sample at
a time through an N sample equalizer, N+Nl subsets of N samples
each are formed according to:
xk(i) = x'~i+k) i = 0,1,2---(N-l)
k = 0,1,2---(N~Nl-l)
This relationship can also be written
x'~i) ~ N ~ xk(i-k) ~ 0;1;2---(N-l)
Sinca thc discrate Fouricr ~ransform is lincar
. -12-

7693
~ Xk~i-k)~_~ ~ Xk(n)WR nk
where xk(i)~-~Xk~n) and WR = exp( Ri). Then
k=0 ) k(i k)~ o Cn Xk(n)W nk
-5 where c(i) is the IDFT of the frequency domain correction
factors Cn, i.e., c(i)~-~Cn, where "~-~" represents the
DFT/IDFT operation.
The left side of this result is a summation of periodic con-
volutions, but it has already been shown that one element
of a periodic convolution is identical to the corresponding
element of an aperiodic convolution. By choosing only this
single output of the IDFT, the result can be written
y'(i) = c'(i)*x'(i) = ~ Fs [Cn Xk(n)WR ]
where Fs indicates a discrete inverse Fourier transform wit;
a single output and c'(i) is c(i) extended with at least
Nl-l zero valued samples as implied by an aperiodic convolution.
The phase shift factor WR nk, in the frequency domain indicates
that the subsets of the input are taken sequentiaIly, i.e.,
there is a time shift of the output relative to the transform.
The factor N is eliminated because only one of the N outputs
of the inverse transform is taken.
Thus, in the running mode the equalizer is performing
an aperiodic convolution of an input signal of arbitrary
~ength with the impulse response of the equalizer, which is
the inverse discrete Fourier transform of the frequency domain
correction factors, C~. In practice, thc input signal is
real so that the negative requencics associated with the
Fourier trans~orm are the complcx conjugates of the positivc
frequcncics and do not contain any additional information.
Thercore, the discrctc Fouricr transorm is implcmcntcd to
-13-
.. - :
:
.

1()87~93
produce only positive frequcncies. Thus, the transformation
of N san~ples results in N real and imaginary coefficients of
N positive frcqucncics, plus dc. The inverse transform is
implemented to prodicc only one output and furthermore it is
the one which requires only rcal coefficients namely
the oth or (2)th output of the inverse transform.
In order to determine the desired equalizer transfer
function C(w), one may assume that an isolated impulse or
test signal of known magnitude and polarity is transmitted.
This test signal is transmitted during a training period
prior to message transmission. In the following description,
two test signals are sequentially transmitted to $et up or
initialize the equa.'izer to provide the coefficients Cn.
The ideal received signal is h(t), the impulse response of
H(W) . However, the actual received test signal is f(t),
the impulse response of F(w) = H(w)~D(w). It is intended
that C(w) should equal l/D(w) or be the best approximation
possible. For the test pulses f(t) one can write the following
for each frequency component n.
F(w) = RF + jIF
= (RH + jIH) (RD + jID)
= (~IRD - IHID) + j(RHID + RDIH), j =
and
l_ = H(w)
D(w) F(w)
= RH + jIH
~F ~ jIF
= (RH + jIII) s(RF jIF)
(~F)2 + (IF)2
= RHT~F + IIIIF + j(T~FIII - ~TIIF)
(~F) + (IF)
,
.

1~)8769;~
The ~D~T performcd at thc receiver can producc a set of
coefficients for each input sample sct i reprcsenting RF and
IF at discrete frequcncies. The cocfficients of specific
interest for set-up or equalizer training purposes are those
- 5 which are derived by carrying out the ADFT on the sample
set which is found to peak closest in point of time to the
peak of the assumed impulse response characteristic h~t),
it being understood that the underlying assumption is that
a single sample set contains essentially the entire test
signal f(t). Of course, since h(t) is known, the coefflcients
RH and IH can easily be determined for the frequencies of the
coefficieints selected to represen~ RF and IF. With this
information a sample version of l/D(w) can be produced and
used to equalize any signal which is subsequently transmitted
through D(W). The equalization function l/D(w) can be written
as 1/D (W) = C (Wj = RC + ;IC where
RHRF ~ I3~IF
(RF) + ( IF)
RFIH - RHIF
IC = 2 2
(RF) ~ (IF) : (4)
RF and IF for each frequency can be obtained by
performing the ADFT on the input test signal as shown in
FIGURE 2 for an eight frequency discrete spectrum. In order
to obtain a result that is not a function of time, f(tj and
h(t) must either by synchronized or sampled. If one assumes
that samples of f(t), f (k=O...N~l), are used to obtain the
R~'s and IF's , then the Rl3 ~ S and I~3 I S can be trcated as
constants. Precise phasing of the sampling is not rcquircd
bu~ all non-zero samplcs o~ f(t) should be included.
. ~15-

1~)87~93
shif~ in the sample phasing merely rcsults in a time sllift
in ~he output of the equalization proccss. The circuitry
utilized to implement equations (4) is shown in FIGURES lQA, lOB
and 11. A two pass system is utilized in which two ideal
or test pulses h(t) are transmitted and received in succession.
The pulses are separated sufficiently in time so as to avoid
mutual interference, but are sampled at the same relative
instance.
The numerators of RC and IC are obtained using the
circuit shown in FIGU~E lOA. The circuit comprises a plurality
of switches 12a, 12b, 13a, 13b and a plurality of multipliers
14a, 14b, and 16a, 16b. ~atio~ amplifiers 18 and 20 are
shown connected to ~he multiplier outputs and are used to
provide signals to two holding circuits 22 and 24. During
pass 1, when the first ideal pulse is received, switches 12
and 13 are placed at position 1, designated Pl in the figures,
and constant voltages corresponding to RH, IH are connected
to multipliers 14 and 16. The resulting outputs of operational
amplifiers 18 and 20 are stored in holding circuits 22 and 24.
Holding circuit 22 stores a value corresponding to RFIH - IFRH
and holding circuit 24 stores a value corresponding to RFRH +
IFIR. During pass 2, the second ideal pulse is received and
switches 12 and 13 are placed at position 2, designated P2
in the figures. The values stored in the holding circuits
22 and 24 are then connected to multipliers 14 and 16.- The
subsequent output of the operational amplifiers 18 and 20 is
given respectively by RII((RF) + (IF)2) and IH((RF) + (IF) ).
~hcse valucs nced only be multiplied by the factor l/((RF) +
,(IF) ) to obtain thc desircd equalized frequcncy domain
:30 valuc5 o thc ideal si~nal Rll an~
-lG-
.

1~:)87693
The constant values for the ideal test signal h(t)
may be provided as outputs of potentiometers as shown in
~IGURE l~;. Only the circuit for Hl and H2 is illustrated
in FIGURE 10~ although any required number of values may be
provided.
The multiplying factor l/((RF) + (IF) ) is obtained
during the pass 2 operation of the system -taking the output
from operational amplifiers 18 and 20 and using the circuitry
shown in FIGURE 11. FIGURE 11 shows a servo and hold circuit
26 and a multiplier 30. The servo and hold circuit 26 com-
prises an operational amplifier 32, motor 33, and adjustable
potentiometer 34, switch 35 and holding circuit 36 all of
which are connected in seriatim for connect~on back to multi-
plier 30. Potentiometer 34 is controlled in a divider
network by motor 33 to provide a cont~olled voltage through
switch 35 and holding circuit 36to multiplier 30. Inasmuch
as the known ideal pulse is again received during pass 2,
- the output of operational amplifier 32 is forced to the desired
multiplication factor using the servo gain control arrangement
shown with RH as a reference voltage. This circuit automatically
provides the multiplying factor l/~(RF) + (IF)2) which is
stored in holding circuit 36.
With RC and IC available any signal subsequently
transmitted through the system, i.e., the message signal x(t),
can be equalized for the distortion D(w) by again employing
the same basic circuit of FIGuRElQ~ having switches 12 and 13,
operable at position P2, and the circuitry of FIGVRE 11 having ~-
switch 35 operable at position Pl. llolding circuits 22, 24
and 36 storc values which corrcspond, for each frequcncy, to
~xact cqualizatlon transfer ~unctions. Thus, the incoming
~ ~ -17-

lV8'76~
message signal xlt) is samplcd to produce the samples x~
wherc k = 0... N-l . The samplcs xk are tr~nsformcd by
a DFT to provide spectral components X for n = 0...N-l.
The spectral components are equalized toproduce equalized
spectral components Yn = Cn Xn, n = 0.. N-l and the sparse
inverse DFT is taken for Yn to produce a single time domain
output sample Yk corresponding to the original input sample
Xk. Employing non-redundant frequency components for the
discrete Fourier transforms, where N is an even integer,
simplifies the equalization in that circuitry need only be
provided for N/2 spectral components. Thus, the DFT cir-
cuitry provides components X for n = 0, l...N/2 and,
similarly the components Cn and Yn need only be provided
for n = 0, l...N/2. Sliding window sampling of the input
signal x(t)i wherein samples are taken every T/N h interval
along the delay line 5 (FIGURE 2), allows utilizing a single
output from the IDFT corresponding to each sample set for
each window. Consequently, N output signals are provided
at the output of the IDFT for each N input sample sets.
The circuitry shown in FIGURE 12 represents the
analog circuit implementation of the flow diagram of FIGURE
8, and incorporates therein the circuits of FIGURES 7C, 10
and 11. Specifically, the input sample data is taken off a
delay line 40 and sample sets i, i + 1... are taken shifted
in time relative to one another to provide the sliding window.
The DFT, frequency adjustment and sparese inverse DFT are
performed for cach sample set i, i ~ 1... Operational
ampli~icrs 41 are similar to those shown in FIGURE 2, and
the output signals corresponding to the discretc frcquency
componcnts of tl~c transform X arc providcd as inputs to the
;
~-- .

1(!~'76~
equaliz~r proper. For each r~al and imaginary pair, RX
IXn, circuits similar to that shown in FIGURE:S lOA and 11
are provided. The operational amplifier 2-0
and the multipliers 16a, 16b of FIGURE lOA`may be time
shared for frequency components n = 1, 2 and 3 so that only
multipliers 14a, 14b, operational amplifiers 18 and holding
circuits 22, 24 need to be separately provided for each
frequency channel. FIGURE 12 shows a time-shared circuit
42 comprising multipliers 44a, 44b and operational amplifier
46 connected equivalently and corresponding to multipliers
16a, 16b and operational amplifier 20 of FIGURE lOA. The
output of circuit 42 is fed to a multiplexer 50 for sequential
application of the signal values RXnR~In + IXnIHn to corresponding
holding circuits 24-1, 24-2 and 24-3 during a pass 1 operation.
These holding circuits correspond to the holding circuit 24
of the single frequency embodiment of FIGURE lOA. Similarly,
holding circuit 22 of FIGURE lOA corresponds to holding
circuits 22-1, 22-2 and 22-3 of FIGURE 12, aiid-mu~tip~;Iers
14a and 14b of FIGURE 10 correspond to multipliers 14a-1 -
through 14a-3 and 14b-1 through 14b-3 of FIGURE 12. A
plurality of servo and hold circuits 26 and multipliers 30
are also provided in FIGVRE 12 to correspond to the apparatus
of ~IGU~E 11.
The inputs to time-shared circuit 42 are provided by
another multiplexer 52 which provides the appropriate con-
stant reference voltages Il~n and Rl~n for n = 1, 2 and 3.
Signals RXn and IXn for n = 1, 2, 3 are also fed to the input
of multiplexer 52 although, for simplicity, only the signal
IXl is explicil:ly so illustratcd. The multiplcxcrs 50 and ~-
52 arc controllcd by initializing circuit means comprising
--19--
~. .

7~93
set-up switch 54, a peak detcctor 56, c-~unter 58, switch
actuating means 60 and, clock means 62. The counter 58
may be a simple two stage counter serving to actuate the
- clock means 60 and pxovide enabling pulses to multiplexers
50 and 52 upon detection of the first of the two test
pùlses. The clock means 62 provides a clock pulse to the
switch actuating means 60 and multiplexers 50 and 52.
These clock pulses are typically delayed with respect to
the peak of the incoming test signal to allow the test
signal to be positioned, for example, near the middle of the
delay line 40. Switch actuating means 60 controls sets of
switches 64, 66 and 68. Switch set 64 correspond$ to
switches 12a and 13a in FIGURE lQA which are shown in position
P2 for the "run" mode. Switch set 66 corresponds to switch
13b of FIGURE 10 and is similarly shown in position P2.
Switch set 68 corresponding to switch 35 of FIGURE 11,
and position Pl, is here identical to the "run" position.
During pass 1, the first test pulse is received in the
equalizer, set-up switch 54 is closed and all switch sets
64, 66 and 68 are set to position Pl. During pass 2, the
second test pulse is received and all switches are placed
in position P2. Subsequently, all switches are set in their
run position and set-up switch 54 is open. For switch sets
64 and 66, the run position is identical with position P2
of the switches, whereas for switch set 68, the run position
is idcntical with position Pl.
The DFT coefficients RXn and IXn may be fed directly
to output mcans shown in FIGURE 13 which may comprise for
examplc an oscilloscopc display or appropria~e recoxding or
proccssing mcans. In such a case, overlapping sliding window
~ -20-

1087~93
sampling enables continuous display, recordation or pro-
cessing of the spectral coefficients. In addition, the com-
ponent powcr spectrum may be generated and provided to output
means using the multiplying and summing apparatus of FIGU~E
13B. Further, the spectral coefficients RX and IX of
n n
FIGURE 12 may be fed to a component phase spectrum apparatus
- as shown by FIGURE 13C to provide a phase display, recordation
~r processing thereof.
. The switches utilized in the instant invention may
comprise solid state switching devices such as, for example,
transistors. In such a case the switch actuating means 60
comprises appropriate driving circuits. Additionally, the
two phases of the equalization process could be performed
with one set cf time samples if they (or their corresponding
frequency coefficients) are stored instead of two successive
pulses, as discussed above. If the received signals are
noisy, the average of a number of received pulses may be -~
used to reduce noise effects. Averaging can be applied
either to the time samples or to their corresponding frequency
coefficients during the set-up interval (passes 1 and 2).
An averaging circuit (not shown), for example a pair of low
pass filters, could be time dhared between the fre~uencies.
In a facsimile system the sync pulses used to achieve
line synchronization of the scanning and printing mechanisms
can provide an ideal set of known pulses for the purpose of
setting up the automatic equalizer. Fur~hermore, if the sync
pulses are continucd ~-hrought the transmission of facsimile
information thc automatic equalizcr settings can be rcgularly
updated. ~hc systcm can thus bc adap~ivc in the sense that
the equalizcr can be madc to track changcs in channcl charac-
~ . -21-
.

10~69;~
teristies whieh oceur during the transmission o a doeument.
In utilizin~ an analog tapped delay line to provide
tl)e input sets Xk, the equalizer bandwidth is dctermined by
the tap or sample spaeing,~r = -, and is given ~y BW = 1/2r =
2T. In such systems filterin~ may be used to limit the band-
width of the incoming sample to BW to avoid aliasing. Images
do not occur in an analog delay line since samples are conti~-
uously available and the sampling rate may be thought of as
infinite. If the input sample set is taken from stages of
a shift reglster, for example, the sampling rate must be at
least the Nyquist rate to avoid aliasing. It is important
to note that the input sampling rate may not necessarily be
the same as the samp ing rate seen by the DFT since one could
..
eonnect, for example, every other stage of the input shift
register to the DFT input eireuitry. The input sampling
rate determines the rate at which the output samples appear
and the image loeations of the output signal spectrum. The
transform sampling rate determines the equalizer transfer
funetion whieh is eontinuous in the analog delay line case
sinee the transform sampling frequency, -, is twice the band-
width BW = 2T. The equalization transfer function may also
be made eontinuous with shift registers or sample and holding
eireuits at the input if the transform sample interval is
taken at N seconds using a total of N inputs and if the
transform sampling rate, -, is seleeted (eonsistent with the
Nyquist eriteria) to be 21W ~ where Wmax is the maximum
frequency eomponent of the incoming signal x(t). If the
. .. .. . . . .
~ number of samples taken during time T is N, then the equal-
_ .. ~ . . .. . .... . . ... .
ization will exactly cancel the distor~ion of N/2 positive
.
requencies, plus de,evenly space by -, and the impulse
-22-

1087~;93
responsc of thc equalizcd systcm will be exactly corrcct at
N equally spaced points. This type of equalizer is thus
ideally suitcd to digital transmission; howcver, the equal-
ization function will be a smooth curve between the sample
frequencies so that it is also well suited for non-digital
transmîssion such as facsimile and video. Thus, although
control of the equalizer occurs at discrete points, the
transfer function itself is continuous from dc to BW = 2T
and beyond, as an image, where - is the transform sample
spacing. The response in between the control frequencies
is a result of the continuous overlapping "windowing" in
the time domain.
If the sample set does not include all the non-zero
samples of the unequalized system response, the equalization
between the sample frequencies will not be good enough to
- eliminate intersymbol interference in the digital sense. If
the samples are not close enough the equalization bandwidth
will be too narrow. The equaliz-tion function is periodic in
the frequency domain with period of 1/~-. The sample spacing
is easily changed without changing the system complexity.
However, if the number of samples is increased the circuit
complexity increases faster than linearly, since the number
of nodes in the discrete Fourier transform algorithm used is
N Lg2N-
While the invention has been described with reference
to a particular cmbodiment thereof it is apparent that modifi-
cations and improvcments may be made by those of skill in the
art without departing from the spirit and scope of the invcntion.
~23--
. . . .. . ,, . . . . - . .. . . .
. .