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Patent 1100651 Summary

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Claims and Abstract availability

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(12) Patent: (11) CA 1100651
(21) Application Number: 1100651
(54) English Title: TELEPHONE LINE CIRCUIT
(54) French Title: TRADUCTION NON-DISPONIBLE
Status: Term Expired - Post Grant
Bibliographic Data
(51) International Patent Classification (IPC):
  • H04M 19/02 (2006.01)
(72) Inventors :
  • GRANGE, JEAN-CLAUDE (France)
  • HERNANDEZ, PHILIPPE (France)
  • REYNES, DANIEL (France)
  • SUZZONI, JEAN-PIERRE (France)
  • TU, NGHIEM (France)
(73) Owners :
  • INTERNATIONAL BUSINESS MACHINES CORPORATION
(71) Applicants :
  • INTERNATIONAL BUSINESS MACHINES CORPORATION (United States of America)
(74) Agent:
(74) Associate agent:
(45) Issued: 1981-05-05
(22) Filed Date: 1978-01-17
Availability of licence: N/A
Dedicated to the Public: N/A
(25) Language of filing: English

Patent Cooperation Treaty (PCT): No

(30) Application Priority Data:
Application No. Country/Territory Date
77-10-338 (France) 1977-03-31

Abstracts

English Abstract


TELEPHONE LINE SWITCHING
Abstract
The subject invention relates to a telephone line circuit and to
the logic associated therewith, in order to detect the various possible
line status, more especially to detect an off hook status during ringing.
The circuit is essentially comprised of a first detector (DA) sensitive
to the line current phase, a second detector (DB) sensitive to the
ringing voltage phase, and two pulse generators (RTG1 and RTG2), of the
same frequency as the ringing voltage, appearing at the positive and
negative zero-crossings of the ringing voltage, respectively. When
only the ringing current is applied to the line, only the signals from
both detectors and the first generator are simultaneously present (once
per period). When the called subscriber lifts his handset, the signals
from both detectors and the second generator are also simultaneously
present once per period. These pulse coincidences are detected and
processed by an appropriate logic.
FR9-76-016 - 1 -


Claims

Note: Claims are shown in the official language in which they were submitted.


The embodiments of the invention in which an exclusive property or
privilege is claimed are defined as follows:
1. A telephone line circuit including:
a telephone set,
a line transformer comprising a first and a second primary half-
winding and a secondary winding, said secondary winding for connection to
a switching network,
a d.c. voltage supply,
a ground terminal,
a first circuit branch connecting a first terminal of said tele-
phone set to said ground terminal through the intermediary of said
first half-winding and a first resistor,
a second circuit branch connecting a second terminal of said
telephone set to said voltage supply through the intermediary of said
second half-winding and a second resistor,
a capacitor connected between a terminal of said first resistor
not connected to ground, and a terminal of said second resistor not
connected to said voltage supply,
a ringing current circuit connected to a point in said second
branch through the intermediary of a bidirectional relay switch
breaker to send two appropriate ringing half-waves,
a first detector connected to said first circuit branch includ-
ing means sensitive to the current flowing through said first branch,
a second detector connected to said second circuit branch in-
cluding means sensitive to the voltage present at said point in said
second branch, and
processing means sensitive to detection signals provided by said
first and second detectors in order to process said signals and
give information about the on-hook/off-hook type status of said
line circuit.
21
FR9-76-016

2. A line circuit according to claim l, further including:
a first generator for providing pulses of the same frequency
as said ringing current and where the pulse time-duration of each
pulse extends on either side of the positive zero-crossing of the
ringing voltage,
a second generator for providing pulses of the same frequency
as said ringing current where the pulse time-duration of each
pulse extends on either side of the negative zero-crossing of the
ringing voltage, and
said processing means is sensitive to the signals produced
by said first and second generators.
3. A line circuit according to claim 2, wherein said processing
means includes:
a logic AND gate for producing a first logic signal in response
to the simultaneous presence of signals coming from said detectors
and of a pulse coming from said second generator,
a first latch set in response to said first logic signal, said
first latch producing a second logic signal on its direct output,
a logic AND gate for producing a third logic signal in response
to the simultaneous presence of said detector signals and said
second logic signal and of a pulse coming from said first pulse
generator, and
a second latch set in response to said third logic signal, a
direct output of said second latch producing a signal indicating
an "off hook during ringing phase" status for a called telephone
set.
22
FR9-76-016

4. A line circuit according to claim 3, wherein said processing
means further includes a logic AND gate for producing a Fourth
logic signal in response to the simultaneous detection of signals
coming from said detectors and of a signal which is characteris-
tic of a "no ringing phase" status for a called telephone set,
said third and fourth logic signals being applied to a set input
of said second latch through the intermediary of a first OR gate.
5. A line circuit according to claim 4, wherein said processing
means further includes:
a second OR gate receiving as inputs the direct output of
said second latch and an output of said first OR gate, the output
of said second OR gate producing a signal which is characteris-
tic of a significant current being present in said line circuit.
23
FR9-76-016

6. A line circuit according to claim 2 wherein said processing
means includes:
a first logic AND gate having a first input for receiving a
signal indicating that said first detector is energized and a
second input for receiving a signal indicating said telephone set
is in an "off hook" condition, said logic AND gate producing a
fifth logic signal in response to the reception of both said
indicating signals,
a second logic AND gate having a first input for receiving
a signal indicating that said second detector is energized and
a second input receiving a signal indicating said telephone set
is in an "off hook" condition, said second gate producing a sixth
logic signal when receiving both said signals, and
a third logic AND gate receiving said sixth signal and a
complement of said Fifth signal and thereby producing a further
logic signal, said further logic signal being characteristic of
a subscriber operating a ground button.
7. A line circuit according to claim 6, wherein said process-
ing means further includes:
a fourth logic AND gate having a first input for receiving
a signal indicating that said first detector is energized and a
second input for receiving a signal indicating that said second
detector is energized to thereby produce a seventh logic signal
in response to both conditions, and
a logic OR gate receiving said fifth, sixth and seventh
logic signals as input signals thereto and thereby producing an
output signal characteristic of a "subscriber's loop closed"
condition.
24
FR9-76-016

8. A line circuit according to either claim 6 or 7, wherein said
further logic signal activates a single-shot to thereby produce a
pulse of predetermined time-length which, when inverted, produces
an interruption of said predetermined time-length on an output line.
9. A line circuit according to claim 7 including:
a switch breaker connected between said terminal of said second
resistor not connected to said voltage supply and a terminal of
said second half-winding;
a third resistor of high resistance connected between said
terminal of said second half-winding and said voltage supply, and
in that
said switch breaker being activated by said processing means
so as to switch off said second resistor in response to a misopera-
tion in the line.
10. A line circuit according to claim 9, including scanning means
connected to said secondary winding to detect that the line is fed
and producing a signal in response to this detection, and
a logic AND gate receiving as a first input said signal in
response to the detection that said line is fed and a second input
receiving a complement of an output signal of said first detector
and thereby produce an eighth logic signal,
rise delay means receiving said eighth logic signal as an in-
put,
a logic AND gate receiving an output of said delay means, said
eighth logic signal and a complement of an "off hook" condition for
said telephone set as inputs to, thereby produce a logic signal,
said latter logic signal being used in order to open said switch
breaker.
FR9-76-016

11. A line circuit according to claim 10, characterized in that
said eighth signal is applied to the input of an OR gate a second
input of which receives the signal coming from said second detector,
and the output of which is applied as an input to said delay means
and said AND gate which is used in order to open said switch breaker.
12. A line circuit according to claim 10 characterized in that a
ground button signal is applied to a second rise delay means, the
output of said second delay means being used to open said switch
breaker.
13. A line circuit according to claim 10 characterized in that said
processing means are comprised of:
a logic AND gate which receives as inputs said scanning means
signal, the complement of an off-hook signal and the complement of
a misoperation signal, thereby providing a ninth logic signal,
a logic AND gate which receives as inputs said ninth logic
signal and the pulses coming from said first generator, thereby pro-
viding a tenth logic signal,
a third latch the set input of which receives said tenth logic
signal,
a logic AND gate which receives as inputs the direct output
of said third latch and the complement of a signal indicative of the
simultaneous presence of signals coming from said detectors, and
which yields as its output a signal which is a characteristic of
the ringing status of the concerned line, and
a logic AND gate which receives as inputs the complement of
said ninth logic signal and the pulses coming from said first gen-
erator, and has its output connected to the reset input of said
third latch.
14. A line circuit according to claim 13, characterized in that
said ringing status signal is also utilized to open said switch
breaker.
26
FR9-76-016

15. A line circuit according to claim 13, characterized in that
said processing means include:
a fall delay means which receives said ringing status signal,
and
a logic AND gate which receives as inputs the output of said
fall delay means and the complement of said ringing status signal,
thereby producing an eleventh logic signal which, after its being
logically inverted, produces a protection logic signal when the
ringing current is being sent.
16. A line circuit according to claim 6, characterized in that
said processing means are comprised of:
a logic AND gate which receives as inputs a loop current sig-
nal and a ringing protection signal, thereby producing a "first
and second detectors energized" logical signal,
a logic AND gate which receives as inputs said just mentioned
logical signal and said significative current signal, thereby pro-
ducing an "off-hook" signal, and
a logic AND gate which receives as an input a ground button
indicating signal and said "off-hook" signal thereby producing a
logic signal which is a characteristic of the "subscriber's dis-
turbance-free loop" status.
17. A line circuit according to claim 6 characterized in that
the potential of said voltage supply and the base potential of said
ringing circuit are both identical.
27
FR9-76-016

18. A line circuit according to claim 9 characterized in that:
said means sensitive to that current which flows through
said first branch are comprised of a fourth resistor with a first
terminal connected to a point in said first branch at said terminal
of said first resistor, and a first transistor with a first end
terminal connected to the second terminal of said fourth resistor,
the second end terminal of said transistor being connected to
said first detector, said first detector transforming the voltage
appearing at said second terminal into a logic level, means being
provided for making said first transistor conducting when the poten-
tial at said point in said first branch is lower than the ground
potential, and blocking said first transistor in the opposite case,
and in that
said means sensitive to the voltage at said point in said
second branch are comprised of a fifth resistor connected between
said third resistor and said d.c. voltage supply, and a second
transistor a first end terminal of which is connected to said volt-
age supply, its second end terminal being connected to said second
detector, the latter transforming the voltage appearing at said
second terminal of said second transistor into a logic level, means
being provided for making said second transistor conducting when the
potential at said point in said second branch is higher than that
of said voltage supply, and blocking said second transistor in the
opposite case.
28
FR9-76-016

19. A line circuit according to claim 18, essentially characterized
in that:
said voltage supply is negative with respect to ground,
said first transistor is a NPN-type transistor the emitter of
which is connected to said fourth resistor, its collector being
connected to said first detector, and its base being connected to
ground, a bias resistor being connected between the emitter and
the base of said first transistor, and a diode being parallel-
connected to said bias resistor in order to shunt the latter when
the emitter potential is higher than the ground potential, and
said second transistor is a NPN-type transistor the emitter
of which is connected to said voltage supply, its collector being
connected to said second detector, its base being connected to the
terminal of said fifth resistor opposite to that connected to said
voltage supply, a diode being parallel-connected to said fifth
resistor so as to shunt the latter when the potential at the termi-
nal of said fifth resistor which is not that connected to said volt-
age supply, is lower than the potential present at said voltage
supply.
29
FR9-76-016

Description

Note: Descriptions are shown in the official language in which they were submitted.


s~
1 This invention concerns a telephone line circuit and, more
particularly, a detection device for detecting the "off hook" status
of a telephone set during ringing.
It is well-known that, in present telephone installations, any sub-
scriber is called by sending an a.c current through the line from the
telephone exchange. The a.c current operates the bells of the sub-
scriber's telephone set. This current is generated from a relatively
high a.c voltage supply (several tens of volts) having a frequency which
varies according to the country of installation (in the range of several
tens of Hertz). When the subscriber removes his handset after ringing,
the loop circuit of the set is closed and d.c current is superimposed
on the a.c ringing current. It is necessary to detect when the hand-
set has been removed. This detection must be carried out as fast as
poss;ble so as to prevent the subscriber from hearing the ringing
frequency in his earpiece.
Detection of the d.c loop current when the ringing current is
being sent is a delicate operation in view of the high voltage and low
frequency of the ringing current.
Prior art devices which stop the sending of ringing current
usually`comprise relays which are as insensitive to the ringing cur-
rent as possible and have contacts which stop the sending of the
ringing current as soon as the d.c current is operated. Such relays
are cumbersome, expensive and very difficult to adjust. In addition,
they are not easily compatible with electronic component line cir-
cuits.
Other devices to stop sending the ringing current are also well-
known in prior art. For example, threshold detectors, may be adapted
to discriminate between the presence of the ringing current, alone or
the presence of both ringing current and loop current, simultaneously.
Unfortunately, it is difficult to have these circuits insensitive to
FR9-76-016 - 2 -
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1 the noise signals which, simulate the loop current, such as the longi-
tudinal noise signals, for instance.
More generally, most prior art devices use analog techniques in
which their operations are essentially based upon comparative electri-
cal measurements such as current or voltage, so that the devices are
used only under well-known conditions.
A main purpose of this invention is to provide for a new telephone
line circuit where logic means enables discrimination between the
various states such as "on hook" ringing current status, "off hook"
10 ringing current status, speech status, dialling status, idle status, etc.
Another purpose of this invention is to provide a line circuit
in which detection of when the subscriber has removed his handset while
the ringing current is being sent is independent of the noise currents.
This invention also provides a line circuit having a perfect sym-
metry when in "idle line" status, (i.e. the handset is replaced) speech
status, and ringing status.
This invention provides line circuit in which detection of the re-
moval of the handset while the ringing current is being sent is not
dependent on the ringing frequency.
In a preferred embodiment of this invention to be discussed herein,
the subscriber's loop circuit is made from conventional elements, namely,
a ground terminal, a first resistor, the first half-winding of the
line transformer, the telephone set circuits (handset~ bells~ etc.),
the second half-winding of the line transformer, a second resistor and
a negative voltage supply -V.
According to one feature of this invention, the ringing bus
line which distributes the ringing current is connected to the line
circuit on wire "b" side ~i.e. through the branch between the second
half-winding of the transformer and supply -V), through a bidirectional
30 switch breaker which passes the two half-waves of the ringing current.
Closure of this breaker is controlled by pulses coming from a first
pulse generator. The frequency of the pulses is identical to the fre-
FR9-76-016 - 3 -

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1 quency of the ringing current. The pulses are sent with a slight
lead over the positive zero crossings of the ringing voltage. A
second generator is also provided for delivering pulses of the same
frequency as that of the ringing current, but these pulses are sent
with a slight lead over the negative zero crossings of the ringing
voltage.
The circuit according to this invention also includes a first
detector connected on wire "a" side (i.e., to the branch connected
to the ground terminal) which is sensitive to the current Flowing
through this wire. A second detector is also connected on wire
"b" side, and is sensitive to the voltage present at any given point
on this wire.
When ringing current flows through the line while the handset is
replaced, the second detector detects the positive half-wave with no
phase-shift with respect to the ringing voltage. The first detector
detects the negative half-wave with a lead or lag with respect to the
voltage (since this detector is sensitive to the current) depending
on whether the telephone set presents a capacitive impedance or a self-
impedance at the ringing frequency.
Thus, in ringing status, both detectors are simultaneously ener-
gized for a very short period of time, once per cycle. This time-
period is always started or terminated when the voltage goes through
zero depending on whether the telephone set presents a capacitive im-
` pedance or a self-impedance. This results in control pulses coming
from at least one of the two pulse generators always being out of this
time-period.
When a subscriber removes his handset in answer to the bells, a
d.c. current is set from the ground terminal to voltage supply -V, and
is superimposed on the ringing current. This will cause the first
detector to remain energized after the zero crossing of the ringing
current and, therefore, signals from the two detectors and a pulse from
FR9-76-01~

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1 one of the pulse generators will be simultaneously present for a
short period of time, and, thereafter, the signals from the two
detectors and a pulse from the other pulse generator will be simul-
taneously present for a short period of time.
A mere logic operation makes it possible to detect the sequen-
tial occurrence of these coincidences and, in response there~o, to
control the opening oF the ringing switch breaker, thereby stopping
the ringing current.
This invention will be further disclosed, by way of an example,
with reference to the accompanying drawings, in which:
Figure 1, is a schematic diagram of a telephone line circuit
according to this invention.
Figure 2a illustrates schematically, the shapes of voltages and
currents in the circuit shown in figure 1 during the "ringing" and
"handset removed" phases, as well as the logic signals used in detecting
handset removal in the case of a capacitive impedance set.
Figure 2b illustrates schematically, the shapes of voltages and
currents in the circuit shown in figure 1 during the ringing and "hand-
set removed" phases, as well as the logic signals used in detecting
handset removal in the case of a self-impedance set.
Figure 3 is a schematic diagram of the logic assembly associated
with the line circuit shown in -Figure 1.
Figure 4a is a schematic diagram of the loop current detector shown
in figure 3, and figure 4b illustrates the logic signal shapes at
various points in said detector.
Figure 5a, is a schematic diagram of the ground button detector
shown in figure 3, and figure 5b illustrates the logic signal shapes
at various points in this detector.
Figure 6a, is a schematic diagram of the ringing logic circuit
shown in figure 3, and figures 6b and 6c illustrate the logic signal
shapes at various points in this circuit.
FR9-76-016 - 5 -

65~
1 Figure 7a, is a schematic diagram of the ringing protection cir-
cuit shown in figure 3, and figure 7b illustrates the logic signal
shapes at various points in this circuit.
Figure 8a, is a schematic diagram o-f the line protection circuit
shown in figure 3, and figure 8b illustrates the logic signal shapes
at various points in this circuit.
Figure 9a, is a schematic diagram of "off hook" status detector
or "trip detector" shown in figure 3, and figures 9b and 9c illustrate
the logic signal shapes at various points in this detector.
The circuit shown in Figure 1 comprises a conventional loop circuit,
i.e., a ground terminal GND, a first resistor RA, a first half-
winding WA of line transformer LT, telephone set circuits TS, the second
half-winding WB of line transformer LT, a second resistor RB and a nega-
tive d.c. voltage supply - -V. A relay switch breaker SB, the Function
of wh;ch will be disclosed hereinafter, is inserted between winding
WB and resistor RB. The circuit also includes a decoupling capacitor
C connected between terminals A and B and resistors RA and RB, re-
spectively. According to this invention, the line circuit also in-
cludes an additional arrangement formed of resistor Rl (branches to con-
nection point A connecting winding WA to resistor RA), transistor TA,
resistor R2, and detector DA. Detection DA transforms the collector
voltage of transistor TA into a logic level. The circult of transis-
tor TA includes a bias resistor R3 connected between the base and the
emitter and diode Dl parallel-mounted with resistor R3. Diode Dl
short-circuits resistor R3 if the voltage between the emitter and the
base is reversed. The base of transistor TA is connected to ground
GND.
The line circuit includes a further arrangement formecl of resistors
FR~-76-016 - 6 -
- :

S~
1 R4, R5, and R5 transistor TB~ resistor R7, and detector DB. The
resistors R4, R5 and R6 are mounted between terminal J o~ winding
WB and voltage supply -V. Detector DB trans~orms the collector
voltage of the transistor into a logic level: The emitter of trans-
istor TB is connected to voltage supply -V and its base is connected
to the common point between resistors R5 and R6. Resistor R6 is ,
the bias resistor for transistor TB. Diode D2, parallel-mounted with
resistor R6, is adapted to short-circuit resistor R6 if the voltage
between the emitter and the base is reversed.
Secondary winding WS of line transformer LT makes it possible to
connect, as far as the speech currents are concerned, the telephone
line with the switching network oF the exchange. With the use of
scanning device SC, it is possible to know the circuit status at any
moment (i.e., whether it is d.c. current-fed). The status information
produced on line Y by device SC is used in the logic portion of the
device according to this invention, as will be shown in more detail
hereinafter.
Ringing current is sent to the telephone set TS from ringing bus
RBUS. Ringing bus RBUS produces a 50Hz sinusoidal current oscillating
about a negative voltage -V of the same value as that of the central
battery which provides the line with a d.c. current. Line RBUS feeds
a line group in the exchange or all the lines in the exchange if it is
a low capacity exchange.
Line RBUS is connected to point K of the line circuit through a
relay switch RS operated by control RSC. Control RSC is energized
when the logic of the line circuit produces a ringing control signal
on output RG.
This control signal on output RG results from the data sent to the
logic through detectors DA and DB, and line Y. The signal on output RG
is sent when the ringing voltage is about to go through a zero crossing
FR9-7~ 016 - 7 -

65~L
1 ~a positive zero crossing, for instance), to prevent breaker RS From
being deteriorated too rapidly. When the ringing current must stop
being sent, the signal on output RG disappears when the voltage is about
to again go through a zero crossing. This operation is achieved with
the help of generator RTGl which permanently produces pulses of a fre-
quency identical with the ringing frequency (50Hz), and which are ap-
plied to the logic circuits as an additional condition whether the
ringing current must be sent or stopped. These pulses are generated
with a slight lead over the positive zero crossings of the ringing
voltage~ allowing for the lag of relay RSC.
In figure 2a, voltage Vk at point K is illustrated by the solid
line, and current I which flows through the line wires, is illustrated
by the dotted line.
Which reference to figures 1 and 2a, a circuit adapted to detect
when the d.c current appears while the ringing current is being sent,
where the telephone set is a capacitive impedance set will be described.
When the telephone set is at rest (the telephone set line is
idle), contact SB is open, no current flows through the line circuit
(with the exception of possible noise currents such as longitudinal
currents) and detectors DA and DB are not operated.
When the system loglc determines that ringing current must be sent,
ringing control circuit RG is operated as soon as the first pulse appears
in circuit RTGl (which is permanently operated). Relay RSC is energized
and contact RS is closed.
During the first half-wave, which is positive with respect to -V,
most of the ringing current I5 is flowing from line RBUS, through re-
sistor R4, winding WB, wire "b", the bells of set TS (which are operated
by this current), wire "al', winding WA, resistor RA, up to ground GND.
A portion of the current is flowing also through resistors R5 and R6 up
FR9 76-016 -8-

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, ,
1 to voltage supply -V, which results in saturating transistors TB
and operating detector DB. Figure 2a shows that the output signal
from detector DB is in-phase with the ringing voltage because the
impedance Formed of resistors R5 and R6 is resistive and the current
which is flowing through these resistors is in-phase with the vol-
tage at point K. Another portion o-f the current is flowing through
resistor Rl and diode Dl to ground, which results in blocking transis-
tor TA ("off" condition).
During the second half-wave, which is negative with respect to
-V, most of the current Is is flowing frorn ground GND, through re-
sistor RA, winding WA, wire "a", the bells of set TS (which are then
operated by this current), wire "b", winding WB, resistor R~, up to
line RBUS. A portion of the current is also flowing from ground,
through resistors R3 and Rl, which results in saturating transistor TA
and operating detector DA. The output signal from detector DA, which
is schematically illustrated in figure 2a, is phase-leading over the
ringing voltage since the impedance in the circuit under consideration
is capacitive and the current which flows in resistor R3, therefore,
leads the voltage. Another portion of the current flows from voltage
supply -V, through diode D2 and resistor R5, to the line RBUS, which
results in blocking transistor TB.
In view of the leading phase-shift of the signal coming from
detector DA, the output signals from both detectors are simultaneously
present during a short period of time just before the negative zero
crossings of the ringing voltage.
As mentioned above and illustrated in figure 2a, the control
pulses coming from circuit RTGl are produced when the positive zero cros-
sings occur, and, therefore, the signals coming from both detectors to-
gether with these pulses are never simultaneously present when the
ringing current is being sent. The pulses coming from generator RTG2
FR9-76-016 - 9 -
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1 are transmitted a short while before the ringing voltage goes throughzero crossings (negative crossings). Therefore, the signals coming
from the two detectors together with the pulses coming from generator
RTG2 will be simultaneously present (as shown in figure 2a) for a short
period. This coincidence is detected by AND gate 90 (figure 9a) and
memorized through latch L2 (figure 9a).
When the called-subscriber removes his handset, a d.c current of
amplitude IDC is sent from ground GND, through resistor RA, winding
WA, wire "a", the telephone set (handset circuits), wire "b", winding
WB, resistors R4, R5, R6 up to voltage supply -V. This current is
added algebraically to ringing current Is in the line wires.
In figure 2a, in order to make the description clearer, it
has been assumed that the handset has been removed just a little
after the midpoint of a positive half-wave of the ringing current. All
through this cycle, the direction oF the current flowing through the
branch From point K to voltage supply -V, is not varied and, therefore, -
detector DB remains operated.
On the other hand, once the current I has changed its direction
(point H) through the line, a current is flowing through resistors
R3 and Rl From ground to point A. This makes transistor TA con-
ductive and energizes detector DA.
During the Following halF-wave (negative), detector DB is de-
energized anew since a current is flowing through diode D2 and resis-
tor R5 from voltage supply -V to point K, thereby blocking transistor
TB. On the other hand, detector DA remains energized and will be so,
as long as d.c current IDC is flowing through the line.
As shown in figure 2a, detectors DA and DB are again simultaneously
energized during the period of time preceeding the nega~ive zero cros-
sing of voltage VF and, as the pulse coming from generator RTG2 is
also present during this same period of time, this coincidence is de-
tected anew by AND gate 90 (figure 9a) and memorized through latch L2
(figure 9a).
FR9-76-016 - 10 -

1At the beginning of the following half-wave (positive), detec-
tor DB is energi~ed anew and since detector DA is still energized
there is immediate c~incidence between the si~gnal received by both
detectors and the pulse generated by generator RTGl. This coinci-
dence between the signals coming from detectors DA, DB and the pulse
coming from RTG2 has been detected previously.
The signal coming from AND gate g2 is considered as characteristic
- of the "off hook" status. This status is detected by the system control
unit which, in response thereto, controls de-energization of the ring-
ing circuit RG and relay RSC the next time the ringing voltage goes
through ~ero. Voltage VK is then stabilized at value VKo and the
current flowing through the line is limited to d.c current IDC.
In figure 2b, the curves and signals corresponding to those of
figure 2a, have been illustrated but, this time, the telephone line
is a self-impedance line so that during the ringing phase, current
I is lagging the voltage VK. Like the preceding case, the detection
of the "off hook" status is carried out by detecting the coincidence
between the signals coming from detectors DA, DB and the pulses coming
from generator RTGl after detection of coincidence between the si~nal
coming from detectors DA, DB and the pulse coming from generator RTG2.
According to one aspect of this inven-tion, the logic associated
with the line circuit has been conceived so as to supply all the
logic control or information necessary for the supervision of the
line circuit. A preferred embodiment of this logic has been shown
in figure 3. In this figure, the following abbreviations have been
used:
", is means for AND gate
"OR", is meant for OR gate
"N", is meant for l.ogic Inverter
FR9-76-016 - 11 -

6~
1 . "SS"~ is meant for "single shot" and the accompanying
digit is indicative of the time-length of the pulse
generated by this single-shot circuit.
"Int", is meant for Integrator, the first accompanying
digit is indicative oF the lag upon energization, and
the other accompanying number is indicative of the lag
upon de-energization.
This logic has the following inputs:
. DA, is the logic signals produced by detector DA~
. DB, is the logic signals produced by detector DB,
RTGl, is the signals coming from generator RTGl,
. RTG2, is the signals coming from generator RTG2,
Y, is the logic information produced by scanner SC
and indicative of the status (either fed or not) of
the switching network junction point to which the
considered line is connected.
From these pieces o-f information, the logic of figure 3
delivers supervisory signals by the following outputs:
. X, the condition of which is a characteristic of the
open or close status of the subscriber's loop circuit.
This information X is processed by the central logic
of the telephone system in order to determine one of the
possible following states, namely, called-subscriber
"off hook" status, calling-subscriber "off hook" status,
"pulses dialled" status "connection to a multifrequency
receiver requested" status (ground button~, etc., with
respect to the previous status of the loop circuit
and the time-length of each status.
. SBC, which is the relay control circuit opening contact
sb.
Y, already mentioned as an input, but which can also be
utilized by the central logic of the system.
FR9-76-016 - 12 -

6~
1 . RG, which is the ringing control circuit (see
figure 1).
The logic in figure 3 comprises a number oF elementary logic
units which are illustrated by blocks in order to make the under-
standing clearer. These blocks will now be explained in more de-
tail with reference to figures 4a, 4b through 9a9 9b, 9c, and with
; reference to figure 3 when necessary.
Loop Current Detector LCD (figures 4a, 4b)
:
Logic unit LCD correctly detects the presence of a significant
subscriber's loop current, even when longitudinal noises are present
(output AB). It also detects short line disconnections appearing on
wire "a" side, i.e., on the ground button side (output XG).
This unit includes three inputs: DA, which receives the signals
from detector DA, DB, which receives the signals from detector DB,
and X2. Input X2 comes from the general logic shown in figure 3. It
is operated during all the period of time elapsing between the 'loff
hook" status and the "on hook" status, as will be shown hereina-fter.
The longitudinal noises are a.c currents induced into both wires
~"a" and "b") of the telephone line by external supplies (mains, high
voltage lines, etc.). These noises appear on both lines in the form
of signals with identicaL phases and voltages with respect to ground.
Detector DA detects current that flows through wire "a" which is
negative with respect to ground, and detector DB detects current that
flows through wire "b" which is positive with respect to -V.
.
Thus, when the line is idle (the handset is replaced), detectors
DA and DB are never subject to longitudinal noises at the same time.
In order to operate line ABg the logic is such that the two de-
tectors must be energized simultaneously (AND gate 40 is conducting).
Therefore~ there is no possible simulation of an "off hook" status be-
cause of longitudinal noises.
FR9-76-016 - 13 -

65~
1 When the line is busy, the logic is such that, -for an "on
hook" status to be detected, detectors DA and DB must both be
de-energized (a condition when none of the ANI) gate 40, 41 and 42
are conducting, thereby blocking OR gate 43). In this case, too,
simulation of the "on hook" status because of the longitudinal cur-
rents cannot occur.
; Any line disconnection or grounding on wire "a" side (i.e.~
on the ground button side) which may result from the operation of the
ground button, is detected by AND gate 44. Indeed, the conditions
necessary for such a disconnection to occur, are as follows:
. The telephone set must be in "ofF hook" status,
i.e., X2 must be energized (condition 1),
Detector DB must be energized (condition 2);
. Detector DA must be de-energized (condition 3).
Conditions 1 and 2 are sent through the input of AND gate 44
connected to the output of AND gate 42. Condition 3 is sent through
the input of AND gate 44 connected to the output of AND gate 41 through
inverter 45.
These various conditions have been shown schematically in figure
4b which illustrates the output AB as being insensitive to noises, in-
dependently of whether or not the line is busy.
The two noise pulses appearing at the output XG before the actual
ground button pulse, will not be taken into account owing to the opera-
tion carried out by the logic unit GBD which will now be disclosed.
Ground Button Detector GB~ (figures 5a, 5b)
The ground button signal is produced by the telephone set by
grounding the subscriber's loop circuit usually on the wire "a" side.
This signal must be valid only after detection of the "off hook"
status ~a condition necessarily implied in the signal appearing on
line XG).
FR9-76-016 - 14 -
.~

1 Integrator INTl introduces a 50ms delay so that the longitudinal
noises cannot simulate such a signal. Finally, single-shot SS pro-
duces a calibrated pulse (a 75ms pulse) which, upon logic inversion
(inverter 50) leads to a de-energization of line X3. Since line X3
is combined with line X2 ("off hook" status characteristic) through
AND gate 30 (-figure 3) in order to produce the output signal X, momen-
taneous de-energization of line X3 will entail de-energization of line
X, i.e., will simulate a 75ms loop current cut-oFf.
Unit GBD also provides an output G from integrator INTl intended
to energize relay SBC (see -figure 3), thereby breaking contact S~
during the operation of the ground button (when the grounding occurs
on the wire "b" side).
Figure 5b illustrates the signals which appear on lines XG, X3 and
G.
Ringing Control Circuit RG (figures 6a, 6b, 6c)
.
The basic conditions necessary to send ringing current are as
follows:
Line Y must be energized for, when the bells are
operated, a path will have already been established
from the secondary winding WS of line transformer
LT, through the switching network, up to a junctor
(conditionl), and
The telephone set line must be idle i.e., the handset
is replaced (condition 2), and
A ringing control pulse (coming from RTGl) must be
present (condition 3).
The basic conditions necessary to stop sending the ringing current
are as follows:
. A signal disappears from line Y (for instance, the cal-
ling subscriber, replaces his handset before the called
subscriber, removes his),
FR9-76-016 - 15 -
~' ~
.
. , -

The called-subscriber has removed his handset
(this in-format-ion is given by logic unit TD, as
further explained), or
a misoperation has occured (this information is
yiven by unit LP).
And gate 60, which receives signal Y, TD (which is inverted by
inverter 61) and LP (inverted by inverter 62) supplies condition 1
when conditioned (sending of the ringing current).
AND gate 63, which receives the output signals from AND gate 60
together with the pulses coming from generator RTGl, supplies con-
ditions 1 and 3 when conditioned (sending oF the ringing current).
When both conditions are met, the output of AND gate 63 sets latch Ll.
The direct output Q of latch Ll drives AND gate 64. A second input
of AND gate 6~ receives the signal coming from Xl (after its being
inverted by inverter 65). This signal is identical with the signal
coming from X2 (see figures 4a and 3) but with a 150ms-fall delay in
order to avoid disturbances during dialling. The 150ms delay is lon-
ger than the duration of the dialling pulses. This second input
supplies "on hook" status condition 2 when conditioned, thereby making
AND gate 64 conducting when the three above-mentioned conditions are
met.
The ringing current is stopped when either latch Ll is reset and/
or line XI is energized indicating that the telephone set is in "off
hook" status.
Latch Ll is reset by the output signals from AND gate 66. AND
gate 66 receives inputs from the pulses coming from RTGl and the in-
verted signals (inverter 67) coming from the output of AND gate 60.
The pulses coming from RTGl are adapted to reset latch Ll and, there-
fore, to stop the ringing current when the voltage goes to zero. The
inverted output of AND gate 50 is adapted to reset the latch3 and,
therefore, to stop the ringing current either when the calling-sub-
scriber has replaced his handset (signal Y is removed) or when the
FR9-76-016 - 16 -

S~L
called-subscriber has removed his handset (signal TD is applied), or
when a misoperation appears (signal LP is applied).
Figure 6b illustrates the signals which appear on the lines oF the
circuits shown in figure 6a when the ringing current has been sent and
the calling-subscriber replaces his handset before the called-party has
answered.
Figure 6c illustrates the signals which appear on lines of the
circuits shown in figure 6a when the ringing current has been sent with
the called party removes his handset.
Ringing Phase Protection Circuit PR (figures 7a, 7b)
This unit comprises:
integrator INT2 which receives the ringing control
signal RG and lOOms-delays the removal of this signal,
logic inverter 70 which also receives signal RG.
AND gate 71 which receives the output signals of inte-
grator INT2 and inverter 70, respectively.
Inverter 72 which receives the output signal of AND
gate 71 and produces ringing protection signal PR.
Figure 7b illustrates the logic signals which appear on the outputs
of these various logic elements with respect to signal R~.
It can be observed that, when the ringing current stops line PR is
de-energized for lOOms. Since this line is combined, through AND gate
31 (figure 3), with line AB which comes from loop current detector LCD,
it results therefrom that the output Xl oF said gate 31 and, consequently,
lines X2 and X (figure 3), will be de-energized during the same period
of time. The purpose of this momentary de-energization of line X when
the ringing current stops is to enable the line and telephone set capa-
citances to discharge through the feed resistor without disturbing
detection at the loop current level.
Line Protection Circuit LP (figures 8a, 8b)
,
With this control, it is possible to detect and handle two types of
misoperations, grounding of wire"b" when the line is idle, and
FR9-76-016 - 17 -

6~:~
1 grounding of wires "a" and "b" when the ringing current is being sent.
First Case: When wire "b" is grounded while the line is idle,
detector DB is energized. If after a 50ms-period has elapsed as de-
termined by integrator INT3 (in order to get rid of the noise signals of
short duration), detector DB is still energized, the output line LP of
the line protection logic unit operates the control of relay SBC (figure
3). This disconnects feed resistor RB (which is of small value, say in
the order of 300 , for instance) and passes current through resistor R5
(which is of high value, in the order of lOk , for instance). Therefore,
the value of the current is substantially reduced, and the circuit is
protected.
; The signal coming from LP is produced by the output of A~D gate 80
the inputs of which receive:
- the output of integrator INT3 (positively going signal DB
50ms-delayed),
; - signal DB (not delayed),
- signal XI inverted (inverter 81). The first two inputs are
characteristics of the "time-duration of signal DB is longer !
than 50ms" condition; the third input is a characteristic
of the idle status of the telephone line.
Second Case: When both wires "a" and "b" are grounded while the
ringing current is being sent, detector DA is ground-short-circuited,
and only detector DB is energized. Thus, in ringing phase, detector DA
is never energized. This condition is met through the output of AND
gate 82 which receives signal Y (which is present during ringing), and
inverted output (inverter 83) of detector DA.
The output of AND gate 82 drives integrator INT3 through OR gate 84
(which is also driven by line DB). When the signal appearing at the
output of OR gate 84 is longer than 50ms (still in order to get rid of
the noise signals of short duration), line LP is fed.
FR9-76-016 - 18 -
., .

6~i~
1 In both types of misoperation, line LP will inhibit the ringing
control tsee figures 3 and 6a). In the first case, it will prevent
the ringing current from being sent and, in the first case, will stop
it.
Figure 8b, is a schematic diagram of the logic waveforms at dif-
ferent points o-f the logic shown in figure 8a For the two types of
misoperation just described.
Trip Detector T (figures 9a, 9b, 9c)
The general principle of the "off hook" or "trip" detection
during ringing has been disclosed above with reference to figures 1,
2a and 2b. Figure ga shows details of the logic to produce the "trip"
detection signal TD.
AND gate 90 detects when the signals coming -from Xl (i.e., detec-
tors DA and DB are simultaneously energized) and RTG2, are coincident.
This detection is memorized in latch L2 (input 5) which is reset when
the current stops being sent (signal RG inverted by inverter 91).
AND gate 92 detects when the following conditions are simultaneous-
ly met:
detectors DA and DB are simultaneously energized (input
connected to line Xl),
- the signals of detectors DA, DB and signal RTG2 have been
previously detected as being coincident (input connected
to output Q of latch L2),
:
- pulse coming from RTGl.
This detection, as seen above with reference to figures 1 and 2a,
is a characteristic of the called-subscriber's "off hook" status
~ while the current is being sent. After the detection signal is passed
; through OR gate 93, it is memorized in latch L3 (direct input S) the
direct output Q of which produces the "trip" detection signal TD.
This signal TD is combined, through AND gate 32 (figure 3) with signal
Xl which comes from AND gate 31, in order to produce signal X2.
FR9-76-016 - 19 -

6S~
1 At the end of each call, latch L3 must be reset in order to be
ready to detect next "off hook" status during ringing. Therefore,
its reset input R is connected to the output of inverter 95 the in-
put of which receives signal Y to reset latch L3 each time the sub-
scriber's loop is disconnected from the switching network.
The "off hook" status outside the ringing time-period is detected
by AND gate 96. AND gate 96 rPceives inputs from line Xl (DA and DB
are both energized) and inverter 91 ~no ringing). This status is
directly transmitted to the output TD of the "trip" detector, through
10 OR gates 93 and 940
Figure 9b illustrates the logic waveforms which appear at points -
of the circuits shown in figure 9a, when a capacitive impedance tele-
phone set is concerned. Figure 9c illustrates the signals which appear
at the same points when a self impedance telephone set is concerned.
The preceding description has only been given as an example and
numerous alternatives may be considered without departing from the
spirit and scope of this invention~
' ':
FR9-76-016 - 20 -

Representative Drawing

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Administrative Status

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Event History

Description Date
Inactive: Expired (old Act Patent) latest possible expiry date 1998-05-05
Grant by Issuance 1981-05-05

Abandonment History

There is no abandonment history.

Owners on Record

Note: Records showing the ownership history in alphabetical order.

Current Owners on Record
INTERNATIONAL BUSINESS MACHINES CORPORATION
Past Owners on Record
DANIEL REYNES
JEAN-CLAUDE GRANGE
JEAN-PIERRE SUZZONI
NGHIEM TU
PHILIPPE HERNANDEZ
Past Owners that do not appear in the "Owners on Record" listing will appear in other documentation within the application.
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Document
Description 
Date
(yyyy-mm-dd) 
Number of pages   Size of Image (KB) 
Cover Page 1994-03-14 1 17
Drawings 1994-03-14 12 248
Claims 1994-03-14 9 262
Abstract 1994-03-14 1 24
Descriptions 1994-03-14 19 701