Note: Descriptions are shown in the official language in which they were submitted.
'11~5~5
1 The invention relates to flash arrangements, especial-
ly those used to fix a fusible toner on copying material in an
electrophotographic copying machine. Such flash arrangements comprise
a flash discharge lamp, a flash capacitor operative for accumulating
energy which is to be discharged through the lamp, and a charging
circuit for the flash capacitor which includes a charging resistor
and an electronic charging switch used to interrupt the charging
current.
It is known to provide a charging resistor of low
resistance in the charging current path for the energy-storing flash
capacitor, in order to assure that charging of the flash capacitor
occurs quickly. Often, a charging switch is incorporated in the
charging current path, to interrupt the charging current, so that
charging current will not be furnished to the capacitor during a
time interval commencing shortly before a flash discharge operation
and ending shortly after the completion of the flash discharge opera-
tion, in order to prevent the prolongation of the flash discharge
operation which would result if the capacitor were supplied with
charging current during the discharge operation itself.
This type of known arrangement~is not suitable when
very quick charging of a capacitor of high energy-storing capacity
is required. At the start of the charging of the uncharged capacitor,
the low impedance afforded by the low-resistance charging resistor,
results in an exceedingly high initial draw of charging current from
the voltage source. If the voltage source is, for example, simply
the electrical system of an office in which a copying machine pro-
vided with such a flash arrangement is being used, the initial draw
of charging current from the electrical system of the office will
make itself felt in all electrical devices powered by the electrical
system. The loading of the electrical system during the initial flow
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1 of charging current is further increased due to the very con-
siderable heat-dissipation energy loss resulting from the flow of
the initial spike of charging current through the low-resistance
charging resistor.
It is a general object of the invention to provide a
flash arrangement of the type in question, but of such a design that
flash capacitors of high energy-storing capacity can be quickly
charged without abruptly loading the electrical system employed by
drawing therefrom high-magnitude spikes of charging current.
According to one concept of the invention, the above
object is achieved by powering the flash arrangement from a source
of periodic voltage, periodically rendering the electronic charging
switch conductive, and varying the firing angle of the charging
switch relative to the periodic voltage in automatic dependence upon
the instantaneous voltage of the flash capacitor.
Advantageously, during the course of the charging of
the flash capacitor, the firing angle of the electronic charging
switch is progressively decreased, each decrease being dependent
upon the increasing voltage across the capacitor being charged. As
a result of the progressive decrease of the firing angle, the ampli-
tude of the portion of the periodic voltage transmitted through the
charging switch to the capacitor to be charged, becomes progressively
greater. Inasmuch as the voltage across the capacitor itself is mean-
while becoming progressively greater, the effective value of the
charging voltage remains substantially constant. As a result, the
amplitudes of the successive charging-current pulses are at least
approximately the same, so that the loading of the electrical system
powering the flash arrangement will be maintained quite uniform and
at an acceptable level during the entirety of the charging operation.
The firing angle of the charging switch is preferably
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1 varied using a comparator and a feedback voltage from the capacitor
being charged. One input of the comparator receives the feedback
voltage. The other comparator input receives a ramp voltage which
is synchronized with the periodic voltage from the electrical
system (e.g., the A.C. voltage of an office electrical system). When
the comparator detects coincidence between its two input signals,
it furnishes an output signal which causes the charging switch to
become conductive.
According to another concept of the invention, the
charging impedance used to limit the charging current drawn by the
flash capacitor is provided in the form of a reactive impedance,
preferably a choke comprised of a low-resistance coil wound with an
air gap around an~iron core. ThiS expedient serves, on the one hand,
to avoid the heat-dissipation energy loss resulting from the use of
a resistive charging impedance and serves, on the other hand, to
further reduce the loading on the electrical system.
The novel features which are considered as character-
istic for the invention are set forth in particular in the appended
claims. The invention itself, however, both as to its construction
and its method of operation, together with additional objects and
advantages thereof, will be best understood from the following de-
scription of specific embodiments when read in connection with the
accompanying drawing.
FIG. 1 is a schematic block circuit diagram of an
exemplary embodiment of the invention; and
FIG. 2 is a wave and pulse diagram illustrating the
operation of the circuit of FIG. 1.
In FIG. 1, numeral 12 denotes a flash discharge lamp
used to fix fusable toner on copying material in an electrophoto-
graphic copying machine. The negative (lower) terminal of a flash
1 capacitor 8 and the positive (upper) terminal of a flash capacitor
9 are connected by a conductor 30. The positive terminal of capa-
citor 8 is connected by conductors 5, 13 to the upper main electrode
of flash discharge tube 12; the lower terminal of capacitor 9 is
connected by conductors 7, 14 to the lower main electrode of
discharge tube 12. Two diodes 10, 11 are connected in respective
branches 4, 6, and the latter are connected in common to a line 1
which includes a charging switch in the form of a triac 3, a
charging impedance 2 in the form of a non-resistive choke comprised
of a coil wound with an air gap around an iron core, and the line 1
is connected to the upper terminal of the voltage source. The lower
terminal of the A.C. v~ltage source is connected, via a line 31,
to the junction between capacitors 8 and 9.
The trigger electrode 19 of flash discharge lamp 12
receives a trigger voltage pulse via line 18 from a trigger circuit .. ;?
17. The latter is activated by a control signal on line 16, which
latter is connected to the unstable-state output of a monostable r
circuit 15, in turn triggered via a trigger line 27.
Charging triac 3 is rendered conductive by a firing-
angle control circuit 20 (e.g., SGS-ATES, IC component type L 120).
Firing-angle control circuit 20 includes a comparator 21, an AND-
gate 24 and a trigger-pulse generator 25. A sawtooth voltage gene-
rator 22 applies to the upper input of comparator 21 a sawtooth
voltage synchronized with the A.C. voltage from the A.C. source. A
feedback stage 32 applies to the lower input of comparator 21 a
voltage dependent upon the instantaneous voltage across flash capa-
citor 9. The input of feedback stage 32 is connected via a line 23
to the line 30 joining capacitors 8 and 9.
The output of comparator 21 is connected to the upper
input of AND-gate 24, the lower input of which is connected to the
5~S
1 stable-state outPUt of monostable circuit 15. The output of AND-
gate 24 is connected to the input of trigger pulse generator 25.
The output of the latter is connected via a line 26 to the firing
electrode of triac 3.
The operation of the illustrated circuit is as follows:
The charging of the flash capacitors 8, 9 is effected
by the periodic voltage from the voltage source, through the inter-
mediary of rectifier diodes 10, 11, on a voltage-doubler basis. The
air-gap iron-core choke 2 connected in the charging circuit serves
as a non-resistive (reactive) current-limiting impedance, and
therefore produces no heat-dissipation energy loss such as would be
involved if a resistive current-limiting impedance were employed.
The flow of charging current is regulated via the
triac 3, the latter being controlled by means of the firing-angle
control circuit 20 in dependence upon the increasing voltage across
the flash capacitors.
During positive half-cycles of the A.C. voltage,
charging current flows through choke 2, triac 3 and diode 10 into
the upper electrode of capacitor 8, and out of the lower electrode
of capacitor 8 through line 31 to the lower terminal of the A.C.
voltage source. During negative half-cycles of the A.C. voltage,
charging current flows out of the lower terminal of the A.C. voltage
source, through line 31, into the upper electrode of capacitor 9,
out of the lower electrode of capacitor 9, through diode 11, and
through triac 3 and choke 2 to the upper terminal of the A.C. voltage
source. Thus, the two capacitors 8, 9 are charged during alternate
half-cycles.
Attention is directed to FIG. 2.
The three half-cycles shown in line (a) are the
(negative) half-cycles of the A.C. voltage, used to charge capacitor
~ s
1 9. For the sake of simplicity, the voltage half-cycles used to
charge capacitor 8 are not depicted.
Line (b) of FIG. 2 depicts the ramp voltage V22
generated at the output of unit 22. As can be seen, the zero-value
point of the ramp voltage V22 is synchronized with the zero-through-
pass of the A.C. voltage from the source. The ramp-voltage cycles
shown in broken lines are not involved in the charging of capacitor
9, but instead in the charging of capacitor 8, and are shown merely
for the sake of orientation.
The ramp voltage V22 is applied to the upper input of
comparator 21, the lower input receives the output voltage V32 from
feedback unit 32. When, during the course of a half-cycle, the value
of the ramp voltage V22 reaches the value of the feedback voltage ~;~
V32, the comparator 21 produces an output signal. This signal is
transmitted through the AND-gate 24 (which is in gated condition), r
and applied to the trigger pulse generator 25. The latter furnishes,
via line 26, a trigger pulse which renders triac 3 conductive.
During the first half-cycle depicted in FIG. 2, the
ramp voltage V22 reaches the value of the feedback voltage V32 at
moment A. At this moment, the value of the feedback voltage V32 is
V32 ~ as indicated in line (b) of FIG. 2. Thus, at moment A, the
triac 3 becomes conductive. As can be seen, during this first half-
cycle, with the voltage across capacitor 9 initially near zero, the
moment A at which triac 3 is fired occurs rather late in the half-
cycle; i.e., the firing angle (the angular portion of the half-cycle
prior to the firing moment A) is relatively large. Accordingly,
triac 3 is rendered conductive at a point in the half-cycle when the
magnitude of the voltage half-cycle is relatively low. As a result,
the almost completely uncharged capacitor 9 is now charged by a
relatively low charging voltage. When the voltage across capacitor 9,
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1 during this first charging half-cycle, approaches the charging
voltage itself, the voltage across triac 3 and the current there-
through become too low to maintain conduction: accordingly, triac 3
becomes non-conductive, at the moment denoted by A' in FIG. 2.
At the start of the second voltage half-cycle for
capacitor 9, the voltage across the capacitor is now somewhat higher.
Accordingly, for reasons explained below,the feedback voltage V32
is now somewhat lower. As a result, the ramp voltage V22 becomes
equal to the feedback voltage V32 somewhat earlier in the second
half-cycle than in the first half-cycle, and in particular at moment
B; at this moment the value of the feedback voltage V32 is V32
Accordingly, the firing angle of triac 3 has now been decreased;
i.e., triac 3 is fired sooner within this half-cycle. When triac 3
is fired at moment B, the magnitude of the charging voltage is some-
what higher than at moment A in the first half-cycle. However, the
actual voltage across capacitor 9 is also somewhat higher, because
capacitor 9 was charged during the first half-cycle. Accordingly,
the effective charging voltage (approximately equal to the differ-
ence between the magnitude of the charging voltage at moment B and
the voltage across capacitor 9) is substantially the same for the
second half-cycle as for the first half-cycle. Accordingly, the
charging current drawn during the second half-cycle is substantially
the same as that drawn during the first half cycle. When the voltage
across capacitor 9, during this second charging half-cycle, becomes
approximately equal to the charging voltage itself, the triac 3
again becomes conductive, at the moment denoted by B' in FIG. 2.
For the third charging half-cycle for capacitor 9 shown
in FIG. 2, the sequence of events is substantially the same as before.
However, because the voltage across capacitor 9 is now higher, due
to the charging during the second half-cycle, the triac 3 is fired
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(at moment C) still earlier in the half-cycle; i.e., the firing angle of
the triac has been made still smaller. Accordingly, the magnitude of the
charging voltage pulse applied to capacitor 9 is higher, but because the
capacitor voltage itself is higher, the effective magnitude of the charging
pulse is substantially the same as before.
The feedback voltage V32 is depicted in line (d) of FIGURE 2.
As can be seen, prior to the first charging of capacitor 9, the value of
voltage V32 is relatively high, i.e., so high that the ramp voltage V22
does not reach this value until relatively late in the half-cycle (at moment
A). Then, during the first charging of capacitor 9 (from time A to time A'),
the feedback voltage V32 decreased by an amount proportional to the increase r
in the voltage across capacitor 9. Accordingly, during the second half-
cycle, the ramp voltage V22 reaches the now lower value of the feedback
voltage V32 earlier in the half-cycle (at moment B). Then, during this
second charging of capacitor 9 (from time B to time B'), the feedback
voltage V32 decreases by an amount proportional to the increase in the
voltage across capacitor 9. The same applies to the third charging half-
cycle.
The relationship between the feedback voltage V32 and the actual
voltage across capacitor 9 can be seen with respect to the wave diagrams
in lines (c) and (d) of FIGURE 2.
The input of feedback unit 32 is connected, via feedback line
23, to the lower terminal of capacitor 9. It is assumed, for simplicity,
that the junction between capacitors 8, 9, connected via line 31 to the
lower terminal of the A.C. voltage source, is grounded. Accordingly, the
voltage V23 on feedback line 23 is negative with respect to ground, as
shown in line (c) of FIGURE 2, and is equal to the actual voltage across
the capacitor 9.
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1 This negative voltage V32 is applied to the input of
feedback unit 32. The latter includes a voltage divider and an im-
pedance converter. The impedance converter serves to prevent capa-
citor 9 from freely discharging into feedback unit 32. The voltage
divider within feedback unit 32 serves to produce a negative voltage
equal to a small fraction of the negative voltage V23, and pro-
portional thereto. This is, in general, necessary, because the
voltage across capacitor 9 will be much larger than should be applied
to the comparator 21. Finally, feedback unit 32 adds to this pro-
portional negative voltage a positive base voltage. The magnitude of
the positive base voltage is such that, no matter how larger the
negative voltage V23 becomes, the output voltage V32 will always be
positive.
The variation in the feedback voltage V32 is depicted
in line (d) of FIG. 2. Prior to moment A, the voltage across
capacitor 9 is zero or near zero. Accordingly, the component of
feedback voltage V32 proportional to the negative capacitor voltage
is substantially zero, and the feedback voltage V32 therefore consists
almost entirely of the pOSitLVe base-voltage component thereof.
As the capacitor 9 is charged between times A and A'
within the first charging half-cycle, its negative voltage increases
in magnitude. Accordingly, the negative component of voltage V32
increases, and voltage V32 becomes somewhat lower. For clarity, the
increase in the magnitude of the capacitor voltage, line (c), and
the decrease in the magnitude of the feedback voltage V32, line (d),
are shown to be approximately equal. However, as indicated above,
the amount by which voltage V32 decreases is equal to a small pro-
portional fraction of the amount by which the magnitude of the
negative capacitor voltage increases.
As capacitor 9 is charged further between times B and
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1 B' within the second charging half-cycle, its negative voltage
increases further in magnitude. Accordingly, the feedback voltage
V32 decreases by a proportional amount.
The same applies to the third charging half-cycle for
capacitor 9.
For simplicity, in the illustrated circuit, the feed-
back voltage V32 is dependent only upon the voltage across capacitor
9, even though it is also used to similarly control the firing of
triac 3 for the charging of capacitor 8, during the charging half-
cycles which alternate with those illustrated in line (a) of FIG.
2. This is an acceptable simplification~ because the desired prog-
ressive decrease of the triac firing angle, and the corresponding
progressive increase of the amplitude of the transmitted charging
voltage, will occur.
The AND-gate 24 connected between the comparator 21
and the trigger pulse generator 25 assures that the triac 3 can
only be rendered conductive when the monostable circuit 15 is in
its stable state. This will be the case during the charging of the
flash capacitors 8r 9. To trigger the discharge of flash discharge
lamp 12, a trigger signal is applied to the monostable circuit 15,
via trigger line 27. This trigger signal will be applied in syn-
chronism with the operation of the eIectrophotographic copying ma-
chine provided with the flash arrangement. When monostable circuit
15 is triggered, AND-gate 24 becomes disabled, thereby preventing
further charging of capacitors 8, 9. At the same time, a trigger
signal is furnished at the lower (unstable-state) output of circuit
15, and applied via line 16 to firing unit 17. The latter, in turn,
furnishes via line 18 a firing voltage pulse to the firing electrode
19 of the discharge lamp 12. After a time interval long enough to
allow for co~pletion of the flash operation, the monostable circuit
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15 reverts to its stable state, thereby again enabling AND-gate
24, and charging of capacitors 8, 9 is performed again.
It will be understood that each of the elements de-
scribed above, or two or more together, may also find a useful
application in other types of circuit configurations differing from
the types described above.
While the invention has been illustrated and described
as embodied in a flash arrangement including two flash capacitors
connected in voltage-doubler configuration, it is not intended to
be limited to the details shown, since various modifications and
structural changes may be made without departing in any way from
the spirit of the present invention.
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