Note: Descriptions are shown in the official language in which they were submitted.
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W. C. King 2
OPTICALLY COUPLED FIELD EFFECT
TRANSISTOR SWITC~
Background o~ the Invention
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1. Field of the In~ention
This invention relates generally to opto-isolators
and particularly to opto-isolators using an array of one or
more series-connected photodiodes to provide photovoltaic
control of affield effect transistor which need not itself
be photosensitlve.
2. Description of the Prior Art
Devices that transmit signals from an input
circuit to an output circuit electrically isolated from the
input circuit are of considerable commercial importance.
For many purposes, adequate electrical isolation is easily
ob~ained with electromechanical relays or isolation
transformers. These devices do, however, suffer the
drawbacks of being large and incompatible with much solid
state circuitry.
For these and other reasons, devices, commonly
called opto-isolators or opto-couplers, have been developed
that use optical rather than electrical coupling to link
two electrical circuits. These devices use a light source,
commonly a light emitting diodt, ~LED), located in the input
` circuit and a photodetector, located in the output circuit
and optically coupled to the light source, to couple the
two circuits. Current passing through the LED causes it to
emit light of which some is transmitted to the photo-
detector ~here it causes an output current to be generated.
The photodetector is typically a photodiode, a
^ 30 phototransistor or a photo SCR. Another type of photo-
detector which might be used is the photo-FET.
Although it has features, such as easily adjustable
optical sensitivity, a linear current-voltage characteristic
passing through the origin, and thermal stability, that are
35 desirable for the photodetectors used in opto-isolators, it
has not been used in opto-isolators.
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The reasons for the lack of use of photo-FET
detectors will be better understood if the operation of
optically sensitive FETs is briefly described. Optically
sensitive FETs typically obtain their optical sensitivity
Sby making the depletion region, established by reverse
biasing the gate--source junction, optically accessible,
i.e., by absorbing photons in the depletion region. The
reverse bias exceeds the pinch-off voltage and current
eannot flow through the ~FET. The photoinduced current
10generated by the separation of the constituents of
electron-hole pairs produced in the absorption process then
passes through an external resistance in the gate-source
circuit and changes the gate-source bias. The resulting
gate-source bias is less than the pinch-off voltage and the
' 15FET is turned on.
Several drawbacks of opto-isolators which might
use optically sensitive FETs are thus illustrated~ First,
commercially available photo~FETs are depletion mode FE~s
and a separate voltage source is required to reverse bias
~; 20the gate-source junction and thus turn the FET off.
Second, photo-FETs do not lend themselves to the
construction of normally~on opto-isolators. Third, the
photo-FETs do not lend themselves ~o easy construction of
bilateral opto-isolators which are desirable in many
25 applications since they ean be operated without regard to
the polarity of the applied voltage~
BilateraI opto-isolators~ e.g~, photo SCR~
connected anti parallel, which do not use FETs are
commercially available but have drawbacks. They have
30 nonlinear characteristics through the origin of their
~ output current-voltage curves and are thus unsuitable for
`, use as low level analog switches. l~dditionally, they are
latching devices and an additional voltage signal is
therefore required to return the switch to its initial
35 state.
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Summary of the Invention
In accordance with an aspect of the invention
there is provided an optically sensitive switch comprising:
a field effect transistor, said transistor having source,
gate and drain electrodes, said source and drain electrodes
S being connected to an electrical output circuit; a first
light source, said first light source being connected to
an electrical input circuit; and means for controlling the
current through said field effect transistor, said means
being optically coupled to said first light source;
characterized in that said means produces a voltage when
illuminated that controls said current through said field
effect transistor, said means comprises a first series
connected photodiode array, said array being connected
between said gate and source electrodes, and a resistance
connected between said gate and source electrodes, said
: resistance being less than that of said photodiode array
and large enough to not appreciably load said photodiode
array when said photodiodes are illuminated.
An optically sensitive switch using an FET and
which is useful in opto-isolators is obtained, in accord~nce
with this invention, by using the
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voltage developed by at least one series connected
photodiode array consisting of at least one illuminated
photodiode, connected between the gate and source of the
normally on depletion mode FET, to control the FET
Soperation. The number of series connected photodiodes in
the photodiode array is sufficient to produce a voltage,
when the array is illuminated, that exceeds the pinch-off
voltage and turns the FE'r off. If enhancement mode FETs
are used, the gate-threshol~ voltage is exceeded. when the
lOdrain and source of the FET are connected to an electrical
circuit and the pho~odiode array is illuminated by a light
source, such as an LED connecteâ to another electrical
circuit, a normally-on opto-isolator results.
An additional embodiment is a symmetric bilateral
15switch using at least two photodiode arrays and a depletion
mode FET. One photodiode array is connected between the
gate and the "source" and a second photodiode array is
connected between the gate and "drain" of the FET. Two
reverse polarity blocking diodes prevent the positive
20 "source" or "drain" voltages from coupling to the gate
through the forward biased photodiodes. The two photodiode
arrays may be illuminated by the same light source. The
bias established by either array will be sufficient to turn
off the FET.
Another embodiment achieves two levels of optical
control by using the optically sensitive F~T switch
described with an optically sensitive FET. One level of
` optical control is obtained as previously described and the
second level is obtained by using a second LED to
30 illuminate th~ optically sensitive portion of the FET and
control the current through the FET.
Brief Desrrl ~ n of_the Drawlngs
FIG. l i5 a schematic representation of a
conventional photosensitive FET;
FIG. 2 i5 a schematic representation of an
optically sensitive FET switch with optical sensitivity
provided by a series connected photodiode array, which is
illuminated by an LED light source, and ~s con~ected betwèen the
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FET gate and source;
FIG. 3 is a schematic representation of the
optically coupled symmetric bilateral switch; and
FIG. 4 is a schematic representation of the
5optically sensitive FET switch with two levels of optical
;` control.
Detailed Uescri~tion
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A conventional prior art n-channel depletion mode
photosensitive FET 1 is depicted in FIG. 1. The negative
lObias, indicated by the minus sign, is applied to the gate G
through resistance Rl and establishes a depletion reyion.
If the bias is sufficiently large, the normally conducting
drain-source channel vanishes and the FET no longer
conduc~s. If light, from a source not depicted but
~; 15represented by hv, now illuminates the depletion règion,
electron-hole pairs are generated as photons are absorbed.
The electric field in the depletion region separates the
electrons and holes and a current flows in the external
gate-source circuit. The resulting current flows through
~; 20 resistance Rl and establishes a bias, partially offsetting
the applied gate-source bias, and reducing the size of the
; depletion region. If the offsetting bias is sufficiently
large, current flows through the channel from the drain to
the source and the F~T is turned on.
The optically sensitive F~T switch of this
invention is schematically represented in FIGo 2. The
drain and source electrodes of the normally on n-channel
depletion mode FET 3 are connected to an electrical output
circuit (not shown). The gate bias, controlling the size
30 of the depletion region and the current through the FET, is
provided by a series connected photodiode array 7 having at
least one photodiode connected between the gate and source
of the FET. Photodiode, as used here, means any light
sensitive semiconductor device. The number of photodiodes
35 is determined by the requirement that when the photodiodes
are illuminated/ ~he voltage developed by the pho~odiodes
is at least equal to the pinch-off voltage. As no external
gate-source bias o~her than that produced by the
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photodiodes is applied to the FET, it is normally
conducting. The light source depicted is LED 5 which is
`, connected to an electrical input circuit (not shown).
Some of the photons emitted by the LED are
sabsorbed by the photodiodes and if the voltage developed
between the gate and source exceeds the pinch-off voltage,
the FET turns off. As the FET is connected to an
electrical output circuit, the entire system operates as an
; optically coupled electrical switch.
The switch described has limited switching speed
characteristics. Before the FET can be turned off, its
; input capacitance must be charged by the current produced
by the photodiodes. The time required to charge the input
capacitance will depend upon the intensity of the
~- 1sillumination of the photodiodes and their efficiency. When
the illumination of the photodiodes is interrupted, the FET
input capacitance must discharge before the FET can turn
on. The available paths, the reverse biased gate-channel
junction and the photodiode array, both constitute high
20impedance paths. The result is a relatively long time
constant which can be reduced by shunting the photodiodes
~ with resistance R2 which is connected in parallel with the
`~ photodiode array between the gate and source. The value of
R2 must be large enough to not appreciably load the
25 photodiodes when the photodiodes are illuminated and small
enough to have an impedance which is small when compared to
that of the photodiode array or the reverse biased gate-
source junction.
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~n additional embodiment of the optically
30 sensitive switch is the optically coupled symmetric
bilateral switch schematically depicted in FIG. 3. There
are two photodiode arrays which control the FETo Array 15
has one or more series connected photodiodes and is
l connected between the gate and source of n channel
-;~ 35 depletion mode FET 9 through series connected rèverse
~, polarity blocking diode D2 and array 13 has one or more
~ series connected photodiodes and is connected between the
i gate and drain through series connected reverse polarity
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blocking diode Dl. Large value, typically .~egohm,
resistances R3 and ~ may be connected between the gate and
drain and gate and source, respectively, of FET 9 and serve
; the same function as does resistance R2. The drain and
5source of FET 9 are connected to an electrical output
circuit and light source 11 is connected to an electrical
input circuit. Considerations similar to those discussed
with respect to the embodiment shown in FIG. 2 determine
the number of photodiodes in each array, i.e., the voltage
; lOproduced must at least equal the pinch-off voltage when the
arrays are illuminated. The arrangement shown is symmetric
with respect to the drain and source of the FET and
consequently the switch can be operated with either
polarity of voltage applied between the drain and source.
15Either resistance ~3 or R4 may be omitted, i.e., a single
resistance connected between the gate electrode and either
the source or drain electrode may be used, while retaining
the voltage polarity symmetry if symmetric switching times
are not required.
The depletion mode FET depicted is normally on
regardless of the drain-source polarity. The operation of
the switch, which may be used as an opto-isolator, is
similar to that of the switch in FIG. 2. When LED 11 is
turned on by current flowing in the electrical input
25 circuit~ light is emitted and falls on both photodiode
arrays. If the "drain" is positive with respect to the
"source", array 15 establishes a negative gate bias, with
respect to the source, that exceeds the pinch-off voltage
and FET 9 is tuened off. Divde Dl prevents the positive
30 drain voltage from coupling to the gate through the forward
biased photodiode array 13 and negating the negative bias
established at the gate by array 15~ When LÉD 11 is on and
the drain-source polarity is the reverse of that described,
array 13 establishes a negative ga~e bias that exceeds the
35 pinch-off voltage and FET 9 is turned off. Diode D2
prevents the positive source voltage from coupling to the
gate through forward biased array 15 and thereby negating
the negative bias established at the gate by array 13. The
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entire system operates as an optically coupled electrical
switch that is symmetric with respect to the voltage
applied between the drain and source. Resistances R3 and
R4 shunt the photodiode arrays to discharge the FET
scapacitance and decrease the switching time. The
magnitudes of R3 and R4 are comparable to that of R2.
R3 need not equal R~ if symmetric switching times are not
required.
An additional embodiment achieves two levels of
1optical control through the arrangement schematically shown
in FIG. 4. The n-channel depletion mode FET 17, photodiode
array 23 and LED 21 function as the optically sensitive
-~ switch previously described and shown in FIG. 2. LRD 19
and E`ET 17, which is now optically sensitive, function as a
; 15conventional photosensitive FET switch shown in FIG. l.
The optically sensitive FET is on when LED 21 is off. ~hen
LED 21 is on, the FET is off when LED 19 is off and is on
~ when LE~ l9 is on. LED l9 provides control in this
- embodiment in a manner similar to the light~sourc~J e.g. LED in the
20conventional photosensitive ~ET switch. A bias is
developed across the gate resistor R5 by the current
flowing in the external circuit which is generated by
photons absorbed in the depletion region.
The design parameters that must be considered are
25well known. For example, photodiode collection area,
efficiency, illumination intensity and number of the
photodiodes are related to the time required to turn the
FET off. Additionally, after the LED is turned off, the
time constant associated with the dischar~e of the ~ate-
30 source capacitance through the shunt resistance (if used~and the large impedance of the pho~o~iode array and reverse
gate-source junction are related to the time required for
~ the FET to ~urn on. In general, minimum switching times
,~ are obtained in saturated switching with large LED
35 currents, i.e., high photodiode array currents, low
; ~unction capacitances and low shunt resistances.
:~ff Variations in and relationships between shunt resistances,
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load re~istance, photodiode curren~, number of photodiodes,
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photodiode voltage, FET pinch-off voltage and switcning
speeds are well-known to persons working in the field and
need not be described in more detail.
As an example of switching speeds and other
sparameters to be expected in practicer the response of the
switch of FIG. 2 having a transconductance of approximately
; 32~00 umhos was measured. The pinch-off voltage of the FET
was 2.5 volts and the self pinch-off current (VGs = 0) was
llO mA. R2 was 470,000 ohms, the supply voltage was
1010 volts and the load resistance was lO00 ohms. With a
GaAlAs LED current of lO mAdc, the saturated switching
response of an array having three series connected GaAlAs
; LEDs operated as photodetectors was observed to have a
total turn~off time oE approximately 50 microseconds, and
15total turn-on time of approximately 50 microseconds.
Although the invention has been described with
embodiments using n-channel depletion mode FETs which
result in normally on switches and opto-isolators, the
invention may also be used with p-channel depletion mode
20FETs if the polarities of the photodiode arrays and the
blocking diodes are reversed. n-channel or p-channel
enhancement mode FETs may also be used. With enhancement
mode FETs, the photodiode array must produce a voltage that
exceeds the gate-threshold voltage. These will result in
25 normally off switches and opto-isolators and the polarity
of the diode array will be the reverse of that described
for the n-channel depletion mode FETS. The symmetric
switch using enhancement mode FETs is useful only for small
values of drain-source voltage. The resistances act as a
30 voltage divider and the gate-source or gate-drain voltage
` produced by the voltage divider must be less than the
gate-threshold voltage of the FET.
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