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Patent 1123225 Summary

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(12) Patent: (11) CA 1123225
(21) Application Number: 1123225
(54) English Title: COMPENSATED CAPACITIVE TRANSDUCER DEMODULATOR CIRCUIT
(54) French Title: METHODE DE COMPENSATION POUR COMBINE DEMODULATEUR-TRANSDUCTEUR CAPACITIF
Status: Term Expired - Post Grant
Bibliographic Data
(51) International Patent Classification (IPC):
  • G01R 27/26 (2006.01)
  • G01D 05/241 (2006.01)
  • G01L 09/00 (2006.01)
  • G01L 09/12 (2006.01)
(72) Inventors :
  • LEE, CHEN Y. (United States of America)
(73) Owners :
(71) Applicants :
(74) Agent: MACRAE & CO.
(74) Associate agent:
(45) Issued: 1982-05-11
(22) Filed Date: 1979-01-16
Availability of licence: N/A
Dedicated to the Public: N/A
(25) Language of filing: English

Patent Cooperation Treaty (PCT): No

(30) Application Priority Data:
Application No. Country/Territory Date
878,056 (United States of America) 1978-02-15

Abstracts

English Abstract


ABSTRACT OF THE DISCLOSURE
A compensation technique and network circuitry for a
quad-diode demodulator and capacitive transducer combi-
nation is disclosed. The compensation method includes
varying the amplitude of An alternating carrier frequency
oppositely to the changes produced in that amplitude by
the compensable errors in the demodulator and transducer.
In one preferred embodiment ratiometric compensation and
temperature compensation for the demodulator and any
capacitive transducer is produced. In a second
embodiment linearization and temperature compensation
for the demodulator and a quartz capacitive transducer is
provided.


Claims

Note: Claims are shown in the official language in which they were submitted.


-22-
1. A capacitive transducer and demodulator combi-
nation circuit comprising:
a capacitive transducer for measuring the
variances of a physical parameter, said transducer
adapted to transform the variances into changes of
capacitance of the transducer;
8 frequency generator means for supplying an
alternating carrier voltage;
a quad-diode demodulator electrically
connected to receive from said frequency generator means
the alternating carrier voltage and further connected to
said transducer such that the changes in capacitance
modulate said carrier, said demodulator detecting said
carrier and generating an output voltage signal represen-
tative of the variances in the measured physical
parameter; and
compensation network means, electrically con-
nected to said frequency generator, for varying the
amplitude of the carrier voltage oppositely to the
amplitude changes in the output signal produced by the
compensable errors of the demodulator and transducer.
2. A capacitive transducer and demodulator combi-
nation circuit as defined in Claim 1 wherein said compen-
sation network means includes:
means for providing ratiometric compensation
for the ratiometric error of said quad-diode demodulator.
3. A capacitive transducer and demodulator combi-
nation circuit as defined in Claim 2 wherein said compen-
sation network means includes:
means for providing temperature compensation
for the temperature error of said quad-diode demodulator.

-23-
4. A capacitive transducer and demodulator combi-
nation circuit as defined in Claim 3 which further
includes:
ratiometric offset means for adjusting the zero
point of said capacitive transducer with a ratiometric
voltage.
5. A capacitive transducer and demodulator combi-
nation circuit as defined in Claim 4 which further
includes:
amplification means for the linear amplifi-
cation of the output voltage signal of the demodulator.
6. A capacitive transducer and demodulator combi-
nation circuit as defined in Claim 1 wherein said compen-
sation network means includes:
voltage follower means for generating the power
supply voltage of said frequency generator means where
said power supply voltage is generated as the algebraic
combination of an input supply voltage and a compensation
voltage, said power supply voltage increasing or
decreasing in response to changes in said compensation
voltage.

-24-
7. A capacitive transducer and demodulator combi-
nation circuit as defined in Claim 6 wherein said voltage
follower means includes:
a differential amplifier with an inverting input and non-
inverting input further having an output terminal connected to the
control terminal of a variable impedance device, said impedance device
connected between a reference supply voltage and a power supply node of
said frequency generator; said amplifier having the input
supply voltage connected to said non-inverting input and
the variable compensation voltage developed by feedback
circuitry connected between the power supply node and the
inverting input of said amplifier;
said impedance device controlled by the output
of said differential amplifier to change the voltage at
the power supply node in response to the amplifier
balancing the non-inverting and inverting inputs.
8. A capacitive transducer and demodulator combi-
nation circuit as defined in Claim 7 wherein said feed-
back circuitry includes:
a pair of first and second signal diodes with
characteristic response curves substantially identical
to the diodes of said demodulator; the anode of the first
diode connected to the power supply node and the cathode
of the first diode connected to the anode of the second
diode which has its cathode connected to the inverting
input of said amplifier; and a variable resistance
connected between the inverting input and ground for
adjusting the current flow through the diodes.

-25-
9. A capacitive transducer and demodulator combi-
nation circuit as defined in Claim 8 wherein:
said input supply voltage is developed as a
ratiometric voltage in reference to a relatively
unregulated supply voltage.
10. A capacitive transducer and demodulator combi-
nation circuit as defined in Claim 1 wherein said
capacitive transducer is a quartz capacitive pressure
transducer.
11. A capacitive transducer and demodulator combi-
nation circuit defined in Claim 10 wherein said compen-
sation network includes:
means for providing temperature compensation
for the temperature error of said quartz capacitive
transducer.
12. A capacitive transducer and demodulator combi-
nation circuit as defined in Claim 11 wherein said
compensation network includes:
means for providing linearization compensation
for the linearity error of said quartz capacitive
transducer.
13. A capacitive transducer and demodulator combi-
nation circuit as defined in Claim 12 which includes:
ratiometric offset means for adjusting the zero
point of said quartz capacitive transducer with a
ratiometric voltage.

-26-
14. A capacitive transducer and demodulator combi-
nation circuit as defined in Claim 13 which includes:
amplification means for the linear amplifi-
cation of the output voltage signal of the demodulator.
15. A capacitive transducer and demodulator combi-
nation circuit as defined in Claim 14 which includes:
filter means electrically connected to the
output of said amplification means for providing high
frequency and noise attenuation to the amplified output
voltage of said demodulator.

16. A capacitive transducer and demodulator combi-
nation circuit comprising:
a capacitive transducer for measuring the variances
of a physical parameter and for transforming the variances into
changes in capacitance of the transducer, wherein said trans-
ducer has a variable capacitor Cp which changes capacitance
with respect to the physical variable and a reference capaci-
tor Cr which is substantially unchanging with respect to the
physical parameter;
a quad-diode demodulator electrically connected to
the capacitive transducer and electrically connected to a
frequency generator means for supplying an alternating carrier
voltage such that the carrier voltage is modulated and detected
to generate an output voltage signal representative of the
variances in the measured physical parameter, said demodulator
having a voltage transfer function of:
<IMG>
where Vdc is said output voltage signal, Vp is the voltage
amplitude of said alternating carrier voltage, and Vd is the
voltage drop across one of the diodes of said demodulator; and
compensation network means, electrically connected
to said frequency generator, for varying the amplitude of the
carrier voltage oppositely to the amplitude changes in the
output signal produced by the compensable errors of the demodu-
lator and transducer.
27

17. A capacitive transducer and demodulator
combination circuit as set forth in Claim 16 wherein:
said compensation network means is connected to the
power supply of said frequency generator means and provides a
supply voltage Vb which is given by the function:
Vb = Va + 2Vd
where Vb is the peak-to-peak amplitude of the frequency
generator carrier voltage and, equal to 2Vp, Va is the voltage of a
reference supply, and Vd is equivalent to the voltage drop
across one of the diodes of said demodulator; said term 2Vd
cancelling an identical term in the voltage transfer function
of the demodulator to compensate for the varying character-
istics with respect to temperature of the diodes of said
demodulator.
18. A capacitive transducer and demodulator com-
bination circuit as set forth in Claim 17 wherein:
said reference supply voltage Va is a ratiometric
function of an input supply voltage Vin and said term 2Vd
cancels an identical term in the voltage transfer function of
the demodulator to compensate for the ratiometric error of the
combination circuit caused by the diodes of said demodulator.
19. A capacitive transducer and demodulator combi-
nation circuit as set forth in Claim 18 further including:
ratiometric offset means for adjusting the zero point
of said capacitive transducer with a ratiometric voltage which
is a function of Vin.
28

20. A transducer and demodulator combination cir-
cuit comprising:
a transducer for measuring the variances of a
physical parameter, said transducer adapted to transform the
variances into changes of impendance of the transducer;
a frequency generator means for supplying an alter-
nating carrier voltage which is a ratiometric function of an
input supply voltage;
a demodulator electrically connected to receive from
said frequency generator means the alternating carrier voltage
and further connected to said transducer such that the changes
in impedance modulate said carrier, said demodulator detecting
said carrier and generating an output voltage signal representa-
tive of the variances in the measured physical parameter; and
compensation network means for varying the amplitude
of the carrier voltage oppositely to the amplitude changes in
the output signal produced by the compensable errors of the
demodulator and transducer wherein said compensation network
means includes means for providing ratiometric compensation
for the ratiometric error of said demodulator.
21. A transducer and demodulator combination circuit
comprising:
a transducer for measuring the variances of a
physical parameter, said transducer adapted to transform the
variances into changes of impedance of the transducer;
a frequency generator means for supplying an alter-
nating carrier voltage;
a quad-diode demodulator having a voltage transfer
function relatively independent of carrier waveform and fre-
quency electrically connected to receive from said frequency
generator means the alternating carrier voltage and further
29

connected to said transducer such that the changes in im-
pedance modulate said carrier, said demodulator detecting
said carrier and generating an output voltage signal represent-
ative of the variances in the measured physical parameter;
and
compensation network means, electrically connected
to said frequency generator, for varying the amplitude of the
carrier voltage oppositely to the amplitude changes in the
output signal produced by the compensable errors of the demodu-
lator and transducer.

Description

Note: Descriptions are shown in the official language in which they were submitted.


~Z3Z2~ii
--2--
.,
BACKGR~UND OF THE INV~NTION
l. Pield of the Invention
The invention pert~ins generally to demodulation
circuits for transducers and ls more particu-
larly directed to compensation circuitry for a quad-diode
demodulator and capacitive trsnsducer combination.
2. Prior Art
Capacitive transducers are useful devices for
measuring physical parameters such as pressure, distance,
surface roughness, angle change or the like ~nd come in
an almost limitless variety of shapes, sizes and configu-
rations. A change in the sensed parameter will cause the
transducer to vary its capacitance accordingly in a
proportional or known functional manner. The change in
capacitance of the transducer can thereafter be utilized
in a number of ways to generate an electrical signal
representative of the change in the physical parameter.
Generally, for capacitive transducers, the
generation of the electrical signal is accomplished by
the modulation of an alternating carrier frequency where
one of the characteristics o the carrier is modified
electrically by the vari~ble capacitance of the
transducer. The carrier is thereafter detected or demod-
ulated to obtain the intelligence contained and thereby
generates a useful electrical signal representative of
the sensed parameter. The circuit used for modulating
the carrier is usually in integral combination with the
demodulator cirsuit with the whole being termed herein- ;
af ter a transducer demodulator .
Particularly, such a ~ransducer demodulator circuit
using a quad-diode configuration
is shown in U.- S. Patents 3,318,153; 3,271,
669 issued to T. Lode. These circuits are particularly
useful for capacitive pressure transducers. Another
advantageous type of capacitive transducer demodulator
1.
~ ' .

1~L23Z25
--3--
that has been recently developed is the quad-diode bridge
circuit. An example of which i~ illustrated in U.S.
Patents 3,883,812; 3,869,676 issued to Hnrrison et al.
The desirable characteristics o~ this demodulator include
a sufficient magnitude o~ output which is relatively
independent of excitation waveform a`nd requency. Addi-
tionally, this transducer demodulator pro,vides excellent
resolution for the change ln capacitance of the
transducer and allows the transducer to be conveniently
grounded. These are fehtures that will provide for
greater use of this circuit in mul~i-farious transducer
applications in the future. These circuits and others
of their general type will herein further be termed quad-
diode demodulators because of their circuitry utilizing
four rectification devices or diodes.
If the capacitive transducer is a pressure
transducer, a capa~itive transducer and demodulator
combination, as deseribed above, can be utilized for
sensing manifold absolute pressure (MAP~ changes in an
internal combustion engine. The electrical signal
obtained from the combination can then be used as is
conventional to regulate functional aspects of the engine
operation such as air/fuel ratio, timing, EGR, etc. when
sensed with other engine parameters. In the automotive
environment the convenient grounding of a capacitive
transducer is an important feature which allows a direct
conn~ction to the chassis and eliminates the problems of
isolating a transducer with
reference potential that is above or below chassis
ground. Also, the referenced Harrison quad-diode circuit
lends itself to remote transducer applications which
probably will accompany many new developments in auto-
motive elec~ronics.
However, there are still problems with using these
quad-diode demodulators in harsh environments such as
that found in the engine compartment of an automobile.

~23~ZS
--4--
The range o~ temperatures through whch the transducer-
demodulator circuitry is subjected to i-9 extreme (-40F.
to 120 C.) ~nd the circuitry must, therefore, be provided
with accurate temperature compensatlon. This problem Is
complicated by the inclusion of the neeessary but non-
linear diodes in the demodulator circuitry. These diodes will pro-
duce not only different voltage drops for d~ffere~t temperatures but
will also produce different voltage drops at the same temperature
when different currents are conducted.
Another problem found in many environments but which
is particularly troublesome in the automotive environment
is the regulation of the power supply. With constantly
changing demands on a limited battery and only a rough
regulation from the voltage regulator for alternator
voltage changes, surges and voltage drops of significant
magnitude are not uncommon. Transducer electronios where
the informatio~ is contained within the amplitude of
transducer signal and changes with respect to a reference
are particularly affected by these changes.
One method developed for overcoming this problem is
ratiometry. This method contemplates that the output of
a particular circuit will change in accordance with the
ehanges in the power supply to always remain a predeter-
mined percentage of the power supply for non-signal
condit~ons. Thus, when a plurality of these circuits are
connected together signal information will not be lost
and errors will not be introduced because of the regu-
lation problems of the power supply. Therefore, when
operated in an automotive or other environments where
regulation problems are prevalent, the quad-diode demod-
ulator and capacitive transducer combination should be
provided with ratiometric compensation for facile connec-
tion to other system circuitry. Compensation for
ratiometric errors is difficult because of the non-linear
nature of the diodes of the demodulator which cause an
error.
.

~Z3225
In certQin instances it is ~ust as import~nt to
compensate for the transducer itself as it is to
compensate the demodulstor circuitry. For ex~mple,
quartz CQpaCitor transducers are relatively accurate and
S inexpensive but they are temperature sensitive and some
have linearity problems for reasonably priced
transducers. It would be extremely advantageous to
compensate a low cost quartz capaeitive transducer to
provide a linear output without temperature dependency
10 while retaining the desirable features of a quad-diode
demodulator.
SUMMARY OF THE INVENTION
The invention provides a compensation technique for
a quad-diode demodulator snd cspacitive transducer combi-
15 nation. The technique includes controllably varying the
amplitude of an alterneting carrier frequency oppositely
to changes produced in that amplitude by the compensable
errors in the demodulator and transducer and thus
effecting their cancellation.
The technique produces an extremely flexible compen-
sation method where many different types of errors may bs
compensated for without drastic modification of the
demodulator circuitry. Moreover, compensation may be
effected without disturbing the desirable
characteristics of the quad-diode demodulator and
capacitive transducer combination.
In a first preferred embodiment the technique is
implemented by compensation network circuitry comprising
means for ratiometric compensation and means for tempera-
ture compensaeion of the quad-diode demodulator. A
voltage follower circuit is utilized to ~ompare and
maintain the equivalency between a ratiometric voltage
and the input voltage of a frequency generator minus a
non-linear compensation voltage.

~L232;2 5
--6--
In the first embodiment the compensation voltage is
generated as the complement of the non-linear non-ratiometric
error attenuation introduced by the demodulator circuit because
of the diodes that comprise the demodulation bridge. The in-
put voltage to the frequency generator is therefore the ratio-
metric voltage plus the non-linear non-ratiome~ric compensation
voltage which compensates for the attenuation of the diodes in
the demodulator. Since the diode voltage attenuation in the
bridge is temperature dependent, the compensation voltage being
the complement of the attenuation is also temperature dependent
and produces a demodulator output that has the temperature term
canc-eled. The compensation voltage is developed in this embodi-
ment by drawing an exact amount of current through a temperature
sensitive means. The temperature sensitive means have a temp-
erature characteristic identical with the temperature character-
istic of the demodulator diodes and of equivalent voltage mag-
nitude. Thus, the voltage magnitude of the temperature sensi-
tive means cancels the ratiometric error and changes with
temperature to cancel the temperature dependency.
In a second preferred embodiment the technique is
implemented by compensation network circuitry comprising means
for temperature compensation and means for linearization of a
quartz capacitive pressure transducer. A voltage follower cir-
cuit is utilized to compare and maintain the equivalency between
a ratiometric voltage and the input voltage of a frequency
generator mlnus a non-linear compensatlon voltage.
In the second embodiment the compensation voltage is
generated as the combination of a temperature dependent com-
ponent and a non-linear component~ The temperature dependent
component of the compensation voltage is used to compensate for
the temperature dependency of the quartz capacitive transducer
and the non-linear component for the non-linear response of the
transducer.
The temperature dependent component in this embodi
ment is developed by drawing an exact amount of current
jk/ ~

~.Z3ZZS
~~rough a temperature sensitive means with a substantially
linear temperature characteristic. The linear change in
voltage with respect to temperature of the device is used as
a slope multiplier to cancel the change in the output of the
quartz capacitive transducer with respect to temperature. The
non-linear component is generated in proportion to the inverted
output voltage of the demodulator and transducer combination.
The non-linear component is then provided as negative feedback
to reduce the input voltage to the frequency generator and
cancel the non-linear increases in the quartz capacitive
transducer.
In summary, therefore, the present invention may be
seen as providing a capacitive transducer and demodulator com-
bination circuit comprising: a capacitive transducer for
measuring the variances of a physical parameter, the transducer
adapted to transform the variances into changes of capacitance
of the transducer; a frequency generator means for suppiying an
alternating carrier voltage; a quad-diode demodulator electrically
connected to receive fro~. the frequency generator means the
alternating carrier voltage and further connected to the trans-
ducer such that the changes in capacitance modulate the carrier,
the demodulator detecting the carrier and generating an output
voltage signal representative of the variances in the measured
physical parameter; and compensation network means, electrically
connected to the frequency generator, for varying the amplitude
of the carrier voltage oppositely to the amplitude changes in the
output signal produced by the compensable errors of the demodula-
tor and transducer.
The present invention furthermore may be seen to
provide a transducer and demodulator combination circuit com-
prising: a transducer for measuring the variances of a
physical parameter, the transducer adapted to transform the
variances into changes of impedance of the transducer; a
sd ~ -7-

~L~Z3~25
Frequency generator means for supplying an alternating carrier
voltage which is a ratiometric function of an input supply
voltage; a deMoclulator electrically connec-ted to receive from
the frequency generator means the alterna-ting carrier voltage
and further connected to the transducer such tha1: -the chancJes
in impedance modulate the carrier, the demodulator detecting
the carrier and generating an output vol~age signal representa-
tive of the variances in the measured physical parameter; and
compensation network means for varying the amplitude o the
carrier voltage oppositely to the amplitude changes in the output
signal produced by the compensable errors of the demodulator
and transducer wherein the compensation network means includes
means for providing ratiometric compensation for the ratiometric
error of the demodulator.
Thesè and other features, and aspects of the invention
will be more fully understood and better appreciated from a
reading of the following detailed disclosure taken in conjunction f
with the appended drawings wherein:
BRIEF DESCRIPTION OF THE DRAWINGS
_
The prior art figure is a schematic view of a quad-
diode demodulator circuit and capacitive transducer combination;
Figure l is a block diagram of a quad-diode demodulator
circuit and capacitive transducer combination provided with a
compensation network according to the invention;
Figure 2 is a detailed block diagram illustrating the
quad-diode demodulator and capacitive transducer combination
shown in Figure l, and provided with ratiometric and temperature
compensation for the quad-diode demodulator; .:~
Figure 3, appearing on the same sheet as Figure 6,
is a detailed block diagram illustrating the quad-diode demodula-
tor and capacitive transducer combination shown in Figure l, and
provided with temperature compensation and llnearization com-
-sd/~6 -8-

32Z5
ensation for a quartz capacitive transducer;
Figure 4 is a detailed schematic circuit of the
block diagram illustrated in Figure 2;
Figure 5 is a detailed schematic circuit of the
block diagram illustrated in Figure 3;
Figure 6 is a cross sectional view of c~ quartz
capacitive pressure transducer taken along section line 6 in
Figure 7;
Figure-7 is a cross sectional side view of a quartz
capacitive pressure transducer in a quiescent state;
Figure 8 is a cross sectional side view of the ~-
quartz capacitive pressure transducer in a state of flexure;
Figure 9 is an illustrative graphic diagram of a
ratiometric conversion;
Figure 10 is an illustrative graphic diagram of
temperature versus the voltage across a signal diode for
different current levels; and . 5
sd/~ 8A-
. .
- , ~ . . .

~Z3~ZS
g
Figures 11 through 16 are graphic illustrations of
functional relations at various point~ throughout the
circuitry of ~igure 5.
The convention that like reference numeral
refer to identical elements throughout the figures has
been maintained for facilitating B clear description of
the invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
Illustrated in the prior art figure is a quad-diode
demodulator ior the detection of capaciti~e changes in a
transducer caused by the variance of a physical
par~meter. The demodulator comprises generally a
frequency generator 10, a quad-diode bridge circuit 12,
and an output circuit 14. The fre~uency generator 10
produces an alternating carrier frequency of an amplitude
Vp to the junction of two coupling capacitors Ca and C~
of the bridge circuit 12. The other terminals of the
coupling capacitors Ca and Cb are connected respectively
between first and second diode bridge nodes ~ormed by
diodes Dl, D3 and diodes D2, D4, and ground. The diodes
~Dl, D2, D3, and.D4 form.a quad-diode bridge and have
parallel capacitors Cr, C connected between a third
bridge node formed by the diodes Dl, D2, and ground, A
fourth bridge node formed by the diodes D3, D4, has a
capacitor Cp connected between the node and ground.
Conventionally, Cp is representative of the variable
capacitance of a capacitive transducer and Cr is a
capacitance of a value that is equivalent to the zero
point value of the capacitive trflnsducer. The
capacitance Cr may be contained within the tr~nsducer for
compensation or may be supplied ex~ernally. The
capscitor Cs is provided as a small variable c~pacitor in
parallel with Cr to enable exact zeroing o~ the initisl
output of the capAcitive trarsducer. ~he total

~23~2s
--, o-- .
.
capacit~nce Cs and Cr is substantially equivalent to Cr
and this value will be used for further description when
referring to these in combination.
Consider now one half of the circuit where values of
C~7 Cb are much, much greater than Cp, Cr, Assuming Ca is
charged, on transitions of the frequency generator 10, the
diode Dl cond~cts and C charges to a voltage dependent
upon the value of Cr si~ce C >~ Cr. Ca therefore discharges
by an amount of charge dependent upon the v~lue of C .
Subsequently, on negatlve transitions, diode D3
conducts and the capacitor Cp charges an amount deter-
mined by the value of Cp since C~>>CpCa charges by an
equivaIent amount. If the capacitors Cp snd Cr are
equal, then there is no net signal voltage left on Ca.
However~ if Cp changes as the result of sensing a change
in a physical parameter, then a net DC voltage or charge
will remain on capacitor CQ and appear as a signal output
at point A. The signal voltage developed is a function
of the difference of the values of capacitors Cp and Cr.
In a similar manner, diodes D2, D4 in cooperation
with capacitors Cr and Cp will produce a net DC voltage
at point B. This voltage will be equivalent to the
voltage at point A but of opposite polarity. At a steady
state condition, equal amounts of charge are transferred
between Cp and Cr and $he voltage output from the
demodulator will reduce to C - C
Vdc = p d C~~~~~~~ (1)
p r
where Vdc is the output volta~e measured across points
AB, Vp is the voltage amplitude of the frequency
generator, and Vd is the voltage drop across one of the
diodes Dl - D4.
The output circuitry 14~ comprising an impedance Ra
connected between point A and an output terminal 15 and
an impedance Rb connected betwPen point B ~nd a ground
terminal 17, provides a single ended output from the

~2~ZZ5 ~,
11
differential voltages presented at points A and B
respectively. A capacitor Cd is provided by connecting
one lead to the terminnl 15 and thè other lead to
terminal 17 for coacting with the impednaces R~, Rb.
This demodulator circuit is more fully described in the
two before referenced U.S. Patents issu0d to Harrison,
the disclosure of which is expressly incorporated herein
by reference.
With attention now directed to Figure 1, there is
shown to advantage in block form a preferred quad-diode
demodulator circuit including a frequency generator 10,
quad-diode bridge circuit 12, output circuit 14, and
capucitive transducer 18, the function and operation of
which are identical to that described in the above prior
art figure. In accordance with the invention, a compen-
sation network 16 is connected to the frequency generator
10 for providing a controllable amplitude for the carrier
frequency Vp to cancel a compensable error from the
demodulator-transducer combination.
In theory, the output voltage of the demodulator and
transducer combination can be written as a transfer
function:
Vout/Vp = G~s) ~2)
where VOUt is the output ~mplitude of the voltage at
a5 terminals 15, 1~, Vp is the voltage amplitude of the
frequency generator 10, and G(s) is the impedance
transfer function of the demodulator and transducer
combination.
The impedance transfer function for the particular
circuit illus~rated is a function of a nu~ber of indepen-
dent variables including but not limited to temperature,
frequency, cnpacitance, and the linear response of the
elements at different current levels. Each of these
variables, as they change, will vary V(out~ for a
constant Vp input according to their particular
.: ,

~Z322~
- -12-
characteristics. These changes can be non-linear and
either attenu~tions or amplifications. ldeQlly~ however,
Vtout) for this combination should only change with the
variable capacitance of the transducer and then linearly
with the physical variable producing the change. The
remaining variables will produce compensable errors in
the output. The compensation network 16 will then vary
the amplitude Vp, either by increasing or decreasing the
level to substantially cancel changes in the V(out)
amplitude not due to linear capacitance changes in the
transducer.
In one preferred embodiment, as illustrated in
~igure 2, the compensation network 16 includes circuitry
comprising a ratiometric compensation network 24 in
combination with a temperature compensation network 26
for the quad-diode demodulator. Further included in this
particular embodiment is a lineQr amplifier 22 connected
to the output circuitry 14. A ratiometric offset circuit
20 provides a level ehange for the output circuitry 14 as
will be more fully explained hereinafter.
From examination of equation (1) it is seen that the
contribution of the diode drop Vd will cause the need for
compensation in the demodulator circuit. As shown in
Figure 10, the voltage drop Vd in the equation (l) is not
only dependent upon temperature but is further a function
of the current drawn through the device. Generally, as
seen in the graphical representation~ larger temperatures
will cause a decrease in the voltage characteristic and
increasing currents will produce a larger voltage drop.
For a normal signal diode as normally used in such a
d~modulator circuit such changes will cause a shifting
voltage change between .1 - .15V in a voltage drop from a
turn on point of approximately .8V to .75V at full
current.
This shifting voltage drop of the diode, however,
may be still fairly constant with respec$ to the

~Z3~25
-13-
substanti~lly larger chsnge in Vp cau~ed by an
unregulated automotive power supply. This relatively
constant drop of the diode can, therefore, cause a
significant ratiometric error in the output ~oltage as it
is not ratiometric itself. This non-ratiolmetry cannot be
tolerated in certain environments where the analog output
of the demodulator and transducer combination is changed
to a digital number by a ratiometric conversion as illus-
trated in Figure 9.
Normally, this technique envisions a slope generator
that provides a constantly rising r~mp whose voltage is
compared to the output voltage V(out) of the demodulator
transducer combination. The counter begins a count when
the ramp is started and when a comparison indicates the
equivalency of the ramp voltage and the output voltage at
90 the counter is halted containing a digital represen-
tation, N, of the analog voltage. For changes in the
power supply Vin, the ramp is changed accordingly, and if
the transducer output is ratiometric no error in the
output count will appear. For higher voltages at point
92, the number N will still be obtained and at lower
voltages at point 94 no error will be introduced.
However, if the output voltage V(out) remains constant or
does not change ratiometrically, the error -~e or +Qe
will result. The sensitivity of the transducer and
demodulator combination will be effectively nullified by
the ratiometric error introduced. It is known that in an
automotiYe supply of approximately lOV a diode drop of
.65V that is not ratiometric will introduce a percentage
error in the order of 1-2%.
Figure 4 illustrates circuitry advantageously
compensating the demdoulator and transducer combination
for the temperature and current characteristics of the
diodes in the bridge circuit and further eliminating the
ratiometric error of the circuit. The compensation
network circuit 16 comprises a voltage follower amplifier

~.23~ZS
-14-
ICl eonnected between a positive source of voltage, ~V,
and ground. The positive source +V is obtained from
regul~ting a ~ource Vin which can be for example ~n auto-
motive power supply. The regulation circuit is provided
by serially connecting Vin to 8 terminal of a load
resistor Rl and thereafter the other terminal to the
anode of a steering diode D which is connected at its
cathode to the +V terminal. Shunt regulation is produced
at the +V terminal by Zener diode Zl and filter capacitor
Cl connected in parallel between the +V terminal and
ground.
A ratiometric voltage Va is applied to the non-
inverting input of the amplifier ICl via the junction of
the serial combin~tion of a divider resistor R2 and a
divider resistor R3 connected between the supply Vin and
ground. For every change in the supply Vin, the divider
point voltage Va will change in a ratiometric manner.
A compensation volta~e is developed at the inverting
input to the amplifier ICl by the negative feedback of a
serial pair of diodes D5, D6 connected between the
emitter of a power transistor Tl and the inverting input.
A variable resistor R4 is also connected between the
inverting input of the ~mplifier ICl and ground for
varying the amount of current drawn throu~h the diode
pair. Diodes D5, D6 should be matched to the quad-bridge
diodes and R4 adjusted to pull equivalent current through
the compensation diodes. The power transistor Tl which
is controlled by its connection to the output of
amplifier ICl at its base provides a controllable amount
of current to a filter capacitor C3 attached between the
emitter of the transistor and ground. The collector of
the power transistor Tl is connected to the regulated
positive supply +V.
In operation, the compensation network 16 produces a
voltage Va at the non-inverting input to amplifier ICl
which the circui$ will attempt to balance at the

1~3225
-15-
inverting input through the action of the power
tranQistor Tl and the feedback through diodes DS, D6. An
increase In voltage at point Va will increase the voltage
at point Yb and the inverting input until it exceeds the
voltage at point Va. The transistor Tl will then reduce
the voltage at the inverting input until equivalence is
reached. The filter capacitor C3 will delay the changes
- and damp out any oscillations and produce filtering for
the voltage at point Vb. Thus, the voltage at point Vb is
two diode voltage drops, 2Vd, above the ratiometric
voltQge at point ~a. Thus,
Vb = va + 2Vd
and if the peak to peak votlage, 2Vp, of the frequency
generator 10 is set equivalent to Vb, then
Vp = 1/2 Vb
or
V = 1/2 Va + Vd
then substituting equation (4) into equation (1)
Vdc Va Cp - Cl (S)
p r
where Va is ratiometric and the diode effects have been
eliminated.
The voltage Vb is used as the power supply or peak
to peak voltage of the frequency generator 10 by con-
necting the emitter of transistor Tl to the power supply
pins of inverters Il-I6 and grounding their reference
supply pins. The output of inverter I2 is connected via
feedback capacitor C4 and Yariable resistor RS to the
input of the inverter Il in a conventional manner to form
a free-running astable oscillator whose frequency is
determined by the RC time constant of R5, C4. Further,
feedback is provided by the connec$ion of a feedback
resistor R6 to the input of inverter I2 and to the
junction of the resistor R5 and capacitor C4. The

9 ~2~5
-16-
frequency should be adjusted such that the eircuit will
not be sensitive to the frequency used. Preferably ~or
the Harrison demodulQtor circuit this is in the range of
200-300 KHZ.
The output of the oscillator formed by inverters Il,
I2 is transmitted from the output of the inverter I~ to
the commonly connected inputs of the inverters I3-18.
The output of the invert2rs I3-16 are commonly ~onnected
together to generate the output of the frequency
generator 10. The inverters I3-I6 act QS buffer
amplifiers for the output of the oscillator and do not
permit the output voltage to change for differences in
the demodulator load.
The ratiometric offset circuit 20 includes a voltage
divider comprising the serial combination of a divider
resistor R12 and a variable divider resistor Rll
connected between the supply Vin and ground. A high
frequency filter capacitor C10 is connected at the
junction of the resistors to provide decoupling from any
power supply transients or ~eedback. In operation, the
resistor Rll is adjusted such that any capacitive
transducer will produce a zero output for initial condi-
tions o~ the physical operating psrameter th~t is to be
meausred. The offset preserves the ratiometry developed
in the eircuit by voltage Va.
Linear ~mplifications of the demodulator output
terminal 15 can be accomplished by ~mplifier IC3 which is
connected as a conventional non-inverting voltage
amplifier. The power supply pins of IC3 are conneeted to
the regulated source +V Qnd ground, and a frequency
compensation capacitor C8 is provided normally as is
known.
The non-invertinginput, receiving the single ended
output of the demodulator via terminal 15, Emplifies the
voltage by a variable gain and generates Y(ou$) over
resistor R12 from the output of emplifier IC3. The

~L~L232ZS
-17-
varlable gain is provided by ad~usting a variable
resistor R9 connected between the inverting input and
ground in relatlon to a fixed resistor R10 connected
between the output snd inverting input of the amplifier
IC3. A tilter c~pacitor C9 is provided between ground
and the output of amplifier IC3 to attenuate any high
frequency noise.
In another pr~ferred embodiment, a quartz capacitive
transducer is compenssted for linearization and tempera-
ture errors by the compensation network 16 illustrated inthe block diagram of Figure 3. The demodul~tor circuit
includes, as described above, a freguency generator 10,
quad-diode bridge cirucit 12, and output circuitry 14.
Connected to the reference terminal of the output
circuitry is a rQtiometric offset 20 as previously
described with reference to Figure 2. A linear amplifier
22 can be used to provide gain for the output voltage of
the output circuitry 14 and a 1QW pass filter 28 receives
the output of the amplifier 22 to attenuate high
fre9uency noise or spikes in the output voltage of the
circuit, V(out).
The compensation network 16 includes in combination
a transducer temperature compensation circuit 32 and a
transducer linearization circuit 34 which provide a
controllable voltage Vp to the frequency generator 10 to
cancel the errors of the demodulator ~nd transducer
combination. A feedbsck circuit 30 is provided to cycle
a portion of the output voltage of amplifier 22 into the
transducer linearization circuit 34 as a measure of the ¦
amount of linearization needed.
Detailed circuitry for the implementation of the
block diagram of Figure 3 is illustrated in Figure 5.
The compensation network 16 is implemented in a similar
fashion to the detailed circuit for blo~k lS in Figure 4
with the substitution of resistor R14 for diode D5 in the
feedback loop between the emitter of transistor Tl and
!

~lZ3~Z5
-18- ;~
,
the inverting input of the ~mplifier ICl. Further, a
variable resistor Rl3 comprlsing the leedback circuitry
of block 30 is connectQd between the output o~ the
amplifier IC3 and the inverting input ths amplifier ICl
to complete the implementation of the~block 16 of this
particular embodiment. Circuit blocks 10, 12, 14 and 20
of Fi~ure 5 comprise identical circuitry as that
described in the similar numbered blocks of Figure 4 and
will not be further described.
10Further, the block 22 comprising the circuitry for
the linear amplifier is similar to that described in
Figure 4 but with the addition of a decoupling resistor
Rl5 connected between the positive supply +V and the
power supply pin of the amplifier IC3. High frequency
decoupling capacitors Cl3 and Cll have also been added to
the circuit. The capacitor Cl3 is connected between
ground and the positive power supply pin of amplifier IC3
while capacitor Cll is connected between the non- i
inverting input to amplifier IC3 and ground. I
20The low pass filter 28 can be formëd in a conven- ! `
tional manner by the serial connection of a load resistor
Rl2 and 8 capacitor Cl2 between the output of amplifier
IC3 and ground. The output terminal voltage Y(out) is
then generated from the ~unction formed at the resistor
Rl2 and the capacitor Cl2.
Pigures 6, 7, and 8 illustrate in a preferred form
for the quart2 capacitive transducer schematically shown '
in block 36 of Figure 5. The transducer 36, shown as Q
pressure transducer, comprises two opposing discs 60, 62
or plates of qusrtz or other vitreous material with
similar characteristics. On the face of each disc, for
exnmple, dis~ 60, there is formed two capacitor plates
66, 68 of some conductive metal by a screening or vapor
deposition process or the like. After formation of the
plates 66, 68, 70, 72 on the discs 60, 62 respectively,
the discs are joined to form a gap between the plates by
~ .

23~2S
--l 9-- l
an ~nnular frit 64 ~nd the interior of the transducer
evacuated or set nt a reference pressure Pr.
As ~een in Fi~ure 8, a change in pressure P will
cause a deformation of the discs 60, 62 and v~ry the gap
distance between the plates of a pressure capacitor Cp
which can be detected via the terminals 76J 80.
Normally, a reference CapACitOr, Cr, which c~n be
detected via terminal 78, 82 does not change capacitance
appreciably and can be used for reference compensation in
the demodulator circuit ~or the capacitor Cp. A
capacitor of this type is more fully disclosed in a
commonly assigned U.S. Patent 3,858,097 issued to Polye,
the diselosure of which is hereby expressly incorpornted
by re~erence.
The operation of the circuit illustrated in Figure 5
in combination with the quartz capacitive transducer will
now be more fully explained. With respect to thermal
sensitivity compensation, the compensation network 16
utilizes the temperature characteristic of the diode D6
to provide the needed correction. For the circuitry
shown in Figure 5 and assuming for a moment that R13
- approaches infinity,
b = Va + Vd rl4 16)
where Vrl4 is the voltage across the resistor R14 and Vd
is the diode voltage across D6 now, by OHM's law
Vrl4 ~Vb - Vd)R14 (7~
or substituting equations (6) and (7) in equation (1) and
reducing
V(out) = A(f(x) f(p) ~ Vc) (8)
where
flx) = Va (1 ~ R14/R4) - Vd ~9)
~(p) = Cp - Cr (10)
+__~

z~zs
-20-
:
Vc = offset voltage, and
A = linear amplifier gain
If one now inspects equQtion (9) and its graph inFigure 12, the change in f(x) will be due only to
temperature because of the -Yd term. For a diode the
voltage drop decreases with increasing temperature and
hence the subtraction of the Vd term will cause an
increasing f(x) from temperature Tl to temperature T2
where T2 is greater than Tl.
Graph 11 illustrates the uncompensated f~p) due to
thermally sensitivity of the quartz capacitive
transducer. It is seen that the function f(p) has a
lower slope for increasing temperatures where T2 is
greater than Tl. From equation (8) it is seen that the
lS function f(x) acts as a slope multiplier to the function
f(p) but in the opposite direction and thus will increase
the slope of the higher temperature curve at T2 in Figure
11. The result is illustrated in Figure 13 in which the
curves are separated only by the thermal shift in their
zero points. The correct multiplication constant can be
obtained by adjusting the current drawn through diode D6
via variable resistor R4.
The linearity ccmpensation of the circuit of ~igure
5 will now be more ~ully described. Gensrally, the
quartz capacitive transducer illustrated will not
generate a linear change in output for a change in
physical output variable. Figure 15 shows that the
function f(p) based on the capacitanee ahange of the
transducer will follow more of a square law with respect
to changes in pressure thsn a linear function as repre-
sented by the dotted line in the figure. Normally, such
a response is caused by the change in pressure causing a
relatively representative change in the spacing between
the capacitor discs. ~oweYer, capacitance for a parallel
plate con~iguration as shown changes inversely with the

~Z3225
.
-21-
square of the distance and not linearly. The compen-
sation technique causes Vb to change such that V(out)
will be compensated as illustrated in Fi~ure 14 and thus
cancel the nonlinearity of the transducer. The resultant
linear output is illustrated in Figure 16 where V(out) ~s
graphically indicated as a first order function of the
variable p after combining the compensation and non-
linear response of the transducer.
This can be illustrated by writing the circuit
transfer function as follows below. Recalling equation
(8) and rewriting it for R13 not equal to infinity.
V~out) = A(fl(x) f(p) + Vc) (11)
1 - ~ ~R-14~------ ~ ~
where
fl(x) = Va (1 + R14/R4 + R14/R13) - Vd (12
Then for fl(x) much greater than R14/R13, V(out)
will be an increasing function that follows the numerator
of equation (11) and f(p). The denominator, however,
contains a linearizing term A~R14/R15) f(p) which tends
to decrease V(out) for increases in f(p) and can be
ad~usted controllably by varying R13. Thus, a simple `
adjustment may be made to linearize a quartz capacitive
transducer that normally does not have a first order
output function.
While preferred embodiments of the invention have
been described, it will be obvious to those skilled in
the art that various modifications and changes may be -
made without departing form the spirit and scope o~ the
invention QS iS set forth in the following claims.
WHAT 19 CLAIMED IS:

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Administrative Status

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Event History

Description Date
Inactive: IPC from MCD 2006-03-11
Inactive: IPC from MCD 2006-03-11
Inactive: IPC from MCD 2006-03-11
Inactive: Expired (old Act Patent) latest possible expiry date 1999-05-11
Grant by Issuance 1982-05-11

Abandonment History

There is no abandonment history.

Owners on Record

Note: Records showing the ownership history in alphabetical order.

Current Owners on Record
None
Past Owners on Record
CHEN Y. LEE
Past Owners that do not appear in the "Owners on Record" listing will appear in other documentation within the application.
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Document
Description 
Date
(yyyy-mm-dd) 
Number of pages   Size of Image (KB) 
Claims 1994-02-15 9 239
Drawings 1994-02-15 5 113
Abstract 1994-02-15 1 19
Descriptions 1994-02-15 21 813