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Patent 1139411 Summary

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Claims and Abstract availability

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(12) Patent: (11) CA 1139411
(21) Application Number: 1139411
(54) English Title: CONTEMPORANEOUS FABRICATION OF DOUBLE HETEROSTRUCTURE LIGHT EMITTING DIODES AND LASER DIODES USING LIQUID PHASE EPITAXY
(54) French Title: FABRICATION SIMULTANEE DE DIODES ELECTROLUMINESCENTES ET DE DIODES LASER A DOUBLE HETEROSTRUCTURE PAR EPITAXIE EN PHASE LIQUIDE
Status: Term Expired - Post Grant
Bibliographic Data
(51) International Patent Classification (IPC):
  • H01S 03/00 (2006.01)
(72) Inventors :
  • SPRINGTHORPE, ANTHONY J. (Canada)
  • MARGITTAI, AGNES (Canada)
(73) Owners :
  • NORTEL NETWORKS CORPORATION
(71) Applicants :
  • NORTEL NETWORKS CORPORATION (Canada)
(74) Agent: STUART L. WILKINSONWILKINSON, STUART L.
(74) Associate agent:
(45) Issued: 1983-01-11
(22) Filed Date: 1981-01-30
Availability of licence: N/A
Dedicated to the Public: N/A
(25) Language of filing: English

Patent Cooperation Treaty (PCT): No

(30) Application Priority Data: None

Abstracts

English Abstract


CONTEMPORANEOUS FABRICATION OF DOUBLE HETEROSTRUCTURE LIGHT EMITTING
DIODES AND LASER DIODES USING LIQUID PHASE EPITAXY
Abstract of the Disclosure
In the manufacture of double heterostructure laser diodes
using liquid phase epitaxy a source crystal precedes the laser substrate
crystal through the process to ensure saturation of the various melts from
which epitaxial growth is obtained. The source crystal has hitherto been
discarded. The source crystal, since it immediately precedes the substrate
crystal, also experiences epitaxial growth of a heterostructure but with
heterostructure layer thicknesses unsuited for laser diode fabrication. By
suitable processing of the source crystal after it is formed with a
heterostructure, light emitting diodes can be produced so contributing to a 50%
reduction in materials cost.
_ j _ -i-


Claims

Note: Claims are shown in the official language in which they were submitted.


THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE PROPERTY
OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. A process for contemporaneously making double
heterostructure light emitting diodes and double heterostructure lasers
using liquid phase epitaxy comprising:
filling a first liquid phase epitaxy (LPE) reservoir with a
liquid material having composition appropriate for growth therefrom of an
epitaxial laser first confining layer;
filling a second LPE reservoir with a liquid material having
a composition appropriate for growth -therefrom of an epitaxial laser
active layer;
filling a third LPE reservoir with a liquid material having
a composition appropriate for growth therefrom of an epitaxial laser
second confining layer;
filling a fourth LPE reservoir with a liquid material having
a composition appropriate for growth therefrom of an epitaxial laser
capping layer;
cooling a housing containing the reservoirs at a
predetermined rate;
moving a boat containing a leading source crystal and a
trailing substrate crystal to a first station at which the source crystal
underlies the first reservoir for sufficient time to saturate the
composition in the first reservoir and to promote epitaxial growth of a
first LED confining layer on the source crystal;
moving the boat to a second station at which the substrate
crystal underlies the first reservoir for sufficient time to promote

epitaxial growth thereon of a laser first confining layer and the source
crystal underlies the second reservoir and experiences epitaxial growth
thereon of a LED active layer,
moving the boat to a third station at which the substrate
crystal underlies the second reservoir for sufficient time to promote
epitaxial growth thereon of a laser active layer and the source crystal
underlies the third reservoir and experiences epitaxial growth thereon of
an LED second confining layer;
moving the boat to a fourth station at which the substrate
crystal underlies the third reservoir for sufficient time to promote
epitaxial growth thereon of a laser second confining layer and the source
crystal underlies the fourth reservoir and experiences epitaxial growth
thereon of a LED capping layer;
moving the boat to a fifth station at which the substrate
crystal underlies the fourth reservoir for sufficient time to promote
epitaxial growth thereon of a laser capping layer; and
subsequently fabricating light emitting diodes from the
source crystal and laser diodes from the substrate crystal.
2. A process as claimed in claim 1 wherein during a first
part of the time that the source crystal underlies the first reservoir,
etch back of the source crystal occurs to produce a roughened substrate
surface and, during a remaining part of the time that the source crystal
underlies the first reservoir, deposition of said first LED confining
layer occurs.

3. A process as claimed in claim 1 wherein the subsequent
fabrication of light emitting diodes from the source crystal includes the
step of etching to reduce the thickness of the capping layer thereby to
reduce internal light absorption.
4. A process as claimed in claim 1 wherein the subsequent
fabrication of laser and light emitting diodes includes the steps of
forming top and bottom electrical contacts on the crystal.
5. A process as claimed in claim 1 in which the subsequent
fabrication of laser and light emitting diodes includes the step of
cleaving the crystal to produce individual devices.

Description

Note: Descriptions are shown in the official language in which they were submitted.


The production by liquid phase epitaxy of crystals suitable
for making double heterostructure (DH) light emitting diodes and lasers
of, for example, the GaAlAs type is as follows.
Four solutions containing Ga, A1, As and an appropriate
n-type or p-type dopant are contained in separate square wells machined
into a high purity carbon block. The block is placed in a furnace to
ensure a temperature constant to better than 0.5C across the four melts.
An accurately machined carbon boat slides under the block and contacts the
melts, the wells being open bottomed. The boat has spaced recesses in its
top surface. One recess houses a source crystal of GaAs and the other
recess houses a substrate crystal. The leading or source crystal is used
only to ensure that epitaxial growth solutions within the wells are
exactly saturated before the trailing or substrate crystal contacts them.
The source crystal can be either a single crystal of GaAs or a slab of
polycrystalline GaAs. The furnace is cooled during a growth cycle and the
two crystals are advanced sequentially past the melts. A typical cooling
rate is 0.3C/min. The layer thicknesses are determined both by the
composition of the melts and by the length of time that the substrate
crystal spends in contact with each solution.
Typical thicknesses and compositions obtained during a
normal layer deposition sequence are tabulated below:
Growth Time Thickness Growth Time Thickness
Layer (min) [~m) (min) (~m)
1st Confining 30 4.5 48 3
Active 0.5v 0.2 30 3.0
2nd Confining 15 1.3 0.5 0.25
Capping 10 1.6 15 2.0
SUBSTRATE CRYSTAL SOURCE CRYSTAL
~.

~ ~13~1
Some variation in material composition, dopant concentration
and layer thickness is permitted. From an LPE process viewpoint, the
important distinction is that the laser active layer should be in the
range 0.1 to 0.3 microns and the LED active layer be in the range 0.5 to 4
microns for optimal performance. Considering again the LPE process
described above, it has been the practice in industrial preparation of LED
and laser diode substrates to discard the sacrificial source crystal.
It has now been found that appreciable materials cost
reduction can be obtained by using the source crystal to make LED's.
LED's produced from the sacrificial source crystal are characterized by
substantially the same light output as conventional LED's but because of
their thicker active layers are generally slower.
An embodiment of the invention will now be described by way
of example with reference to the accompanying drawings in which:-
Figure 1 shows a schematic view of apparatus used in a
liquid phase epitaxy tLPE) process according to the invention; and
Figures 2a and 2b show sectional views of respectively a
laser diode grown on a LPE source crystal and a light emitting diode (LED)
contemporaneously grown on a LPE substrate crystal.
As described briefly in the introduction, and referring to
Figure 1, the various solutions for epitaxial crystal growth are contained
in open-bottomed wells 1 to 4 in an accurately machined high purity carbon
block 5. A boat 6 containing a housing 7 for a leading sacrificial source
crystal 8 and a housing 9 for a trailing substrate crystal 10, slides
under the block, the boat and the block in sealing contact except at the
wells 1 to 4 where the melts contact the boat surface. Briefly, as the
boat travels to the right in Figure 1 the sacrificial source crystal 8

~13~
and then the trailing substrate crystal 10 are brought under successive
wells. As the block 5 is cooled, epitaxial growth on the underlying
crystals takes place.
The material in well 1 comprises a mixture of 10g.Ga,
220Omg.GaAs, and 8mg.Al doped with 0.6mg.Te to render the material n-type.
The well 2 contains a mixture of 10g.Ga, 300mg. GaAs and lmg Al doped with
25mg.Ge. The well 3 contains a mixture of 10g.Ga, 210mg. GaAs and 8mg.
Al doped with 115mg. Ge to render the material p-type. Lastly, the well 4
contains 10g.Ga, 290mg.GaAs, and lmg.Al with 75mg.Ge to render the
material p-type. The source and substrate crystals are n-type GaAs, the
crystals being of the order of 75 microns in thickness.
The temperature of the block 5 is brought to about 780C in
a furnace, the temperature range over the length of the block 5 being less
than 0.5C. The process is started by moving the boat in the direction of
the arrow in Figure 1 so that the source crystal underlies the layer 1 and
the block is cooled at a rate of 0.3C/min to promote epitaxial growth.
The source crystal 8 is kept in this position for approximately 48 min.
For part of this time the melt produces some etch-back of the source
crystal surface until a temperature is reached at which epitaxial growth
begins. The etch-back, incidentally, produces a rough interface between
the substrate and the first confining layer as shown in Figure 2b. This
is beneficial for LED's since the roughness increases the light extraction
from the crystal sources and hence increases external quantum efficiency.
At the end cf this growth period, the boat is moved to the right as shown
in Figure 1 so that the source crystal underlies well 2 and the substrate
crystal underlies well 1. Epitaxial growth is allowed to proceed at the
surface of both crystals and produces a 3 micron active layer 13 on the

~.3~41~.
source crystal and a 4.5 micron first confining layer 12 on the substrate
crystal 10 (Figure 2a). At the end of this period the boat is moved to
the right again so that the source crystal 8 underlies the third well and
the substrate crystal 10 underlies well 2. Epitaxial growth is allowed to
proceed for a short period of 30 seconds to produce a 0.25 micron second
confining layer 14 on the source crystal and a 0.2 micron active layer 13
on the substrate crystal 10. Following this period, the boat is moved
again to the right so that the source crystal underlies well 4 and the
substrate crystal underlies well 3. Epitaxial growth is allowed to
proceed for 15 minutes during which time a 0.6 micron capping layer 15 is
grown on the source crystal and a 1.3 micron second confining layer 14 is
grown on the substrate crystal 10. Finally the boat 5 is moved to the
right again to bring the substrate crystal 10 under the well 4. Epitaxial
growth is then allowed to proceed for 10 minutes during which time a 1.6
micron capping layer is grown on the substrate crystal.
As indicated previously, the source crystal 8 acts
sacrificially to render the various melts saturated for subsequent growth
of the substrate or laser crystal. However, because the source crystal
contacts the successive melts under cooling conditions, a corresponding
heterostructure is produced on the source crystal, albeit with completely
different layer widths.
The source or LED crystal 8 and the substrate or laser
crystal 10 are processed in a conventional manner to produce devices from
the respective LPE grown chips. The devices produced are shown in cross
section in Figures 2a ~LED) and 2b (laser), the double ended arrows being
indicative of simultaneously grown layers. Each of the devices
illustrated has a substrate 11, a first confining layer 12, an active

3~41~
layer 13, a second confining layer 14, and a capping layer 15, the layers
having been epitaxially grown as described previously.
To produce laser diodes from the substrate crystal, a
passivating layer 16 of silicon dioxide is chemically vapour deposited
over the crystal and stripe regions 17 are opened up using conventional
photolithographic techniques and chemical etching. A zinc diffusion 18 is
then performed on the exposed capping region stripe. Subsequently a
contact layer of 70 A chromium and 2000A gold shown as a layer 19 is
evaporated on the surface of the chip, and a 200 A layer 20 of Au/Ge
eutectic and 2000 A of gold is deposited on the lower surface of the chip.
A gold heat sink 21 of 5~10 microns is then electroplated on the top
surface. Lastly, the chip is cleaved into 250 x 375 micron pieces. The
stripe contact defines the lasing cavity within the laser, the stripe
region being of the order of 5 x 250~m.
The structure illustrated in Figure 2a represents one of the
simplest laser structures. However, there are many different possible
geometries based on the LPE grown heterostructure such as the buried layer
heterostructure laser, the Y-groove laser, junction stripe laser,
transverse junction laser and the planar laser. All of these structures
can use a double heterostructure of the type described previously and so
can be produced contemporaneously with light emitting diodes.
The processing of the source chip to produce light emitting
diodes is somewhat similar to the processing of the substrate chip. For a
Burrus-type LED a passivating oxide layer 16 is deposited on the upper
surface of the chip and windows 22, typically circular in shape and 25-75
microns in diameter, are opened up using photolithographic techniques.
Again zinc diffusion 18 and ohmic contact deposition 19 takes place on the

top surface and an ohmic contact deposition 20 is made on the bottom
surface of the chip~ followed by a 5-10~m plated gold heat sink 21 on the top
p-surface. The chip is then cleaved into individual LED's and appropriate
leads soldered to top and bottom faces of the light emitting diode.
It will be seen that the capping layer is thicker than is
usual for double heterostructure LED's produced in a standard or optimized
LED production process. To reduce internal absorption of backwards
emitted light in a Burrus LE~ structure~ the crystal surface can be
chemically etched (phantom line) to remove part of the capping layer
before individual device fabrication. Edge emitting diodes are processed
in a similar manner as will be understood by those skilled in the art of
optoelectronic device fabrication.
Although the invention has been described in terms of the
GaAlAs system, other binary, ternary and guaternary systems could be used;
for example, the GaInAsP system.
In summary, it will be appreciated that by utilizing the
hitherto discarded sacrificial source crystal from the laser fabrication
process, LED's can oe contemporaneously produced at a materials cost
reduction of 50%.

Representative Drawing

Sorry, the representative drawing for patent document number 1139411 was not found.

Administrative Status

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Event History

Description Date
Inactive: Expired (old Act Patent) latest possible expiry date 2000-01-11
Letter Sent 1999-07-22
Grant by Issuance 1983-01-11

Abandonment History

There is no abandonment history.

Owners on Record

Note: Records showing the ownership history in alphabetical order.

Current Owners on Record
NORTEL NETWORKS CORPORATION
Past Owners on Record
AGNES MARGITTAI
ANTHONY J. SPRINGTHORPE
Past Owners that do not appear in the "Owners on Record" listing will appear in other documentation within the application.
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Document
Description 
Date
(yyyy-mm-dd) 
Number of pages   Size of Image (KB) 
Abstract 1994-01-04 1 17
Claims 1994-01-04 3 68
Drawings 1994-01-04 1 21
Descriptions 1994-01-04 6 193