Note: Descriptions are shown in the official language in which they were submitted.
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SELF CURRENT LIMITING CONTROL CIRCUITRY
FOR GATED DIODE SWITCHES
Technical Fiel_
This invention relates to control circuitry for
use with gated diode switches.
Background Art
Gated diode switches (GDSs) have an ON
(conducting) state and an OFF (blocking) state. These
switches are capable of blocking relatively large
potential differences in the OFF state. The OFF state
occurs when the potential of the gate is held more positive
than that of the anode and cathode. The magnitude of the
needed potential of the gate relative to the anode and
cathode to turn off a GDS is a function of the geometry
and impurity concentration (doping) levels of the semi-
conductor regions of the GDS. Conduction between anode
and cathode is cut off (interrupted~ because carriers from
the cathode are diverted out of the gate and carriers from
the anode are repelled before they can reach the cathode.
The control circuitry used to apply a blocking voltage to
the gate must be able to sustain a more positive voltage
than is at the anode and cathode and must be able to serve
as a supply current which is of at least the same
magnitude as flows through the switch itself.
GDSs of the type referenced above are relatively
new in the art and, accordingly, there is little published
information describing the control circuitry utilized
therewith.
It is desirable to have solid-state control
circuitry for use with GDSs which can be fabricated on the
same substrate as the switches which are to be controlled.
.Summary of the Invention
In accordance with an aspect of the invention
there is provided circuitry coupled to the gate of a first
gated diode switch which has a gate, an anode, and a
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cathode, comprising a second gated diode switch which has
a gate, an anode and a cathode, the cathode of the second
gated diode switch being coupled to the gate of the first
gated diode switch, a control circuit branch is coupled to
the second gated diode switch for controlling conduction
between the anode and cathode thereof, and being
characterized in that the control circuit branch comprises
a third switch branch having a control terminal which is
coupled to an input terminal, and having first and second
output terminals; a fourth switch branch having a control
terminal coupled to the first output terminal of the third
switch branch and having first and second output terminals
with the first output terminal being coupled to the anode
of the second gated diode switch; and a level shifting
branch having a first terminal coupled to the second
output terminal of the fourth switch circuit means, and
having a second terminal coupled to the gate of the second
gated diode switch.
A solution to the problem of controlling the
state of a first gated diode switch (GDSl) in accordance
with the present invention, is circuitry comprising: a
second gated diode switch (GDS2) with the cathode of GDS2
coupled to the gate of GDS1 and a control circuit branch
characterized by third and fourth switch branches, and a
level shifting branch with the control terminal and a
first output terminal of the third switch branch being
coupled to an input terminal and to the control terminal
of the fourth switch branch, respectively. An output
terminal of the fourth switch branch being coupled to the
anode of GDS2, and the first and second terminals of the
level shifting branch being coupled to the gate of GDS2
and to the second output terminal of the fourth switch
branch, respectively.
The state of GDS2 is controlled essentially by
the third and fourth switch branches. An input signal
applied to the control terminal of the third switch branch
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controls the state thereof. The state of GDS2 controls
the state of GDSl. The fourth switch branch serves to
limit current which flows into the gate of GDSl from
GDS2. This acts to prevent conduction overload through
GDSl and GDS2 which could destroy them.
These and other eatures of the invention are
better understood from a consideration of the following
detailed description taken in conjunction with the
accompanying drawings.
Brief Description of the Drawings
FIG. 1 illustrates an embodiment of control
circuitry in accordance with one embodiment of the
invention;
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FIG. 2 illustrates a bidirectional switch which
can be controlled by the control circuitry of FIG. l; and
FIG. 3 illustrates another embodiment of control
circuitry in accordance with another embodiment of the
invention.
Detailed Description
Referring now to FIG. 1, there is illustrated
control circuitry 10 (within the larger dashed line
rectangle) which is coupled to the gate terminal (28) of a
gated diode switch GDSl that has anode and cathode
terminals. Control circuitry 10 serves to control the
state of GDSl and comprises transistors Ql and Q2,
diodes Dl and D2, a gated diode switch GDS2, current
limiters CLl and CL2, and resistors Rl and R2. Components
Ql, CLl, Dl, Q2, D2, Rl and R2 serve as a control circuit
branch (illustrated within dashed line rectangle A) which
serves to control the anode-to-cathode potential of GDS2.
R2 is optional and can be eliminated. Ql may be denoted as
a third switch branch. The base, collector, and emitter
terminals of Q1 may be denoted as the control and first and
second output terminals, respectively. Q2 may be denoted
as a third switch branch. The base, collector, and emitter
terminals of Q2 may be denoted as the control and first and
second output terminals, respectively. D2 may be denoted
as a level shifting branch.
In one illustrative embodiment, Ql is an n-p-n
junction transistor, Q2 is a p-n-p junction transistor, and
Dl and D2 are p-n junction diodes. GDS2 has the basic
structure described in copending Canadian Patent application
Serial No. 340,799, filed in the name of A.R. Hartman et al
on November 28, 1979. CLl and CL2 are pinch resistors. The
collector of Ql is coupled to one terminal of CLl and to a
terminal 12. The base of Ql is coupled to an input terminal
16 and the emitter of Ql is coupled to one terminal of Rl
and to a terminal 14. A second terminal of Rl is coupled
to a terminal 22 and to a power supply VSS. A second terminal
of CLl is coupled to the base of Q2, the cathode of Dl, and
to a terminal 18. The emitter of Q2 is coupled to the
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anode of Dl, a power supply +Vl, and to a terminal 20. The
collector of Q2 is coupled to the anode of GDS2 and to a
terminal 26. The anode of D2 is coupled to terminal 20 and
the cathode of D2 is coupled to the gate of GDS2, a first
terminal of R2, and to a terminal 24~ A second terminal of
R2 is coupled to terminal 22, The cathode of GDS2 is
coupled to a first terminal of CL2, the gate of GDSl, and
to terminal 28. A second terminal of CL2 is coupled to a
power supply -V2 and to a terminal 30.
The basic operation of GDSl is as follows.
Assuming the anode and cathode of GDSl are coupled to
+220 volts and -220 volts, respectively, conduction occurs
between anode and cathode thereof if the gate of GDSl
(terminal 28) is less positive than +220 volts. Conduction
15 is cut off (interrupted) by increasing the potential of the
gate (terminal 28) above +220 volts and by providing a
source of current to flow into the gate (terminal 28) of
GDSl. With +Vl = +250 volts, VSS = zero volts,
-V2 = -250 volts, and current limiters CLl and CL2 limiting
20 current therethrough to 50 and 5 microamperes each,
circuitry 10 is capable of providing the needed potentials
at terminal 28 and the current supply capability necessary
to control the state of GDSl.
If it is desired to allow conduction through
25 GDSl, a O to 0.4 volt input signal is applied to inpu~t
terminal 16. This biases Ql off and terminal 18 assumes
the potential of approximately +Vl. This condition biases
Q2 off and results in an essentially open circuit between
-~Vl and terminal 26 (the anode of GDS2). Thus, GDS2 is in
30 an OFF state since no current can flow between the anode
and cathode thereof. With GDS2 in the OFF state
terminal 28 is isolated from +Vl and tends to assume the
negative potential of -V2 (-250 volts) until the gate-to-
anode junction potential of GDSl becomes forward-biased.
35 Terminal 28 now rises to a potential which is below, but
close to the potential of the anode of GDSl. Accordingly,
GDSl is biased to the ON state and conduction occurs
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between the anode and cathode thereof. The current from
: the anode to the gate of GDSl is limited by CL2.
The potential of terminal 16 is now pulsed to 3-
5 volts. As will become clear, this causes GDSl to ~witch
to the OFF (blocking) state. Ql is biased on and operates
in saturation. This causes Dl and the emitter-base
junction of Q2 to be forward-biased. Thus, Q2 is biased on
and conduction from ~Vl through the emitter-collector of
Q2, the anode-cathode of GDS2 and CL2 to -V2 is possible.
10 The collector-emitter voltage of Q2 (VCE) with Q2 biased on
and conducting is selected to be of a lower magnitude than
the forward voltage drop across D2. This insures that the
potential of the anode (terminal 26) is more positive than
that of the gate (terminal 24) such that GDS2 stays in the
15 ON state. With GDS2 in the ON state terminal 28 assumes a
potential level close to +Vl. This potential level is
sufficiently more positive than the potential level at the
anode of GDSl to switch GDSl to the OFF state. The
geometry and impurity concentrations (doping levels) of
20 GDSl determine exactly how much more positive the potential
at the gate must be relative to the anode to turn off GDSl.
In order to switch GDSl to the OFF state it is
necessary to not only apply the needed potential level to
the gate of GDS', but in addition, to cause a flow of
25 current into the gate of GDSl that is of a magnitude
comparable to that of the magnitude of the current flow
between the anode and cathode of GDSl. Most of the current
that flows into the gate of GDSl flows from +Vl, through
D2, and then through the gate and cathode of GDS2. The
30 balance flows from +Vl, through the collector-emitter of
Q2, and then through the anode-cathode of GDS2. This
current flow can be substantial and as a result it is
necessary to have a high voltage and current device such as
GDS2 to switch GDSl to the OFF state. The high cost of a
35 high voltage and high current transistor limits its
application in this control circuit.
The current gain of Q2 serves to limit the
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current flow into the gate of GDSl from GDS2. This helps
insure against burn out of GDSl and/or GDS2. In many
telephone switching applications GDSl operates with only
48 volts between anode and cathode when in the OFF state;
however, it is possible that ~220 volts exists at the
anode and/or cathode due to ringing and induced 60 hz
voltages and, accordingly, circuit 10 is designed to block
these high voltages.
Referring now to FIG. 2, there is illustrated a
bidirectional switch which comprises gated diode switches
GDS3 and GDS4, with the anode of GDS3 coupled to the
cathode of GDS4, the cathode of GDS3 coupled to the anode
of GDS4, and the gates of both being coupled together.
The gate of GDS3 and GDS4 can be coupled to terminal 28
of the control circuit 10 of FIG. 1 instead of GDSl
being coupled thereto. The state of GDS3 and of GDS4
can thus be controlled in essentially the same manner
as is described for the control of GDSl.
Referring now to FIG. 3, there is illustrated
control circuitry 100 (within the larger dashed line
rectangle) which is coupled to the gate terminal of a gated
diode switch GDS10. Control circuitry 100 is similar to
control circuitry 10 of ~IG. 1 except that n-p-n
transistor Q3 and Q4 and p-n diodes D3 and D4 have been
added as is illustrated. Components and terminals of
circuit lOG of FIG. 3 which are essentially identical or
similar to those of circuit 10 of FIG. 1 have the same
reference denotation with an additional "O" at the end.
Q10 may be denoted as a third switch branch. The base,
collector, and emitter terminals of Ql may be denoted as
the control and first and second output terminals,
respectively. The combination of Q20, Q3, and Q4 may be
denoted as a fourth switch branch. The base of Q20 may be
denoted as the control terminal of the fourth switch
branch. The emitter and collector of Q4 may be denoted as
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the first and second output terminals of the fourth switch
branch. D20, D3 and D4 may be denoted as a level shifting
branch.
Q3 and Q4 are coupled together in a Darlington
type configuration with the collectors being common and
being coupled to a terminal 200 and the emitter of Q3 is
coupled to the base of Q4 and to a terminal 34. The
collector of Q20 is coupled to the base of Q3 and to
terminal 32. The emitter of Q20 is also coupled to
terminal 200. The emitter of Q4 iS coupled to the anode of
GDS20 and to a terminal 260. D20, D3 and D4 are serially
coupled together between terminals 200 and 240 with the
anode of D20 coupled to terminal 200 and the cathode of D4
coupled to terminal 240. Components Q10, CL10, D10, Q20,
Q3, Q4, D20, D3, D4, R10 and R20 serve as a control
circuit branch (illustrated within dashed line rectangle
AO) which serves to control the potential of the anode of
GDS20 relative to the cathode thereof. R20 iS optional and
can be eliminated.
29 It is difficult in some semiconductor
technologies to achieve an p-n-p transistor which has high
current gain. The combination of Q20 and Q3 and Q4
essentially act as the equivalent of an p-n-p transistor
which has a relatively high current gain. Thus Q20, Q3 and
Q4 perform essentially the same function as Q2 of FIG. 1.
D3 and D4 are needed to offset the addition emitter-base
: voltage drops of Q3 and Q4. With Q20, Q3 and Q4 biased on,
the voltage at the gate of GDS20 (terminal 240) is less
: positive than at the anode of GDS20 (terminal 260). This
helps insure that GDS20 iS in the ON state.
The circuitry of FIG. 3, excluding R20 has been
built and tested with GDS10 and G~S20 being of the type
disclosed in previously cited copending Canadian Patent
application Serial No. 340, 799. The built control circuitry
100 allowed the blocking of 500 volts across the anode and
cathode of GDS10 and cut off (interrupted) 100 milliamperes
of current flow
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therethrough.
The embodiments described herein are intended to
be illustrative of the general principles of the present
invention. Various modifications are possibly consistent
with the spirit of the invention. For example, other
switching devices, such as MOS transistors, could be
substituted for the bipolar transistors provided
appropriate voltage magnitudes and polarities are adjusted
as is well ~nown in the art. Still further, GDSs other
10 than the specific one illustrated can be used.
