Note: Claims are shown in the official language in which they were submitted.
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We claim as our invention:
1. A semiconductor device comparing within a
single body of semiconductor material a main thyristor and
a first and a second auxiliary thyristor, the two auxil-
iary thyristors being connected together in a parallel
electrical circuit relationship.
2. The semiconductor device of claim 1 in which
the second auxiliary thyristor fires at a lower dv/dt
loading than the first auxiliary thyristor and the main
thyristor.
3. The semiconductor device of claim 1 in which
the first and the second auxiliary thyristors have sepa-
rate emitter regions and a common emitter electrode.
4. A semiconductor device comprising a body of
semiconductor material, said body having a major top
surface, said body being comprised of a main thyristor and
a first and a second auxiliary thyristor, each of said
thyristors being comprised of four regions of alternate-
type conductivity, a p-n function between adjacent re-
gions, said main thyristor having an emitter region and an
adjacent base region terminating on said top surface, an
electrode affixed to said emitter region on said top
surface, a second electrode affixed to said base region on
said top surface, said electrodes being spaced apart from
each other, said first auxiliary thyristor being disposed
between said emitter electrode and said base electrode,
said first and said second auxiliary thyristors being con-
nected in a parallel electrical circuit relationship.
5. The device of claim 4 in which said second
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auxiliary thyristor fires at a lower dv/dt loading than
said main thyristor and said first auxiliary thyristor.
6, The device of claim 5 in which the two
auxiliary thyristors have separate emitters and are
electrically connected by a common emitter electrode.
7. The device of claim 6 in which the emitter
region of the main thyristor surrounds the emitter regions
of the auxiliary thyristors.
8. A self-protected semiconductor controlled
rectifier device comprising:
a first layer of a first conductivity type,
a second layer of a second conductivity type,
being adjacent to said first layer for
forming a first PN junction therewith,
a third layer of said first conductivity type,
being adjacent to said second layer for
forming a second PN junction therewith,
a fourth layer of said second conductivity type,
being adjacent to said third layer for
forming a third PN junction and having an
exposed surface,
a first main electrode in ohmic contact with at
least the surface of said first layer, and
a second main electrode in ohmic contact with at
least the surface of said fourth layer;
(ii) a pilot thyristor section including said first,
second and third layers, said first electrode and a fifth
layer, said fifth layer being isolated from said fourth
layer by said third layer, adjacent to said third layer
for forming a fourth PN junction therewith having an exposed
surface, being smaller in area than said fourth layer, and
being adapted to operate in association with said main
thyristor thereby to turn on said main thyristor section when
said pilot thyristor section is turned on;
(iii) an auxiliary pilot thyristor section including said
first, second and third layers, said first main electrode,
and a sixth layer of said second conductivity type, said
sixth layer being isolated from said fourth layer, having
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an exposed surface, forming a fifth PN junction with said
third layer, and being smaller in area than said fourth
area;
(iv) a gate means in contact with a part of
the surface of said third layer for turning on said pilot
thyristor section in response to a gate signal being applied
to said gate means;
(v) first auxiliary gate means being in contact
with said fifth layer; and
(vi) second auxiliary gate means being in contact
with said sixth layer;
the improvement wherein:
(vii) said auxiliary pilot thyristor section is
triggered with a voltage increasing rate dV/dt lower than
those of said pilot thyristor section and said main thyristor
section, and
(viii) the whole peripheral region of said fifth PN
junction is short-circuited by said second auxiliary gate
means.
9. A self-protected semiconductor controlled
rectifier device comprising:
(i) a main thyristor section including,
a first layer of a first conductivity type,
a second layer of a second conductivity type, being
adjacent to said first layer for forming a
first PN junction therewith,
a third layer of said first conductivity type,
being adjacent to said second layer for
forming a second PN junction therewith,
a fourth layer of said second conductivity type,
being adjacent to said third layer for forming
a third PN junction and having an exposed
surface,
a first main electrode in ohmic contact with at
least the surface of said first layer, and
a second main electrode in ohmic contact with at
least the surface of said fourth layer;
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(ii) a pilot thyristor section including said
first, second, and third layers, said first electrode, and
a fifth layer, said fifth layer being isolated from said
fourth layer by said third layer, adjacent to said third
layer for forming a fourth PN junction therewith, having
an exposed surface, being smaller in area than said fourth
layer, and being adapted to operate in association with
said main thyristor section thereby to turn on said main
thyristor section when said pilot thyristor section is
turned on;
(iii) an auxiliary pilot thyristor section in-
cluding said first, second, and third layers, said first
main electrode, and a sixth layer of said second conductiv-
ity type, said sixth layer being isolated from said fourth
layer, having an exposed surface, forming a fifth PN junction
with said third layer, and being smaller in area than said
fourth area;
gate means in contact with a part of the surface
of said third layer for turning on said pilot thyristor
section in response to a gate signal being applied to said
gate means;
auxiliary gate means for electrically connecting
said pilot thyristor section and said auxiliary pilot
thyristor section;
the improvement wherein:
said auxiliary pilot thyristor section is lower
in voltage increasing rate dV/dt than said pilot thyristor
section and said main thyristor section, and
the whole peripheral region of said fifth PN
junction is short-circuited by said auxiliary gate means.
10. A self-protected semiconductor controlled
rectifier device as defined in claim 8 or 9 wherein said
sixth layer is formed in a disc-like shape.
11. A self-protected semiconductor controlled
rectifier device as defined in claim 8 or 9 wherein said
main thyristor section is formed to surround said pilot
thyristor section and auxiliary pilot thyristor section
which comprise said gate means and auxiliary gate means.