Note: Descriptions are shown in the official language in which they were submitted.
1 157917
FAST LEARN DIGITAL ADAPTIVE EQUALIZER
Background of the Invention
The subject invention relates to data communication
equalizers and more particularly to automatic adaptive
equalizers utilized in high speed data modems. The equalization
scheme of the subject invention is parti.cularly adapted to
implementation under microprocessor control and provides a
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1 method and apparatus for performing highly accurate, ultra-ast
2 equalization by operation on the channel respons~ to only a
3 single transmittea test impulse.
4 The equalizer of the invention is particularly ~uited
to high speed polling applications. In such applications, it is
6 customary to rapidly successively address a nwmber of remote
7 stations, for example in different cities, from a ce~ 21 site.
Tran~ssion frcm each remote station involv~ a n~w transmission
9 line such that equalization must be re-established each time a
new remo~e site is polled. Therefore, it is highly desirahle
11 to shorten the equalization time as much as possibl e in order
12 to increase data throughputO
13 Many prior art equalizers have been relatively slo~
14 to equalize when first connected to a new transmission line and
have thus wasted valuable data throughput time. Typically,
16 ~.any time consuming incremental adjustments of the equalizer
17 taps are required during analysis of a relatively long period of
18 ranaom data or a training pattern containing numerous test p~1lses.
2 One prior art system proposes to equalize on ~ ~inc,le
0 transmitted test pulse bu~ actually requires a multiplicity o~
21 test pulses. This system is disclàsed in-the Bell System
23 Technical Journalr Vol~ 50, NoO 6 pp~ 1969-2041~ in an article .
by Robert W. Chang titled "A New Equalizer Structure for Fas~
24 Start Up Digital Communications~ n
Ano~her prior art system, disclosed i~ U.S~ Patent No.
26 3,962,637 issued to David Motley et al9 achieves e~ualization
27 during the duration of the response to two transmitted impulses
utilizing a technique which approxi~ates the well-known zero-
29 forcing scheme and does not ~mploy ~orrelation of signal samples.
31
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l Equaliz~tion in this system requires an extra impulse to adjust
21 the phase of the line signal so that proper sampling will occur.
31 Because this system uses a zero-forcing scheme and then only an
41 approximation thereto, it will not work on a highly distorted
line or-when high precision is neceæsary While the Motley
¦ system suggests itself for operation at 4800 bps~ it is not
71 suitable for operation at the much higher data rate of 9600 bps
~¦ at which the equalizer of the subject invention ~an operate.
91 I~ IEEE Transactions On Communications, Vol. Çom-23,
10¦ No. 6, June 1975, P. Butler et al disclose a method permitting
11¦ a direct solution of a matrix equation in real variables
12¦ describing the s~ttings o~ equalizer tap eonstants in a single
13¦ ~ideband system. Thi~ technique requires a much longer training
14 ¦ ~equence to reach an estimation of reasonable accuracy than
15 ¦ that proposed by the subject invention~ Moreover, the method
16 ¦ will not 801ve a complex variable matrix equation. Accordingly
17 ¦ the approach ~annot be used ~o.achieve equalization in a double :
18 I ~deband ~ystem as will the subject in~ention.
20 ¦ UMMA~Y_OF THE INVENTqON
21 ¦ It ~8 therefore an object of the invention to provide
22 a fa ter operating and more accurate equalizer for data trans-
23 mission systems.
24 It is another object of ~he invention to provide a
practical equali~er w~ich reguire~ a~alysi~ of only a single
27 transmitted i~pulse to ini~ially set the equalizer t~ps for a
wide range of varying line distortions and data rates.
28
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It is another object of the invention to provide an
equalizer wherein the equalizer tap constants are calculated
exactly, rather than by using approximations.
It is another object of the invention to achieve such
an exact calculation by an iterative technique which is performed
during the time when a transmitted impulse response is being
r~ceived such that the equalizer tap constants are calculated
and set during the interval between the end of the impulse t~me
and the time when the first received data reaches the major tap
of the equalizer.
It is another object of the invention to provide an
equalizer which can achieve a precise initial setting within
a very fast time, such as 30 milliseconds for a data rate of 9600
bps and 15-20 milliseconds for a data rate of 4800 bps.
In accordance with the present invention there is
provided in combination with an equalizer means adapted to receive
a first signal transmitted across a distorting medium said equalizer
means having a plurality of taps settable for compensating for
distortion in said first signal induced by said medium, the
20 apparatus comprising: -
means for generating a plurality of second signals
representing samples of in-phase and quadrature-phase impulse
response signals, said impulse response representing that of said
distorting medium; and
means operative upon said second signals to auto-correlate
and cross-correlate said second signals, form elements of a
matrix equation from the auto-correlated and cross-correlated
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said second signals, said elements including complex constants
and complex variables, said variables def ining the optimum initial
setting for said taps, for iteratively calculating the exact values
of said optimum initial settings utilizing said constants and for
5 setting said taps to said exact values to produce a substantially
distortion free signal.
Also in accordance with the invention there is provided
an apparatus adapted for use as an equalizer comprising:
first means for connection to a communi.cat~on channel
10 said first means including a plurality of taps settable fox
compensating for distortion in said channel; and
second means for producing a plurality of successive .
samples of signals representing in-phase and quadrature-phase
components of the impulse response of sa.id channel and for operating
15 upon said samples to form elements of a matrix equation from said
samples, to iteratively calculate the exact values of the optimum
settings for said taps utilizing said elements, and to set said
taps to said optimum values, wherein said samples are both auto-
correlated and cross-correlated and wherein said matrix equation
20 includes complex constants and complex variables. :
. .
Further in accordance with the invention there is
provided apparatus adapted for use as an equalizer comprising:
a first means for connecting to a communication channel,
said first means including a plurality of taps settable for
compensating for distortions in said channel; and
;
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~ 1 5 `~
second means for producing a plurality of successive
samples of first and second signals representing the impulse
response of said channel and for operating upon said samples to
form elements of a matrix equation from said samples, to iteratively
5 calculate the exact values of the optimum settings for said taps
utilizing said elements, and to set said taps to said optimum
values, wherein said successive samples are derived from a received
test impulse and wherein said exact values are calculated in a
time less than the duration of said received test impulse.
Further in accordance with the invention there is
provided an equalizer for equalizing to a training waveform
and received impulse response comprising:
means for connecting to a communication channel and having
a plurality of taps settable for compensating for distortion in
said channel;
means for detecting the presence of said training waveform
and for initiating a sampling count;
means for adjusting said sampling count in response to
said training waveform;
means for forming in-phase and quadrature-phase impluse
response signals from said received impulse response;
means for sampling said in-phase and quadrature-phase
signals in accordance with the adjusted sampling count to produce
a plurality of samples;
means for storing said samples;
means for correlating said samples;
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means for utilizing said correlated samples in a set of
iterative calculations to obtain the exact values of the optimum
setting for said taps; and
means for setting said taps to said optimum values.
Further in accordance with the invention there is
provided an equalization apparatus comprising:
means for receiving signals transmitted across a distort-
ing medium and having a plurali.ty of tap coefficients settable for
compensating for distortion in said signals induced by said medium;
means responsive to a training signal containing therein
the response of said medium to only one transmitted impulse for
sampling said response to produce a plurality of impulse response
samples;
means operative upon said impulse response samples to
auto-correlate and cross-correlate said samples, form elements of a
matrix equation from the auto-correlated and cross-correlated
samples, said elements including complex constants and complex
variables, said variables defining the optimum initial settings
for said tap coefficients, for iteratively calculating the exact
values of said optimum initial settings utilizing said constants,
and for setting said tap coefficients to said exact values to
substantially remove said distortion.
Further in accordance with the invention there is provided
in a data communication system, the process for achieving initial
adjustment of an equalizer in a receiver adapted to receive a
signal containing distortion comprising:
providing said receiver with an initial training waveform
including the response to only one transmitted impulse;
sampling the impulse response to produce a plurality of
impulse response samples;
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deriving the exact initial settings for the tap coefficient~
of said equalizer from said samples; and
setting the coefficients of said equalizer to said values
to substantially eliminate said distortion.
Further in accordance with the invention there is
provided in combination with an equalizer means adapted to
receive a first signal transmitted across a distorting medium,
said equalizer means having a plurality of taps settable for
compensating for sittortion in said first signal induced by
0 said medium, the apparatus comprising:
means for generating a-plurality of second 3ignals
representing samples of in-phase and quadrature-phase impluse
response signals, said impulse response representing that of said
distorting medium; and
means operative uponsaid second signals to auto~correlate
and cross-correlate said second signals, form elements of a matrix
equation from the auto-correlated and cross-correlated said second
signals, said elements including complex constants and complex
variables, said variables defining the optimum initial settings
20 for said taps, for iteratively calculating the exact values of
said optimum initial settings utilizing said constants in N iterations
for an NxN matrix and for setting said taps to said exact values to
produce a substantially distortion free signal.
Further in accordance with the invention there is
25 provided in combination with an equalizer means adapted to receive
a first signal transmitted across a distorting medium, said
equalizer means having a plurality of taps settable for compensating
for distortion in said first signal induced by said medium, the
apparatus comprising:
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1 15791~
means for generating a plurality of second signals
representing samples of in-phase and quadrature-phase impulse
response signals, said impulse response representing that of said
distorting medium; and
means operative upon said second signals to auto-correlate
and cross-corr~late said second signals, form el~ments of a matrix
equation from the auto-correlated and cross-correlated said second
signals, said elements including complex constants and complex
variables, said variables defining the optimum initial settings
10 for said taps, for iteratively and nonconvergently calculating the
exact values of said optimum initial settings utilizing said
constants and for setting said taps to said exact values to produce
a substantially distortion free signal.
Further in accordance witn the invention there is
provided a data receiver apparatus adapted to receive a training
pattern and impulse response, the apparatus comprising:
means adapted for connection to a communication channel
and having a plurality of coefficients settable for compensating
for distortion in the channel;
a sampling clock; ;:
means for detecting the presence of the training pattern
and for initiating counting by the sampling clock;
means for adjusting the sampling clock in response to
the training pattern;
means for forming in-phase and quadrature-phase
impulse response samples from the received impulse response
and utilizing the adjusted sampling clock;
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means for storing the samples;
means for correlating the samples;
means for utilizing the correlated samples in a set
of iterative calculations to obtain the exact values of the
5 optimum settings for the coefficients; and
means for setting the coefficients to the optimum values.
The apparatus of the invention has the major advantage
of enabling precise equalization constant calculations from the
samples in alminimal amount of time
despite wide variations in the distortion induced
by the medium over which the received impulse is transmitted.
Utilizing the invention, an equalizer has been constructed which
can achieve initial equalization in a time on the order of 30
milliseconds at a data rate of 9600 bits per second. This is
nearly five times faster than equalization can be achieved by
presently commercially available systems. In the preferred
embodiment of the invention, equalization is performed in response
to a single received impulse,~and an important feature of the
preferred apparatus is provision of a means to determine the
Z~ optimum points at which to sample.the impulse response prior to
: receiving t. While equalization is performed using in-phase
and quadrature phase impulse response signals at baseband
frequencies in the preferred embodiment, such signals may be
derived at passband or other translated frequencies.
2~
BRIEF DESCRIPTION OF THE DRAWINGS
-
The preferred embodiment and best mode presently
contemplated for implementing the just summarized invention will
now be described in detail in conjunction withthe drawings of which:
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1 Fig. lA illustrates the received signal utilized by
2 the equalizer of the preferred embodiment.
3 Fig. lB and lC illustrate two phase componen~s in
4 ~elative quadrature produced from the received signal on the same
S time scale as Fig. lA.
6 Fig. 2 is a schematic diagra~ useful in illustrating
7 the structure and operation of the equalizer of the preferred
8 embodiment.
9 Fig. 3 is a schematic diagram illustrating the digital
processor utilized in the preferred embodimen~ of the invention.
11 . .
12
6~1 .
181
~9!
201 . .
21l
221 . ' . I
231 . I
24 I I
251
26
28
29
31 I .
32 I -6- .
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1 Fig. 4 is a flow diagram illustrating the overall
2 structure and operation utilized to properly time the sampling
3 of the received ~gnal in the preferred embodiment.
4 Fig. 5 is a detailed flow diagram illustrating the
5 method and apparatus utilized to detect the presence of the
6 received signal in the preferred embodiment.
7 Fig. 6 is a detailed flow diagram illustratinq the
8 method and apparatus employed in the preferred embodiment
9 to proper.ly set the points for sampling the received signal.
Fig. 7 is a detailed flow diagram illustrating the
11 method and apparatus employe~ in the preferred embodiment
12 to determine the equalizer tap constant settings from the samples
13 of the received signal.
14 Fig. 8 is a continuation of the flow of FigO 7.
.Fig. 9 illustrates one technique suitable for
16 generàting phase quadrature signals for use i~ the subject
17 invention.
18 Fig. 10 illustrates an alternative technique ~or
1g generating phase quadrature signals for use in the subject
in~ention.
21 Fig. ll illustrate~ an alternative technique for
22 generating phase quadrature signals for use in the subject
23 invention.
24 DETAI1ED DESCRXPTION OF THE PREFERRED EMBODIMæN~
The automatic adaptive equalizer of the invention
26 may be conveniently introduced in conjunction with the training
27 ¦ pattern waveform utilized to set uP automatic aain co~tr~l~timina and
29 equalizationO as shown in Fig. l. Tha training pattern of Fig. 1
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32 . o7_
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1 i5 the analog demodulated pattern at the receiver after t-ans-
2 mission. The system of the preferred embodiment is particularly
3 directed to the quadrature amplitude modulation (QAM) technique.
4 The training pattern includes in succession a number
of bauds of carrier-only 11~ a number of bauds of clock-only 13,
6 a quiet or squelch period 15, a received impulse 17, and another
7 squelch period 19. The training pattern may also include an
8 optional fine tuning sequence before the transmission of
9 customer data 20.
In the preferred embodiment, eight bauds of carrier-
11 only 11 and seventeen bauds of clock-only 13 are sent. The
12 squelch periods 15f 19 are twenty-seven and twenty-one bauds long,
13 respectively, and the impulse period is one baud long. Each
14 baud period is 416.7 miliseconds. Of course~ other baud periods
could be utilized~ Also, the length of the periods 11, 17~ 15
16 and 19 depend on the maximum distortion. Wher. the line distor-
17 tion is less,.fe~r bauds are required for each one of them,
18 especially for periods 179 15 and 19 9 and the total time fsr
19 tuning will be shoxter~ When the line distortion is se~ere,
more bauds are required for each period, and the total tuning
21 tLme will be longer~
22 During the carrier-only period 13 in Fig. 1, the
23 initial incidence of carrier energy on the line is detected
24 ~carrier detect) 9 starting system operation. When carrier detect
occurs; a rough tLming counter KSTMX is started, which ultimately .
26 anticipates the occurrence of the impulse response 17. KSTMX
27 count~ once per baudO
28~ ~u omatic gain control i~ then perfocmed on the carrier~
31
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1 only signal 11. After a fixed number of bauds of carrier-only
2 11 are detected, the system knows it is actually receiving a
3 training pattern and can then expect the clock-only signal 13.
4 During the clock-only pattern 13, the apparatus
5 examines the transmitted pattern to determine the optimum
6 points to sample the forthcoming impulse response 17. The
7 apparatus then sets up for the impulse response sampling
8 procedure. The first step is to use the sampling point prev-
9 iously calculated to jump or preset the sampling clock to the
10 optimum sampling position. I~ may thus be ~een that the
11 preferred embodiment actually samples the response to a
12 transmitted impulse although other means for generating signals
13 representative of such samples could be employed. .
14 During the squelch period 15, the rough timing counter
RSTMX, which was ~et~up-upon detection of carrier-only, continues
16 to count to subsequently indicate to the apparatus the point i~
17 time at which to start to sample the in-phase and quadrature
18 phase impulse responses 17 (Fig. lB, lC~. The samples are then
19 taken, stored and correlated for forming a matrix. Ater the
20 matrix is formed a special iterative technique is utilized to
21 determine the precise initial equalizer tap settings, as dis-
22 cussed further below. .
23 The apparatus employed to perform these operations
24 is illustrated conceptually in block form in Fig. 2. The
apparatus includes an analog to digital ~A/D) converter an
26 aut~matic gain control (AGC) section 21, a digital processor
27 23, and a transversal equalizer 28. The equalizer ~8 is shown
28 conceptually for purpo~e~.of illustra~ion and is-preferably
29 implemented digitally, in which case it could also be shown as
31
32 _9_ ~
11~7917
1 part of the digital processor 23.
2 Digital demodulation of the QAM signal into in-phase
3 (X) and quadrature phase (Y) base band components, is preferably
4 accomplished in the digital processor 23. The analog form
5 of the demodulated in-phase and quadrature phase baseband
6 components is illustrated in Figures l~ and lC, respectively.
7 Demodulation again may be performed by well-known techniques
8 and may optionally ~e performed ~y dedicated apparatus outside
9 the digital processor 23~ Neither the AGC or demodulation
10 technique used form a part of the subject invention.
11 The X and Y phase components produced by demodulation
12 represent samples in digital form of the baseband signal9 the
13 Y compunent sample being demodulated by a carrier 90 out of
14 phase ~rom the carrier demodulating the X component sample. In
15 order to calculate the proper sampling time during the clock-
16 ¦only period9 two samples per baud are taken in the preferred
17 ¦embodiment~ After the optimum clock phase is s~t~ the system
18 ¦takes one sample per baud.
19 ¦ These samples X, Y are sent to separate channels 25,-
20 27 of the transversal equalizer 28. Each channel 25, 27 includes
21¦ equally spaced digital delay elements 29~ 31 and digital multi-
22 pliers 30, 32~ 33, 35 as known in ~he prior art. The multi-
23 pliers 32~ 33 multiply the delayed samples X~ by constants
24 CPi and cqi while the multipliers 30~ 35 multiply the delayed
samples Ym by constants CPi and cqi. The i'constants'l just
26 referred to are also called "coefficients" by some persons in the
27 art. The outputs of each multipliers 30, 32~ 33~ 35 are summed
28 by respective summers 40, 42~ 44~ 46 and fed to an adder 36.
29 The output of one summer 46 is subtrac~ed from that of the other
30 ¦42 in a summer
31
32 ~lO-
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1 37 to give the output data signal EQX. The outputs of the other
2 two summers 40, 44 are su~med by a summer 36 to give the output
3 data signal EQY.
4 As shown in more detail in Fig. 3, the preferred
5 embodime.nt of the invention includes a programmed microprocessor
6 structure and an equalizer unit. The equalizer unit 34 includes
7 the functions of the e~ualizer 28 of Fig. 2 and performs steady
8 state adaptive equalization, for example as taught in U.S. Patent
9 4,035,625 issued on July 12, 1977 and assigned to the present
10 assignee, In the preferred
11 structure of the present invention, the equalizer unit 34 also
12 contains some circuitry for accomplishing the initial equalizer
13 setting, as will be further detailed below.
14 The microprocessor ~tructure of Fig. 3 is conventional,
15 and includes a program store 16, a program counter 18, for
16 addressing the program store 16, a command decoder 14 for
17 decoding instructions from the program store 16 to produce
18 control signals and an arithmetic unit 22 for performing the
19 instructions in response to the control signals from the decoder
14. The microprocessor structure also includes a data storage
21 memory 26 and an address decoder 24 for-addressing the memory.
22 The program store 16 is a conventional read only memory (ROM)
23 of sufficient capacity to store the i.nstructions for performing
24 the equali~er operations to be described below and may be
constructed fro~ four AMD 9216 ROM chips. The program counter
26 18 is a conventional counter which can be loaded or jumped
27 as necessary in response to control signals from the command
28~ decoder 200 The arithmetic unit 22 is also conventional in
29
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1 structure and of sufficient power to carry out necessary
2 operation`s as hereafter described. The data storage memory
3 26 includes storage for constants and 256 words of random
4 access memory and may be configured from three AM91~12ADC
5 R~M chips and one General Instrument R03-5120 chip. The random
6 access storage is used to store incoming samples of the impulse
7 response 17 and subsequent data 20 while calculations are
8 underway.
9 The apparatus of Fig. 3 just described performs rapid
10 initial equalization by calculating the initial equalizer tap
11 multiplier constants in very rapid fashion. The manner of this
12 calculation and the function and structure of the apparatus
13 of Fig. 3 will now be explained in detail.
14 The multiplier constants to be calculated are labeled
15 c c c .O. c i and cql~ Cq2v Cq3 Cqi (
16 In complex form the equalizer tap constants may be expressed as:
17 ~i=Cpi~jCqi ~ ~i=l, 2~ 3,...~
1 To calculate the equalizer constants ci from the pair of demodu-
19 ¦lated impulse responses as shown in Fig. lB and lC, the following
20 ¦definitions are adopted.
21
22 ¦ rTO = ~(X2 + ~,2
23 l
24 ¦ 1 (Xm Xm+l ~ Y~ Ym+l) + j ~M l(X~Ym+1 _ y X ~ (2)
25 ¦ m-l m=l
26 ~ rT2 = ~ (xmxm+2 + YmYm+2) + j ~1(XmYm+2 YmXm+2~
29 ~ rTn-l m= (Xm m+n-l mYm+n-l)~j=l (XmYm+n 1 YmXm+n-1)(4)
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1 15791~
1 The following elements are defined:
2 ~ = Xn-q~k _ jYn-q-k k=1,2 .. n (5)
3 rT0
4 rTi
r - i=1,2 ~.n-l (6)
6 r~0
7 In the above equations (1) - (6)l Xm and Ym are the m th
8 sample of thein phase and quadrature phase of the impulse
response used for calculating the autocorrelation and cross
10 correlation. Equation~ (2), (3), (4) represent the auto-
11 correlation and cross-correlation of the samples ~ and Ym.
12 In the above equations 1-6, M is the total number
13 of samples used for calculating the auto-correlation and cross-
14 correlation and n is equal to the number of taps, twenty for
15 M and sixteen for n in the preferred embodimentp and q equals
16 the subscript of the first sample actually used to cal~ulate
17 hk. The variable q accounts for the fact that in the preferred
18 embodiment not all samples taken are used, in other words n is
19 less than M as later explained in detail. If n equals M, q=l.
~Q With these definitions~ the equationS defining the
21 optimum tap constants cl~ c2, ~ n for an equalizer of n taps
22 is written follow~ in matrix form:
~7
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1157917
1 rl r2 ............................ r* 1 ~ cl ~
2 r 1 rl* .......................... rn-2 C2 h2
3 r2 rl 1 r*l................... ~... r*n 3 .: .
6 ; ~ -r~
8 r 1' ' ' ~ . r 1 1 cn = h
In equation (7), rl...ri and hl...hn are complex constants while
11 cl...cn are complex variables. The asterisk (*~ indicates the
12 complex conjugate form.
13 According to the invention, a special solution of this
14 equation (7).permits a precise iterative c~lculation o~ the tap
constants cl...ci within the time interval required by the
16 training scheme of Fig. 1 plus the time delay ~equired for
17 data to propagate between the input and outpu~ of the equalizer.
1 According to this solution, the following definitions are made:
19 1 1 ~ Irl¦ ~ (8)
20 ¦ ~here ¦rl¦ represents the magnitude of the complex quantity rl; !
21 ¦ s ~1~ = r (9)
I Where superscript ~(l)W indicates the first iteration i=l; and
23 ¦ cl~ ) = hl ~10)
25 ¦ Adapting these definitions, the exact iterative solution for
26 ¦ the tap constants is as follows: i
27 I .
28 I .
2g ~ . I
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c l 1l) = (hi+l ~ m~l cm ri m+
2 ~i+l = ~(ri+l +m~l Sm j -ri-m~l) (Zi) (12)
4 ~ i+l = c(i) + ~ 1+l 5i*(+) 1 < j < i (13)
6 5j i~l = s~i) + s i+l Si(~ j < i (14)
8~ ei+l 5 e~ +1) ¦ 2) (15)
Zi 1
11 The superscripts again indicate the value of the variable ~or
12 a particular iteration. These equations 7-16 provide a simple
13 means for rapidly and exactly~calculating the tap cons~ants c
14 in the complex matrix equation (7). This iterative technique
enables the apparatus of the invention to calculate the constants¦
16 ci and set the equalizer to achieve initial equalization during a
17 total training time of approximately 30 milliseconds from the
18 beginning of carrier only ~o the first bit of customer data in
19 a 2400 baud machine. Variations of the matrix equation (7) may be
20¦ written and solved by the technique illustra~ed above without
21j departing from the scope of this invention.
2Z¦ The structure and operation of the apparatus of Fig~ 3,
231 as it relates to the preferred embodiment ofthe invention~ will now ~
24 ¦ described in further detail in conj~nction with Figs. 4-8~ j
25 ¦ After the carrier is de~ected and the clock KS~MX is
26¦ started~ the system operates according to the 1OW illustrated
271 in the flow chart of Fi~. 4. The flow of Fig. 4 illustra~es
28
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1 ¦ accomplishment of the automatic gain control function, filter,
2 ¦ demodulation, the detecting of the training pattern present (TPP)
3 ¦ and calculation of the optimum sampling point to be used in the
¦ subsequent operations of Fig. 7. Two samples of the carrier-only
5 ¦ signal are processed each baud for the eight bauds of carrier-
6 ¦ only 11. A counter N is set up at -8 to direct operation.
7 ¦ As long as N iS less than zero, the left branch 43
8 of the flow is followed and each sample is subjected to an auto-
9 matic gain control operat;on 47, a filter and demodulation opera-
PO tion 49 and the test pattern present detection 51~ The test
11 pattern detectiGn checks six successive bauds of carrier~only
12 signal and thereafter sets a flag indicating that a test pattern
13 is in fact being received. Each baud, the counter N is incre-
14 mented by one, as is the counter RSTMX.
When N equals zero, the clock-only signal 13 begins.
6 ¦ AGC is frozen and the right hand branch ~3 of the flow of Fig. 4
i5 entered. In this branch 53, a filter and demodulation opera-
8 tion 55 is performed and a test 57 of the TPP flag is made.
20 ! Assuming TPP has been detected and the TPP flag setp the fast
211 learn clock operation 59 is performed~ During this operation,
2 1 denoted FLCLK, the apparatus calculates the optimum sampling
21 point for the forthcoming impulse based on the demodulated clock- ¦
231 only information~ After each two samples per baud have been
241 demodulated and u~ed in the FLCLR proces~, the counter XSTMX
251 // . '
, ,. 261 //
27 ~
,, 281 , I
29 I !
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1 i~ incremented by one, as is the N counter. When FLCLK is done,
2 the flow proceeds to Fig. 7.
3 The manner in which the training pattern detection is
4 performed is illustrated in more detail in Fig. 5. Referring
S to Fig. 5, X and Y samples of the demodulated baseband signal
6 are supplied to respecti~e inpu~sat the rate of two samples
7 per baud.
8 The samples presented to the X input are operated upon
9 as followsu Each sample is first squared by a multiplier 63
and the output of the multiplier 63 is stored for one sample time
11 in a delay element 65~ The current output of the multiplier 63
12 is added to the negative value of the previous output of the
13 multiplier 63 in an adder 67~ The output of the adder 67 is
14 supplied as one input to a second adder 69. The X input is also
supplied to a second one sample time d~lay element 71. The
16 output ~f the second one-sample delay element 71 is supplied to
17 a second multiplier 73, alsv supplied with the X input, such that
18 the current X input sample is multiplied by the immediately
19 preceding X sample~ The output of t~e second multiplier 73 is
fed to one input of a third summer 75.
21 The Y input is similarly operated on. A delay element
22 77 delays the first sample of the Y input and a multiplier 79 .
23 multiplies the firs~ sample of the Y input by the delayed sample
24 for supply to the third summer 75. The Y input is also squared
and the squaredY input value i5 supplied to a delay element 81
261 me delayed squared sample is subtracted from a present squared
271 sample by a summer 83 whose output is supplied to the second
28¦ summer 69~ .
29 The output of the third summer -15 is multiplied by two
31
~2 ~17-
1 1~7917
l .~t n n~ultiplier 85 to form ~n output denoted aq ACK. The output
2 of the second summer 69 is denoted BCK. The arc tangent of
3 ACK/BCK is then taken to determine the sampling angle Q .
4 The current value of ~ lS stored by a delay element 87. The
stored value of ~ is used in the clock preset to be subsequently
6 discussed.
7 It is then determined whether ~n is within bounds for
8 each of a number of counts NTPP. ~hen NTPP is greater than l0,
9 five bauds of samples have been examined. Thus, if¦~ -90¦is less
than 15 continuously for greater than l0 NTPP counts it is con-
11 firmed that carrier has been received for 5 bauds, and the TPP
12 flag is therefore set equal to l. ~hi; operation is illustrated
13 in Fig. 5 by proceeding through blocks 9l, ~2, 93, to bl~ck 94,
14 TPP equals l. Once¦~ -go¦is greater than 15 al1d TPP equals l,
the clock preset routine is entered.
16 In the event however, that¦~n~9~¦is greater than l~ on
17 any of the carrier-only sa~ples operated on~ the test block 95~
18 TPP=l, will not be satisfied, and NTPP will be reset to zero. In
19 such event~ if KSTMX is greater than l9~ indicating nineteen
bauds have occurred without detecting TPP, TPP not present is
21 indicated. Failure to detect TPP normally indicates line dropou~
22 Once the training pattern is detec~ed~ it is necessary
23 to properly align the timing of the sampling of the received
24 impulse response 17. The sampling points are calculated sucb
that the equalizer can best minimize the output error. The
26 struc~ure and technique used in the preferred embodiment for
271 performing the presetting of the sampling clock ~LCLK) is
28¦ lllustrated in detail in Flg. 6.
31 -18-
32
1 157917
1l Assuming no distortion or noise, the difference between
21 successi~e angles ~ should be 180~ Therefore, if the
31 magnitude
41 ~ n 1~ ~ 1
s¦ is less than 12 for several successive samples, the clock is
6 in good r~nge~ Assuming that ~ is in good range over several
7 sampling intervals of the clock-only pattern~ the loop including
8 blocks 101, 102, 103, 104, 105, 106, and 107 in Fig. 6 is
9 operative. Initially, three counters NCNT, NSAMP~ and NAV are
set to zexo. When the ~irst sample is tested, the sampling
11 counter NSAMP is incremented by 1 as indicated by the block 101.
12 The angle ~ is then tested; and if it is within range~ the .
13 counter NCNT is incremented by 1. After four consecutive good
14 samples, the test, NCNT greater than or equal to four (Block 104),
is satisfied, and NAV = 0 is satisfied. In this event, the test
16 indicated by block 106 is performed to ascertain whether the
17 magnitude of ~ is less than 90. If so, a counter NR is set
18 -equal to 1. The counter NAV, representing he number to be
19 averaged, is set equal to 1 and TAGL (total angle) is defined
as equal to ~ at this moment~ The next time around the loop,
21 the test NAV = 0 is not true~ and NR is incremented by one at
22 block 108. NR + 1 is then equal to two. NR is then not odd,
23 and another sample is taken~ After this sample, assuming ~
24 is still in boundsJ NR is odd ~equal to 3). Therefore the num-
ber averaged NAV ~ 2 and TAGL is equal to the previous ~
26 value plus the new ~n value~ Thus there are two angles to be
27 averaged. ~ssuming that ~ continues to be within bounds, the
28 number of ~n samples averaged is incremented to 4 and then the
angle P~ is de~ermined a~ block 109 by calculating the ~uotient
32 _~9_
1 15791~
1 of TAGL and NAV. P~ indicates the number of degrees from which
2 the sampling point being used diverges from the optimum sampling
3 point. Thus, it takes lO angle differences within bounds to
4 reach the block P~ = TAGL/NAV.
In the event, however, that distortion is occurring,
6 other provisions are made for calculating
7 P~ . For example, if it occurs that ~ is greater
8 than 12~ satisfying block 102, a test llO if made to determine is
9 the number of good samples counted NCNT is greater ~han or equal
to 4, i.e. whether four inbounds angle tests have occurred. If
11 so, a test lll is made of the NAV counter to determine whether
12 any samples TAGL have been stored for averaging. I~ any samples
13 have been stored, the average ~av = TAGL/NAVL is computed as
14 indicated by the four blocks 112~ 113~ 114, 115. These four
blocks indicate that P~ is taken as equal to ~av if NR is even, .
16 whereas P~ is taken as equal to
78 ~GN (a av)¦ [180 ¦~av¦]
19 if NR is odd. If~ however, at the test lll~ NAV is found to
be equal to zero, indicating no samples ~ have been accumulated,
21 P~ is ~aken to be the current sample ~n.
22 If the NCNT ~ 4 test llO is not satisfied, a test 117
23 of the number of samples~ indicated by counter NSAMR is made.
24 If that number NSAMP is greater than 2g (~ 14 bauds), P~ is
again taken to be ~ . If NCNT > 4 is not satisfied and NSAMP
26 29 is not satisfied; NCNT is set to zero and another sample is
27 examined. This procedure assures that if the angle determination
28 is initally or occasionally out of bounds~ subsequent angles can
29 be examined to average the clock according to the previously
discussed procedures~
31
~2 -20~
,,,~,~,"
11S7917
P~ t~en det~rmines the pha3e shift of the impulse
2 ~ampling clock to be u~ed in the ~atrix ~ampling operation
3 illustrated in ~ig. 7.
4 ~n Fig. 7, the first time through, the new program (NP)
test 121 i~ po~itive and the left branch 123 of the flow is
6 followed. Here the equalizer random access memory (RAM) 26 i~
7 reset. Also the optimum sampling point determined by FLCLK is
8 used to jump the sampling clock to the optimum sampling position
9 within each baud. The clock rate is reduced in half to 2400
Hz such ~hat one sample per baud of the impulse response i8
11 taken from each of the X and Y channels. .
12 The second time through the flow of Fig. 7, a ~econd
~3 branch 1~5 is followed. Detected samples are demodulated (block
14 127), and then a tes~ 9 is performed on KSTMX to see if it i~ ¦
greater ~han 45. If it is not, RSTMX is incremented (block 131).
16 As soon a~ RSTMX is greater than 45, matrix formation 133 from
17 the sampled impulse 17 begins.
18 Th~ branch followed when XSTMX < 45 includes a demodu-
19 lated output energy test which assures that the system i5
~0 ¦ receiving the equalizer tes~ pattern and not customer dataO
21 ¦ After ~STMX i~ greater than i8 the energy i~ determined as denoted
22 ¦ by blocks 134, 138. If the energy ~8 below a ~et level Eref~ the ¦
23 ¦ squelch period is as~umed to have been detec~ed and the ~ystem
25 ¦ knows a training pattern is present. ~f the energy is greater
than Eref, training pattern TPP not pre~ent is ~ndicated. This
26 ¦ provide~ a doubl~ check on the presence of a training pattern.
271 . . I
281 ' ' . ' I
291 .
301 .
321 -2~-
1 157917
1 Sampling of the impulse wave form 17 is illustrated by
2 the vertical lines in Fig. lB and lC. The number of samples is
3 counted by a counter K, started when KSTMX = 45. Each sample
4 produces an X component xi and a Y component Yi. As the samples
xi, Yi are successively takenl formation of the matrix equation
6 (7) according to the definitional equations (1)~ (2), (3)~ (4)
begins. For e~ample, during the ~first baud, xl and Yl are t~ken
8 and stored in the RAM 25 and may then be used to calculate
xl + Yl , the first iter~ ion of rT0, equation (1). During the
second and successive samples, iterations of rT0 and the corre-
11 lating equations rTl, rT2... are calculated.
As the second sample x2, Y2 is taken, it is stored in
13 the RAM 26~ and the square of its magnitude, X2 + Y2 is com-
14 pared to the square of the first sample magnitude xl + Yl~ to
determine which is larger. The larger is retained and compared tc ,
16 the square of the magnitude of the next sample to determine the
lr ¦ largest sample and hence ~he peak 180 of the sampled impulse
18 response 17. The baud KP during which the peak 180 occurs is
! stored to be used in subsequent operations. All ~amples ~i~ Yi
20¦ are also stored.
21 Sampling is terminated upon one of two conditions as
22 indicated by a test 137 (Fig. 7). For the applicat~on of the
preferred embodiment~ it is advantageous to use eight samples
24 before t~e peak and eleven after the peak. If eleven samples
have occurred after the peak, K= KP + 11, and matrix formation
26
27 is terminated. If ~ ~8, KP is set equal to eight (blocks 135,
136) so that at least nineteen samples must he taken before for~
28
mation can be terminated upon K = KP ~ Otherwise~ once
29
~1 . I
32 ! -22-
~157~17
1 twenty-four total samples have been taken, matrix formation is
2 terminated and a flag is set.
3 Once the matrix flag is set, the next time through
4 the flow, a branch 132 occurs to the test 141, K > 20 (Fig. 8).
If greater than 20 samples have been taken, the test 141 is
6 satisfied, and the processor 23 proceeds to correct the effect
7 on the matrix of taking too many samples.
8 Thus, K > 20 indicates that, because of the rough
9 alignment of the counter KSTMX, too many samples before the
occurrence of the peak 18 have been taken. These samples will
11 likely contribute to inaccuracies and their effect is subtracted
12 by an operation 1~3 denoted SUB 1. This subtraction is accom-
13 plished by taking the first samples xli Yl from memory, calcu-
14 lating their impact upon the values for the equations (1), (2),
(3) for rTO, rTl, rT2~ etc. and subtracting that impact. After
16 the effect of the first sample xl~ Yl is subtracted the sample
17 counter R is decremented by one (block 145) and the K > 20 test-
18 141 is ayain performedO If the test 14~ is satisfied, the
191 effect of the second sample pair x2~ Y2 is calcula~ed and sub-
20¦ tracted, etc. until X < 200 Once R < 20, the values determined
21 by the remaining sampleS xi~ Yi are utilized in the subsequent
22 matrix calculations.
23 Once K is reduced to 20, a br~nch 147 occurs to the
24 tap constant calculation process, equations (5) - (6) and (8~ ~
(16), first passing through a test 149 to determine if the calcu-
26 laton has already been done. At the beginning of the calcula-
27 tion process, a c~ounter N is set to zeroO A test 151 of the
28 value of N is then madeO
32 -23-
1157917
1 The first step 153 in the calculation process, with N
2 equal to zero, is a normalization process. During this step,
3 the ri's and hk's of equations (4) and ~5) are calculated by
the microprocessor structure of Fig. 3.
The next time through branch 147, with N equal to 1
6 (block 155), the microprocessor develops the equali ~tion con-
7 stants ci by calculating successive iterations of the equations
8 (11) (12) (13) (14) ~15~ (16), pre~iously discussed.
9 With N - 2, the microprocessor structure of Fig. 3
begins to interact with the equalizer unit 34 in ~he following
11 manner. The microprocessor calculates equations (11) and tl2)
12 and then transfer the "r'~ matrix (equation 7) and other inter-
13 mediate calculation results to the equalizer unit 34. In this
14 manner, the microprocessor shifts part of the calculation respon-~
sibility to the equalizer unit 34 in order to free the processor
16¦ to handle other operations on the incoming d~ta. The equalizer
17~ unit 34 contains hard wired logic which performs or calculates
18 I the subsequent iterations of equations (11) through (14~ For
I N = 2, the ~lizer only calculates equations (13~ and (14)~ At
20 ~ the end of each calculation of an iteration of equations
21 through (14) in the ~qualizer unit 34, (13 and 14 only for N = 2)
the processor calculates the quantity Zitl equations ~15~ and
23 (16), and returns that value to the equalizer 34 for performance
24 of the next-iteration of equations (11) through (14)~ This
allocation of calculation between microprocessor and equalizer
26 unit is merely due to a desire to efficiently utilize the appara-
27 tus. As is apparent, the assignment of the calculations of
28
29
~2 -24-
,,,
? 157917
1 equations (11) through (14) to circuitry associated ~chematically
2 with the equalizer unit 34 i3 one approach to calculating the
3 instant equalizer settings. Other approaches such as utilization
of a more powerful microprocessor to do all calculations ~ould
be implemente~ according to the su~ject invention.
6 When N is equal to 15, the matrix has been solved for
7 the ~ap constants ck and the iteration done flag is set. When
8 the final tap constants are calculated, the hk's are stored and
9 the final equalizer constantæ ci determined according to the
just described procedure are set~
11 The just discussed operation is sufficient to set 16
12 taps. I~ the line signal is of such a poor quality that addi-
13 tional taps are needed, a fine tuning procedure may be performed
14 in which additional bauds of known two pha~e data are ~ent and
the error difference detected and used to adjust the additional
16 taps according to conventional procedures.
17 A~ is indicated in the above discu~sion, many modifica-
18 tions and adaptationQ of the preferred embodiment are possible
1~ without departing from ~he scope and spirit of the invention.
20¦ For example, as illustrated in Fig. 9, 10, and 11 the
I in-phase and quadrature-phase signals used by the equalizer of the
22 ¦ invention may be derived other than at baseband and in systems
23 ¦ using various demodulation schemes~
l Fig~ 9 illustrates a simple quadrature demodulation
25 ¦ technique wherein baseband signals x(t) and y(t) constitute the
26 ¦ in-phase and quadrature-pha e signals. In Fig. 9, the received
27 ¦ 8~ gnal on an input line 201 i8 fed to first and second mixers ~ i
281
29¦
311 . ' .
.1
32 -25-
1 15791~
1 203, 205 wherein the line signal is mixed with respective signals
2 cos~ct and - sin~ct where ~c is the carrier frequency. The com-
3 ponents are then filtered by respective baseband filters 207, 209
4 to yield the baseband quadrature components x~t) and y(t).
In ~ig. 10, the received signal is fed to a first pas-~-
band filter 211 having an impulse response h(t) and to a second
7 passband filter 213 having an impulse response h(t), which is
8 the ~ilbert transform of the impu7se response h(t~ of the first
9 filter 2Il. The respective outputs h(t), h(t~ of the filters
211, 213 are at passband frequency and constitute in-phase and
quadrature-phase signals which could be sampled by the equalizer
12 of the subject invention.
13 In Fig. 11, an output h(t) of the ilter 211 is fed to
14 a first mixer 215 and to a fourth mixer æl. The output h(t)
of the filter 213 is fed to a second mixer 217 and to a third
16 mixer 219. The four mixers 2i5, 217, 219, 221 receive respec- !
~7 iive second inputs of cos~ct9 sin~ct~ cos~ct, C08~t~ where ~c
18¦ is the carrier frequency~ ~he outputs of ~he first and second
1~¦ mixers 215~ 217 are the~ summed by a summer 218 to give ~he ~emo-
20¦ dulated baseband signal x(t~. The output of the rourth mixer
21 221 is subtracted from the ou~put of the third mixer 219 at a
22 summer 220 to give the demodulated baseband signal y(t). I~
23 Fig. 11, x(t~ and y(t). are.in-phase and quadrature-phase signals
24 which can also be samplèd according to the invention to accomplis~
initial setting of ~he equalizer taps~ '
26 Therefore, it is to be understood that~ within the ., ;
27 scope of the appended claims~ the invention may be practiced otheJ
28 than as specifically described herein. ¦
29
.
31 . .
~2~1 -26-
~ I