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Patent 1158717 Summary

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Claims and Abstract availability

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(12) Patent: (11) CA 1158717
(21) Application Number: 1158717
(54) English Title: INVERTER
(54) French Title: INVERSEUR
Status: Term Expired - Post Grant
Bibliographic Data
(51) International Patent Classification (IPC):
  • H02M 7/505 (2006.01)
  • H02M 7/515 (2007.01)
(72) Inventors :
  • WISMAN, FRANKLIN O. (United States of America)
(73) Owners :
  • WOOD'S (T.B.) SONS COMPANY
(71) Applicants :
(74) Agent: MACRAE & CO.
(74) Associate agent:
(45) Issued: 1983-12-13
(22) Filed Date: 1980-11-05
Availability of licence: N/A
Dedicated to the Public: N/A
(25) Language of filing: English

Patent Cooperation Treaty (PCT): No

(30) Application Priority Data:
Application No. Country/Territory Date
93,559 (United States of America) 1979-11-13

Abstracts

English Abstract


INVERTER
Abstract of the Disclosure
A self-commutating inverter supplies controllable
frequency power to a load. The load, which may be a
simple induction motor or the like, has plural load
windings which may be arranged in two groups so that
a load winding in one group has a complementary load wind-
ing in another. Thyristors are associated with each of
the complemented load windings and the thyristors of each
group of load windings are capacitively coupled. A DC
potential is applied to the inverter by a pair of terminals.
As different thyristors are enabled, current is commutated
from. one load winding to another. Excessive voltages
induced by commutating the inductive loads are reduced
by unidirectionally conducting devices coupled between a
terminal and a divided load winding. For producing
three phase power of controlled frequency, the load
has six windings, forming two groups of three findings
each. The thyristors associated with each group of wind-
ings conduct periodically in a sequence, with each thy-
ristor conducting for one third (or 120°) of the period.
While the conduction periods for each of the groups of
load windings are equal, they are offset in time by
one-sixth (or 60°) of the period.


Claims

Note: Claims are shown in the official language in which they were submitted.


THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. An inverter for converting DC available between a
pair of terminals to three-phase AC of controllable
frequency comprising:
first and second groups of complementary load windings,
first and second groups of thyristors, each associated
with a different load winding,
means for gating said thyristors in a predetermined
sequence and at a controllable frequency,
first and second groups of isolation diodes, one
isolation diode for each load winding, isolation diodes of the
first group connecting cathodes of first group thyristors to
an associated load winding and isolation diodes of said
second group connecting anodes of second group thyristors to
an associated load winding,
means coupling anode-cathode circuits of all said
thyristors to one or another of said terminals, said means
coupling anodes of first group thyristors to one of said
terminal and second group cathodes to another said terminal,
recovery diode means including first and second groups
of recovery diodes, each recovery diode associated with a
different load winding and coupled therewith for clamping
energy represented by collapsing leakage flux in a winding
during commutation to one or another of said terminals, said
recovery diode means including a pair of expander circuits,
one associated with each said terminal, each expander
circuit coupled between said associated terminal and the
terminal common to a group of said recovery diodes for
inhibiting clamping until a predetermined voltage level is
attained.
17

2. The apparatus of claim 1 wherein each said
expander circuit includes
a first series. circuit including a thyristor coupled
between one of said terminals and said common terminal,
a second series circuit connected in parallel with said
first series circuit, said second series circuit including a
voltage level establishing means for blocking current
conduction in said second series circuit until a
predetermined voltage level is attained and for then
conducting current, and means coupling said voltage level
establishing means to a gate electrode of said first series
circuit thyristor.
3. The apparatus of claim 2 in which said voltage
level establishing means is a zener diode.
4. The apparatus of claim 2 in which said first
series circuit includes an inductor for controlling rate of
current increase in said first series circuit.
5. An inverter for converting DC available between a
pair of supply terminals to polyphase AC of controllable
frequency comprising:
first and second groups of thyristors, each group
associated with a different supply terminal,
means for gating said thyristors in a predetermined
sequence and at a controllable frequency,
interconnected polyphase load windings terminating in a
plurality of load terminals,
first and second groups of isolation diodes, one
isolation diode for each thyristor, isolation diodes of a
first group connecting cathodes of first group thyristors
each to a different load terminal and isolation diodes of
second group each connecting anodes of second group
thyristors each to a different load terminal,
18

means coupling anodes of first group thyristors to one
said supply terminal and second group cathodes to another
said supply terminal,
and recovery diode means including first and second
groups of recovery diodes, one terminal of each recovery
diode coupled to a load terminal, for clamping energy,
represented by collapsing leakage flux in a winding during
commutation, to one of said supply terminals, said recovery
diode means including a pair of expander circuits coupled
between the associated supply terminal and a terminal common
to a group or recovery diodes for inhibiting said clamping
until a predetermined voltage level is attained.
6. The apparatus of claim 5 wherein each said
expander circuit includes
a first series circuit, including a thyristor, coupled
between one of said supply terminals and said common
terminal,
a second series circuit connected in parallel with said
first series circuit, said second series circuit including a
voltage level establishing means for blocking current
conduction in said second series circuit until a
predetermined voltage level is attained and for then
conducting current, and means conductively connecting said
voltage level establishing means to a gate electrode of said
first series circuit thyristor.
7. The apparatus of claim 6 wherein said voltage
level establishing means is a zener diode.
8. The apparatus of claim 6 in which said first
series circuit includes an inductor.
19

Description

Note: Descriptions are shown in the official language in which they were submitted.


T}le present inverltion relates to the conversion of
electrical energy from DC to an ad]ustable frequency.
~ackground of the Invention
~ evices for converting the frequency of electrical
power are known in the art. One class of devices to perform
this function are inverters, which convert DC energy to ~C
electrical energy. To enable the device to convert power
from one frequency to an adjustable or controllable frequency,
a rectifier is added to the inverter so as to first convert
the applied power to direct current, and then employing the
inverter, produce power of controllable frequency. The
present invention relates to improvements in invert~rs.
The prior art and the invention will be described
in conjunction with the accompanying drawings in which:
Figures 1, 2, and 4 are schematics illustrating
principles of prior art inverters, and Figures 3 and 5 are
waveforms useful in defining the conduction sequence of the
various thyristors shown in Figures 2 and 4, respectively;
Figure 6 is a schematic of one embodiment of the
inventive inverter; Figures 7A, 7B and 7C are waveforms
which illustrate the timing and sequence of conduction of
the various thyristors in the circuit of Figure 6;
Figure 8 illustrates a preferred embodiment of
Figure 6 which incorporates the expander circuit, and
Figure 9 illustrates an embodiment without divided load
windings.
Figure 1 illustrates a typical prior art inverter
which is supplied by direct current, and which, for
producing three-ph`ase power of controllable frequency,
ernploys six thyristors~ An inverter of the sort shown i,n
Figure 1 produces a six-step approximation to a three-phase
sinusoidal voltage. The thyristors associated with each
m~

phase of the phases A, B and C, alternately connect the
phase to either the positive or negative supply potential
as determined by the firing ~ogic (not iLlustrated). Also
omitted from Figure 1 are the commutation provisions for
momentarily reversing current flow throu~h the thyristor
which is nece.s~ary to quench its conduction for turn-orf.
Turn-off, or commutation, is an essential provision in
inverters of the type shown in Figure 1, for, if turn-off
fails to occur, for example, at Ta, prior to turn-on of
the complementary element T' , a direct short circuit across
the supp~y resuLts. This phenomenon is referred to as "short
through". Practical examples of an inverter of the type
mg/\~` - 2 -

.3
,.~ .~ ~,
shown in Figure 1 are found in "Solid~State Adjustable
Frequency AC Drives" by P.~. Mesniae~E, appearing in
Control Engi~e;ering, November 1971, page 57 et seq; see
~~3 in particular page 66 and U.S. Patents 3,'63~,819 and
- 5 3,781,641.
.
; Figure 2 illustrates a prior art arrangement for pre-
cluding short-through. This is accomplished by dividing
the load windings (Figure 2 shows only a single divided
load winding~ into two windings A and A', and connecting
them for alternate energizaiton by their respective
thyristors Ta and T'a. Each winding is energized on only
a half-~ave basis, and in the event a thyristor fails to
quench or turn-off, the impedance of the load winding
remains effective f'or limiting the current and its rate
of rise to moderate levels as compared to the short-
through produced by Figure 1, in the case of failure of
a thyristor to turn-off. Furthermore, Figure ~ illustrates
the commutation provision, by illustrating the capacitor
r 20 C, and the two steering or isolation diodes Da and D~a r
'`:'
.. . .
; The operation of Figure 2 is simply explained; when
Ta is conducting, the left-hand terminal of the capacitor
is effectively joined to the negative supply potential
but because the load winding is inductively coupled to the
load, and opposi-tely poled, the diode Dla will be at
twice the positive supply potential. The diode conducts
and this double charge is t~rapped in the capacitor C.
To commutate the current f~ load winding A to load
winding A', it is necessary only to enable the thyrisistor
T'a by pulsing its gate electrode. The trapped capacitor
charge momentarily supplies the load current traversing
the winding A, a]so draining off the internal junction
charge within Ta allowing it to turn-off and conduction
to shift to T'a, and load winding A'. This results in the
diode Da being elevated to twice the supply potential, and
- the capacitor charges in the opposite direction, ready for

the next commutation from T~a to Ta The conduction pattern,
and the sine wave approximation is shown in Figure 3.
;7',, Practical examples of inverters including divided load
-~ windings can be found in Hubner U.S. Patent 3,887,859 and
~'.,'~t 5 Greenwell U.S. Patent 3,753,062; Graham, in U.S. Patent
.~ 3,624,472, shows a similar arrangement in a cyclo-converter.
~ _.
,
`" The prior art also includes arrangements in which the
winding of a polyphase load, for example, a motor, are
interconnected so that two load windings and their asso-
~- 10 ciated thyristors are always in series. Such an arrange-
ment is shown in Figure 4, for example, for a two phase
load with divided or complementary windings. As shown
i in Figure 4, the windings of on~ phasa are divided and are
- illustrated as windings A and A', associated with each of
: 15 these windings are respective thyristors Ta and T'a. Like-
wise, another phase comprises the divided windings B and B'
; with their associated thyristors Tb and T'b. As illustrated
in Figure 4, any circuit path across the supply potential
;~ includes at least two windings and two thyristors. At
'~ 20 times, an interphase reactor is inserte~ at a point common
-- to all the windings, i.e. r at point P. The two halves of
the circuit of Figure 4 operate essentially independently as
described in connection with Figure 2, but the consequences
of a commutation failure are further diminished by virture
of the serial feed and certain construction convenience
~ advantages occur. In order to generate a two-phase OUtpllt,
-~ the gating pulses for Tb and T'b occur 90 electrical degrees
after the corresponding gating pulses for Ta and T'a, as
-~ illustrated in Figure 5. In this connection, it should be
- 30 noted that the thyristors for any phase are energized period-
ically, ! and alternately in sequence. The 90~ reference
- merely indicates that the gating pulses for one phase are
delayed, with respect to the gating pulses for the other
- phase, by a length of time e~ual -to one quarter (or 360
divided by 4) of the period. Hubner, U.S~ Patent 3,837,859,
.,,
,,
-~

'71i'
.i,~ - , . `" ............... ... .
is a practical example of such an axxangement; see, in
this connection, the windings la through ld in the Figure
of drawing.
. .
. :~
In practice, it has been found that the construc-
tion of Figure 2 and 4 is subject to a difficulty which has
limited its commercial applicability. The difficulty arises
.
from the divided nature of the windings, and the unavoid-
able leakage inductance associated with them, separate and
apart from the mutual inductance responsible for the develop-
ment of the double supply voltage used to charge the capa-
citor C. When load current is present, energy is stored
in the leakage inductance, at the time of commutation, it
produces an additive voltage which tends to increase the
charge on the capacitor and unless the capacitor has suf-
ficient capability, this increase in charge can destroy
the capacitor as well as apply excessive voltage stresses
to semiconductor devices connected in the circuit. Greenwell,
in U.S. Patent 3,753,062, recognizes this problem and pro-
poses a special winding arrangement as a solution.
-
-
. . .
-~- 20 Furthermore, the additive charge due to the leakage
-) inductance increases proporational to load current without
restriction. Increasing the size of the capacitor will con-
tain the reactive energy, with a diminished voltage excur-
~~ sion, but this is not feasible for several reasons, one of
which is economy. If the capacitor size is selected on
~ the basis of the commutation requirements, that is to say,
in practice to deliver maximum load current for about 40
microseconds, voltage overshoots of the order of 5 to 10
times supply voltage are encountered. For a nominal
supply voltage of a few hundered volts, the needed semi-
conductor ratings and insulation stresses are increased
into the kilovolt range.
, .
:-.
.~.. i
- ~,
~. ~
.--
. .

~ rhc E~rior art has suygestecl suFpression of these
e~cessive voLtages by use of surge cLippexs of various
types (i.e., Greenwell's dioc3es 31); but in practice, the
energy which they must be rated to continuously dissipate
is substantial and wastefllL of enercJy. ThUS, it is one
of the advantages of the present invention to avoid
commutation voltage overshoot by regenerating leakage
inductance stored energy to another of the load windings
which are conducting. It is another object of the present
invention to improva the load voltage waveform. Prior art
structures such as shown in Figures 2 and 4 are inherently
restricted to delivering a squarewave of load current over
180 or 1/2 the period of the conduction sequence. See,
for example, Figures 6A and 6B of Greenwell. The inverter
of the present invention closely approximates the sinusoidal
waveform by developing a three-phase stepped output with
120 conduction in each phase ~conduction in each load
winding for 1/3 of the period of the conduction sequence).
Achieving this object results in improved motor efficiency.
mg/~ 6 -
~,....
,~

~"lrnmary of the Invelltlon
In one aspect, the preseilt i.nvention CompriSQs an
inverter Eor conveLtillg DC available between a pair oE
supply term.inals to polyphase AC of controllable Erequency
comprisin~: Eirst and second groups of thyristors, each
group associated with a different supply termlnal, means
for gating the thyristors in a predetermined sequence and
at a controllable frequency, interconnected polyphase load
windings terminating in a plurality of load terminals,
first and second groups of isolation diodes, one isolation
diode for each thyristor, isolation diodes of a first group
connecting cathodes oE first group thyristors each to a
different load terminal and isolation diodes of second
mg/~ 7 -

group an~l con~e~ting anocles of second group thyristors
each to a different ]oad terminal, mearls coupling anodes
o~ first group ~hyristors to one supply terminal and
second group cathodes to anotiler supply terminal, and
recovcry diode means includin~ Eirst and secolld groups
of recovery diodes, one terminal of each recovery diode
coup]ed to a load terminal, for clamping energy, represented
by collapsing leakage flux in a winding during commutation,
to one of the supply terminals, the recovery diode means
including a pair of expander circuits coupled between the
associated supply terminal and a terminal common to a
group of recovery diodes for inhibiting the clamping until
a predetermined voltage level is attalned.
This results in the voltage applied to the
capacitor being controlled to be less than in the prior
art, but at the same time, controllable to some quantity
in excess of that made available by the supply voltage.
This is achieved by the expander circuit coupled between
each terminal of the power supply and a terminal of the
recovery diodes. The expander circuit includes a thyristor
and a zener diode coupled to -the thyristor gate. During
commutation, clamping is inhibited until the zener threshold
is reached. Accordingly, the capacitors can charge up to
the sum of supply potential and zener threshold. When
the zener threshold is reached, the diode conducts which
results in conduction of the thyristor and the clamping
action via the recovery diode takes place.
mg/~ ~ - 8 -
~'l
.

ReferL;nc3 to Figure 6, an adjustable freq7ency
power inverter is illustrated supplying po~,~er to a poly-
phase loacl represented by the windings ~, A', B,B', C and
C7. These represent divided load windings in a polt~phase
motor or transformer primary. As shown by the dot conventio~,
the sense of the windings A and A' are opposed when tra-
versed by current through their associated thyristors
Ta, T'a, etc, A thyristor is associated with each of the
load windings. The windi~gs are divided into two groups,
each comprising a winding fcom each phase with the two
groups serially connected at the common junction point P.
Figures 7A, 7B and 7C respectively illustrate
the conduction of the associated thyristors Ta throuc3h T'c.
Shown dotted in each of Figures 7A through 7C is the sine
wave appro~imated by the conduction sequence illustrated
therein. The logic necessary to enable the vaxious thy-
ristors is represented by the controllable oscillator S
coupled to the firing logic. The details of the logic
are conventional and therefore not disclosed herein. Suf-
fice it to say that typical firing logic is driven by~ignals derived from a waveform with frequency which is
the desired frequency for the output power, and gate pulses
are derived therefrom to cause -the respective thyristors
to conduct. As will become apparent as this description
. .

-10
proceeds, the gate pulse for each thyristor is coex-tensive
with the conduction period and therefore Figures 7A-7C show
:-~ not only conduction as a ~unction of time, but also represent
, the gate pulses delivered to the control terminal. An ex-
~` 5 ample of such logic is found in Dewan ~.S. Patent No.
4,024,444, see Figure 3. However, it should also be apparent
that the thyristors need not be gated for their entire con-
duction period. Once the inverter is operating a thyristor
gate pulse need only be so long as ~hat necessary for com-
mutation. Start-up, however, imposes further requirements~
As indicated in Figures 7A-7C, Ta is gated on 30 from a
: reference time, but it is not until 90 from the same time
that T'c is ~ated on. Since Ta will not actually conduct
current until T'c i~ also gated on, the initial gate pulse
to Ta must be long enough to span this 60 gap so that both
Ta and T c receive gating signals simultaneously. For
-; example, the gate pulse on Ta should extend from 30 to 90,
say 70, as a minimum, which is less than the 120 shown in
Figure 7A. It should be noted, in reviewing Fic~ures 7A
. 20 through 7C that -the thyristors associated with any winding
conduct only for 120 electrical degrees, or in other terms,
one-third of the period of the conduction sequence. Of the
two groups of windings A-C and A'-C', the thyristors asso-
ciated with each group conduct in sequence, one thyristor
being initiated into conduction when another thyristor in
the same group terminates conduction. A similar conduction
, . ,
- sequence is employed for the other group of tnyristors,
and the conduc-tion sequence for both groups extends over an
equal period of time. However, the time periods over which
the conduction sequence takes place for the t~o groups is
.,
displaced or offset by 60 electrical degrees of 1/6th of
either of the conduction sec~uence periods. For example, as
shown in Figures 7A through 7C, these thyristors conduct
in the sequence A-B-C, and the sequence is repeating. Like-
wise the thyristors A'-B'-C' also conduct in that sequence,
,
. ~
,~,

~ S~'71;-;~
.-- 11 --
and the sequence is likewi.se repeating. ~lowever, the time
diffcrence between the conduction of any tll~ristor in one
group, for example, Ta, and the next conduction of a thy-
ristor in the other group, for example T'c is offset by
-~ 5 60 electrical deyrees or l/6th of the period of conduction
sequence.
:
Each of khe thyristors is coupled to one terminal o
a DC source, anodes of the thyristors Ta,Tb and Tc are
connected to a positive terminal, whereas the cathodes
of thyristors T'aT'b and T'c are connected to a negative
terminal. The thyristors in each group are capacitively
coupl.ed, thyristors Ta and Tb are coupled by a capacitor
Cl, thyristors Tb and Tc are interconnected by a capa-
citor C2, and thyristors Ta and Tc are coupled by a
capacitor C3. Likewise, capacitors C4, C5 and C6 couple
thyristors Tla T'b and T'c. Steering diodes Da ~ Dc
and Dla ~ D'c connect each thyristor to its associated
load winding. In addition, recovery diodes R, one for
.~ each load winding, couple one terminal of the associated
- load winding to one terminal of ~he DC source for re-
covery of the leakage inductance stored energy, as will
be explained below.
In operation, assume that the supply voltage is ini-
tially impressed upon the circui-t, gate drive is absent
from each of -the thyristors, and all capacitors are dis-
charged. Upon the application of gate drive, assume that
Ta is the first thyristor to receive a gatin~ pulse (30
from an arbitrary reference); the following operation
occurs. Since no other thyristor is enabled, the gating
on of Ta will not produce current flow. However, when
T'c is enabled (at 90 frorn the same reference) current
flow is established through windings A and C'.
At this point, Da is at the positive potential and D'c
is at the negative potential. The capacitors Cl - C3
are charged. C3 charges through a circuit includinq Ta

C3, Dc, windin~ C, winding C', D'c and T'c. Ca~acitors
Cl and C2 are charged to the supply potential in an
oscillation circuit with winding B which is coupled via
mutual inductance to the energized windings A and C'.
A si~ilar process causes the charging o~ capacitors C4
through C6 so that all capacitors have charged to the
supply voltage at the time that Ta is gated of~ and Tb
is gated on, at T = 150. Capacitor Cl is charged with
its left hand terminal positive and its right hand terminal
negative. When Tb is gated on, the current flowing in
winding A is diverted through Tb, the capacitor Cl reverse
biases Ta allowing it to turn of~ while the capacitor
is discharging. When Ta recovers its blocking capability,
i.e., when current ceases, load current has been transferred
to capacitor Cl, and because the winding A has substantial
energy stored in its leakage inductance, it will tend
to deliver this energy into the capacitors by maintaining
current through Da. As was mentioned in connection with
the prior art, this voltage charge in the capacitors would
tend to reach several times the supply voltage. It is an,
important aspect of the present invention that this voltage
excursion generated by the,collapse of leakage flux is
clamped to the supply voltage through one of the recovery
diodes, in this case Ra. Thus, because of the presence of
Ra the current decay transient is shifted to the supply
terminal when the left hand terminal of capacitors Cl and C3
have reached the potential of the associated supply terminalO
The capacitors are now charged to supply potential ready
for subsequent commutation of current from windin~s B to
C. By the same process, th~ capacitors serving the
lower winding group are charged
- 12 -
ms/~

'7 ~
.1,
.....
, , - / 3-
ready for the commutation from C' to A'. The inductive
energy recovery current, carried by the recovery diodes
~ R, is delivered -to the opposite polarity suppl~v terminal
_r_ and may be viewed as transferred either to the instan-
taneously conducting opposite group winding or as being
~- returned to the source. This is achieved with very little
.....
- loss to be dissipated as heat.
~ ~ .
.;,;
;~ In a test with a typical motor operating at 1.6
horsepower loading and a frequency of 63.1 Hz., the
average current in one winding was 4.5 amps and the
current in the recovery diode was .72 amps or 16%.
- ~nder no-load conditions, the values are 2.7 and 1.55
amps, respectively, with a DC supply bus at 165 volts.
Under no-load, the total energy being regenerated is
3 x 1.55 x 165 = 7S9 watts. I~ this energy were being
dissipated in a surge clipping device, the heatir~g would
~ be substantial. In addition, the influence on overall
- energy conversion efficiency would be devastating when
- one considers that the useful motor output, to the load,
is 1.6 hp. x 746 watts/hp. = 1~11 watts. Accordingly,
~- the recovery diodes, and the arrangement of load windings,
~-. result in inductive energy recovery, eliminating the un-
controlled voltage stress shortcomings of the prior art
with excellent economy of energy, and with the addition
of relatively simple components.
- To compare the advantages of the conduction pattern
of Figures 7~ through 7C to that shown, for example, in
Figure 5, tests were conducted with identical motor
frames wound for the conduction pattern of Figures 7A
through 7C and also for the conduction pat-tern shown in
Figure 5. In order to isolate -the advar-tages of the
conduction pattern, the second motor was tested with re-
covery diodes added in accordance with the teachings of
r~l

7 1 ~
,~
,~,.
Fi~ure 6. The division of a two-phase load into two serial
groups inherently imposes a 180 conduction pattern in order
to maintain current continuity. That is, for example,
-! with only two phases, each phase must conduct for 180,
! 5 otherwise conduction terminates~ The test results, shown
-~'' in Table I, accordingly illus-trate the beneEits of the
~-? 120 conduction vs. 180 conduction, resulting in reduced
_~ harmonics and improved motor operation.
TABLE I
~j lO Criteria 180 Conduction 120 Conduction
~ .
Maximum torque capability
inch/lbs. 57.5 75
Nominal ratable torque
(2/3 maximum) inch/lbs. 37.5 50
15 Efficiency at ratable torque
loading 37.2% 54.4
. ,
Loss, watts at rata~le
~- torque loading 609.5 450.2
:- ,
The energy efficiency figures are overall efficiency
from the 60 Hz. source to the motor shaft, and include
an initial conversion from 60 Hz. to DC. Since the initial
conversion is common to both the 120 and 180 examples,
it should not bias the comparison. Both tests were con-
ducted with the power frequency at 30 Hz. wi-th vol-ts/Hz.
optimally adjusted in each instance.
A preferred emobodiment of the invention is illus-
trated in Figure 8. Figure 8 is identical to Figure 6
with the exception that the anodes of diodes Ra, Rb and Rc
are not directly connected to the - supply; rather, the
._

~S~
.~
anodes are connected to the - t~rminal through an ex~
pander circuit ~R. In a similar manner, the cathodes
of diodes R'a, R'b, and R'c ~ are connected to the ~
supply by the expander circuit XR'. Each of -the expander
circuits includes a pair of series circuits connecting
supply terminal to recovery diode. A first series
~- circuit includes a thyristor TXR and an inductor L
arranged to limit the current growth in TXR to within
its di/dt rating. The second series circuit includes a
voltage level establishing device which blocks current
up to a predetermined voltage level and then allows
conduction, such as the zener diode Z, and a resistor R.
In operation, when commutation is occurring, as for
example in turning off Ta, the current in winding A is
diverted first to the capacitors Cl, C2 and C3. In the
embodiment of Figure 6, the capacitor voltage is clamped
to the power terminal level by action of the diode Ra.
-~ In this preferred embodiment the clamping action is
deferred until the capacitor voltage has reached a
greater level determined by the offset device repre-
sented by the zener diode Z.
. .
The offset device Z is characterized by being non-
-
,~ conductive up to a definite voltage level and then going
abruptly into conduction with small increment of further
applied voltage. This conduction, when it arises, is
applied to the gate electrode of the thyristor TXR and
its shunt resistor R. Thyristor TXR, which was initially
~- non-conducting, is turned on to clamp winding A voltage
to the level of the power terminal, thereby terminating
charging of the capacitors. The diode Daisolates the
capacitors, trapping the increased voltage therein, ready
to effect the next commutation. The remainder of the
.:
.
_

- 16 -
inductive energy in winding A is then returned to the
power terminal as in the previously described embodi-
`~*; ments.
.~
The resistor R affords threshold loading for the
offset device Z and ma~, in some instances, be incor-
m~ porated within the gate structure of the thyristor
TXR as is understood by those skilled in the art.
The entire operation goes forward without energy
loss or dissipation other than the insignificant
lQ forward voltage drop in TXR while conducting the
. ; residue of the inductive energy remaining after the
capacitors have been charged to an enhanced level
for effective low speed commutation. That voltage
level and its stresses cannot exceed supply voltage
by more than the value established by the offset
device Z. It should be apparent that the use of
recovery diodes R is not limited to three phase
inverters and the divided three phase arrangement
of Figure 6 or 8 need not employ the recovery diodes.
s ~ Ja r
- 20~ Figure 9 is i~cnti~ to Figure 8 except that the
windings A-A' have been replaced with the single winding
A. Likewise, the windings B - B' and C - C' have been
replaced by the windings B and C, respectively. Whereas
in Figure 8 current flowed in winding A only when Ta was
^~- 25 on, now current, of one polari-ty or another, will flow
in winding A if Ta or Tla is on. In other respects
the circuit of Fig. 9 operates in the same manner as the
circuit of Fig. 8.
,;
,,
..: . ,-

Representative Drawing

Sorry, the representative drawing for patent document number 1158717 was not found.

Administrative Status

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Event History

Description Date
Inactive: IPC from PCS 2022-09-10
Inactive: IPC deactivated 2011-07-26
Inactive: IPC expired 2007-01-01
Inactive: First IPC derived 2006-03-11
Inactive: IPC from MCD 2006-03-11
Inactive: Expired (old Act Patent) latest possible expiry date 2000-12-13
Grant by Issuance 1983-12-13

Abandonment History

There is no abandonment history.

Owners on Record

Note: Records showing the ownership history in alphabetical order.

Current Owners on Record
WOOD'S (T.B.) SONS COMPANY
Past Owners on Record
FRANKLIN O. WISMAN
Past Owners that do not appear in the "Owners on Record" listing will appear in other documentation within the application.
Documents

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Document
Description 
Date
(yyyy-mm-dd) 
Number of pages   Size of Image (KB) 
Claims 1994-03-03 3 114
Cover Page 1994-03-03 1 13
Drawings 1994-03-03 4 65
Abstract 1994-03-03 1 33
Descriptions 1994-03-03 16 593