Note: Descriptions are shown in the official language in which they were submitted.
l 163~23
Background o~ the Invention
This invention relates to circuits ~or compensating for voltage
variations in a supply network, and more particularly, to a circuit ~or main-
taining constant a voltage across two conductors of an A-C supply network which
supplies a load having a rapidly changing impedance.
A circuit which is commerc:ially used to control the voltage of a
supply network which supplies electric power to furnaces which are used in the
manu~acture of steel and the melting o~ scrap is described in "Siemens-
Forschungs-und Entwicklungs-Bericht", Vol. 6 (1977), pp. 29 to 38. In an
lQ electric ~urnace for making steel or melting scrap, an electric arc which is
produced between the electrodes o$ the circuit and the material to be melted
is randomly interrupted as the material melts. Such widely varying load im-
pedances are also found in rolling mills which contain pulse po~er supplies
for operating synchrotrons or converter drives. The rapid and wide excursions
in the amplitude of the voltage and current can create problems to other con-
sumers of electric power on the same network. Although a supply network may
have an impedance which has a negligible resistive component, such networks
may have large reactive impedances which produce large reactive currents in
response to the voltage variations. For example, other electric power con-
2~ sumers which employ incandescent lamps connected to the supply network will be
subjected to annoying fluctuations in brightness. It is necessary to suppress
the effects of such load variations and the consequential reacti~e currents
~ecause most such loads cause the lncandescent lamps to flicker in the fre-
quency range of 3 to lO Hz, and at amplitudes of 0.5%, which are in the ranges
perceiva~le by the human eye.
The circuit descriaed in the above publication is provided with a
; battery~o$ capacitors connected in shunt with a load which is connected to a
~ ~L633~3
three-phase supply~network, the capacitors ~eing capable of providing as much
reactive current as tlie load may maximally consume. The clrcuit is further
provided with a three-phase control element having electric valves which are
connected to the supply~network and which are fired by means o~ a A circuit.
The three-phase control element consists of a choke connected in series wlth
an A-C control element having two controlled switching valves which are con-
nected in parallel to one another but poled ~or conduction in opposite direc-
tions. The valves are controlled by circuitry responsive to the current flow-
ing through the load as well as the current flowing through the three-phase
lQ control elements. Such circuitry consists of a multiplicity of computing
elements which perform the functions of coordinate transformation, vector iden-
tification and vector rotation. Such a system is expensive and complex.
It is ~e~, therefore, an object of this invention to provide a
simple and fast acting control circuit which maintains the voltage level
~etween the individual conductors of a single or miltiphase supply network
constant for at least a short time.
It is another object of this invention to maintain the voltage level
between the conductors of a transmission network, illustratively between each
phase conductor and a neutral conductor, or ~etween two phases of a polyphase
2Q network, constant at a predeterminable mean value.
It is a still further object of this invention to maintain the volt-
age between the conductors in a transmission network constant at a predeter-
minable value responsive to a predetermined function, which may be a power of
the voltage, so as to influence an RMS va]ue of the voltage.
It is another object of the invention to selectively maintain the
voltage between the conductors of a transmission network constant or permit
- such voltage to vary over a predetermined period of time of sufficient duration
~ 2 -
,
32~
that the variations will not adversely affect other consumers.
Summary of the lnvention
The foregoing and other objects are achieved by this invention which
provides a circult for controlling the voltage between two conductors of an
A-C supply network which supplies a rapidly varying load, the circuit having
at least one electric valve which is poled to conduct current during a prede-
termined half wave of the voltage supplied by the transmission :network, the
valve being in a conductive state in response to a firing pulse which is pro-
duced in response to the output signal of an integrator which is responsive to
. lO the predetermined half-wave.
According to a broad aspect of the invention there is provided a
circuit for controlling a suppl~ voltage between two conductors of an A-C
network which supplies electrical power to a load having a rapidly changing
impedance so as to maintain a half-wave mean supply voltage amplitude which
: corresponds to a predeterminable value, the circuit being of the type having at
least a first controlled electric valve e].ectrically disposed between the
conductors, and a measuring device for producing a voltage signal responsive to
the supply voltage on at least one conductor, the circuit being characteri~ed
in that there is further prouided:
2a valve control means for controlling the conduction state of the first
controlled electric valve, said valve control means providing at least one
firing pulse dur~ng a half-wave of the supply voltage which is of a first
polarity so as to cause the first controlled electric valve to conduct, said
firlng pulse being responsive to a first signal corresponding to the difference
bet~een the amplitude of a first integration signal, corresponding to an
integration of the voltage signal, and the predeterminable value; and
supplementary firing signal m0ans for producing a supplementary firing
3323
signal for placing the first controlled electric valve in a conductive state if
the first controlled electric valve has been in a non-conductive state for a
period exceeding a predetermined maximum time period.
In one embodiment of the invention, a measuring device, which may be
a voltage transformer, provides a voltage-responsive signal to an integrator
which provides a signal corresponding to the integration of the network voltage
to a firing pulse generator for each of two electric valves which are poled for
; conduction in opposite directions. The integration signal may bP combined with
an electrical value corresponding to a preset mean value, so as to place each
electric valve in a conductive state when the integration signal, corresponding
to the product of network voltage and time, equals and exceeds the preset mean
value. In a further embodiment, the integration signal is combined with the
preset mean value in a plurality of comparators which are connected at their
outputs to respective limit indicators. Thus, each limit indicator receives a
signal corresponding to the di~ference between the integration signal and the
preset mean value. The limit indicator corresponding to the electrical valve
which is poled to conduct during a positive half-wave of network voltages
receives a signal which corresponds to the integration signal minus the preset
mean value. On the other hand, the limit indicator which is associated with
2Q the electrical valve which conducts during the negative hal~-
'~
~ - 3a -
6~32~
wave receives a signal corresponding to the sum of the integration signal and
the preset mean value. The limit indicators thereby provid0 at their outputs
respective signals which correspond to the difference between the absolute
value o~ the integration signal and the preset mean value. Each limit indi-
cator may be coupled at its output to a pulse fo~ner which transforms the sig-
nals from the respective limit indicator into a form suitable for driving the
corresponding one of the electrlcal valves.
In some embodiments, the output signal of an A-C voltage integrator
can be rectified and conducted to a single limit indicator for comparison with
the preset mean value. The output signals of the limit indicator would be
used for alternatingly firing the electrical control valves. Such a system
would reduce the number o~ required components.
It is advantageous to connect a choke in series with the parallel
combination of electrical valves between the network conductors. Such a coil
would form a voltage d~v~der in combination with the net~ork inductance, and
limit the amount of current flowing through the network and the electrical
valves when the electrical valves are fired.
In embodiments of the invention wherein it is desirable to control
; the mean voltage value of the network so as to conform to a quantity related
2Q to the RMS value, it is advantageous to utilize a function generator disposed
between the voltage measuring device and the integrator. Such a function
generator would receive at its output a signal corresponding to the network
voltage value V and to produce an output signal corresponding to +/~/a, where
a ~ 1. The introduction into the circuit of such a ~unction generator addi-
tionall~ causes the electrical valves to be operated earlier in time so as to
permit a more rap-id correction of a possible unacceptable voltage variation.
In embod~ment~ o~ the invent~on wherein a choke is used in series with the
1 ~33~3
electrical valves, as descri~ed hereinabove, a vol~age is developed across
-~ the choke, which voltage is integrated b~ the integrator, even after the
electrical valves ha~e been placed in a conductive state, and such a voltage
may result in an undesirable deviation from the desired preset mean value.
In such an embodiment, it is advantageous to correct for the choke voltage by
` providing a second integrator responsive to a signal which corresponds to the
current flowing through the electrical valves. The advantageous preselection
of the integration time constant of the second integrator results in an out-
put signal which, when com~ined with the signal originall~ provided to the
lQ ~irst integrator, shifts the initial conduction point of time of the respective
valve so that the integral of the voltage remaining after conduction by the
electr~cal valve is compensated, while the integral of each voltage half-wave
corresponds to the desired preset mean value.
~ Although the circuit described hereinabove operates quickly, illus-
`~ tratively~one second, to compensate for short term voltage fluctuations, the
circuit generally need not compensate for relatively slow variations in load
voltage, illustrativel~ in the range of several seconds, because such slow
variations have a less detrimental effect upon the electrical service provided
to other consumers. It is desirable, however, to provide circuitry which will
2~ respond to such ~lo~ ~ariations so as to provide a variable mean value which
maintains a fixed relationship with respect to the network voltage. Thus,
lt is desirable to control the desired mean value so that it is alwa~s posi-
tioned in the center of its control range, as seen over several periods. Such
an advantageous adjus~ment of the desired mean value is ac~ieved b~ the use of
a series circuit having a rectifier, a smoothing filter, and a Pi-circuit.
e output of the Pi~c~rcuit is used to determlne the mean reference value.
I~t is~desirable in some embodiments to control the electrical valves
~ ~63323
so as to prevent the current ~lowing through the valves from decreasing to
less than a predetermined minimum. Supplemental firing signals are produced
for the electrical ~alves by a line synchronized control unit. The line syn-
chronized control unit provldes the supplemental firing pulses if the time
during which an electrical contral ~al~e is in a non-conductive states exceeds
a predetermined maximum time period. The maximum non-conductive time can be
preset by circuitry contained within the line synchronized control unit. In
addition to compensating for long term network voltage drifts, the line syn-
chonized control unit will also correct for undesira~le phase rotation which
can adversely effect the *ransient characteristics of the integrator, and
thersby eliminate cumbersome integrator drift suppression circuitry. In em-
bodiments of the invention such as those described hereinabove wherein separate
branches having separate limit indicators are used to drive respecti~ely as-
sociated ones of the electrical valves, variations in the operating character-
istics of the components in the branches, with respect to each other, can re-
sult in asymmetrical operation which, like drift, will result in an undesir-
able D-C component in the network. The line synchronized control unit further
~unctions to compensate for difficulties encountered in the use of the function
generator for the function +/~/a, which can be especially problematical in
2Q weak networks which produce wave shapes with multiple zero crossings.
In a still further embodiment of the invention, the problems de-
scrihed hereina~ove are alleviated by providing a rectifier in series with a
power raising function generator between ~he first measuring de~ice and the
first integrator, for forming the function y=xa for x ~ o and a being any
des~red value. T~e output of the integrator is combined with a quantity cor-
responding to the desired mean value, and conducted to the input of a limit
indicator which is connected to the input of a pulse former. The output of
1 1~33~3
the pulse ormer is connected to a pulse distributor and subsequently to the
electrical valves. ~ircuitry~may be provided for resetting the first in-
tegrator ater a ~iring pulse and before the subsequent zero crossing of the
- voltage. Such resetting may be achieved by a supplemental pulse signal. This
em~odiment has the advantage of utilizing onl~ a single limit indicator or
both electrical valves. In addition, the integrator is reset to zero during
each voltage half-wave, thereby eliminating the possibility of producing a D-C
component on the network, because any zero drifts which would shift the elec-
trical valve irings in time will always occur in the same direction, thereby
maintaining symmetry.
Thi5 embodiment may be improved by provlding a switch electrically
disposed between the power raising function generator and the introduction
into the circuit of the quantity corresponding to the desired mean value. In
operation, such a switch would maintain an open state i~ the polarity of the
instantaneous vol~age coincides in polarity with the polarlty of the voltage
half-wave during the most immediate prior opening of an electrical valve.
Illustratively, if the valve which is poled or conduction in the positive
direction has been fired so as to compensate the positive voltage half-wave,
the s~itch will remain opened until the voltage becomes negative. During this
period, the integrator is set to zero. After the voltage crosses zero so as
to become negative, such negative voltages are conducted to the integrator by
closing the switch; however, if multiple zero crossings occur as a result of
network fluctuations, the switch will open during all positive portions of the
wave ~orm. It is advantageous in this embodiment to connect the choke in
series with the electrical valves, and also to measure the current flowing
through ~he electrical valve boy means of a measuring device. ~he output o
the measuring device i5 conducted to a second rectifier and a second integra-
3~3
tor, ~hich second integrator is reset to zero almost concurrently with thefirs~ integrator. A second ~switc~ which operates in synchrony with the first
switch is dispQsed ~etween the second recti~ier and the second integrator.
The output signal of the second integrator is added to the output signal of
the power raising function generator, and the combined signals are conducted
to the input of the first integrator. Relatlvel~ simple logic circuitry may
be provided for controlling the operation of the switches and the distribution
of the firing pulses ~hrough the electrical valves. Additionally, the second
integrator may be operated in synchrony with the first integrator so as to be
maintained at zero until the next polarity change of ~he voltage, as described
a~ove.
Brie~ Descrlption of the Drawings
Comprehension of the invention is facilitated by reading the follow-
ing detailed description in conjunction with the annexed drawings, in which:
~ igure 1 is a schematic and block and line representation of a single
phase circuit which operates in accordance with the principles o the inven-
tion;
~ igure 2 is a second single phase embodiment of the invention, shown
in schematic and block and line form, containing circuitry for compensa~ing
for voltage which is developed across a choke after the electrical valves have
been ired;
~ igure 3 ~s a schematic and block and llne representation of an em-
~odiment o~ th~ invention which compensates or long term variations in net-
~ork voltage;
~ igure ~ is a $chematic and block and line representation of a three-
phase embodiment of the invention which is arranged in a "Y" configuration;
~ igure 5 is a schematic and block and line representation of a three-
-- 8 --
~ 1633~3
'~
phase embodiment of the invention arranged in a "Q" configuration;
Figure 6 is a schematic and block and line representation of singl0phase embodiment of the invention having circuitry for resetting the integra-
tor to zero;
~ igure 7 is a schematic and block and line representation of an im-
provement to the embodiment of ~igure 6;
Figure 8 is a timing diagram which i9 useful for explaining the
operation of the embodiments in ~igures 6 and 7; and
Figure ~ is a blo~k and line logic diagram of the design of the
logic circuitry in Figures 6 and 7.
Detailed Description
Figure 1 shows a single phase transmission network having conductors
1 and 2, conductor 2 being connected to ground. The internal impedance of the
network is represented by a coil 3, which is electrically disposed between
conductor 1 and a generator. A load 4 is conducted across conductors 1 and 2.
Load 4 is of a type which has a rapidly changing impedance which causes un-
desirable electrical reactions in the network which have an undesirable effect
upon incar.descent lamps 4a of other consumers. A capacitor 5, which may be
formed of a plurality of capacitors so as to form a capacitor battery is dis-
2~ posed in series with a choke 6 across conductors 1 and 2. The capacitor bat-
- ter~ is predesigned so as to compensate for reactive current components occur-
ring at maximum load currents. Although the capacitor battery is not essen-
tial to the operation of the invention, the capacitor battery provides the
further advantage of maintaining a favorable power factor for the installation.
Additionally disposed across conductors 1 and 2 is the serial combination of a
coil 1~ and an A-C control element 7. In this embodiment, control element 7
consists of t~o parallel thyristor valves 8 and 9 which are poled for conduc-
_ ~ _
~ 1~3323
tion in opposite directions. A measuring device 11, which may be a voltage
transformer, is connected at its input to conductor 1 and provides at its out-
put a signal corresponding in amplitude to the network voltage V. Voltage
~ signal ~ is conducted to an input of an integrator 13 by means of a function
- generator 12 which will be discussed below. Integrator 13 is of ~he type which
has a zero voltage point which does not drift and which automatically compen-
sates, over several periods, for any D-C components t~lat may~be present at its
output. The output of the integrator is conducted to respective positive in-
puts of comparators 14 and 15. The comparators receive, at respective sub-
tractive and additive inputs, a positive quantity M* which corresponds to the
reference value of the voltage level, which reference value corresponds *o a
desired preset mean value of a voltage half-wave.
Thyristor 8 of the A-C control element 7 is poled for conduction
during positive half-waves ~>0. Comparator 14 which is associated with thy-
ristor 8 produces at its output a signal corresponding to the difference
~etween the output of integrator 13 and the preset mean value M*. The dif-
ference signal is conducted to limit indicator 16 w~lch is coupled at its out-
put to a pulse former 17, the combination of which provide a firing pulse for
placing thyristor 8 in a conductive state. During negative hal-waves CV`~ ),
camparator 15 provides at its output a signal corresponding to the sum of the
output of integrator 13~ which is negative during negative half-waves of the
nctwork voltage, and the preset referenca value M*. Thus, comparator l5 pro-
vides at its output a signal corresponding to the difference between the ab-
solute value of the negative half-wave and the reference value. A limit indi-
cator 18 receives at its input, the signal at the output of comparator 15, and
Is coupled at its output to a pulse ormer 19. Pulse ormer 19 provides fir-
ing pulses to place thyristor 9 in a conductive state.
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1 1S3323
During a posltive half-wave of network voltage V, integrator 13,
which during steady state operation ~egins the positive half-wave at a nega-
tive starting value, integrates the signal V until the value M* is reached.
At this point, thyristor 8 is fired via comparator 14) limiter 16 and pulse
~ormer 17. During a negative half-wave, thyristor 8 is extinguished and the
negative half-wave net~ork voltage is controlled by thyristor 9 and its asso-
ciated circuitry.
During the above operation, reference value M* corresponds to the
desired reference value for the voltage-time product ~rVdt) of a half-wave.
In some embodiments, however, it may be desirable to select a reference value
M* which corresponds to a mean value of a predetermined function o the volt-
age V. T~us, M* can be selected as the reference value for ~Vadt during the
positive ~al-f-wave and negative M* as the reference value for -~/V/adt for
the negative half-wave. The a~n~&ge selection of a where a>l, permits the
network voltage to be reglllated by a quantity which is related to its RMS
value. The realization of the above mathematical expressions is achieved by
utilizing a power raising function genera~or 12 in combination with integra-
tor 1~. Function generator 12, which receives vol~age signal V at its input,
prcduces at its output a signal ~v~a, which is positive if V is positive,
and negative if V is negative. It should be noted that, in this embodiment,
V will have an amplitude even during the conduction of the thyristors 8 and 9
because cuil 10 serves to prevent short circuit conditions.
The embodiment of Figure 2 is similar to that of Figure 1, but is
further provided with a current measuring device 20, which ma~ be a current
transformer, which provides at its output a signal Ib which corresponds to
the current flowing through the control element 7; which signal is conducted
to an integrator 21. Integrator 21 provides at its output a slgnal ~Ib dt
~ lB33~3
which is su~tractively~combined with the signal ~ in a summer 22. This addi-
tional circuitry~compens~ates for the ~oltage which is developed across choke
lQ, even though the thyristors in control element 7 may be conductiveg which
voltage may ~e integrated by integrator 13 and would result in the integrated
value exceeding the predetermined value M*. The advantageous selection of
integration time constant Tl of integrator 21 permits, at least during steady
state operation, the adjustment of the signal delivered to the input of in-
tegrator 13 so that the condition M*= ~a dt is met in every half-wave. Using
this circuitry, a voltage value ~(V -rIb dt)adt is used for comparison with
the reference value M*, so as to cause the instant of thyristor firing to be
advanced in time and thereby compensate for the efect o$ the voltage present
across coil 10 which would otherwise be integrated in integrator 13.
~igure 3 shows an embodiment of the invention which is adapted to
compensate for long term variations in the amplitude of the network voltage.
A rectifier 30 is connected at its input to current transformer 20 so as to
receive current signal Ib. Rectifier 30 is coupled at its output to a smooth-
~i~ ing filter 31 having a time constant T2, in the order of several seconds.
Smoothing filter 31 is connected at its output to a Pi-circuit'by means of
summer 33. Summer 33 receives at an inverting input a value Ib* which cor-
2a responds to the long term current mean. The output signal of Pi-circuit 32
is conducted to respective inverting and non-inverting inputs of comparators
14 and 15, as shown. This isg thereore~ distinguisha~le from the embodiments
of Figures 1 and 2 wherein the short term vol-tage reference value ~l* is con-
ducted directly to th0 comparators 14 and 15. ~s seen over several periods,
the reactive current components in the net~o~k which result from the variations
in the rapidly varying impedance of load 4, ~ill average to an approximately
constant reactive current so as to form a relationship between the original
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1 ~B3`3~3
reference value ~* and t~e mean current I~ flowing through A--C control element
7. The reference value of the half~-wave mean (i.e.J the RMS voltage) can be
made responsive to long term variations in the amplitude of the line voltage
by advantageously presetting ~he reference value Ib*. The e~fects of short
term load impedance variations upon the network voltage, which, as previously
indicated, lead to flickering of incandescent lamps 4a, are compensated as
before ~y the rapidly operating control of lntegrator 13 and limit indicator
16 and 18.
Figure 3 further shows that A-C control element 7 can be connected
to the network by means of a transformer 33. If transformer 33 is such that
it has a relatively large inductance, coil 10 may be omitted.
The embodiments of the invention described hereinabove with respect
to ~igures 1, 2 and 3 may be replicated so as to be utilized in multiphase A-C
networks. Illustratively, each of the replicated control circuits may be ap-
plied in a "Y" configurat;on so as to be disposed between a phase conductor of
the multiphase network and a neutral ground conductor. Figure 4 illustrates
how the control circuits described hereinabove may be applied to a three-phase
` transmission nëtwork having a neutral conductor.
In Figure 4, the three phase conductors of a three-phase transmis-
2Q s~on network are shown as lR, lS and lT. A three phase load ~0 is connected
to each o~ the phase conductors and to a neutral conductor 2. A capacitor
battery 50 comprised of at least three capacitors which are connected together
at one end, are connected at their other ends to respective ones of the phase
conductors by means of a plurality of coils 60. Control elements 70', 701- and
7~ are each arranged in series combination with a respective coil 30 and
electrically disposed ~et~een neutral conductor 2 and a respective one of the
phase conductors. Control ~rco~t 80', 80" and 8Q " ' receive respective volt
1 183323
age signals V', V" and V "' by means o~ respective measuring devices llR,
llS and llT. The currents~ flowing through the control elements are measured
by~respect-ive current measuring devices 20'9 20" and 20 " '; each of which
conductors a signal to a respective one of control circults 80', 80" and 80 "'.
The control clrcults 80', 80" and 8~ "' are constructed ln accordance with the
control circult embodlments descrlbed hereinabove with respect to Figures l,
2 and 3. Each of the control circuits also receives the reference value for
the long term mean Ib.*~o$ the currents flo~ing through the control elements,
by means of a common conductor 90.
Figure 5 shows a three-phase embodiment of the lnventlon which does
not have neutral conductor. T~e circuit is arranged in a delta (~) whereby
the contr~l circuits 80.', 8a" and 80 "'; and the control elements 70', 70" and
70"', are electrically disposed between respective ones o the phase conduc-
tors. In th~s emBodlment, capacitor batteries 50 are arranged serially with
respective coils 60 and electrically disposed between pairs of phase conduc-
tors.
Figure 6 shows an embodiment of the inventlon which utillzes a
central logic circuit 100. Circuit elements designated by the reerence
numerals 1-11 correspond to the circuit elements described hereinabove with
2Q respect to Figures 1-5. Central logic circuit 100 provides firing pulses F
and G to ~iring circuits 112 and 111 which are respectively associated with
thyristors 8 and 9. A commercially available two-pulse control unit 110 is
synchronized with voltage V at the output of voltage transformer 11. Two-
pulse control unit 110 is adjusted by setting a constant control vector so that
a supplemental ~iring signal L or M is added to the firing pulse F or G to the
appropriate one o~ thyris~tors 8 and 9 at a predetermined time interval prior
tc~ t~e end o~ the respective half~wave of network voltage V.
.
~ ~3323
In a prePerred em~odiment, a rectifier 101 is coupled at its output
to an input of a power raising function generator 102, which provides the
function y-xa for x ~ O; and a being any value, preferably >1. This function
generator corresponds to function generator 12 in ~igures 1, 2 and 3. A func-
tion generator o~ this ~ype is described in Tietze-Schenke, "Halbleiterschal-
tungstechnik", Berlin, Heidel~erg, New York, ~th Ed.~ 1978, page 212. In em-
bodiments where a assumes integral values, multiplier circuits can be used.
The degree of network voltage control is responsive to the advantageous selec-
tion of a.
Function generator 102 is coupled at its output by a switch 103 to
an input of an integrator 105. Integrator 105 may be reset to a zero value by
a switch 104. Switches 103 and 104 can be kept in a closed state by high
logic state pulses of control signals K and ~l. The output of integrator 105
is combined with a negative reference mean value M*, in a summer 106. The out-
put of summer 106 is conducted to the input of a limit indicator 107, which is
coupled at its output to a~pulse former 108. Pulse former 108 provides at its
output a firing pulse during such times as the output of integrator 105 ex-
ceeds in magnitude the valu~ M*. Logic circuit 100 distributes firing pulses
A received from pulse former 108, and the supplemental firing pulses L and M,
2Q to firing circuit 111 and 112.
Figure 8 sho~s ~he timing relationship ~etween the pulse signals A,
P, G, K, L and M, and the wave form of the network voltage ~, which have been
discussed Nith respect to Figure 6. Figure 8 further shows the angular dura-
tion ~O which is designated as the control angle of the two-pulse control unit
11~, which supplies the supplemental firing signals L and M for limiting the
maximum cutoff interval of thyristors 8 and 9. The arrows 70 identify the
angular instant where the output signal of integrator 105 coincides with the
l 1~3323
reference means M*. Switch 104 resets integrator 105 to zero in response to
signal H and there~y prepares the integrator ~or producing the voltage-time
product of a subsequent half-wave. Alternatively, such resetting occurs at
the earliest of the first firing of a thyristor during a voltage half-wave
~signal A), or the positive slope of supplemental firing signal L, if such
slope is prior in time to pulse A. In an ideal situation, the resetting of
the integrator should be accomplished at the very beginning of each new half-
wave. However, in weak networXs, several zero crossings usually follow one
a~ter the other, as shown in Figure 8, thereby causing difficulties. Accord-
ingly, resetting of integrator 105, in this embodiment, occurs simultaneously
with the positive slopes of supplementary firing signals L and M.
The input signal o~ integrator 105 is shown in Pigure 8 for a=l by
the dashed wave form line 71. Although error would be introduced into the
system by the fact that integration begins at some time other than the ideal
moment which corresponds to the zero crossing o~ the ~undamental voltage com-
ponent of the net~ork, such error is minimized by the closing and opening of
switch 103 which permits only the portions o~ the voltage wave ~orm which have
negative polarity to be eonducted to the integrator. The voltage-time
area which is determined by the integrator and which is monitored by limit in-
dicator 107 ~ith respect to whether the reference mean M* is exceeded is shown
$haded.
The rema~ning timing diagrams shown in Fîgure 8 relate to the em-
bodiment shown in Figure 7 and the logic circuit 100 which is shown in detail
in Figure 9. In addition to the circuit components discussed with respect to
~igure 6, the embodiment o~ Figure 7 further contains a current measuring de-
vice 20 to which are connected the series combination o~ a rectifier 30, a
smooth~ng ~ilter 31 and a ~i-circuit 32. Elements 30, 31 and 32, correspond
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~, .
~ ~63323
structurally and operatively~to the similarly ;dentified element.s in Figure 3.
The cmbodiment of Figure 7 is further provided wi~h a second rectifier 114
which is connected at its output to an input of a second integrator 116 by
means of a swi~ch 115. Switch 115, 1ike switch 103, is opened in response to
pulses K. As is the case with first integrator 105, second integrator 116~
is preferably reset in the ideal case by the zero crossing of the fundamental
voltage component of the network. However, in view of the above discussion
concerning multiple zero crossings, integrator 116 can be simply reset without
producing error by operation of resetting switch 117 which is closed at the
la beginning of a supplemental firing signal and remains closed until the time
of the ~irst zero crossing of the actual voltage wave form V, as shown by
closing pulse I in Figure 8.
Figure 9 shows the logic block details of central logic circuit 100.
Network voltage wave form V is conducted to an input of a time delay stage 90,
which ma~ be a second-order time delay stage which is coupled at its output
to a limit indicator 91. Limit indicator 91 provides at its output a signal
C tYhich, as shoNn in Figure 8, is in a high logic state for an interval during
which are expected the firing o-f pulses A and the zero crossing o the network
voltage wave form. P~lse signal C is conducted to AND gate 92 and to an in-
2Q ~erting terminal of AND gate 93. Supplemental firing signals L and M arecoupled to respectlve inputs of an OR gate 94 which is coupled at its output
to a pulse former 95 which provides at its output a pulse H in response to the
positive slope of the output of OR gate 94. Signal H is com~lned Nith firing
pulses A at res~pective inputs of OR gate 96 which provides at its output a
~iring pulse sequence E. Firing pulse sequence ~ is coupled to respective
inputs of AND gates 92 and 93. Signal H is prov;ded at an output of the
central logic circuit for operat;ng reset switch 104 of ;ntegrator 105.
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i ~3323
Signal K ~Yhich operates switch la3 and in some embodiments switch115, is formed ay~the combination of signals L~ M and network voltage V.
Supplementary firing singals L and M are fed to respective inputs R and S of
an RS flip-flop 98. The Q output o~ flip-flop 98 con~ains signal B which is
conducted to an input of AND gate 99. The Q OlltpUt is coupled to an lnput
t0rminal of AND gate 99'. AND gates 99 and 99' receive at respective invert~
ing and non-inverting inputs a signal from a limit indicator 97 which corres-
ponds to the polarity of network voltage V. AND gates 99 and 99' are connect-
ed at inverted outputs to respective inputs of AND gate 8~, which provides
signal K at its output.
Reset switch 117 of integrator 116 is operated in response to signal
I which is formed at the output of AND gates 88 which are cross-connected so
as~ to form a memory circuit. Memory circuit 88 receives at an inverting input
the signal E and at 2 non-inverting input the signal K.
It should he understood that the embodiment of the invention de-
~cribed hereinabove with respect to Figures 6, 7 and 9, can be applied to poly-
phase net~orks in view of this teaching. In addition,.although the inventive
concept disclosed herein has been described in terms of specific embodiments
and applications, other applications and embodiments will be obvious to per-
2a sons skilled in the pertinent art without departing from the scope of the in-
vention. The dra~ings and descriptions of specific embodiments of the inven-
tion in this disclosure are illustrative of applications of the invention and
should not ~e construed to limit the scope thereof.
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