Note: Descriptions are shown in the official language in which they were submitted.
~ ~ ~;'7~
-2-
Background o _the Invent_ n
The present invention relates in general to a timer for
controlling -the dispensing cycle O:e -the di.spensing machine, - r
The timer may be used i.n association with the dispens:ing
5 of such products as instant mashed potatoes, cof~'ee, juices,
or beverages. ~lore particularly, in accordance wi-th this
invention there is provided a timer with improved touch control.
It is desirable in accordance wi-th the present inverltivn
to maintain current flow associated wi-th con-trol switclles for
10 a timer, such as one used in association with a d:ispensillg
machine, at ~ relatively low va:lue, pre~erab].y ]ess than 5
milliamperes uncler -Eault. One technique used in the prior
art to al:leviate problems due to switch failure, is -to provide
an isolation -trans:former to isolate the logic power sllp~ly
15 from the line voltage. In -this way the~ haz.ard o~ electrocu-tion
is removed even if one were to make contact with metallic
por-tiorls Oe the tOUC~l switches. llowever, the cost of arl isola-
tion transformer is qu:ite e~cessive, especially if it is
required to carry both the power O:e the load as well as the
20 logic power. In the~example referred to herein, the load
power inclu~es power f'or a solenoicl and gear motor. If the 5
transformer supplies only the logic power, then separate means
such as optical couplers are usually provided to isolate -the
load switches which rnay be triacs, from the logic. There is
25 substanti~l cost involved in the use of such an isolation
trans~ormer.
One object of the present invention is to provide a timer,
preferably for use in controlling a dispensing cycle associated
with -the dispensing machine, and which does not require the use
30 of a transformer for power isolation.
Trans-~ormerless DC power supplies with off-line rectii'iers
are also well known; the AC/DC tube radio being a familiar
example. The intrinsic electrocution hazard in these radios
is reduced by insulating the chassis with cabinetry and control
35 knobs which prevent the operator ~rom Ihalsing a direct contact
~ '
-- 3 --
with metal. However, with many dispensing machines, the
control switches themselves cannot be relied upon solely to
rnaintain the electrical isolation needed to prevent shock,
Summary of the Invention
In accordance with a particular embodiment of the
invention, there is provided a touch control system for oper-
ating a timer having a p]urality of different control-inputs
and operated from an alternating current source. ~he system
includes logic control circuitry including logic control
circuits respectively coupled to each control input of the
timer for controlling the operation thereof. A resistive
network is coupled to the input of each logic control cir-
cuit and has at least one series resistor of large value for
the purpose of limiting fault currents and an operating
voltage terminal, A switch array, including a plurality of
touch switches each having open and closed positions and
including separate switch contacts couples to each resist-
ive network and a common contact which is common to all
switches, The logic control circuitry has a high input
; 20 impedance. Means are provided for establishing operating
voltages for at least the resistive network and switch
array from the alternating voltage source, the means com-
prising means for establishing a first alternating voltage
and means ~or establishing a second alternating voltage that
deviates from the first alternating voltage by a predeter-
mined voltage throughout the alternating voltage waveform,
Means couple the first alternating voltage to the common
contact of all switches of the switch array, and further
means couple the second alternating voltage to the operat-
; 30 ing voltage terminal of the resistive network,
In accordance with a further embodiment, a manual
switch includes at least one switch having an open position
and a closed position and including separate one and another
switch contacts, Also provided is a resistive network having
at least one series resistor of large value for the purpose
~,,
i'7~
- 3a -
~ of limiting fault current, an operating voltage terminal,
an input terminal and an output terminal. Means couple
the input terminal of the resistive network to the one
switch contact of the switch. Further means establish
S operatiny voltage for the resistive network and switch, the
further means comprising means for establishing a first
alternating voltage and means for establishing a second
alternating voltage that deviates from the first alternat-
ing voltage by a predetermined voltage throughout the
alternating voltage waveform. Means couple the first alter-
nating voltage to the another switch contact, and further
means couple the second alternating voltage to the operat-
ing voltage terminal of the resistive network.
It can therefore be seen that in accordance with
the invention there are provided touch switches which each
control a certain function associated with the timer. For
example, in one embodiment described herein, five touch
~ switches are used identified as "hot water", "large",
"stop", "push and hold", and "small". mese switches are
preferably of the type that includes a conducting membrane
which contacts a back plate. The thin membrane separates
the operator's finger from circuits having an open circuit
voltage with respect to ground equal to that of the power
line. Each of the flexible surfaces of the switch are
preferably isolated from the circuit board by a pair of
resistors of relatively large value, preferably on the order
of 150 K ohms each. ~wo resistors are preferred to guard
against the possibility of one having an improper low value.
There is also added insurance against ~oltage break down
that might occur when only a single resistor is employed.
The resistor values are selected so that for a worse case
condition, the current is below 5 milliamperes. Thus, if
it is assumed that as a result of vandalism, for example,
all switches are in contact with the common back plate then
the metallic parts of the switch assembly are exposed to a
~'7~
- 3b -
- potential victim. Even under this condition in accordance
with the invention, the current flow is still limited to
less than 5 milliamperes. The problem with the use of such
high value resistors is that with conventional logic cir-
cuitry such as TTL circuitry, sufficient voltage swing isnot possible. Accordingly, in accordance with the principles
of this invention the logic circuitry that is employed is
of the high input impedance type. The preferred logic is
CMOS logic which is characterized by a high input
impedance or resistance, This impedance is thus
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comparable to the series resistance coupling to the -touch
switches. The high impedance of the C~IOS yates permits the
use of input shunt resistors o~ rela-tively high value, ~^
preferably over one meg ohm. In the embodiments disclosed
5 herein, these resistors preferably have a value of 3.3 rneg
ohm. The combination of the CMOS logic along with the high
resistance switch circuits provide essentially a shock-proof
system. Furthermore, this is provided withou-t the use of
any costly isolation transformer or relay interface.
10 Brief Descri~tion of the Drawings
Numerous o-ther objects, features and advantages of -the
invention should now become apparent UpOIl a readiny of the
following detailed description taken in conjunction with the
accompanying drawings, in which:
FIG. 1 is an electrlcal circuit diagram showincJ a kimer
used in association with a coffee dispenser;
FIG. 2 is an electrical schematic diagram showing a timer
used in association with a potatoe dispensiny machine; and
FIG. 3 is a cross-sectional view through a touch switch
employed with the electrical schematics shown in Figs. 1 and 2
Detailed Description of the Drawings
FIG. l shows a timing clrcuit for use with a dispensing
machine and in particular a coffee dispenser having associated
therewith a solenoid for controlling water flow and a gear
motor, as depicted in the drawing,for controlling the coffee
powder. I'he solenoid and gear mo-tor are controlled
respectively from the triac Ql and Q2. For each of the triacs
are in turned controlled from the logic circuitry shown in
FIG. 1. This logic circuitry includes integrated circuit
30 timers ICl and IC2, and a plurality of logic gates IC3 and IC4.
All of the gates described in FIG. l are NOR gates. The NOR
gates IC3B and IC~B form a bistab`le switch associated with the
timer ICl. Similarly, the NOR gates IC3C and IC~C form another
bistable switch associated with the second timer IC2. Both of
the timers ICl and IC2 have controllable circuitry associated
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2/~0
therewith, including potentiome-ters R2~ and R32 associated
respectively with timers ICl and IC2 for controlling the
duration of each of these timers. The timer ICl may be ~ ~
referred to as the "large" timer while the timer IC2 may be r
referred to as the "small" timer. These designations refer
to the length of the time period which may be set by these
two potentiometers R28 and R32. In addition to the potentiorneters,
other circuitry including resistors R26-R33 and capacitors Cll
and C13 control the timing of each of these -timers. ~
In addition to the logic shown in FIG 1., which is all F
C~lOS logic, there are provided a plurality of separate ne-tworks
which are each R-C networks coupling between the logic and each
of the switches associated with the touch switch panel. The
specific switch construction is shown and discussed hereinaf-ter
with regard to FIG. 3.
The embodiment of FIG. 1 comprises five such sw:itches
iden*ified as switches Xl, X2, X3, X4, and X5. One side of
each of these switches couple to the R-C networks while the
common side couples to the button common line which couples by
way of resistors R20 and R21 to the common power supply terminal. ~;
In FIG. 1 is the switch Xl is the "stop" switch, the switch X2
is the "small" switch, the switch X3 is the "hot water" switch,
the switch X4 is the "push hold" switch, and switch X5 is the
"large" switch. The hot water switch X3, for example, couples
by way of resistors P~5 and R6 to capacitor Cl. A further
shunt resistor R7 is coupled in parallel with capacitor Cl.
This network then couples to one input of the NOR gate IC3A.
Normally, this input to the gate IC3A is at voltage -V which
is representative of logic zero. Thus, with the touch switch
X3 open, the input to this gate is kept at this -voltage by
the shunt resistor R7 which is preferably a 3.3 meg ohm
resistor. A large value resistor of that type may be used
because of the very high input impedance of the gate IC3A.
~owever, when the switch, such as switch X3 is closed, the
resistors R5 and R6 are then connected via the switch to the
.
.~ ' ' .
-- 6 ~
~ "button common" termi~al which is referenced at +12 volts,
or at least at a positive voltage with respect to the nega-
tive common voltage. I~e voltage across the resistor R7
then becomes:
12 3.3 x 10 ~ _ 5 = 12 x 0,84~ = 10 volts
(3,3 x 10 ) -~ 6 x 10
This 12 volt difference is more than enough to establish a
logic one level. ~owever, if the OR gate that was used were
instead a TTL gate or other bipolar device, it would be
necessary to provide an FET buffer.
FIG. l also shows a power supply comprising a
zener diode Zl, capacity Cl, series r~sistors Rl-R4 and
diode Dl. A conventional 110 VAC or ~20 VAC line may be
connected at the input to the power supply. One output
from the supply is the voltage -V depicted in FIG. 1. The
other voltage is described as the common signal which is a
function of the zener voltage. In FIG. 1 the voltage COM
and -V are both similar alternating voltages but deviating
at all times during their waveform by the voltage established
by the zener diode Zl.
In addition to the switch X3, as previously indi-
cated, there are four other switches which couple to RC net-
works which in turn couple to the logic shown in FIG. 1.
Thus, for example, the switch X5 couples by way of resistor
R8 and resistor R9 to capacitor C2 with resistor R10 being
a shunt resistor across capacitor CZ, ~his RC network then
couples to the set input of the bistable device including
gate IC3B. The stop input from switch Xl also couples by
way of resistors Rll and R12 to the reset side of both bi-
stable devices. The line that couples from resistors Rll
and R12 couple more specifically, to gates IC4B and IC4C.
fl
- 6a -
~ I'he push-hold switch X4 couples by way of resist-
ors R13 and R14 to capacitor C3 with a shunt resistor
R15 coupled thereacross. This network couples to a gate
IC4A for providing an enabling signal to the output triac
by way of that gate. As previously mentioned, the button
common input couples by way of resistors R20 and R21 to
the common terminal. Finally, the input from "small"
switch X2 couples by way of
~3~.
,
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'2/8
resistors R16 and R17 to capacitor C4 with shunt resistor
R 18 coupled across capacitor C4. This RC network couples to
the set input of the second histable device, or more -
particularly directly into gate IC3C -thereof.
Basically, the timer ICl is timed to control the"large"
portion tha-t is being dispensed while the timer IC2 is for
controlling the "small" portion that is being dispensed.
The output timing circuits including the potentiometers R2~ and
R32, men-tioned previously, are set for these respec-tive time
periods. When the large button is activa-ted, the firs~ bistable
device is set causing the output from ga-te IC3s to control the
timer ICl and set the timer into operation. The timer ICl then
times out and at the end of its time period the output there-
from couples to the gate IC4B for resetting the blstable latch.
This action passes a signal by way of the gate IC4A directly
to the gear motor for operation thereof during the timing
period determined by ICl. Similarly, the same signal is
coupled by way of inverter IC3D and ga-te IC3A for causing
concurrent operation of the triac Ql and the output solenoid
associated therewith. Similarly, for an operation with a "small'
portion, the other bistable device is set by operation of the
switch X2. When this occurs an output from the gate IC3C
activates tinle IC2. . At the end of its predetermined
time, a signal is coupled back to the reset input of the second
bistable device, at the input to gate IC~C causing a resetting
action. This causes a signal to be coupled to the NOR gate
IC4A for causing operation of the gear motor and the solenoid
as explained previously. The gate IC4A may also be enabled
from the SWitC}l X4 which is the "push and hold" switch. This
means that as long as the switch X4 is depressed, then the
gate IC4A is enabled and the dispensing can occur by way of
the activated triac ~1 and Q2.
The stop button Xl may also be opera-ted and in the case
of its operation the bistable devices are both reset by
signals by way of reslstors R11 and R12 into th- respective
. -
6/75
ID/9m~
2/8~ `
gates IC4B and IC~C. This action esscntial:Ly bypasses the
operation of the timers so that if previously either o -the
timers ICl or IC2 have been activa-ted, then operation of the -- 5
stop button interrup-ts this action.
The values of R20 and R21 and other resistors, such as
resistors RS and R6, are chosen with a sufficlently high
value so that with any malfunction of the switches includiny
a total malfunction any shock that one miyht suffer will be f
below 5ma. Thus, if i-t is assumed that, as a result of
lO vandalism or the like, all five touch pads are in contact
with the common back pla-te, described later in Fiy. 3, there
will not be any shock hazzard. Wlth the arrangement
described~ there would thus be six parallel resistance parts
each of 300K ohms each bridging the exposed metal ancl the
15 common of the subsystem which in turn is tied to one side of
the line labelled "white" in E'IG. 1. The input "whi-te" line
can be 120 volts removecl from ground and the sys-tem frame.
In some applications this voltage can also be 240 volts.
Using the worse case of 240 volts with six 300K ohm resistors
20 in parallel this stil~ yields a current of only 4.~ma. Thus,
there is prcvided herein a simplified means of tinler operation
employing touch switches and which does not require the use
of an isolation transformer. There is provided herein the
connection of a hiyh input impedance logic circuit with what
25 has been previously used as a low impedance touch switch.
sy employing high input impedance logic, then the series
resistors may be sufficiently high for the purpose of current
limiting without on the other hand affecting the normal
operation of the logic, including switching between different
30 logic levels.
In connection with the diagram of FIG. 1, the following
table gives representative component values for substantially
all components shown therein:
Rl 3.3K lO~ l Watt
35 R2 3.9K lO~ l Watt
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2/80
R3 3.9K 10% 1 Watt
R4 3.3K 10~ 1 Watt ,~
R5 15OK 10% 1/4 Watt ~ ~
R6 150K 10% 1/4 Watt r
R7 3.3 MEG 10% 1/4 Watt
R8 150K 10% 1/4 Watt
R9 15OK 10% 1/4 Watt
R10 3.3 MEG 10% 1/4 Watt ,,
Rl:L 150K 10~ 1/4 Watt ~t
10 R12 150K 10% 1/4 Watt i~
R13 150K 10% 1/4 Watt
R14 150K 10~ 1/4 Watt
R15 3.3 MEG 10% 1/4 Watt
R16 150K 10% 1/4 Watt L
15 R17 150K 10~ 1/4 Watt C
R18 3.3M~G 10% 1/4 Watt r
Rl9 3.3 MEG 10% 1/4 Watt
R20 150K 10% 1/4 Watt
R21 150K 10% 1/4 Watt
R22 47 OHM 10% 1/4 Wa~t
R23 2.OK OHM 5~ 1/4 Watt k
R24 47 OHM 10% 1/4 Watt
R25 2.OK OHM 5% 1/4 Watt
R26 16K OHM 5% 1/4 Watt
R27 820K OHM 10% 1/4 Watt
R28 500K OHM 20~ 1/4 Wa-tt Horz. Mount TrirNmer
R29 560K OHM 10% 1/4 Watt
R30 16K OHM 5% 1/4 Watt
R31 680K OHM 10% 1/4 Watt
R32 250K OHM 20% 1/4 Watt Horz. Mount Trimmer
R33 390K OHM 10% 1/4 Watt
L
Cl .02 UF + 80%-20% 20V Ceramic ,
C2 .02 UF ~ 80%-20% 20V ceramic
35 C3 .02 UF ~ 80~-20% 20V cerarnic
~ .. ~ ~.
'.
~ LE;'7~
-- 10 --
C4 ,02 UF + 80/~20% 20V ceramic
C5 .02 UF + 80/~20% 20V ceramic
C6 .005 UF GMV 1,6KV ceramic
C7 .02 UF -~ 800/~20% 20V ceramic
C8 O005 UF GMV 1.6KV ceramic
C9 .02 UF + 80/~20% 20V ceramic
C10 10 UF 20% 16V Tantalum - Spraque l99D or Equal
Cll ,022 UF + 10% 50V Polycarbonate Seacor # 112 or Equal
C12 10 UF 20% 16V Tantalum - Spraque l99D ox Equal
C13 .005 UF + 10% Polystrene Mallory SXM 250
C14 50 UF + 80~/~20% 16V alum, Electrolytic Spraque 30D or Equal
Ql T2301PD Triac
Q2 1'2301PD Triac
Zl lN4742
; 15 Dl lN2071~1N4004
D2 lN4148
; ICl 4060BE
IC2 4060BE
IC3 4001BE
IC4 4025BE
Figs. 2A and 2B show another embodiment of a
timer somewhat more complex than the embodiment descirbed
previously, A substantial portion of the operation of
this timer is described in Canadian Pat0nt No~ 1,125,415
issued June 8, 1982, commonly owned with the present
assignee. This timer is adapted for use in the dispens-
ing of instant mashed potatoes.
FIG. 2A discloses the power supply for pro-
viding certain voltages such as +Vl and +V2 used with
the circuit of FIG. 2B. This power supply operates
from the 115 VAC line which is shown
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in F'IG. 2A connecting across -the parallel combination of
resistor Rl antl diode Dl. This circuit along with diode D2, j
zener diode Zl and capacitors Cl and C2 comprises a half~
wave rectifier circuit providing a relatively constant
5 voltage level on line Ll. The transistor Q3 controls the
triac Ql which in turn controls the motor M for the auger
not shown in the drawing, but understood to advance the flow
of the product to a mixing chamber of the dispensing device,
this chamber also receiving water controlled by the solenoid
10 K also depicted in FIG. 2A. Solenoid K ls controlled from
triac Q2 which is in turn controlled by the input transistor
Q4. A stable voltage is provided at point "A", logic
voltage -~Vl, used in most of the circuits shown in FIG. 2B.
E'IG. 2A also shows a "STOP" input which is actually a back
15 contact oE switch Yl used for coupling the power to the power ~r
supply. This switch is used for the timer "stop" Eunction. r
When the terminal "STOP" is at a high level, the circuit
including gates IC12A and ICl2~ provides a voltage which is
a relatively constant positive voltage which, when coupled
20 by way of the inverter IC12B provides a ground or zero '
voltage at terminal Tl. On the other hand, when the input
terminal is at ground or goes to ground, then there is a
positive level on the order of 10 volts a-t terminal Tl o The
use of the voltage ~V2 from the circuit is discussed in more
25 detail with reference to~the diagram of FIG. 2s.
In FIG. 2A there are two lines L and P which may be
referred to as the liquid and product lines, respectively.
When there is a high level signal on line L a driving current
is provided to the gate of the triac Q2 causing the triac
30 to conduct and energize the solenoid K to permit water flow.
When the level on line L is low, the triac Q2 is turned off,
which in turn turns off the solenoid K interrupting the
water flow. The signal on the product line P operates
similarly, and when this signal is high, the triac Ql is on
35 operating the motor M. When the signal on line P go~s to its
J6/.75~- ~
ID/jn~ -12-
2/8l
low state, then the mo-tor operatlon ceases.
FIG. 2B shows the control in accordance with the
prese}~t invention for providing signals to the lines L and
P coupling between the circuitry of FIGS. 1 and 2. There
is a first bistable device Bl Eor controlling line L and a
second bistable device B2 for controlling signals to the line
P. The bistable device Bl includes a pair of NAND gates G]
and G2 cross-coupled in a bistable configuration. Sirnilarly,
the device s2 comprises a simllar pair of gates G3 and G~ also
intercoupled in a bistable condi-tion.
The circuit of FIG. 2B also includes swiLches Y3 and
Y4 for controlliny, respectively, sMall and larye portions
as described in further detail hereinafter. There are a
number of timing devices shown in FIG. 2F3 which are identified
more specifically in a table that follows. These devices
include timers 10, 12, 1~, and 16, and the main clock 18, and
a second clock or timer 20O The devices 10, 12, 1~ and 16
may be oE one type while the devices 18 and 20 may be of a
different type. Associated with the timers 10, 12, 14 and 16
are switches Sl, S2, ~3 and S4, respectively. The swi-tch Sl
actually provides two functions, with one output to line 22
being settable in one of two different states, typically
either a high state or a low state for determining whether the
post-rinse is positive or negative. In the embodiment of
FIG. 2B for a positive post-rinse, the line 22 is at its low
level whereas for a negative post-rinse the line 22 is at
its high level. The other three outputs from switch Sl couple
to three inputs of the timer 10. These three inputs determine
in a binary coded decimal fashion, an initial count to which
the device 10 is initially set~ Hereinaf-ter, there is a
further discussion of the operation of the timer 10 in
conjunction with a repeating cycle in accordance with the
control for providing larger portions.
The switch S2 has four outputs and may be set in 16
different positions for providing a binary coded decimal
l6/7S9 ~ ~ 7
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2/8~
signal to four corresponding inputs t.o the timer 12. 'l'he
switches S3 and S~ are similarly connec-ted to -the timers
1~ and 16, respectively. The switch S2 controls the pre~
rinse period in conjunckion w:ith the timer ~2. Tllis swi~ch
5 is preferably operated through ten positions even though they
have the capability o:E more positions. In one embodiment
this timer 12 and associated switch S2 may var~ the pre--
rinse period from zero to 1.8 seconds in 0.2 second increTnents.
The switch S3 controls the duration of product and wa-ter and
10 the control is such that there is provided a minimum per:iod r
of 3.5 seconds, for example, even with the switch S3 set at
its zero positlon. From this zero position, the interval can
be expanded up to a total period of 5.3 seconds again at 0.2
second in-terv~ls, for example. The switch S~ controls the
15 duration of the positive post rinse period in assaciation with
the timer 16. Again, because of the common input clocking to Y
devices 12, 14 and 16 from line 25 of device 18, the
positive post-rinse period may also be varied from zero up
to, for example, 1.8 seconds in 2 second increments. The
20 circuit 30 associated with the timer or clock 20 and ;.
including the potentiometer R15 is adapted to set the negative
post-rinse period when in that mode of operation. Typically,
this period is set between 0.25 and 0.5 seconds.
First, operation is considered throuyh one basic cycle
25 which includes a pre-rinse period, a main period, and a
post-rinse period. It is also assumed that the circuit is
conditioned for a negative post-rinse ra-ther than a positive
post-rinse. Thus, the circuit controls lines L and P to
terminate liquid prior to termination of product.
When the switch Y3 is closed and assuming that the
circuit has been powered, a positive signal is coupled to the
inverter 12. This signal may be low pass filtered by means
oE the circuit incl~ding resistor R16 and capacitor C10.
This high level signal is inver-ted by inverter 12 to a low r
level signal wh1ch sets the bistable devio~ B1 causing a low
r
,
6/759 . ~ "7~ .k
tD/jm -L4-
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level signal on its output Q. This signal is inverted hy
inverter 13, causing a positive driving voltage on line L
which,as previously discussed, causes opera-tion of the ~.~ r
solenoid K to initiate water flow to the mixing chamber of
5 the dispensing machine. The output Q from device Bl couples
to the NAND gate G5 providing at the output thereof a low
lever signal coupled to the timer 12 for ini-tiating a count
down of the timer 12, f.rom an initial count set b,y the switch ~.
S2. The low level signal to the timer 12 ~rom gate G5 '7'
10 essentially lifts a reset condition so tha-t the timer 12 r
can be clocked from line 25 which couples in turn b~ way of
inverter 14 from an output of tile basic cl.ock 18. Thus, the
timer 12 is counted down at the basic clock rate of, for
example, 0.2 seconds. During the counting down sequence,
15 the output on line 34 from the timex 12 is high b~lt once the
timer 12 has counted down, the outpu-t on line 34 changes to
a low level signal which is coupled to the bistable B2 for
setting the bistable device. When this occurs, there is a low
level signal on the output Q which provides a high level dri.ve
20 signal -through invert,er 15 to the line P. As discussed
previously, this signal causes energization of the motor M
of FIG. 1 thus initiating product flow. Thus, it can be
seen that the duration of the count down of timer 12 determines
the period between initiation of the liquid by a high signal
25 on line L and initiation of the product by a high si.gnal on
line P. It is the resetting of the devices Bl and s2 at the
respective gates G2 and G4 that determines the termination of
the liquid and product flow.
The enabling of gate G5 is also of course conditioned
30 upon its two other inputs being at ~heir high levels which
means that the timer 12 can only be,initiated when ~he flip-
flow B2 is reset and the flip-flop B3 is also reset. The
1ip-flop B3 may be referred to as a post-rinse latch. This
device B3 is operated from the output of the timer 14 as
35 discussed in more detail hereinafter.
J6~75~
~D/ir -15-
/5/8
The timer or clock 18 in a~dition to provid.ing the
basic clock signal at a period of 0.2 seconds also has an ~,
output on line 27 which represents a clock of longer durat:ion -
such as 3.5 seconds. This signal couples by way of line 27
5 to the NAND gate G6 enables this gate but only after the
fixed interval of 3.5 seconds wh.ich represents a fixed minimum
interval over which both the liquid and product are dispensed.
The timer 1~ essentially times from this inltial basic interval
of, for example, 3.5 seconds. The other input to gate G6 are ~.
10 valid when the bistable device B2 is set meanlng the product
is beiny dispensed, and further when device B3 :is reset.
After the termination of -the 3.5 second minimu~n in-terval.
determined by the output on line 27 from device 18, the device
1~ is then enabled by way of gate G6 and this devi.ce receives
15 clock pulses from line 25 to decrement the device 1~ from an
initi.al count set by the switch S3. It is noted that at the r
end of the 3.5 count interval, -there is no resetting of bistable
devices Bl or B2. It is only at the encl of the time in-terval as
determined by the 3.5 seconds and the time of ~evice 1~ that
20 further resetting action occurs by way of a signal on the ,s
output line 15 from device 1~ which couples to the bistable
device B3 for setting device B3 to provide a high level output
on its Q outpu-t and a low level on its Q output. 'rhe resetting
of the devices Bl and B2 is now dependent upon whether in the
25 posi.tive or neyative post-rinse mode. ~s previously assumed, in
the negative mode, the line 22 is high thus providing a high
enabling signal to the gate G7 which is a N~ND gate. Because
the bistable device B3 is also now set, the gate G7 has both of
its inputs high thus providing a low level siynal on line 21
30 which initiates operation of -the clock 20. During the timing
interval of the cloc~ 20 the output line 23 is normally low but
will go to its high state at the end of the interval determined
by circuit 30. When this occurs, the output from inverter 16 ';
is low thus resetting by way of line 37 the bistable device s2
35 causing termination of the product. However, prior there-to and
~6/759 ~ ; 7~4~
lD/~rnt -16-
5/~0
at the time that the bistable clevice B3 sets, a low level
siynal at the ou-tput of gate G7 on line 40 couples to gate G2
to reset the bistable Bl thus terminatiny liquid flow ~irst. -
~fter the li~uid flow has termina-ted, then product flow
terminates a short time thereof in the range of 0.25 to 0.5
seconds by the signal on line 37 rom the device 20. The
range of the negative post cycle is determined by adjustment
of the potentiometer R15 of circuit 30. ,-
When the bistable device B2 is reset by the siynal on line
10 37, the signal from inverter 15 also couples to ga-te G8
causing a high level output therefrom which is inverted ~rom
inverter 17 to a low level signal coupled to the bistable device
B3 for causing a rese-tting thereof thus signalliny an effec-tive L
termination of -the basic cycle.
The device 16 is not operated in the r.egative post-rinse ~'
mode because in that mode, the line 22 i5 high holding the
device 16 reset by way o~ the input to the device via diode D6.
The diodes D6 and D7 effectively form a gate wherein the device
16 is permitted to time out only when both of these diodes are
20 reverse biased by low level signals at the input anode of each s
diode.
For an ultimate se~uence of operation wherein the control
is set for a positive post-rinse interval rather than a
negative post-rinse interval, the line 22 is set to its low
25 state by means of a setting of the switch Sl. This low signal
by way of gate G7 effectively disables the clock 20 by
maintaining the line 21 at the input to the clock at a high level.
For the positive post-rinse mode, the ini-tial portion of this
cycle may be the same as with the negative post-rinse mode.
30 Thus, after the timer 14 times out and the device B3 is set
there is no action by way of the gate G7 but the low output
signal from the device B3 at its output Q reverse biases diode
B7. Because this is the positive mode, both diodes D6 and D7
are reverse biased providing a low input to the timer 16 causing
35 the timer to count down in accordance with the setting of switch
J6~759 ~ ~'7
;/5/8 -17-
MD/j
~4. The switch S4 determines the d~lration of this post-rinse
interval. When the timer 16 has timed out, -there i5 a signal
on line 43 at -the output of the tlmer which goes from a normal--
high level to a resettiny low level at time ou-t. This low
level siynal is coupled all the way over to the ya-te G2 of the
device Bl causiny a resetting oE this devlce. This resettiny,
however, only occurs at the end of the pos-t-rinse period.
Before the rese-ttiny of device Bl, device s2 is reset directly
upon settiny of -the post-rinse latch B3. It is noted that -the
cathodes of diodes D6 and D7 coup:Le by way of line ~5 to the
gate G4. Thus, when the cathodes of these diodes go to ground,
because bo-th diodes are reversed biased, then line 45 goes low
resetting the bistable flip-flop type device B2. :Cn summary,
for the posi-tive post-rinse mode of operation, after the main
portion of the cycle is completed, the device B3 is set, and at
the same time the device B2 resets interrupting further product
flow, the device 16 then times out, definincJ the duration of
the post-rinse interval and at the termination of the interval
the device Bl is reset to at that time -terminate liquid flow.
The dura-tion o this positive post-rinse interval is controlled
by the switch S4 which can be pu-t into a number of different
positions for providing a post interval of anywhere from zero
to 1.8 seconds in 0.2 second increments, for example.
When the device 16 times out, as previously mentinoed,
the line 43 goes to its low state and there is a delayed signal
coupled by way of resistor R20, delayed by capacitor C9, to one
input of gate G8 causing the output of ga-te G8 to move to its
high state causing a low output from device 17 which causes a
resetting of the post-rinse latch B3.
At this time operation has been discussed with reference
to a single basic cycle of operation. However, it is noted
that the setting of the device Bl which initiates substantially
all operation, can also be accomplished by way of a second line
50 rather than by way o the inverter 12. A low level signal
can be provided on line 50 at the output of gate G9 where all
,
~J6/75~ t~
/jr -18-
/5/8
of the inputs are at their high level. One of the inputs to
the gate G9 indicates that the device Bl is reset while another
one indicates that the device B3 is reset. The third input - "
51 couples from a further bistable device B4 which comprises
the gates Gl0 and Gll both of which are NAND gates including
the conventional cross-coupliny to provide the bistable
operation. Thus, the lines 51 essentially controls the
recycling operation as lony as a previous liquid phase has been p.
completed and as long as the post-rinse la-tch has been reset.
As previously mentioned, the switch Sl has three outputs
which couple to the -timer 10 for providiny a binary coded
decimal input. When the operator of the machine closes the
SWitCil Y4 fox a larger portion rather than the switch Y3 there
is a posi-tive signal coupled by way o:E the diode D5 to the t
inverter 12 for initiating the operation by settinc~ the bistable
device Bl. At the same time this signal is inverted by inverter
17 to set the bistable device B4 so that the line 51 is at its
high, enabliny level which enable a repeat cycle by again
setting the device Bl. Each time that the device ~1 is set,
there is a counting signal on line 57 to the device 10 to count
the device down. This counting operation cGntinues for as lony
as the device B4 is in its set state with a low level signal t
coupling from the Q output of gate Gll to the device 10. The r
output from device 10 is on line 59 and is normally at a high
state during count down of the device 1Ø. ~owever, when the
device Bl is set for its last cycle so that the timer 10 now
times out, the line 59 goes to its low state resetting the
bistable device B4 and reverting the line 51 from the device to
its low level, thereby inhibiting any further rese-tting on line
50 of the bistable device sl. sefore the device 10 is clocked
down to its resetting position, line 51 is maintained in its
high state because the device B4 has not yet been reset and . t
thus each time that the latch 83 is reset with the device Bl
also being reset, there is a repeat level on line 50 for
reactivating or reinitiating the next cycle. Again, this action
r~.. ~ .
i6/.75~ 7~
'D/j~' -19-
5/80
commences with the device 10 being clocked via llne 57 each
time that a new cycle commences as signalled by a setting of
the bistable device B1. The switch Sl may be set so that the ~
device 10 counts only once or so -that the device coun-ts any
predetermined number of times to repeat the basic cycle for
providing larger portions. Upon a repeat of a basic cycle
depending upon whether in positive or negative post-rinse mode,
theliquid and product are again dispensed usually with a pre- '
rinse period of liquid only during each basic cycle that is
repeated. This technique has produced ex~remely uniform
consistency of the final product and much better consistency
then can be obtained by varying the length of the main portion
of the cycle such as by varying the output signals from the
basic clock 18 to extend the 3.5 second interval, for example.
It is noted in FIG. 2B that there are again RC circuits
associated with each of the switches Yl-~4. Thus, the switch r
Yl couples to resistor Rl9 which in turn couples to capacitor
C10 and shunt resistor R10 coupled across capacitor C10. The
other networks that are described are substantially the same
20 including a series reslstance of substantial value. Herein, );
this resistor, such as resistors R21 and R22, have a value of
330K ohms. The shunt resistors also preferably all have a value
of 3.3 megohms as described previously with regard to FIG. 1.
Again, the logic gates that are employed such as gates Gl, G2,
G10 and Gll and all other gates are CMOS gates having a high
input impedance.
Below is a list of specific components as to their value
and type used in the circuits of FIGS. 2A and 2s.
Cl-3 22 uf, 16V,~+80%-20% Tantalum --G.E.~TA07E226KB
C4-4 .005 uf, GMV, 1.6KV - Ceramic
C6-10 .02 uf, 20V, +80%-20% - Ceramic
Cll 5600 pf, +10%, 100V Polycarbonate or Polystyrene
C12 680 pf, +10%, 100V Polycarbonate or Polystyrene
C13 .02 uf, 20V, +80%-20% - Ceramic i
Dl lN4001
. . :,
. .
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D2-5 lN4143
IC1-2 CMOS 4060BE
IC3-6 CMOS 4029BE
IC7 CMOS 4012BE
IC8-9 CMOS 4023BE
IC10-11 C~OS 4011BE
IC12 CMOS 4069BE
Ql~2 T2301PD T2301 'J,
R3, R4, 47 1/4 10% .;
Rl 120 , lW 10% r
R2, R5 47 1/4 w, 10%
R6 2.2 , 1/4w, 10%
R7, R9 6.5k , 1/4 w, 10% L
R-10, 12, 13, 14 3.3 Mey. , 1/4w, 10
R17-18 2K , 1/4 10~ ~
Rl9, 21, 22 330K , 1/4 w, 10% r
R24 22K , 1/4 W, 10
R25 29K , 1/4 W~ 5~
R26 15 Element Network 56K , AB 316A L
R27 Control 20K , 1/4 w Horz. P1ount Trimmer Piher PT-lOV
R29 Control 50K , 1/4 w Horz. Mount Trimmer Pihex PT-lOV
R20, 23, 30, 31 150K , 1/4 w 10% t
52-4 Binary 10 Position EECO 23002G
Sl Dip 4PST Grayhill
Zl lN4742
R28 - Control 50K , 1/4 w. Horz. Mount Trimmer Piher PT-lOV
R8 - 5100 + 5%, 1/4 watt
Rll, R15 - 470K , 1/4 watt, 10%
The switches Xl-X5 shown in FIG. 1, and the switches Y1,
Y4 shown in FIG. 2, may each be of the momentary touch switch
typeO The general construction is shown in FIG. 3. Each
switch comprises a printed panel face 100, which overlies a
flexible surface 102 having secured thereto conductive printed
tracks 104. These tracks are spaced from a contactor plate
106 by means of a capacitive air gap 103. The spacing is
6/759 ~ '7
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5/8~
Eacilitated by means of a spacer 110 depicted in FIG. 3.
The contactor plate 106 is supported on a common panel backing
112. This backing 112 is common to each of the switches as -
indi.cated by the common line in FIG. 1. Pressure in a downward
direction in FIG. 3 will cause a flexing of the me~ber 102 so
that the tracks 104 can come in-to contact with the contact plate
106 to cause a closing of the switch. Upon release the switch
opens, there being a separation between the tracks and the
contact plate.
