Note: Descriptions are shown in the official language in which they were submitted.
~7~79
The present invention relates to speech svnthesis
and in particular to phoneme-based speech synthesizer that
is particularly adapted for implementation in a single
encapsulated integrated circuit.
Known phoneme-based speech synthesizers have
principally contained vocal tracts comprised of a plurality
of resonant filters. I-t has heretofore generally been
considered impractical to produce vocal tracts of this
type in integrated circuit form for several significant
reasons. First of all, tunable resonant filters of the type
commonly used in vocal tracts require resistors and
capacitors having relatively large values to produce
resonant frequencies in the relatively low requency range
of the human voice. Large value components substantially
increase the size of an integrated circuit. Secondly,
vocal tract resonant filters are high precision filters
which are difficult to produce in integrated circ~it form
within the required tolerance limits.
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~7~179
The present invention is used in a phoneme--based
speed synthesi7er including a vocal trac-t model that is
controlled in accordance with a plurality of control
parameters generated for each phoneme which defi.ne the
steady-state condition of each of the phonemesO The
invention relates to the improvement comprising: glottal
source means for producing a glottal pulse signal that is
provided to the vocal tract for supplying vocal excitation
energy to the vocal tract, the glottal pulse signal having
associated therewith a fundamental frequency with each
period thereof comprising an active portion and an inactive
portion, the glottal source means including means for
producing a glottal sync pulse at the beginning of the active
portion; and digital transition means for incrementally
changing the values of the control parameters from a first
steady-state value toward a second steady-state value
including means for synchronizing each incremental change
in the values of the control parameters with the production
of the glottal sync pulse.
The present invention utilizes a novel capacitive
switching technique to implement the vocal tract, as well as
additional parameter controlled functions, which eliminates
the above noted problems and thus makes the speech synthesizer
according to the present invention particularly adapted for
implementation as a single integrated circuit silicon ~Ichip~.
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The capacitive switching technique employed not only
eliminates the ~equirement of large YaIued components
in the ~ocal tract~ but also eliminates the requirement
that ~he values~ and hence the size~ of the tuning
components in the vocal tract be accura~ely control led.
Ra~her~ as will subsequently be seen, with the capacitive
switching technique of the present invention, it is
only important that the ratio of the tuning component
values be accurately con~rolled, thus making i~ sub-
stantially easier to maintain the high accuracy levels
equired during production.
In addition9 the` p~esent speech synthesizer
inc'udes a unique digital transition cirouit which
gradually transitions the values of certain control
signal parameters between the different steady-state
values assigned for different phonemes. In this manner 9
adjacent phonetic sounds are properly integrated to
produce natural sounding speech.
The speech synthesizer of the present
invention also includes a novel glo~tal source CiTCUit
which digitally genera*es ~he glottal pulse signal in
a manner w~ich readily permits the waveform of the
glottal pulse signal ~o be spectrally shaped in any
manner des~red.
In gene~al; the presen~ speech synthesizer
system as disclosed herein comprises a sin~le encapsu-
lated silicon chip which phonetically synthesi~es con-
tinuous speech of unlim;ted vocabularly fr~m low data
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input rates. The system includes a parameter storage
ROM containing parameter values defining 64 differen~
phonemes which are accessed by a 6-bit command word.
Two additional input bits are provided for varying the
pitch or inflection of ~oiced phonemes. The control
paTameters are generated by the storage ROM in a
multiplexed fashion on an 8-bi~ parallel ~utput buss.
The control parameters which are used to control the
vocal tract are initially provided to a novel digital
transition circuit which serves to gradually transition
the variations in the steady-state values of ~he para-
meters which occur from phoneme to phoneme. As will
subsequently be seenl the digital transition circuit
performs this function in a unique manner by contin-
uously adding one eighth of the difference between
the target paTameter value and the current parameter
value to the current parameter value, and using the
result as the new curTent parameter value. In the
prefer~ed embodiment 9 the transition circuit is clocked
ZO at a rate which results in a parameter attaining approxi-
mately 70% of its target value wi~hin a span of 33
milliseconds~
The transi~ioned con~rol ~ignal parameters
from the digital transition circuit are provided to the
vocal tract ~o control the resonan~ f~equencies of the
P~ ~ F2 and F3 resonan~ fil~ers~ and to eon~rol ~he
injection of ~ca~ and fricati~e excitation energy into
the vocat tract. In addition, the "Q" o~ bandwïdth of
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the F2 resonant filter is separately controllable for
producing nasal phonemes as is conventional~ The
various parameter controlled functions are implemented
by utilizing the 4-bit parallel digital parameter signals
to selectively control the eapacitance ratio of capacitor
networks in the controlled circu;ts. The capacitor
networks are then switched on and off at a predetermined
frequency so that the controlled capacitor networks
effectively simulate a controlled variable resistance
element.
The glottal source generator circuit
produces a glottal pulse signal having a ~undamental
frequency that varies in accordance with the setting
of the two inflection control bits. In addition, a
degree of au~omatic inflection control is provided
by also varying the fundamental frequency of the glottai
signal inversely w.ith respect to movement in the
resonan~ frequency of the Fl resonant fil~er in ~he
vocal tract. The spectral shape of the glo~tal pulse
~0 is controlled by selectively presetting the analog
d.c. signal levels applied to the parallel inputs of a
multiplexerO The selecto~ inputs o~ ~he multiplexer
are connec~ed to the outpu~ of a rounter whlch is
clocked at a predetermined rate. The wave~orm of the
g~ottal signa7 produced at the serial output of the
multîplexer therefore comprises a segmented appro.Yimation
of an analog glottal pulse signal with the levels of
the various segments determined by the preset d.c. levels.
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Additional features and advantages o~
the present invention will become apparent from a
reading of the det~iled description of the preferred
embodiment which makes reference to the following
set of drawings in which:
BRIEF DESCRIPTION OF THE DRAWINGS
Figu~e 1 is an overall block diagram
of the speech synthesizer system of the present
invent iQn;
Figures 2-8 comprise a circuit diagram
of the speech synthesizer system of Figure l;
Figure 9 comprises a resistor equiva-
lent of the portion of the ~ocal tract circuit illustrated
in Figure 4;
Figure 10 is a sample waveform of a
glottal pulse signal;
Figure 11 is a timing diagram illustrating
the timing relationship between various clock signals
. and also illustrating the multiplexing arrangement in
~O which the control parameters are generated by the
parameter storage ROM;
Pigure 12 is a diagrammatical view of
the parameter storage R~M indica~ing the manner in
which the control parameter values aTe stored in the
~OM;
~ igure 13 is a cir~uît model illustra~in~
the operating p~inciples of the capac;tive switching
technique employed in the present invention; and
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Figure 14 is a timing diagram illustrating
the timing relationship be~ween the ~1 and ~2 non-
overlapping clock signals utilized in the capacitive
switching circui try .
L7~
DETAILED DESCRIPTI~N OF THE PREFERRED E~BODIMENT
_
Referring to Figure 1~ an overall block
diagTam o-E a phoneme-based speech synthesizer 20 according
to the pTesent invention is shown. The illustrated system
is adapted to be driven by an 8-bit digital input command
word. Six of the input bits 22 from the di~ital command
word are used for phoneme selection and the remaining
two bits 56 for va~ying the inflection level or pitch
of the audio output. The six phoneme selec~ bits 22 are
latched by a strobe signal on strobe line 24 into a six
bit latch 26 whose six parallel outputs are provided to
the six high order address inputs of a parameter storage
ROM 40, The strobe signal on line 24 also resets an
output latch 28 which forces the acknowledge/request
(A/R) output line 30 LO to a~knowledge receipt of the
new data. The LO signal on A/R line 30 is also provided
to the phoneme timing, delay and pause ~iming network
44 to initialize ~he phoneme timing counter, as will
subsequently be descTibed in greater detail.
The parameter stora~e ROM 40 contains data
defining 64 different phonemes which are accessed by
*he six phoneme selec~ bits 22. Fo~ each of the ~4
different phonemes, the parameter storage RO~ 40 contains
12 control signal parameters which electronically define
*he phoneme~ Each con~rol signal parame~er stored in
ROM 40 p~eferably comprises four bits of resolution,
thus p~o~iding sixteen different va~ues for each parameter~
except for the phoneme timing control p~rameter which
~ L7~79
comprises seven bits of resolution and therefore has
128 possible values. The parameter storage ROM 40 is
adapted to provide the appropTia~e set of control sig-
nal parameter values defining the particular phoneme
identified by the phoneme select bits 22 on its eight
data output lines in a multiplexed fashion, such that
two 4-bit contTol parameters are present on the eight
data output lines at any given point in time, except
again for the phoneme timing control parameter which
uses seven of ~he eight data outputs~
The parameter storage ROM 40 is addition-
ally accessed by three parameter select bits 48 which
are provided from the output of the timing circuit 38 to
the three low order address inputs of storage ROM 40.
The timing circuit 38 comprises an internal master clock
circuit 32 which is adapted to produce a master clock
signal having a fre~uency that is determined in accordance
with the values of an external RC ne~work connec~ed to
- inpu~ terminal MCRC. Alternatively, ~he MCRC input
terminal may be grounded and an external clock signal
provided directly to the addi~ional clock input ~erminal
MCX. The master clock signal from the output of the
master clock circuit 32 is provided -to a ripple counter
34 which is adapted to produce eight clock signal outpu~s
at varying prsdetermined fr~quencies. Three of ~he
clock signals comp~i~e the parameter selector bits which
are pr~uided on line 48 ~o the low oraer address inpu~s
of the ~arameter storage ROM 40. The outputs from the
ripple counter 34 are ~hen p~o~ided to ~ latch and two-
phasenon-overlapping clock circuit 36 whieh is adaptea
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to develop the 12 timing signals which are utilized
in all sections of the system.
To summarize, therefore, the six phoneme
select bits 22 identify the paTticular phoneme desired
and the three parameter select bits 48 determine which
of the 12 control s;gnal parameters defining the identi-
fied phoneme are p~esent on the data outputs of the
parameter s~orage RQM 40 at any given point in time
during the phoneme period. Certain of the control si~nal
parameters which are to be provided to the ~ocal tract
require transitioning to smooth the abrupt variations
which occur in the values of the control parameters
from one phoneme to the next. Accordingly, the data
output lines from the parameter storage ROM carrying
these control signal parameters are provided to a
digital t~ansition circuit 50 which digitally imple-
ments the desired transition function. The data output
lines from the parameter storage ROM carrying the
~emaining control signal parameters which relate ~o
various timing functions and do not require transition-
ing are provided directly ~o the phoneme timing, vocal
delay, closure delay and pause timing circuit 44. As will
subsequently be described in greater detail, the phoneme
timing circuit 44 includes a counter which is clocked at
a frequency determined by the phoneme timing con~rol
parame~er to control ~he duration o each phoneme. More
paTticularly~ the coun* rate of the counter is determined
by the fTequency of the clock signal on line 43 from the
outpu~ o~ the sub-phoneme-cloc~ timing circuit 42, which
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essentially CompriseS an oscillator whose frequency is
controlled by the phoneme timin~ sontrol parameteT.
When th~ counter attains a predetermined coun~, an
output signal is produced on line 45 which sets output
latch 28, thereby forcin~ the A/R output line 30 Hl to
indicate that new phoneme data is required.
Timing circuit 44 als~ includes a ~ocal
delay and closure delay network which essentially com-
prises a magnitude comparator which is adapted to com-
pare the count output of the phoneme timing counter with
the values of the vocal delay and closure delay control
signal parameters when presen~ed at the data outpu~s
of ~he parameter storage ROM 40. When an equi~alency
condition is detected by the magnitude comparator~ the
delay period is terminated. The purpose of the vocal
delay control signal parameter is to delay the trans-
mission of the vocal amplitude con~rol signa~, and hence
delay or ~etain the injection of vocal excitation energy
into the vocal tract, or a predetermined period of time
less than ~he duration of a single phoneme time inter-
val, during ~ert2in frica~ive to-vowel phonetic transi-
~ions wherein *he ampli~ude of ~he frica~iYe constituent
is ~apidly decaying ~t ~he same ~ime the amplitude of
~he vocal cons~cituent is rapidly increasing. The closure
delay control signal ~erves.a similar funo~ion and is
adap~éd to delay the transm;ssion of the ~ricative
amplitude and clos~Te control sig~als. Impl~mentation
of the delay func~ion is perfo~med whenever a vocal
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delay or closure delay control signal parameter is
present, by effectively "freezin~" the digital transi-
tion circuitry 50 during the period of transmission for
the vocal amplitude and fricative amplitude control
signal parameters, respectively, for a period specified
by the ~alue of the vocal delay and closure delay
control parameters. As will also be described subse- !
quently in grea~er detail, this function is performed
by a freeze transition CiTCUit 46 ~hich effectively
clamps the ~ead/write (R/~ line 47 to a storage RAM
in the digital transition circuît 50.
The transitioned control signal parameters
from the output of the digital transition circuit 50
are de-multiplexed by a la~ching circuit 52 in accord-
ance with appropriate timing signals from the timing
circuit 38 which are provided through a synchronize
clock circuit 54 for controlling the clocking of the
latches 52. In addition, the glottal source circuit
58 produces a glottal sync signal at the beginning of
each glottal pulse period which is also provided to
~he synchronize clock circuit 54 on line 55 to latch
the Fl 9 ~2 9 F2Q and P3 control signal parameters from
the ~ransition circuit 50.
The vocal exci~ation signal ;s digitally
generated by a gl~t~al source circuit 58 in accordance
with the two inflection select bi~s 56 frGm the eight
bit digital input command w~rd7 which control the funda-
mental frequency of the glottal signalO In addition,
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it will be noted that a degree of automatic inflection
control is provided by also varying the fundamental
frequency of the vocal excitation signal in accordance
with the inverse of the Fl control signal parameter
(Fl)o The resulting vocal excitation signal i5 then
provided to a vocal amplitude CiTCUit 62 which modulates
the amplitude of the vocal excitation signal in accordance
with the Yocal amplitude con~rol signal parameter before
injection of the vocal excitation signal in~o the vocal
~ract 60.
The fricative excitation signal is supplied
by a white noise generator 64~ During voiced ~ricatives
~e.g., z, v) when fricative and vocal excitation energy
are both present, the white noise genera~or 64 is gated
on only during the latter or "rest" portion of the ~lottal
pulse signal under the control of the FCATE signal on
line 65 from the glo~tal source circuit 580 The resulting
white noise signal from the output of the generator
circuit 64 is provided to a frica~i~e amplitude and
high-pass noise shaping network 66 which is adapted to
filter the rioati~e exci~ation signal and modulate
its ampli~ude in accoTdance with ~he frica~ive ampli~ude
con~Tol signal parameter before injection in~o the vocal
~ract 60 under the control of *he frica~ive control
parameter ~FC~ and the inYerse of the rica~ive con~rol
parameteT (FC~
The vocal tract 60 in the preferred
embodiment c~mprises four serially connected resonant
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filters designated Fl~ F2~ F3 and FS. The resonant
frequencles of the Fl-F3 resonant filters are controllable
in accordance ~ith the Fl, F2 and F3 control signal
parameters, The bandwidth or ~Q~ of the second order
resonant filter ~F2~ in the vocal tract 60 is also
controlled by the F2Q control signal parameter. Finally,
the output f~om the vocal tract 60 is provided to ~he
closure circuit 68 which is adapted ~o abruptly modulate
the amplitude of the audio output signal in accordance
with the closure control signal ~C~).
Referring now to Figures 2-8, and in
- particular to ~igure 2 3 a circuit diagram of the speech
synthesizer 20 according to the present invention is
shown. As previously noted in connection with the
description of the block diagram in Figure 1, the pre-
sent speech syn~hesizer 2~ is adapted to be driven by
an 8-bit digital input command word. The six phoneme
select bits 22 (P0-P5) are provided in parallel to the
data (D) inputs of a 6-bit latch 26. The data present
~0 on phoneme select lines ~P0-P5~ is clocked into latch
26 by a s~robe signal produced on line 24 which also
se~ves to reset output latch 28j thereby forcing the
acknowledge/~equest line 30 LO to ~cknowledge Teceipt
~f the new phoneme da~aO The L0 output signal on A/R
line 30 also serves ~o reset the phoneme ~iming counter
849 the purpose of which will be ~ubsequently described.
The Q outputs from la~ch 26 are provided to ~he high
order address inpu*s ~A3-A~ of the parameter s~orage
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ROM 40. The remaining three low order address inputs
~AO-A2) of ROM 40 are connected to the par~meter select
bits 48 from ~he output of the ~iming cirouit 38. As
previously noted, the control signal parame~ers defining
the phoneme identified by phoneme select bits 22 are
produced at the data outputs ~DO-D7) of param~ter storage
ROM 40 in a multiplexed fashion in accordance with the
three parameter select bits 48.
Although ~nown in the art the functions
of the various control signal parameters generated by
parameter storage ROM 40 will be briefly summari~ed
to pro~ide a better understanding of the operation of
the pres~nt s~stem~
The Fl, F2, and F3 control parameters
determine the locations of the resonant frequency poles
in the first three variable resonant filters in the
vocal tract. The fricative control parameter ~FC) re-
places two control parameters normally pro~ided in
synthesizers of ~his type; i.e., ~he fricative fre~uency
and fricative low pass control parame~ers~ Specifically,
it has been determined that, in general~ when a fricative
phoneme requires low ~requency frica~ive energy in the
range of the F2 ormant~ it does not also require a
substantial amount vf high frequency fricative energy
in the ran~e o the F5 forman~, and vice versa~ Thus,
the present in~en~ion u~ilizes ~ single fric2ti~e ~ontrol
(F~ parame~e~, and the inverse of the FC control para-
meter (FC~, to control the parallel injec~ion of both
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low and high frequency fricative energy into the vocal
tract. The P2Q csntrol parameter varies the '~Q~ or
bandwidth o~ the second order ~esonant filter (F2) in
the vocal tract and is used primarily in connection with
the production of ~he nasal phonemes l'n"~ "m" and ~ng~O
Nasal phonemes typically exhibit a higher amount of
energy at the first formant (Fl~ and substantially lower
and broader energy conten~ a~ the higher formants. Thus,
during the presence of nasal phonemesl the F2Q control
parameter is generated to reduce ~he Q or increase the
bandwidth of the F2 resonant filter which~ due ~o the
cascaded arTangemen~ o ~he resonan~ filters in the
vocal tract, prevents significant amounts of energy from
reaching the higher formants. Th~ vocal amplitude control-
parameter (VA) is generated whenever a phoneme hav;n~ a
voiced component is presentO The vocal amplitude control
parameter controls the intensi~y of the voiced component
in the audio output, The frica~ive ampli~ude control
pa~ameter (PA) is generated whenever a phoneme having
~0 an unYoiced component ;s present and is used to control
the intensity of the unvoiced component in the audio
outpu~. ~he closure parameter ~CL~ is used to simulate
the phoneme interaction which occurs, for ex~mple, during
the production o the phoneme ~'b" followed by the phoneme
"e"~ In particular~ the closure oon~rol p~rameter, when
provided to ~he closure circuit 68~ is ~dapted ~o cause
~n abrupt amplitude modulation in the ~udio output that
~ simulates the ~uild-up and sudden release of energy tha~
: occurs dur;ng the pronunciation o such phoneme combinations.
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The vocal delay control parameter (VD) is utilized pTi-
marily during certain fricative-to-vowel phonetic transi-
tions wherein the amplitude o the fricative constituent
would otherwise be rapidly decaying at the same time
the amplitude of the vocal constituen~ is rapidly increas-
ing. The Yocal delay control parameter ~hus seTves to
delay the transmission of the vocal amplitude (VA) eontTol
signal under such circumstances. The closure delay control
parameter (CLD) is similarly utllized primarîly during
certain vowel-to-fIicati~e phonetic transitions wherein
it is desirable to delay the transmission of the closure
(CL) and fricative ampli~ude ~FA) control parameters
in the same manner as ~hat discussed in c~nnectîon wîth
the vocal delay control parameter. The pause control
parameter (PAC) is generated whenever a pause phoneme
is selected to insert a period of silence into the
speech pat~ern. However, because ~he ar~iculation
pa~tern of the ~ocal tract ~s "frozen" during a pause
phoneme until all of ~he excitation energy in the vocal
tract is completely dissipated9 an additional important
function is also pTovided by the pause phoneme. In
pa~ticular, ~ertain words whose endings ~end to 1'trail
off", such as those ending in nasal phonemes, sound
as if an additional phoneme has been included when the
articula~ion patte~n o ~he last phoneme is abruptly
changed befo~e the excitation energy in the vocal tract
has completely dissipated. Fo~ ~xample, the word "sun"
may sound more like "suna". This is due tc ~he fact
that the Tesidual excitation energy in the Yoeal ~ract
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is ~ocalized as something other than an "n" after the
duration of the ~'n" phoneme period. Insertion of a
pause phoneme following the 1'n" phoneme in this example
will therefore improve speech recognition by reezing
the articulation pat~ern of the ~'n" phoneme until all
fricative and Yocal excitation energy is dissipated.
The final control parameter is the phoneme timing
control parameter which is generated for each phoneme
and is used to establish the period of production for
the phoneme.
The parameter storage ROM 40 in the preferred
embodiment i5 configured as shown in Figure 12. In
particular, the RO~l 40 has stored ~herein twelve con-
trol signal parameter values for eaeh of the 64 phonemes
identifiable by phoneme select bits 22. Each control
signal parameter has four bits of resolution except for
the phoneme timing control signal parameter which has
seven bits of resolu~ion. Thus for example, as indicated
in Figure 12, when the parameter select bit 48 are
equal to 011~ ~he closure control signal parame~er (CL)
will be present at the DO-D3 data outputs of ~OM 40 and
the F3 con~rol sign~ parame~er will be presen~ at the
D4-D7 da*a outpu~s o ~OM 400 Similarly~ when parameter
bits 4B are ~qual ~o lOO, then ~he closure delay (CLD)
and the F~Q control signal parameters will be present
~t the DO-D3 and D4-D7 data outputs, respectively, of
parameteT ~OM 40. In the p~efeTTed embodimentl the
fre~uencies of the parameter select bits 48 are 40KHz,
20KHZ, and lOKHz. Thus, since phoneme durations ~ary
frvm approximately 50-~50 milliseconds, it will be
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~ppreciated that each control signa~ parameter will be
generated on the data outpu~ lines D0-D7 of parameter
storage ROM 40 a minimum of approximately 500 times
during the period of each phoneme. A timing diagram
illustrating the relatlonship between the parameter
select bits 48 at the AO-A2 address inputs of ROM 40 and
the data outputs D0-D7 of ROM 40 is shown in Figure ll.
The parameter select signals on lines 48
are generated at ~he Q4-Q6 outputs of a lO-bit ripple
counter 3~1 which ;s cloc~ed by the master clock signal,
wh:ich in ~he prefelred embodiment is set at 1.28MHz.
As will subsequently be appreciated by those skilled
in ~he art, variation o~ the mastsr rlock requency
wil1 vary the overall pitch and frequency composition
of the audio output. In addition, by varying the master
clock fTequency abové or below that required for normal
speech ranges, the present system can be utili~ed to
produce highly textured sound effectsO
The Q0-Q3 outputs of ripple counter 34
are p~ovided to the data (D) inputs of a first 4-bit
latch 70 and ~he Q4-Q6 and Q9 outputs of counter 34 are
proYided to *he data (D~ inputs of a second 4-bit latch
720 The tllree high order Q outputs ~rom latch 70
comprise the BIT O, BIT l and BIT ~ clock signals which
: are proYided to ~he digltal transi~ion circui~ ~O to
be subsequel~ly described. The remaining Q output
signal from latch 70 is proYided on line 73 to an R-S
lip-flop 74 so as to produce at its SET ou~put terminal
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a clock signal C~l) at twice the frequency of the BIT O
clock signal and opposite in phase rela~ive there~o,
The ~1 clock signal is also utilized in the digital
~ransition circuit 50. The ~hree low order Q outputs
from latch 72 comprise the AO-A2 clock signals which
are utilized in various sections of the system to monitor
which cont~ol parame~er is present and to de-multiplex
the t~ansitional control parameters. The AO-A2 clock
signals have the same frequencies as the parameter
select signals provided on lines 48 to AO-A2 address
inputs of ROM 40, only delayed slightly relative thereto.
In addition9 it will be noted that the
Q3 output signal f~om ripple counter 34 is also provided
to a pair of R-S flip-flops 77 and 78 so as to produce
at ~he RESET output te~minals thereof slightly non
overlapping clock signals ~1 and ~2. As shown in
Pigure 14, the ~1 and ~2 clock signals are opposite in
phase and in the pre$erred em~odiment have a f~equency
of 20KHz. The ~1 and ~2 clock signals are utilized
principally in connection wi~h ~he implementation of
the unique capacitive switching parameter control technique
~o be subsequently described3 although the ~1 ~nd ~2
clock signa~s a~e also u~ilized slmply as convenient
clo~k signals. SimilaTly, the Q5 output signal rom
~ipple counteT 34 is addi~i~nally proYid~d to a pair
o R-S flîp-flops 75 ~nd 76 50 as to produee at the
RES~T output ter~inals ~hereof a sec~nd pair of slightly
non-o~erlapping clock signals Pl and P2 which are also
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opposi*e in phase in ~he same manner as clock signals
~1 and ~2, and have a frequency of SKHz in ~he preferred
embodiment. The Pl and P2 clock signals are utilized
solely in the sub-phoneme clock circuit 42 (Figure 7)
to be described subsequently in greater detail~
The parameter ~alues stored in RO~I 40
which are generated on the high order data output lines
D4-D7 comprise vocal tract control parameters which
require dynamic transitioning and are therefore provided
to the digi~al transition circuitry 50 to be subse-
quently described. The parameter values stored in ROM
40 which are generated on the low crder data output lines
DU-D3~ however, are essentially on/of~ signals or timing
signals which require no transitioning and are therefore
provided directly to the phoneme timing, pause timing
and delay ciTcuitry.
The operation of the phoneme timing circuit
wi~l now be explained. The scven least significant bits
DO-D6 from the data output o~ parameter storage ROM ~0
are provided to the data (D) inputs of a 7-b.i~ latch
80 which is clocked by a signal receiYed on line 85
from the No. '1 ou-tput ch~nnel of an 8-channel multiplexor
86. The A~ B and C binary control inputs o~ multiplexor
$6 are *ied ~o ~he AO-A2 clock signals from the output
of latch 70 in timing sircuit 380 T~us~ it will be
appreciated~ that when pa~ameter selector bitis AO-A2
are equal t~ 9 indicating *hat the phoneme timing
control signal p~rameter is presen~ on ~he data outputs
-21-
i
, ~,
-
~ ~7 1 ~79
(D0-D7) of parameter storage ROM 40~ the No. 7 output
channel of multiplexor 86 will go HI, ~hereby clocking
into latch 80 the value of the phoneme t;ming control
signal pa~ameterO
With additionzl reference to Figure 7,
the seven parallel outputs (PH0-PH6) from latch 80
are provided to the sub-phoneme clock circuit 42 which
effectively comprises an oscillator circuit whose fre-
quency ls controlled by the ~alue of the seven output
~its from latch B0. In particular, the outputs from
latch 80 (PH0-PH6~ control the on/off state of seven
analog switches, as indicated, which are individually
connected in series with one of se~en binary weighted
parallel connected capacitors. As will subsequently
be described in greater detail in connection with th~
description of the vocal tract, by rapidly switching
the capacitor network 79 in the manner shown under the
control of the Pl and P2 non-overlapping clock signals,
a resistance value is effec~ively slmulated which is
equal to the inverse of the product oE the switching
frequency ~Pl) and the resulting capaci~ance ~alue of
capacitor ne~work 79~ In other words, the simulated
R value in the prefe~red embodiment is determined by
the following:
R. G
Therefore, the ~re~uency o~ ~he ~u~put signal from ~he
os~illator 4~ on line 88 is gi~en by ~he product of
the result;ng resistance Yalue ~R) and the fixed
~ ~ 7 ~ ~ 7 ~
c~pacitance value (C~ in the RC timing network of ~he
oscillator 42.
- Returning to Figure 2, ~he output signal
on line 88 from sub-phoneme ~lock ci~cuit 42 is provided
to the clock input of the phoneme timing counter 84 and
thus determines the count ra~e of the counter, The
duration of the phoneme is determined by the period of
time it takes ~o~ ~he counter ~4 ~o attain a count of
16. In particular~ when the ~oun~ ou~puts tQ0-Q3) of
coun~er 84 are equal to 0000~ ~he output of NOR-gate
90 will go HI, thereby pro~iding a HI signal to the
da~a inpu~ o flip-f:lop ~2~ Af~e~ a brief delay --
specifically, two pulses from clock signal P2 -- the
output of NAND-gate 94 will go LO *o thereby se~ output
latch 28 via inver~er g6 and orce the A/R line 3~ HI
to signal that new phoneme data is r~quired.
The Dpera~ion of ~he vocal delay and
closure delay circu;t will now be described. As pre
viously mentioned ~he purpose D ~he vocal ~lay and
olosure delay control signal pa~amete~s is ~o delay
for a predeteTmined por~ion of the pho~eme period khe
~ra~ is~o~ h~ ,~np~ fri~iv~
~mplitude control si~na1s ~especti~ely during ertain
vowel/ricative phon~ic ~ransi~lsns~ This ~s ~ccom-
plished in ~he o11Owing mannerO The our count ~utputs
(Q~-Q~ fr~m the ph~neme ti~ing c~unter 84 a~e provided
through in~erte~s l00 ~o ~he B inputs of ~ 4-bi~ magni-
tude comparator 8Z. The A inputs of magnitude comparator
82 are tied to the W -D3 da~ outputs of the parameter
-23-
.
1~7~7~
ROM 40. The A=B output of magnitude comparatoT 82 is
provided on line 102 to a pair of NAND-gates 104 and
106, The othe~ input to NAND-gate 10~ is connected
~ia line 110 to the No. 5 output channel of multiplexor
86 and the otheT input to NAND-~ate 106 is connected
via line 108 to the No. 4 output channel of mul~iplexor
86. Thus, it will be appreciated that when the A2-AO
clock signals provided to the binary control inputs
A, B and C of multiplexor 86 are equal to 101, indicating
that the vocal delay ~VD) control signal parameter is
presen~ at the DO-D3 data outputs of parameter storage
- ROM 409 and the count outputs ~QO-Q3) of phoneme timing
counter 84 is equal to the pa~ameter value of the vocal
delay control signal, bo~h inputs to NAND-gate 104 will
be HI, ~hereby forcing the output of NAND-gate 104 LO
to set flip-flop 11~. Similarly, when the A2-AO clock
signals are equal to 100, the No. 4 ou~put channel of
multiplex~r B6 on line 108 will go HI, indicating that
the closure delay contrsl signal parameter is present
on the DO-D3 data outputs of parameter storage ROM 40.
Consequently~ when the coun~ ou~put of phoneme counter
84 simul~aneously a~ains a count equal ~o ~he parameter
value of the closure delay control signal, the A=B
outpu~ of m~gnitude compara~or 82 on line 102 will
also go ~I, thereby providing HI signals *o both inputs
of NAND-gat~ 106 and orcing i~ output LO to set
flip-10p 114~ As will subsequen~ly b~ seen, the
output s~gna~s from f~ip~ ps 112 ~nd 114 are provided
24
',: " ' ' '
', " " ' '
~7~a~7~
to the freeze t~ansition circuit 46 (Figure 3), which
effectiYely inhibi~s the ~ransition process in the
digital transition circuit SO during transition.ing
of the ~ocal amplitude and fricative amplitude control
signal parameters~ ~lip-flops 112 and 114 are reset
at the end of each phoneme period by a LO RESET pulse on
line 124 fTom the output of AND-gate 122. The output
sf AND-gate 122 i5 forced LO at the end of each phoneme
period by the HI ~ESET pulse produced by phoneme counter
84 on line 30 which is inverted by inverter 120 and
provided to the input of AND-gate 122. Note, the "equal
to" outpu~ of magnitud~ compara~or 8~ is a:Lso ~eset to
a LO level at the beginning of each new phonem~ period
when the count output (QO-Q3) of phoneme coun~er 84 is
equal ~o OOOD by the resulting HI signal produced a~
the output of NOR-gate 90 which is inveTted by inve~ter
98 .
In addition, it will also be noted ~ha~
t~e c~ osu~e delay control signal parameter tCLD) is
also u~ilized to inhibi~ ~he transmission ~f the
closure ~CL~ control signal parameter ~o ~he closure
circui~ 68 ~Pigure 1~ In p~r~icular, during the
closure delay period the output of flip-10p 114 is
LO, ~nd hence a LO signal is pro~ided on lin~ 126 to one
of ~he inputs ~f ~ ~hree~input N~ND~a~e 1~80 The
remai~ing ~wo inputs ~ NAND-gate 128 are connected to
line 11~, which is ~ied to the N~. 3 output channel
of multiplex~r ~6 D and to l ine 115 which is connected
-25 ~
.
~ .~71~
the D3 data output ~f ~che parame~er storage ROM 40.
~hen a elosure signal is present, ~he DO-D2 data ou~puts
rom ROM 40 are not utilized since the closure control
s:ignal is simply an on/of ~ype signal~ Th~refore, only
~he state of data ~utput D3 from RO~ 40 sn line 115 is
monitored during ~che closure parameter pe~lod when the
A2-AO clock signals are equa~ ~o 011 and ~he NoO 3 output
shannel from multiplexer 86 oll line 116 is HI . However 9
~ven i HI signals are presen~ed on bokh lines 115 and
116, the PUtpUt of NAND-gate l~B will no'c go LO to reset
1ip-flop 132 and produced a 1.0 closure ~ignal at the
outpu~ o: AND~ga~e 136 un~il f.lip-10p 114 is set upon
~ermina~ion of ~}le r,losu.re delay period ~nd ~ HI signal
is present~d on line 126~ When the closure delay :fwlc~cion
is no'c present and t~e output of flip-flop 114 is HI,
a LO closure signal will be p~oduced a~ the ou~put o
NAD-gate 136 when HI sigllals are coincidental Iy detected
on bo~ line llS from from ~he D3 da~a output of ROM
40 and ~ine 116 from ~he Na, 3 output channel sf
~0 multipïexer ~n The cïosure signal is t~rminated when
~he output of NAND-gate 130 goes LCi to se~ ~lip-flop
132, which ~ccur~ when th~ No, 3 output channel rom
multipl~x~ ~6 OTI ~ln~ ll~ 15 ~ IIId t31~: D3 ~At~ ou'tput
from ~OM 40 i~ LOD indic~lng ~ha~: ~he closure function
is nQ longer desired. This typleally will occu2 at
th~ beginni~g ~f ~e ~llo~mg p~oneme pe~ d i ~he
~ollowing phoneme does no~ also require oche closure
function~ sinc~ the outpu~ frs:~m ~he closure delay ~lip-flop
114 on line 1~6 will always be ~c leas'c momentarily HI
Bt the b~ginrling of each phoneme period~
In addition D i'C will be ~o~ed ~ha~ a
-26-
~7~ 9
closure control signal is also produced wheneveT ~he
values of both the vocal amplitude tVA) and fricative
amplitude tFA) contTol pa~ameters are equal to 7eroO
In other words 9 when both the VA and FA signals from
NOR-gates 190 and 192 (Figure 3) are HI, ~he output
of NAND-gate 134 will go LO, thereby producing a LO
closure signal at the outpu~ of AND-ga~e 136. This
serves to completely silence the vocal tract during
perioas when no ~xcitation energy is present in the
Yocal tract to prevent buzzing and other forms of noise
from being produced during pause periods.
The remalning non-~ransi~ional oon~ol
parameter produced a~ ~he D0-D3 data outputs of parameter
ROM 40 is the pause control parameter (PAC). As
previously noted, ~he pause control parameter is generated
whenever a silent phoneme is desirea, and also seTves ~o
freeze the forman~ positions of the ~ocal trac~ until
all excitation ~nergy is dissipa~ed, The paus~ control
parameter is similar to the rlosure contro~ parameter
~CL} in tha~ it is an on/off type p~rameter and therefore
requires only a signal da~a bi~o For convenience, ~he
D3 data ou~put o par~me~.er s~o~age ROM 4~ is ~gain
selected and th~ D0-D2 d ~a ou~pu~s ar~ no~ used.
The D3 data outpuk rom ROM 40 on line 115 is provided
to the input of ~ ~AND-gate 138 which has its other
i~pu~ connec*ed ~o the Not 6 outpu~ channel ~f mul~i-
plexeT 86~ Accordingly, when ~he A2~A0 clo~k signals
- are eq~al to 110 causing ~he No. ~ ou~put channel of
multiplexer 86 ~o o H~, indic~ing that ~he pause
.:
-27-
.
'' . . . '
~97~7~
control paTameter is present at the DO-D3 data outputs
~f ROM 40 ,, and the D3 data ou~pu~ OTI line 115 is also
~I ~ the output of NAND-gate 138 will go LO and set flip-
flop 142. The output of flip-flop 142 is in turn
proviaed to the input of an AND-~ga~e 146 which h~s i~s
o'cher inpu-~ connec~ed ~co the ou~pu~ of NAND-ga~e 14~.
The inputs to NAND-gate 144 a~e corlnected to ~he YA
and ~:A signals from ~he outpu~s of NOR-ga~es 190 and
192 in :Figure 3. Thereore~ since Yocal and/or fricative
excitation erlergy are always present during non~silenk
phonemes ~ ~he ou'cput of NA~ND~ga~e ~44 will normally be
HI . Conse~uently 9 whell 1ip~flop 14~ is set at ~he
beginning oE a pause phoneme D a HI sigrla':L ~ill be produced
at ~he ou~pu~ of AND-gate 146 3 whieh is provided ~o ~he
freeze transition circui~ 46 ~Figure 33 and9 as will
subsequen~ly be seen, is efec~ive to inhibit the digi~al
transition circuit ~o ~hereby hold ~he ~ransi~ional
control pa~ameters a~ ~heir cur~eni: valuesO The HI
"reeze ormants~' signal at ~he ou~put o AND~gate 146
~O will be termin~ed9 howeYerD as soon as ~11 of the vocal
and f~icative excitatlorl energ~ has been comple~ely
dissipated, DT E11: ~he end of ~he pause phoneme pe~i~d 9
~hichelJe~ i~C5~1r:S fil`s~:. In p~lr'~LCU~ D when ~h ~he
~A and PA signa~ s go HI ~ ~he ou~pu~ of NAND-g~e P44
will go L~ ~nd ~hereby :fl~ce lche ~su~puc o ~D~ga~e
14~ LO.. Conve~ely~ if ~he ou~pu~ o NAND-gat~ ï44
:is still H~ at the end 6~ the pause ph~ne~e period
when ~he D3 data outpu~ of ROM 40 on line 115 goes LOt
-~8-
.: -
~7~79
then the resetting of flip-flop 142 caused by the
resulting L0 signal produced ~t the output of NAND-gate
140 ~ill force the output of AND-ga~e 146 L0.
With particular Teference to Figure 3,
the ope~ation of the digital t~ansi~ion circuit 50 will
now be explained. As pre~iously ~oted, that purpose
of the digital transition circuit 50 is ~o provide a
gradual change in the values of the vocal tract eontrol
parame~eTs from the old or "cuTrent" values to $he new
or "target" values. The four parameter lines T0-T3
from the D4-D7 data outputs of parameter storage RO~f 4
are proYided ~o the 1-4 input channels of an 8~channel
multiplexer 150. The A, B and C binary son~rol inputs
of multiplexeT 150 are connected to the ~I~ 0 9 BIT 1,
and BIT 2 transition clock signals, respec~ivley, from
the timing circuit 38 ~Figure Z), The timing relation-
ship between the BIT 0 - BIT 2 transition clock signals
an~ ~he A0-A2 parame~er clock signals is illus~rated
in Figu~e 11. As can readily be seen from th~ timing
diagram in Pigu~e 11, the BIT O - BIT 2 clock signals
define eight states within each sta~e defined by clock
signals A0-A2. I~ will be ~ecall2d that elock signals
A0-A2 deine whlch param~ter is present un ~he four
pa~meter lines T0-T3 from the D4 D7 data outputs of
~0~ ~0
Multiplexer 150 thus serves to convert
*he pa~allc~ input data on pa~amete~ lines T0-T3 to
serial da~a on ou~pu~ e 151 in p~eparation for ~he
Z9
~ - . .
~ ~7 ~ ~7 ~
serial arithmetic functions to ~e subsequently performed.
In addition, however~ because the parallel o~tput from
~he ~igital transition circu7 t is ul~imately taken off
the fOUT most slgnificant bits lD ~he 8-bit p~rallel
ou~put signal rom outputla~ches 168 and 170, and ~he
parameter inpl~t lines T0-T3 to the transi~ion circui~
are ccnnected ~o input channels 1-4 of multiplexer 150
and are hence s~ifted ~hree ~i~5 down with Tespec~ to
the ou'cput9 multipl~xer l~û also serves to effect~Tely
~iviae ~he "targe~" parameter value by 23 or eigh~,
The serial outpu~ rom multiplexer 150,
wh~ch is ~h~refore equal to l~B o the ~rget par~mete-r
value, is provided on line 1~1 to the B input of a single
bit full adder 148~ The A input of-adder 1-58 is connected
to the sum ou~pu~ of a second single bi~ full adde~
156. The A inpu~ o adder 156 is connec~ed ~o the serial
outp~t of a second 8-channel mul~iplexer 152 which merely
s~rYes to convert ~he resulting parallel sutput signal
from the digital ~ransi~ion CiTCUlt 50 back ~o a serial
- 20 signalO Thusg the signal present on line 153 f~om the
serial su~put Df mulSipl~xer 152 rep~s~nts ~he mos~
racent o~ eurreR~ r~lue o~ ~h8 con~rol parameteT, The
B input o~ ~dder 156 is conne~ed ~o ~he serial output
of a ~hird ~channel ~ul~iplexer ~54 which ~150 serves
*o conY~rt ~h~ pa~allæl DUtpU~ s~gnal rom ~he digital
tra~si~i~n CiTC~lt 50 ~0 a s~Tial signal, However~
because ~he our ~ost si~nificant bits i~ the outpu~
signal rom latch 168 are shifted down ~h~ee bi~s and
:. -30
~ l17~l17~
connected to ~he 1-4 input channels c~ multiplexer 154,
mul~ciplexeT 154 aïso serves to effec~ively divide the
current pa~ameter vaïue by ei8h~, Thus, since the
serial output frsm mul~ciplexer 154 or~ line 155 is pro-
~ided ~o the B input o adder 156 through an inver~er 172,
i~ will be appreciated tihat adder 15~ effectively sub-
t~acts 1/8 of the current parame~er value from ~che current
parameter value and provides the kotal to ~he A input
of adder 158, Adder 158 then adds ~o ~he ~otal fTom
~ddeT 156 1/8 of the ~arget paramete~ value. The value
of the resultin~ signal at the sum ou*puc (~ of adder
158 on line 165 9 ~rhich represen~s ~he ~'new'~ curren~c
parameter ~alue ~ is ~hereore given ~r the follow.ing
equat ion
(Curren~ - l/8 Current) ~ l/8 Target ~ New Current
The serial s;gnal on line 165 fJom the
sum output (E) of adder 158 is converted back to a
parallel si~nal ~by ~ pair of Hex D 1ip-flops 160 and
162, and ~he Tesulting 8~bit s~tgnal is provided ~o ~ e
~0 eight data inpu~cs (D0-D3) of ~ pair o ~emporary storage
RAMs 164 and 166. The ~ddress inpu~s t~A0 A23 of the
PAMs 164 and 166 are connec~d ~o ~he parame~er clock
ïines AO~A~ ThLls" i~ will be appr~cl~t~d ~h~ ~s 1lon~
-
~s ~he R/W inpu~s Df ~4Ms 164 a~d 166 rem~ln prvper~y
enabled, each successive new cur~en~ pa~ameter value
~ill be properly ~tored in RAhls 164 and 166 ~ he
address locations identified by paramete~ clock signals
A0 A2.
~ 7 ~
The readtwrite (R/W) inputs of both RA~5s
164 and 166 ale connected to the ou~put of an QR-ga~e
172 which has one of its inputs connec~ed to the serial
output of a multiplexe~ 174 and the other of i~s inputs
~ied ~o the ~2 clock line through an inverter 173.
The A, B, and C binary control inputs of multiplexer
174 a~e also tied to the A0-AZ parameter clock lines.
The ~ive low order input channels of multiplexer 174
(nos~ 0-43 aTe connec~ed to the ou~put of a first
N~ND-ga~e 176 J the No. 5 inpu~ channel is connected
to the output of ~ second NAN~-ga~e 178, and the No. 6
input channel is conn~cted ~o ~he output of a third
NAND-gate 180. One of the inputs to NAND-gate 176 is
tied through an inverter 182 to ~he "free~e formants'~
~FF) slgnal line, such that when a HI freeze signal is
producea, the output of NAND-ga~e 176 will go HI.
Similarly, one o the inpu~s to each ~f NAND-gate 178
and 180 is conn~ct~d ~o the vocal delay ~VD) and closu~e
delay (CLD3 signal lines, respectirely~ such that when
~ LO vocal delay or closure delay ~ignal i5 produced,
~he outputs of NAND-ga~es 178 and 180 respec~iv~ly, will
~1 :
Thu~., it will be appreciated that, absen~.
a vocal delay lV~9 closure ~elay (CLD~9 or free~e
orman~s ~FF3 ~ignal~ ~he serial ou~pu~ o~ multiplexer
174 will ~emain LO and the R/W inpu~s of RAMs 164 and
166 wil~ be clocked under ~he c~n~rol of ~he ~2 clock
-32
'- .
signal. Accordin~ly, new cur~ent values for each
parameter will be written into RAMs 164 and 166 and
then subsequen~ly rèad out onto the data outputs Q0-Q3
of RA~Is 164 and 166 With the frequency of the ~2
clock signal in the preferred embodiment set at 20K~
a parameter will normally transition to approximatel~
70% of its new target position in 33 msec.
However, when a "freeze formants'- (FF)
signal is produced, the serial ou~put of multiplexer
174 will go HI to inhibit the R/W inputs of RA~Is 164
and 166 during the periods when parameter bits A2-A0
are equsl to 000, 001, 010, 011, and 100, which corres-
ponds to the periods of production for the Fl, F2, FC,
F3, and F2Q control para~eters. Consequently, when this
occurs, new values for these parameters will not be
written in RAMs 164 and 166 and the values of these
control parameters will effectiYely be fro~en at their
current values for 85 long as the FF signal is produced.
Similarly, the presence of a vocal delay (VD) signal
will cause thè serial output of multiplèxer 174 to go
HI and inhibit the R/W line 47, to RAMs 164 and 166
during the "101" or voçal ampli~ude (VA) parameter period
and prevent new values for the vocal amplitude parameter
from being written into RAMs 164 ~nd 166 until the vocal
delay signal is terminated. Finally, when a closure
delay ~ignal ~CLD) is generated, the serial output of
multiplexer 174 ~ill ~o HI du~in~ the "110" or fricative
a~plituae (FA) parameter period ~nd thereby hold the
Yalue of the ~ricative amplitude parameter until the
closure delay signsl is ter~inated.
The ei~ht parallel data outputs Q0-Q3
~rom ~Ar~ i~ ~n3 '66 3re latched in~o ~ pair of 4-bit
- -33-
. . ' . , '
~ ~" 1.~ 7'~1L~9
output latches 168 and 170 wlde~ the con~roï o~ the
~1 cl~ck signaï. The ~ou~ ~ost significant bits, a~
pre~iously noted, or ~he Q outputs from ou~put latch
168 a~e then de-multiplexed by a plurality of latches
lg4-200 to provide the resultlng Fl~ P2, FC, FC, F3,
F2Q" VA, and ~A transi~cional con~rol slgnals which
are provided ~o ~he various seetions of the vocal tract
~0. In pas~icular3 the four Q outpu~s from output la~ch
168 are connsot~d in paralle~ ^co ~he da~a (D) inpu~s
of each of the de~multiplexing l~tches 194-20D. Latches
194~200 are cloclce~l under oche con~rol of ~he A0-A2
parameter clock signals which 8r~ conn~cted to the A9 B
~nd E inpu~s o a 3~o~8 1~ decoder ~10, ~uput c~annels
2, 5 and 6 c>f decoder ~lû a~e tied directly ~o ~he clock
inputs ~CK) of latches 1963 199 a~d 200, respectively.
- Output channels 03 1~ 3 and 4, however~ are ~nd'ed with
the glo~tal 5~16 pulse OTl line 55 by AND-ga~es 202 208
before connee~ion t~ ~he rlock inpu~ (CK) of la~ches
19~, l9S, 197 and lg8. Thus ~ be ~ppreciated
tha~ the transi~ional values foT par~me~ers FC, FC,
VA, ~nd FA are clo~ked in~o latches 196 ~ 199 an~ 200,
~espec~ y~ ~mme~ia~:ly ~pvn upda~lng,~ whil~ the ~ransi
tioned v~ s ~gr ~rame~ers E:l~ P2~ F3D ~nd F2Q ~re
cked in~o la~ches 194 ~ l9S ~ 197 and 198 ~ respecti~ely,
in ~ynchroni za~ h lth~ 1 pul~e from ~he
~l~t~ Dur~ ~ a ~Fi,gu~ O
In ~dit;c~n~ i~ w~ll b~ ted ~ha~ de~
~ultiplexing lAtch 195 which produces the transitioned
-34 -
F2 control signal parameter, is also provided with the
fifth most significant bit ~lt2 LSB) in the 8-bit output
signal from digital transition circui~c 50 so that the
transitioned value for the F2 control parameter has five
bits of resolu~ion. This is done to increase the step
resolution of khe F2 contr~l parameteT due to the greater
frequency span of ~he P2 ~esonan~ filter in the ~ocal
tr~ct 60 ~igure 4)O
Turning now to Figure 6 J the unique glottal
source circuit 58 of the present invention will now be
explained. The period of the gl~ttal pulse signal is
de~ermined by the ~ime it takes for an 8 bi~ counter~
somprised Df cascaded 4-bit j am counters 220 and 222~
to count f~om a preset count ~o all ones. Specifically,
counters 220 and 222 are clocked by the 20KHz ~2 clock
signal. The th~ee most significant data inputs ~Ll-L3)
of counter 222 are connected to ~he inverse of the three
least significant bits (F10-Fl2) in the transitioned
Pl control parameter from the ou~pu~ of latch 194
~Figu~e 3). The inverse of the most signi~icant bit
(F13) in ~he transitioned Fl con~rol paramet~T and ~he
two in1ec~ion con~r~l bits (Il~ I2~ 56 rom ~he 8-bit
i~pu* com~and word ~re provided ~o ~he ~hree leas~
significant da~a inputs (LO^L2) of coun~er 220, The
dat~ present a~ ~he inpu~s (L0-L3~ vf counters 220 and
222 i~ lo~ded in~o ~he counters to preset ~he coun~ers
at the ena of e~ch g~o~l pulse period when a HI
signal is pr~duced ~t the carry ou~put ~TC~ o~ counter
-35~
~ IL7117~
~Q, which is inverted by inverter 228 and provided on
line 230 ~o ~he load inputs (LD~ vf counters 220 and
222. Acccordingly, since the frequency of the carry
out signal from counter 220 deseTmines the f~equency of
the glottal pulse signal, it will be apprecia~ed khat
~he ~undamental frequency ~f the glottal pulse signal
is controlled by the se~ing of ~he inflection contTol
~its 56 and, to a lesser degree~ by the value of the
Fl control parame~er. Since ~he Fl con~Tol parameter
is inverted, the fundamental re~uency of the glo~*al
signal will va~y inversely wi~h ~espec~ ~hereto. In
otheT words, when the value of ~he Fl param~te~ deereases,
~he pi~ch of ~he audio vu~pu~ will inc~ease~ This ser~es
to provide a degree o automatic inflection control in
the audio output in addi~ion to the progr-ammable changes
in pitch aYailable via the inflection contTol bits 56.
It will be noted, howeve~, ~ha~ since the two inflec~ion
control bi~s 56 are provided to higher orde~ data inputs
of counters 220 and 222 ~han ~he Fl parame~er bits 3
~0 ~he automatic inflec~ion changes which ~esul~ from
movement in the resonant frequeney of ~he Fl resonant
il~er will ~ave a less pron~unsed efect on ~he pi~oh
~f the audio outpu~ ~han ~he programme~ changes m~de
via *he inflec~ion con~rol bits ~6,
In ~ddition~ i~ wi;ll be noted ~hat A
~hi~d 4 bi~ j~m co~nte~ 224 is proYîd2d whic~ ~5 loaded
with the sa~e ~ata an~ ena~led ~imultaneously with
counter 220. The only differen e is ~ha~ coun~er 224
is cl~cked by the A0 clock signal and ~here~ore counts
-36-
: - '
, .
:, '
- ~31 7~79
twice as fast as counteT 220. The carry ~utput (TC)
of counter 224 is connected to the SET input of an
R-S flip-flop 226 and the RESET input of flip-flop 226
is connected to the carry output ~TC) of flip-flop
220. Thus, the output of flip-flc)p 226 on line 65
will be set L0 a~ the beginning of each glottal pulse
period and go HI halfway through the glottal pulse
period. The signal OTI line 65, lefe~red to as ~he
FGATE signal, is provided to the white noise generator
circuit 64 (Figure 8) to inhibit the white noise si~nal
during the initial half of the glottal pulse period for
voiced fricative phonemes when both voca~ and fricative
excitation energy are p~esen~ at ~he same ~ime.
The waveform of the glottal pulse sig-
- nal is generated by a 4-bit counter 234 and a pair oi
8-to-1 analog multiplexers 242 and 244. Count~r 234
is clocked by the Ql output o another 4-bit counter
236 which is in turn clocked by the 20KHz ~2 clock signal.
Thus, counter 236 effec~ively serves to divide ~he
frequency of the 20KHz ~2 clock signal by four so tha~
the frequency of the clock si~nal pro~idefl to counter
~34 is 5HKz. ~h~ ~hree leas~ significan~ ~ount outputs
(QO-Q2~ ~rom count~r 234 a~e connec~ed in parallel ~co
~he R~ B and C binary cont~ol inpu~s o mul~iplexers
242 and 244. The ~05t significant eount output ~a3)
fTom counte~ ~34 i~ connected to the inhibit input
CINH) o~ multiplexer 2~2 and through ~n in~erter 245
tc ~he inhibi~ input (INH) ~f multiplexer 244, so ~hat
for the irst eight coun~s ~0-?~ of coun~er 234,
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:, ... .
~17~79
multiplexer 244 is disabled and during the second
eight counts (8-153 of counter 234, multiplexer 242
is disabled. The parallel inputs (0-7) of both multi-
plexeTs 242 and 244 are each shown tied to a vaTiable
resistor connected between a Yoltage source (Vp) ind
gTound, which is intended to ~epresent a presettable
d.c. signal leveli~ As will be seen, the d.c. levels
are p~eset to appropriate values to provide the
desired glottal wa~eform approximation.
The se~ial outputs of multiplexers 242
~ and 244 are tied in common and provi~e ~he glottal
outpu~ signal on ~ine 24~ii The d~co ~nalog level
produced on outpu~ line 246 is ~herefore determined
by the count output of counter 234 which is provided
to the A, B and C binary control inputs of multiplexers
242 and 244. In other words, each of the sixteen counts
from the output of counter 234 un.iquely iden~i~ies one
of the sixteell inputs to mul~iple~ers 242 and 244.
FOT example, when ~he coun~ ou~pu~. of counter 234 is
~0 equal to 0110, the d.c~ level present at ~he NsO 6
inpu~ channel of multiplexer 242 will ~e produced on
outpu~ lîne 246. Simi~larly~ when ~he coun~ output of
counter 234 is equal ~o 1101~ the d.cD level presen~
at the No. ~ input channel of ~ul~iplexer 244 will be
pToducea o~ ou~put line 2460 In ~he preferred embodi-
ment, where~n the ~2 clock signal i5 set at 20~Hz~ the
~Hz count Tate oif ~ounter 234 ~esults in a 0.2 msec.
segment in the glottal output signal on line 246- fOT
-38-
7iL~
each count ~f counter 234, Thus, it will be apprecia~ed
that by properly presetting the d.c, signal levels pro-
vided to the inputs of mul~iplexers 242 and 244 ~ any
desired glottal waveform may b~ genera~edO In the
preferred embodi~en~ was de~ermined that an 8-segment
glo~tal pulse ~f the ~ype illustrated in Figure 10 was
adequate, and therefore only a single 8-to-1 multiplexer
was used.
The car~y output (TC) from coun~r 234
is returned to its enable (EP) input through an inverter
238 to disable ~he counter once the counter has a~tained
a count o 111~ and prevent it responding to addi~ional
clock pulses. The purpose o ~his is to hold counter
234 at its las~ count so that the last d~co level pro-
duced on output line 246 will be maintained for the
duration of the glottal periodO Specifically, it will
be noted that the carry outpu~ of counter 220, which
determines the glottal period, is provided ~hrough in-
verter 228 on line 230 to the inpu~ of an OR-gate ~32,
~0 which has its other inpu~ tied ~hrough an inver~er Z31
t~ the ~1 clock signal. The output from OR-ga~e 23~
is connec~ed ~o th~ clear inpu~s tCLR) o ~oth counters
234 and ~36. Thus 3 i~ will be apprsclated th~t a~ the
end of the glottal pulse period when a HI signal is
produced at ~he carry output ~TC~ of counter 220, a
LO signal is provided ~o ~he CLR inpu~s ~f coun~ers
23~ and 236, ~herè~y setting all ~our outpu~s (QO Q3)
of each c~un~er to zero ~ t~tiate a new glo~tal pulse.
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~:~7~179
When the QO-Q3 c~unt outputs ~f counter
234 are reset to zero at the be~inning of each glottal
pulse, a Hl output pulse is prsduced on glotta? sync
line 55 at the output of NOR-gate 240 which has its
four inputs connected to the four outpu~s o~ counter
234. As previously noted, the glottal sync pulse on
line 55 is provided to the transition circuitry ~Figure
3) to latch the Fl, F2, F3 and F2Q output latches 194,
195, 197 and 198, Tespectively, in synchronization ~ith
the beginning of each glottal pulse. The purpose of
synchronizing the transitioning of the Fl, F2, F3 and
F2Q control parameter values with the beginning of the
glottal pulse is to prevent the production of audible
rsndom noise which would be produced if the CMOS switches
in the variable capacitance networks in the vocal tract
were per~itted to switch during the "rest" period of
the glottal pulse signal when no excitation energy is
present in the vocal tract.
. Referring now to Figure 8, the fricative
excitation signal is produced by a white noise generator
comprised of a jam counter 250 and an 18-stage static
shift register 252, which generates a random white noise
outpu~ signal on line 256. Both jam counter 250 and
shift register 252 are clocked by the Pl clock signal
which is provided to their clock inputs tCK) ~hrough a
NOR-~atP 254. The other input ~f NOR-sate 254 is
connected to the inverse of the fricstive ampli~ude
coDtrol parameter ~FA) from the ou~p~t of NOR-gate 192
~ ure 3). ~hus~ when no fricative excitation energy
is needed, the noise Bénerator is disabled to avoid
any unnecessary interference to the remainder of ~he
- s~stem.
The white noise output ~ignal o~ line
~ O
79
2s6 is provided ~o the input of a NAND-~ate 258 w~ich
has its -~ther input connected to the output of an OR-
gate 260. The inputs to OR-gate 260 are tied to the
FGATE signal l1ne 65 and the YA signal line frum ~he
output o~ NOR-gate 190 ~Figure 3)~ During voiced
fTicative phonemes which requ;Te both YOCal and
fricati~e excitation ene~gy 3 bo$h VA and FA signals
will be LO. Thus~ i~ will be appreciated ~hat ~he
FGATE signal on line ~5, which~ it will be recalled,
goes HI during the latter hal or ~ITestl~ portion o~ the
glo~tal signal period~ will enable NAND-gate 258 and
effectively ga~e on the white noise signal during the
lat~eT inactive portlon of the glo~al signal period>
The whi~e noise signal rom ~he ou~pu~
of NAND-gate 258 is then provided to the fricative
amplitude con~rol CiTCUit 260 which con~Tols the ampli-
~ude of the white noise signal in accordance wi~h the
value of the fricatiYe amplitude control paramete~ ~FA).
The resulting white ~oise signal is ~hen ~ eTed by a
high pass noise shaping ilter before injec~.ion in~o
the vocal tract 60 under the control o the fTicative
cont~ol signa~ parame~er (FC~ and its inv~rse ~FC~,
The opera~ion of the ~rica~l~re ~mpll~ude con~rol circuit
~60 ~nd the high pass noise ~h~ping circui~ ~62~ which
utilize the same capaciti~e switching technique em-
p~oyed in ~he voeal ~c~ 60~ will bscome ~eadily
~pp~ren~ ~r~ *he foll~wlng descrip~ion of the voeal
trac~ 600
~ith ~eference ~w to Pigure~ 4 ~nd S,
a circuit diag~m of the no~el Yocal tract 60 of ~he
present invention is shown. The vocal ~ract 60 is
~l7~ 79
plincipally comprised of four sascaded ~esonan~ filters,
designated Fl 3 P2 3 F3 and F5 . The resonant frequencies
~f *he Fl 9 F2 and F3 ~esonan~ fil~ser5 are vaTi~ble and
are controlled in accordance with the Fl, P2 and F3
contro ï pa~me~ers 3 whereas the resonant iEre~uency o
the P5 resonan~ fil~er is fixedO The glo~tal souTce
or vocal excitatlon signal is provided through the
vocal ampli~ude control 5:iTCUit .62 9 which controls ~he
amplitude of the glstt~l signal -in accordance wi~h the
vocal amplitude ~VA) control pa~ametcr, and is ~hen
inj ected serial7y in-to the Fl .Tesonan~ il~er o:E the
v~c~ tra~ t ~ The ~ricatiYe ~xc~ a~ion signal is inj ected
:in parallel into ~he F2 and F5 resonant filters of the
vocal ~ract SO under the control o the rica~ ive con -
~rol parameter ~FC) and the inYerse of ~hg f~ica~iYe
control parameter (FC) 9 respec~ively. :ln ~dd:i~ion 3 i~
will be noted t~e "Q'~ or ban~wid~h of the F~ resonan~
fil~eT is also con~rolled by ~he F2Q control parame~er~
~hich as p~e~ious:ly explained is llsed principally during
n~sal phonemes ~o reduce ~h~ Q ~nd ~hus increas~ ~he
b~ndwid~h o the F2 r~sonant fil ter, The Imique manneT
i.n wh;c~ ~h~ paramg~er ~oTl~ol ~une~lons ~e impl~men~ed
he presen~ sys~em will now be explainedO
As preYlously llo~d ~ the prefer~ed
~mbodin~ent ~f *he presen~ in~entlon is parclcula~ly
adapted tt> be iDIplemen~Led în a single integra~ed circuit
u~ilizing com~lemen~aTy me~ xide semiconductor ~CMOS~
technology. In vi w of the desire ~o design ~ complete
-42
'
~ ~ 7 ~ ~ 7 ~
speech synthesizer which is capable sf being cons~ructed
on a slngle silicon "chip'1, a unique appToach was taken
in ~he manner in which the parame~er control functions
are imp~emented. In particular9 ~a~her than utilizing
time-welghted duty cycle ~sntrol signals as in many
previous speech syst2ms; the present inven~ion employs
a capacitive switching technique ~o control the runing
of the voc~l tract, as well as the vther parameter con-
~ro~led func~ions~
Wi*h par~icular reference ~Q Pigure 13
a circuit model illustrating ~he ~heory ~f opera~ion
~ ~he capaci~iYe switchlng ~echnique ~mployed is shown.
In ~igure 13~ ~he curr~nt ~I~ in~o the negative input
o the opera~ional amplifier is determined by the charge
on the capacitor (Cr) and ~he frequency a~ which i* is
switched ~ack and for~h t~Dl ) . Expressed in equation
~rm, ther~vTe,
I 8 1 0~
5ince cur~en~ is 9 ~f courseD also equal ~o ~Vi/R)
~0 ~he following relationship is presen~Rd:
R ~ ~
01 ~ .
Thu~ 9 i~ c~n be seen tha~ ~ sapaci~or ~ha~ is swi~ched
~n the manner illustrated in Figure 13 is essen~ially
equivalent to ~ resis o~, In a~di~ion D since ~he time
cons~t ~T3 of ~e clrcuit is gl~en by the foll~wi:llg
T ~ R~ ~ (F~C-)Cf
-43-
7~
the frequency response (F) of the circuit is equal to
F ~ ~
Consequen~ly~ it wi:Ll be apprecia~ed ~ha~ ~he time
constant and frequency response of an RC circult simu-
lated by ~he a~oYe oapaci~lYe swi~ching ~echnique i5
dependent not only upon the switching freQuency (Fol ),
~u~ also, si~ni~icantly9 upon ~he capacitor ratio o:f
C~ ~nd C. As a resul~ J iR oTder ~o achieYe a fre-
quency response in the low frequencr range of the buman
voice, it is no~ necessary ~o use large capacitors
but simpïy capacitors haYing ~he prDper rakio . Thus
~or example~ with a switchin~ ~requeIIc~ ~FDI ~ eqUa1
- to 20KHz, values fo~ C~ ~ 1 pf and Cf ~ 301~3 pf will
provide a requency response of lOOOHz . Thus ~ as will
be appreciated by those skilled in ~he art ~ by eliminating
the need oT large capacitors " the physical size of the
silicon chip can be minimized . In addi~cion ~ since the
frequency response is depen~en~ UpOIl ~he c pacito~ ~ atio
and not ~heir ~ctual physical size, ~he ~olerance
be~ween production batches of ~he silicon ch;p can b
Teadily main~ained at hi,gh ~ccuracy l~eîs,
n ~ n ~r~-m ~ t ~i~gra~
in Figures 4 9 !5~ 7 and 8a ~h~ Qbov~-described c~paci~ive
swi~ching ~echnique is u~cilized in ~he pref`erred embodimen~
to impl~ment ~he F19 ~2D F39 ~Q, FC~, Ff: ~ ~A~ nd
p~oneme ~tim;ng parame~er con~rolled unr~i~nsO In each
instance the conîrol s;~nal parameter is utilized to
contrul ~he value of 'che capaci~oJr ra~io o~ ~he par~ icular
: -44 -
` ~:
.
circuit involYed, and hence the effec~ive Tesistance
~alue of the circuit, by controlling the on/off state
of a plurality o~ CMOS switches which are individually
connected in seTies with one of a corTesponding plu~ality
o:E binary-weighted, parallel connected capacitors.
The switching frequeney (Fol) is set at 20KHz as estab-
lished by the ~1 and ~2 clock signals from the ~iming
circuit 38, except in ~he sub-phoneme clock CiTCUit
4~ CFigure 7~ which utilizes the:SKHz Pl and P2 clock
signals from ~iming circuit 38~ The ~1 ~nd ~2 clock
signals comprise digital, two-phase clock signals, both
having a frequency of 20KHz. As shown in Pigure 14,
the ~1 and ~2 clock signals are opposite in phase and
slightly non-overlapping. The purpose of the second
n~n-overlapping clock signal (~2) is to eliminate para-
sitic capacitances due :to t~e operational amplifier and
the circuit layout.
The operation o~ ~he capaci~i~e s~i~ching
par~mete~ ~ontrol circuitry is probably best understood
2D by comp~ring thc circuit diagram of the vocal amplitude
circui~ 62 ~nd ~he Fl and ~2 res~nan~ filters from the
vocal ~ract ~0 in Fi~ure 4 wi~h the resls~or equi~alence
o~ ~his circultr~ in Figure 9, As oan readily be s~en,
the ~A~ Fl, F2, ~2Q and FC control signal parameters
each contro~ ~he e:f~ective ~esist~nce value o a variable
resist~nc~ circui~ equlvalen~ by se~ing ~che c~pacitance
r~tio the~eof ~o one of six~een discrete values. The
sixteen di~ferent ~alues are determined" ~ coursP, by
-45-
the state of the four bits in each control signal pa~a-
meter. Thls i5 true of all ~he parame~ers except the
F2 control parameter which contTols ~he fre~uency move-
ment of *he P2 resonant filter~ Although the F2 ron~rol
signal parameter contains four bi~s of resolution
defining sixteen di~s~ent target posi~ions as wi~h
the other control paTameters 9 a fifth resolut ion bit is
added to the F2 control parameter during the transition
process as previously desc~ibed; ~o reduce ~he discrete
increment~l step movement in the undamenta~ frequgncy
of ~he P2 resonan~ ilter as i~ is Bynamically ~ransi-
tioned ~o .i~s new target posi~ionO The fi~h resolu-
tion ~it in ~he F2 control parame~eT i~ provided in
~he preferred embodiment becaus~ ~he frequency span of
the F~ resonant filter is approximately twice that of
the Fl resonant fil~er which also uses~four bits of
resolution to provide sixteen incTemen~al s~eps.
Consequently, ~ince it is desirable ~o make ~he incre-
mental changes small enough so ~ha~ ~ransi~ional s~ep
movemen~ is peTcei~ed as ~ gTadual change by ~he human
ear, i~ was deemed necessa~y ~o ~dd a fith resolution
bit to the ~2 contTol paramete~r to rsduce the amoun~
o~ mo~emen~ in each ~iserete step.
While ~he above description cons~l~u~es
~he p~err~d embodiment of ~he present inven~ion~ it
~ill be appTecia~ed ~hst ~he inven~i~n is susceptible
to ~odifioation~ variation ~nd change ~ithsut departi~g
rom the proper scope or fair meanln~ of the ~ccompanying
cl a ims O
-46 -
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