Note: Descriptions are shown in the official language in which they were submitted.
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-1- RCA 76,431/76,431A
I PROTECTION CIRCUIT FOR INTEGRAT~D CIRCUIT DEVICES
This invention relates to integrated circuit
(IC) protection devices.
Many types of electrical equipment contain IC
5 devices which are vulnerable to damage from high-voltage
transients.
For example, in a television receiver, containing
IC's for video and audio signal processing, the anode of
- the image-producing kinescope is typically biased at a high
10 potential, e.g., 25,000 volts. High-voltage transients
are produced by kinescope arcing which occurs when the
high-voltage anode of the kinescope i5 rapidly discharged.
Kinescope arcing can also occur unpredictably between the
anode and one or more of the other lower-potential electrodes
15 of the kinescvpe when the television receiver is in normal
operation. In either case, kine~cope arcing results in
high-voltage transients having positive and negative peaks
often in excess of 100 volts at the IC terminais and lasting
~ from one to several microseconds.
- 20 Another cause of high-voltage transients in a
television receiver is electrostatic discharge. A build-up
of electrostatic charge may be discharged by the user
through the television receiver controls thereby producing
a high-voltage transient which can damage IC's in the
25 television receiver.
The presen~ invention is embodied in an integrated
circuit semiconductor protection circuit comprising a pair
of complementary conductivity transistors and a resistive
(either linear or non-linear) element integral to the
30 semiconductor structure. The pair of complementary
` conductivity transistors and the resistive element are
arranged to form a two-terminal device capable of conducting
a high current when the potential difference across its
two terminals exceeds a predetermined threshold. The
35 protection device is connected at one terminal thereof
to a circuit terminal of the circuit to be protected, and
at the other terminal thereof to a source of operating
potential. When the potential at the circuit terminal of
7~4(36
-2~ RCA 76,431/76,431A
1 the protected circuit exceeds the operating supply potential
by an amount equal to the pxedetermined threshold, the
protection circuit is rendered conductive, thereby
protecting the IC from damage.
In the drawing:
FIGURE 1 is a cross-sectional view of one
embodiment of a semiconductor structure embodying a
protection circuit in accordance with the present
invention;
FIGURE 2 is a schematic diagram of the
embodiment of the semiconductor protection circuit of
FIGURE l;
FIGURE 3 is a cross-sectional view of another
embodiment of a semiconductor structure embodying the
15 protection circuit in accordance with the present invention;
and
FIGURE 4 is a schematic diagram of the embodiment
of the semiconductor protection circuit of FIGURE 3.
As shown in FIGURE 1, a semiconductor circuit is
20 fabricated on a substrate 10 which may consist of P type
silicon material. An epitaxial layer 12 which may consist
of N- type conductivity is disposecl on the substrate 10.
A P type region 14 is formed within the N- type epitaxial
layer 12, forming a PN junction with the N- type layer 12.
25 Another P type region 16 is formed within the N- type
epitaxial layer 12, forming a PN junction with the epitaxial
layer 12. An N+ region 18 is formed within the P type
region 16, and it forms a PN junction with the P type region
16. Another N+ type region 20 is formed within the N- type
30 epitaxial layer 12. A buried N+ pocket 11 underlies the P
regions 14 and 16.
An insulating layer 22, which may be silicon
dioxide, overlies the surface of the N- epitaxial layer 12.
Openings are formed in the insulating layer 22 over regions
35 14, 18 and 20 in order to make respective electrical contact
thereto. A conductive layer 26, which may for example be
aluminum, overlies the insulating layer 22, and makes contact
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-3- RCA 76,431/76,431A
1 with regions 18 and 20. The conductive layer 26 is.further
connected to a terminal 30 which receives a positive
operating supply potential V+. A conductive layer 24,
which may also be aluminum, extends through an opening in
5 the insulating layer 22 to make contact with region 14.
A bond pad 28 is connected to region 14 through conductive
layer 24. The bond pad 28 is further connected to an input
or output terminal of a utilization circuit (not shown)
elsewhere on the IC. A P+ region 32 extends from the
10 surface o~ epitaxial layer 12 to the substrate 10. Region
32 surrounds the epitaxial layer 12, isolating the protection
circuit from other circuits on the substrate 12.
~; FIGURE 2 is a circuit diagram of the structure
illustrated in FIGURE 1 wherein the resistive element is
15 linear. The protection circuit comprises an NPN transistor
Ql, a PNP transistor Q2, and a linear resistive element
designated as resistor R. The emitter electrode 118, base
. electrode 116, collector electrode 112 of transistor Ql
correspond to regions 18, 16 and 12 respectively in FIGURE 1.
r; 20 The emitter electrode 114, base electrode 112 and collector
electrode 116 of transistor Q2 correspond to regions 14, 12
and 16 respectively in FIGURE 1. Resistor R, designated
as 120, is connected between the base electrode 112 of Q2
and the emitter electrode 118 of Ql and corresponds to that
25.region of the N- type epitaxial layer 12 between P region
16 and N~ region 20 in FIGURE 1. Conductor 126, between
the emitter electrode of transistor Ql and resistor R,
-: corresponds to conductive layer 26 in FIGURE 1.
: The value of resistor R is determined by the
30 resistivity of the N- epitaxial layer 12 and the geometry
of the N-.epitaxial layer situated between P region 16
and N+ region 20 (FIGURE 1). For example, the resistance
~ of resistor R may be increased by locating N~ region 20
further away from P region 16. Also, the buried N+ region
11 significantly lowers the resisti~ity of the N- epitaxial
layer 12. Therefore, the ~uried N+ region 11, while
disposed directly beneath P regions 14 and 16, does not
extend beneath that portion of the N- epitaxial layer 12
, ~
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-4- RCA 76,431/76~431A
1 between P region 16 and N+ region 20.
IN FIGURE 2, transistors Ql and Q2 are connected
to form a silicon controlled rectifier (SC~. Specifically,
the base electrode of Ql is connected to the collector
5 electrode of Q2, and the base electrode cf Q2 is connected
to the collector electrode of Ql. The resistor R is
effectively connected in parallel with the collector-emitter
conduction path of transistor Ql.
Referring now to FIGURE 3, there is shown a
: 10 semiconductor circuit fabricated on a substrate 10 which
typically may consist of P type silicon material having a
buried region 11 of N~ type conductivity. An epitaxial
laye.r 12 of N- type conductivity is disposed on -the substrate
10. A P type region 14 is formed within the N- type
15 epitaxial layer 12, forming a PN junction with the N- type
layer 12. Another P type region 16 is formed within the
N- type epitaxial layer 12, forming a PN junction with the
epitaxial layer 12~ An N+ region :L8 is formed within the
P type region 16 to form a PN juncti.on with the P type
20 region 16. The combination of regions 12, 16, and 18
represents the collec~or~ base and emitter, respectively,.
of transistor Ql. In this embodiment, a P typè region 38
is formed within the N- type epitaxial layer 12 and an N+
: region 20 is formed within P type region 38. Regions 20
25 and 38 together with N+ region 36 formed in N- epitaxial
layer 12 adjacent P type region 38 represent the emitter,
base and collector respectively of transistor Q3. A
buried N~ pocket 11 underlies the P regions 14, 16 and 38.
An insulating layer 22, which may be silicon
30 dioxide, overlies the surface of the N- epitaxial layer 12.
: Openings are formed in the insulating layer 22 over regions
.. 14, 18, 36, 38 and 20 in order to make respective electrical
contacts thereto. A conductive contact 26, which may for
: example be aluminum, extends through the insulating layer 22,
3S and makes ohmic contact with region 18. While conductive
contact 34, which may be aluminum, makes ohmic contact with
` regions 36 and 38 to short the base and collector regions
; of Q3 to form a diode. The conductive contact 26 is further
.
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1 connected, by means of lead 42, to a terminal 30 which
receives a positive operating supply potential V~. A
conductive layer 24, which may also be aluminum, extends
through an op~ning in the insulating layer 22 to make
6 contact with region 14. A bond pad 28 i9 connected to
region 14 through the conductive layer 24. The bond pad 28
is further connected ~o an input or output terminal of a
utilization circuit (not shown) elsewhere on the IC. A P+
isolation region 32 extends from the surface of epitaxial
10 layer 12 to.the substrate 10 and also surrounds the
epitaxial layer 12 in order to isolate the protection
circuit from other circuits on the substrate 12. It should
be here noted, when isolation region 32 is formed, P+ region
40 may also be formed in region 14. This added region 40
15 tends to improve the emitter injection efficiency and lower
the contact resistance or "on" resistance of Q2.
FIGURE 4 is a schematic circuit diagram of the
structure illustrated in FIGURE 3 wherein the resistive
element is a non-linear resistive element in the orm of a
20 diode. The protection circuit comprises an NPN transistor
Ql, a PNP transistor Q2, and a non-linear r~sistive element
formed by an NPN transistor Q3 connected as a diode. The
~emitter electrode 118, the base electrode 116, and the
collector electrode 112 of transistor Ql correspond to
25 regions 18, 16 and I2 respectively in FIGURE 3. The
emitter electrode 114, the base electrode 112 and th~
collector electrode.ll6 of transistor Q~ correspond to
regions 14, 12 and 16 respectively in FIGURE 3. Q3,
connected as a diode, is connected between the base
30 electrode of Q2 and a source of operating potential 30.
The base region 138 and collector region 136 o Q3 are
shorted to form a diode by contact 34 (FIGURE 3) while the
emitter region 120 (region 20, FIGURE 3) is connected to
the source of operating potential 30 by means of conductor
35 144 (conductor 44, FIGURE 3)O To complete the device,
conductor 142 connects emitter 120 of Q3 and emitter 118
of Q3 (via contact 126) to source 30.
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-6- RCA 76,431/76,431A
1 The value of reSiStQr R IFIGURE 1) was determined
solely by the resistivity of the N epitaxial layer 12 and
the geometry of the N epitaxial layer situated between P
region 16 and N~ region 20. For example t the resistance of
5 resistor R may be increased by locating N+ region 20 further
away from P region 16. As in the circuit of FIGURE 2, base
current is needed to trigger Q2 in order to allow regenerative
action to take place, causing the transistor combination
Ql/Q2 to latch. In the circuit diagram of FIGURE 4 the
10 presence of Q3 (the non-linear resistive element) when
forward biased adds an additional voltage drop of about
0.6 volt which must be overcome before the triggering action
will take place. However, the presence of Q3 adds a reverse
bias breakdown voltage of about 7 volts, which is inherent
15 in the diode, together with a reverse bias breakdown of
about 8 volts which is attributed to the presence of deep
diffusion region 40 in contact with the N~ pocket 11.
Thus, I have now achieved a total reverse bias breakdown
voltage of about 15 volts which is necessary when operating
20 a power supply at about 12 volts.
As in FIGURE 2, transistors Ql and Q2 of FIGURE 4
are connected to form a silicon controlled rectifier (SCR).
Specifically, the base electrode of Ql is connected to the
! collector electrode of Q2 and the base electrode of Q2 is
26 connected to the collector electrode of Q1. Diode-connected
Q3 is effectively connected in parallel with the collector-
emitter conduction path of transistor Ql.
The resulting protection circuit diEfers from a
conventional SCR device in that the resistive element (the
30 linear resistor R of FIGURE 2 or the diode-connected
transistor of FIGURE 4) converts the conventional three-
terminal SCR device into a two-terminal device that is
rendered conductive when the voltage across its terminals
exceeds a predetermined threshold. Furthermore, unlike a
35 conventional SCR, the present invention does not require a
resistor between the base and emitter electrodes of either
transistor Ql or Q2.
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-7- RCA 76,431/76,431A
1 The protection circuit of either embodiment
(FIGU~ES 2 and 4) i5 connected to terminal 30 through
conductor 126 which receives a posltive operating supply
potential V+~ The protection circuit is also connected to
5 a bond pad 28 at the emitter electrode of Q2, to which is
connected a utilization circuit to be protected.
In operation, the signal at bond pad 28 normally
~luctuates at potentials below V+. So long as the potential
at bond pad 28 is below V+, the base-emitter junction of
10 transistor ~2 is reverse biased, and transistors Ql and
Q2 are nonconductive.
A high-voltage transient appearing at bond pad
28 will cause the potential at bond pad 28 to become more
positive than V+. When the potential difference between
15 bond pad 28 and power supply terminal 30 is greater than
the combined forward-biased base-emitter voltages (VBE) of
transistors Q2 and Q3, transistor Q2 will begin to conduct
collector current. Conduction through the collector
electrode of transistor Q2 provides base current to
20 transistor Ql to conduct. Conduction through the collector
electrode of transistor Ql in turn provides base current
for transistor Q2, thereby driving transistor Q2 and
transistor Ql into high conduction. When the current
supplied by the high-voltage transient from bond pad 28 to
25 power supply terminal 30 falls below a minimum sustaining
current, transistor Q2 will turn off which turns off the
base current to transistor Ql and the protection circuit
becomes nonconductive. In such mannerl the energy of a
high-voltage transient producing a positive voltage at bond
30 pad 28 is dissipated by conduction of transistors Ql and
Q2 to power supply terminal 30, thereby protecting the
utilization circui-t from damage.
3~
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