Note: Descriptions are shown in the official language in which they were submitted.
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4012 203
Self Tuning Coin Reco nition S stem
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Technical Field
_
The present invention relates to the examination of
coins for authenticity and denomination, and more
particularly to an adjustment-free self-tuning mechanism for
coin testing
Background Art
It has long been recognized in the coin examininy
art that the interaction of an object with a low frequency
electromagnetic field can be used to indicate, at least in
part, the material composition of the object and thus whether
or not the object is an acceptable coin and, if acceptable,
its denomination. See, for example, US Patent No.
3,059,749. It has also been recognized that such low
frequency tests are advantageously combined with one or more
tests at a higher frequency See, for example, U.S. Patent
No. 3,870,137 assigned to the assignee of the present
application.
Most known electronic coin testing mechanisms
require for each coin test included therein at least one
tuning element and at least one tuning adjustment during the
manufacturing process to compensate for components which have
slightly different values within tolerance and for variations
in cornponent positioning which occur during the construc-
tion o- the coin testing apparatus. For example, in a 10'~7
frequency coin test apparatus employing a bridge circuit,
the bridge circuit is normally tuned in the factory by
placing a known acceptable coin in the test position and
balancing the bridge.
on additional problem long recognized in the
coin testing art is the problem of how to compensate for
component aging, for changes in the environment of the
coin apparatus such as temperature and humidity changes,
and for similar disruptive variations which result in
undesirable changes in the operating characteristics of
the electronic circuits employed in the electronic coin
test apparatus.
Retuning of the test apparatus by a service
person is one known response to the problem of component
aging but such retuning is expensive and provides only a
temporary solution to the problem. Discrete compensation
circuitry has been developed to solve the environmental
compensation problem. See, for example, U.S. Patent No.
4,462,513 assigned to the assignee of the present inven-
tion. Further, an improved transmit-receive method and
apparatus has been developed which eliminates the need
or tuning adjustments or discrete compensation circuitry.
See U.S. Patent No. 4,493,411 assigned to the assignee of
the present invention.
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disclosure of Invention
-
According to one aspeet of t'ne invention there
is provided a method of operating a coin testing apparatus
having a eoin sensor eireuit and a processing and control
circuit so that it is self-tuning and automatically adjusts
its coin test limits comprising the steps of: (a) testing
a coin which is inserted into the coin testing apparatus
with the coin sensor circuit and producing an output signal
indicative of a characteristie of the coin; (b) determining
if the output signal is indicative of an acceptable eoin;
(c) storing a value related to the output signal if the
coin was determined to be an aceeptable eoin; (d) comput-
ing a statistical funetion value Erom the stored value;
(e) using the eomputed statistieal function value after
a predetermined n~lmber of eoins have been aceepted for
determining the aeceptability of subsequently inserted
coins; and (f) repeating the steps (a)-(e) as additional
coins are inserted into the eoin testing apparatus during
operation of the eoin testing apparatus for purposes of
diseriminating between aeeeptable and unaeeeptable eoins.
The present invention thus relates to a simple
and eost effective method and apparatus for setting eoin
acceptance limits and eliminating eompensation problems.
The present invention ean be applied to a wide range of
eleetronie eoin tests for measuring a parameter indieative
of the aeeeptability of a eoin. Aeeording to the present
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invention, the coin acceptance limits for a coin test are
set and readjusted by the apparatus itself, based upon a
computed statistical function of the parameter measured
by the coin test for a predetermined number of previously
accepted coins.
The operation of an embodiment of the present
invention may be summarized as follows. A standard set
of initial acceptance limits for any coin which is to
be tested, such as the U.S. 5-cent coin, is initially
stored in all coin testing apparatuses made in accor-
dance with the present invention. These initial limits
are set rather wide so that virtually 100~ acceptance
of all genuine 5-cent coins is assured. During fac-
tory preparation of each individual coin test apparatus,
acceptable coins are inserted into the apparatus and are
tested by one or more sensors. A statistical junction of
the parameter measured by each sensor is computed. For
example, a running average of the parameter can be com-
puted. Once a predetermined number of acceptable coins
have been accepted, a new acceptance limit is auto-
matically established by the electronic coin tes-ting
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apparatus. For example, the new acceptance limits can be set
at the running average plus or minus a stored preestabli6hed
constant or a stored, pree6tablished percentage of the
running average. Alternatively standard initial acceptance
limits are no stored and tuning is begun by transmitting an
instruction signal that the apparatus is to be tuned for a
particular coin such as the 5 cent coin. Then, a
predetermined number of valid 5-cent coins are inserted and
tested A single test coin representative of the average
5-cent coin may be used. A statistical function is computed
and acceptance limits are set based thereon. Similarly, the
process is repeated for additional denominations of coins
which are to be acceptedO In either case, the initial
factory tuning is accomplished by merely inserting a
predetermined number of valid coins. Once the apparatus is
commercially operational, the statistical function is
continuously recomputed by the electronic coin testing
apparatus as additional acceptable coins are inserted. In
order to compensate for environmental changes such as a
change of temperature or humidity after a large number of
coins have been accepted, the coin testing apparatus
reweights the computation so that the computation of the
statistical function is based upon information for only a
predetermined number of the most recently inserted and
accepted coins.
The self-tuning feature of a coin testing apparatus
according to the present invention has the advantage of
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significantly reducing the time and skill required to
originally tune the coin testing apparatus in the factory,
thereby reducing the costs of labor used in the manufac-
turing process. Further, such apparatus continuously
retunes itself during normal operation thereby compen-
sating for parameter drift and environmental changes.
grief D~E~c~C~ Do
Fig. 1 is a schematic block diagram of an
embodiment of electronic coin testing apparatus in
accordance with the invention;
Figs. 2A and 2B are detailed schematic diagrams
of circuitry suitable for the embodiment of Fig. l;
Fig. 3 is a schematic diagram indicating suitable
positions for the sensors of the embodiment of Fig. l; and
Fig. 4 is a flowchart of the operation of the
embodiment of Fig. 1.
Although the coin examining method and apparatus
of this invention may be applied to a wide range of elec-
tronic coin tests for measuring a parameter indicative
of a coin's acceptability and to the identification and
acceptance of any number of coins from the coin sets
of many countries, the invention will be adequately
illustrated by explanation of its application to
identifying the U.S. 5-cent coin. In particular,
the following description concentrates on the details
for setting the acceptance limits for a high fre-
~uency diameter test for U.S. 5-cent coins, but the
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application of the invention to other coin tests for U.S.
5-cent coins, 6uch as a high frequency thickness test, and to
other coins will be clear to those skilled on the art.
The figures are untended to be representational and
are not necessarily drown to scale. Throughout this
specification, the term coin is intended to include genuine
coins, tokens, counterfeit coins, slugs, washers, and any
other item which may be used by person in an attempt to use
coin-operated devices. Furthermore, from time to time in
this specification, for simplicity, coin movement is
described as rotational motion; however, except where
otherwise indicated, translational and other types of motion
also are contemplated Similarly although specific types of
logic circuits are disclosed in connection with the
embodiments described below in detail, other logic circuits
can be employed to obtain equivalent results without
departing from the invention.
Best Mode for CarrYinq Out the Invention
Fig. 1 shows a block schematic diagram of an
electronic coin testing apparatus 10 in accordance with the
present invention. The mechanical portion of the electronic
coin testing apparatus 10 i5 shown in Fig. 3~ The electronic
coin testing apparatus 10 includes two principal sections: a
coin exarnining and sensing circuit 20 includiny individual
sensor circuits 21, 22 and 23, and a processing and control
circuit 30. The processing and control circuit 3Q includes a
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programmed microprocessor 35, an analog to digital (A/D)
converter circult 40, a signal shaping circuit 45, a
comparator circuit 50, a counter 55, and NOR-gates 61, 62,
63, 64 and 65.
Each of the 6ensor circuits 21, 22 includes a
two-sided inductive sensor 24, 25 having its series connected
coils located adjacent opposing sidewalls of a coin
passageway. As shown in Fiy. 3, sensor 24 is preferably of a
large diameter for testing coins of wideranging diameters.
Sensor circuit 23 includes an inductive sensor 26 which is
preferably arranged as shown in Fig. 3.
Sensor circuit 21 is a high frequency low power
oscillator used to test coin parameters, such as diameter and
material, and to "wake up the microprocessor 35. As a coin
passes the sensor 24, the frequency and amplitude of the
output of sensor circuit 21 change as a result of coin
interaction with the sensor 24. This output is shaped by the
shaping circuit 45 and fed to the comparator circuit 50.
When the change in the amplitude of the signal from shaping
circuit 45 exceeds a predetermined amount, the comparator
circuit 50 produces an output on line 36 which is conected to
the interrupt pin of microprocessor 35. A signal on line 36
directs the microprocessor 35 to "wake up or in other words,
to go from a low power idling or rest state to a full power
coin evaluation state. In preferred embodiment, the
electronic coin testing apparatus 10 may be employed in a
coin operated telephone or other environment in which low
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power operation it very important. In such environments, the
above described wake up feature i6 particularly useful. The
above described wake up" is only one possible way for
powering up upon detecting coin arrival. For example, a
6eparate arrival detector could be used to detect coin
arrival and wake up the microprocessor.
The output from shaping circuit 45 is also fed to
an input of the A/D converter circuit 40 which converts the
analog signal at its input to a digital output. This digital
output is serially fed on line 42 to the microprocessor 35.
The digital output is monitored by microprocessor 35 to
detect the effect of a passing coin on the amplitude of the
output of sensor circuit 21~ ~:n conjunction with frequency
shift information, the amplitude information provides the
microprocessor 35 with adequate data for particularly
reliable testing of coins of wideranging diameters using a
single sensor 21.
The output of sensor circuit 21 is also connected
to one input of NOR gate 61 the output of which is in turn
connected to an input of NOR gate 62. NOR gate 62 is
connected as one input of NOR gate 65 which has its output
connected Jo the counter 55. Frequency related information
for the sensor circuit 21 is generated by selectively
connecting the output of sensor circuit 21 through the NOR
gates 61, 62 and 65 to the counter 55. Frequency information
for sensor circuits 22 and 23 is similarly generated by
selectively connecting the output o either sensor circuit 22
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or 23 throuyh its respective NOR gate 63 or 64 and the NOR
gate 65 to the counter 55. Sensor circuit 22 is also a high
frequency low power oscillator and it i5 used to test coin
thickness. Sensor circuit 23 is a strobe sensor commonly
found in vending machines. As shown in Fig. 3, the sensor 26
is located after an accept gate 71. The output of sensor
circuit 23 is used to control such functions as the granting
of credit, to detect coin jams and Jo prevent customer fraud
by methods such as lowering an acceptable coin into the
machine with a string.
The microprocessor 35 controls the selective
connection of the outputs from the sensor circuits 21, 22 and
23 to counter 55 as described below. The frequency of the
oscillation at the output of the sensor circuits 21, 22 and
23 is sampled by counting the threshold level crossings of
the output signal occurring in a predetermined sample time.
The counting is done by the counter circuit 55 and the length
of the predetermined sample time is controlled by the
microprocessor 35. One input ox each of the NOR gates 62, 63
and 64 is connected to the output of its associated sensor
circuit 21~ 22 and 23. The output of sensor 21 is connected
through the NOR gate 61 which i5 connected as an inverter
amplifier. The other input of each of the NOR gates 62, 63
and 64 is connected Jo its respective control line 37, 38 and
39 from the microprocessor 35, The signals 011 the control
lines 37, 38 and 39 control when each of the sensor circuits
21, 22 and 23 is interrogated or sampled, or in other words,
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when the outputs of the sensor circuits 21, 22 and 23 will
be fed to the counter 55. For example, if microprocessor
35 produces a high (logic "1") signal on lines 38 and 39
and a low signal (logic "O") on line 37, sensor circuit 21
is interrogated, and each time the output of the NOR gate
61 goes low, the NOR gate 62 produces a high output which
is fed through NOR gate 65 to the counting input of and
counted by the counter 55. Counter 55 produces an output
count signal and this output of counter 55 is connected by
line 57 to the microprocessor 35. Microprocessor 35 deter-
mines whether the output count signal from the counter 55
and the digital amplitude information from A/D converter
circuit 40 are indicative of a coin of acceptable diameter
or not by determining whether the outputs of counter 55
and A/D converter circuit 40 or a value or values computed
therefrom are within stored acceptance limits. When sensor
circuit 22 is interrogated, microprocessor 35 determines
whether the counter output is indicative of a coin of
acceptable thickness. Finally, when sensor circuit 23
is interrogated, microprocessor 35 determines whether the
counter output is indicative of coin presence or absence.
When both the diameter and thickness tests are satisfied,
a high degree of accuracy in discrimination between genuine
and false coins is achieved.
Figs. 2A and 2B, when combined, form a detailed
schematic diagram of circuitry suitable for the embodiment
of Fig. 1. In the following description of Figs. 2A and
2B are simply referred to as Fig. 2. The illustrated
circuitry includes the following components:
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Resistors
.
Rl 820 k
R2 330 k
~3 43 k
R4,Rg~Rl~ 3.9 k
Rs ,R13 ,R2g ~R36
R6 ~R14 ~R18 ~$~21
R2 7 R2 9 R3 0
R31 ~R34 ,R38 100 k
R7 510 k
Re 680 k
Rlo 470 k
Rll 620 k
R15 ,R2647 k
R16 180 k
R17 10 k
R20 390 k
R22,R23150 k
R24,R376~8 k
25 ~R39 ~R40 1 M
R35 1~5 k
Inductive Sensors
24 3~5 mH
2S 400 uB
26 24 0 u~l
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,~
lZ2892~1
capaci cors
Cl,C2,C3,C4,C15
C16,C17~C22~C23'
c34 . if
c5 250 pf
C6 ~C33 510 pf
C7 ,C8 180 pi
Cg ,C10 100 pi
Cl 1 7 Cl 2 C13 , C18 . 01 uf
C14 ,C21, 10 uf
Clg ~C20 30 pf
Diodes
Dl, D2, D3 ,D4 ~D5
D6 ,D7 ,Dg ,Dg
Dll ,D12 ~D13 ~D14
D17 ,D18 ,D20 ,D21,
D22,D23~ lN4148
D15 ,D16 HSCH 1001
zener Diode
Z 4.7V
Transistors
1 'T2 ~T3 2N5089
T4 2N3392
T5 ,T6 2N4356
39~
Battery
Lo Saft LB2425 3 Y Lithium
Oscillator
O Murata 2MHz Ceramic Resonator
ComParators
comPl, COmP2 ~M2903
NOR Gates
61,62,63,64 National Semiconductor 4001
National Semiconductor 4025
Counter
.
National Semiconductor CD 4520B
on
58 74C244
59 27C16
~0 74C373
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DIoces=o~
Intel 80C39.
Circuit blocks and elements in Fig. 2 corresponding
to blocks and elements in Fig. 1 have been similarly
numbered. In the electronic coin testing apparatus 10 shown
in detail in Fig. 2, the blocks 15 J 16 and 17 provide an
appropriate level of base current to the transistors T1, T2
and T3 of sensor circuits 21, 22 and 23 respectively. Sensor
circuit 21 is a low power oscillator circuit having an
inductive sensor 24 comprising two coils connected in series
and located on the opposing sidewalls 36 and 3~ shown in Fig,
3, The two coils oE sensor 24 have a combined inductance of
approximately 3.5mH and the sensor circuit 21 oscillates at
an idling frequency of approximately 170k~z. An oscillating
output signal from sensor circuit 21 is taken from point A
and connected through shaping circuit 45 to A/D converter 41
and comparator circuit SO. The signal at point B is the
envelope of the oscillation output sisnal of sensor circuit
21. When the sensor circuit 21 is unaffected by coins, the
amplitude of the signal at the point B is ap?roY.imately 3.5
volts. As a coin approaches and then passes sensor 24, the
voltage at point B decreases until the coin is centered
between the coils of sensor 24 and then increases again as
the coin rolls away from the sensor 24. When the voltage
level at point B changes by approximately .2 volts, the
comparator circuit 50 produces an output on line 36 which is
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fed theough a NOR gate and a diode to the interrupt port of
microprocessor 35 and wakes up microprocessor 35. amplitude
and frequency information for diameter testing are then
generated and evaluated as discussed above.
Sensor circuit 22 shown in detail in Fig. 2 is also
an oscillator circuit and it produces frequency test
information relating to the width of a coin passing sensor
25. The oscillator shown in Fig. 2 has an inductive sensor
25 comprising two coils connected in series and located on
the opposing side walls 36 and 38 shown in Fig. 3. The two
coils of sensor 25 have a combined inductance of
approximately 400uH and the oscillator circuit has an idling
frequency of approximately 750kHz.
The sensor circuit 23, the strobe sensor, has its
inductive sensor 26 located after a coin routing gate 71 as
shown in Fig. 3. The single coil of inductive sensor 26 has
an inductance of approximately 240uH and sensor circuit 23
has an idling frequency of approximately 850Hz. The strobe
sensor is used to detect coin passage, to prevent coin
jamming and customer fraud.
The microprocessor 35 is a CMOS device with its RAM
power supply 80 backed up by a 3 volt lithium battery LB.
This power arrangement provides for nonvolatile memory,
Other devices including EEPROM and NOVRAM devices can be used
to achieve the same result. As shown in Fig. 2, the three
chips labeled 58, 59 and 60 constitute the external program
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memory. Where a microprocessor 35 is used ~7hich has
sufficient internal memory, such as an Intel* 80C49,
the chips 5~, 59 and 60 may be eliminated.
In a preferred embodiment, the electronic coin
testing apparatus 10 is incorporated into a coin operated
telephone. In this embodiment, the apparatus 10 is only
powered up when the phone is off-the-hook. when the phone
is lifted off the hook, each of the sensor circuits begins
to oscillate. The microprocessor 35 samples and stores id-
ling or no coin amplitude (Ao) and frequency (fO) values
for sensor circuit 21 and frequency values for sensor cir-
cuits 22 and 23. Then, the microprocessor "goes to sleep"
or enters a rest or standby mode. In this mode, it consumes
very little power until an interrupt signal is produced on
line 36 thereby indicating that a coin has been inserted and
waking up microprocessor 35. Microprocessor 35 upon being
awakened is fully powered and it evaluates the information
from the sensor circuits 21 and 22 and determines whether
or not the detected coin is an acceptable coin.
The method of the present invention will now be
described in the context of setting coin acceptance limits
based upon the frequency information from sensor circuit 21.
As a coin approaches and passes inductive sensor 24, the fre-
quency of its associated oscillator varies from the no coin
idling frequency, fO, and the output of sensor circuit 21
varies accordingly. Also, the amplitude of the envelope
of this output signal varies When this latter variation
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exceeds a predetermined limit, the microprocessor 3S
recognizes that a coin has been inserted and wakes up.
Microprocessor 35 then computes a maximum change in frequency
, where ~bf equals the maximum absolute difference between
the frequency measured during coin passage and the idling
freque"cy Af= max (fmeasured -fO) A dimensionless
quantity F= ~f/fO is then computed and compared with stored
acceptance limits Jo see if this value of F for the coin
being tested lies within the acceptability range for a valid
coin. As background to such measurements and computations,
Lee U.S. Patent No. 3,918,564 assigned to the assignee of the
present application. As discussed in that patent, this type
of measurement technique also applies to parameters of a
sensor output signal other than frequency, for example,
amplitude. Similarly, while the present invention is
specifically applied to the setting of coin acceptance limits
for particular sensors providing amplitude and frequency
outputs, it applies in general to the setting of coin
acceptance limits derived from a statistical function for a
number of previously accepted coins of the parameter or
parameters measured by any sensor.
If the coin is determined to be acceptable, the F
value is stored and added to the store of information used by
microprocessor 35 for computing new acceptance limits. For
example, a running average of stored F values is computed for
a predetermined number of previously accepted coins and the
acceptance limits are established as the running average plus
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or minus stored constant or a stored percentage of the
running average. Preferably, both wide and narrow acceptance
limits ore stored in the microprocessor 35. Alternatively
these limits might be stored in RAM or ROM. In the
embodiment shown, whether the new acceptance limits are set
to wide or narrow values is controlled by external
information supplied to the microprocessor through its data
communication bus. Alternatively, a selection switch
connected to one input of the microprocessor 35 might be
used. In the latter arrangement, microprocessor 35 tests for
the state of the switch, that is, whether it is open or
closed and adjusts the limits depending on the state of the
switch. The narrow range achieves very good protection
against the acceptance of slugs; however, the tradeoff is
that acceptable coins which are worn or damaged may be
rejected The ability to select between wide and narrow
acceptance limits allows the owner of the apparatus to adjust
the acceptance limits in accordance with his operational
experience.
Other ports of the microprocessor 35 are connected
to a relay control circuit 70 for controlling the gate 71
shown in Fig. 3, a clock 75, a power supply circuit B0~
interface lines 81, 82, 83 and a4, and debug line 85. The
microprocessor 35 can be readily programmed to control relay
circuit 70 which operates a gate to separate acceptable from
unacceptable coins or perform other coin routing tasks. The
particular details of controlling such a gate do not form a
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part of the present invention. For further details of
typical gate operation, see for example, U.S. Patent
No. 4,106,610 assigned to the assignee of the present
invention. See also, Plesko, "Low Power Coin Routiny
Gate", US Patent No. 4,534,459 assigned to the assignee
of the presnt invention for details of a preferred gate
suitable for use in conjunction with this invention.
The clock 75 and power supply 80 supply clock and
power inputs required by the microprocessor 35. The inter-
face lines 81, 82, 83 and 84 provide a means for connecting
the electronic coin testing apparatus 10 to other apparatus
or circuitry which may be included in a coin operated vend-
ing mechanism which includes the electronic coin testing
apparatus 10. The details of such further apparatus and
the connection thereto do not form part of the present
invention. Debug line 85 provides a test connection for
monitoring operation and debugging purposes.
Fig. 3 illustrates the mechanical portion of the
coin testing apparatus 10 and one way in which sensors
24, 25 and 26 may be suitably positioned adjacent a coin
passageway defined by two spaced side walls 36, 38 and
a coin track 33, 33a. The coin handling apparatus 11
includes a conventional coin receiving cup 31, two
spaced sidewalls 36 and 38, connected by a conventional
hinge and spring assembly 34, and coin track 33, 33a.
The coin track 33, 33a and sidewalls 36, 38 form a
coin passageway from the coin entry cup 31 past the
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coin sensors 24, 25. Fig. 3 also shows the sensor 26
located after the gate 71, which in Fig. 3 is shown for
separating acceptable from unacceptable coins.
It should be understood that other positionings
of sensors may be advantageous, that other coin passageway
arrangements are contemplated and that additional sensors
for other coin tests may be used.
Fig. 4 is a flowchart of the operation of the
embodiment of Figs. 1-3. According to one embodiment of
the method of the present invention, for each denomination
of coin to be accepted, initial acceptance limits for each
test are stored in the microprocessor 35 of the electronic
coin testing apparatus lO. These initial limits are set
quite wide guaranteeing almost 100% acceptance of accept-
able coins. These acceptance limits are used only in
the original tuning. To tune the electronic coin testing
apparatus lO, a predetermined number of known acceptable
coins of each denomination are insertedO For example,
eight acceptable S-cent coins are inserted. The inserted
coins are detected by the sensor circuit 21, micropro-
cessor 35 is awakened, amplitude and frequency tests
are conducted for each coin using sensor circuit 21,
and a second frequency test is conducted using sensor
circuit 22. Then, new acceptance limits are computed
based on the test information for the eight acceptable
coins. These new limits are used for testing addi
tional coins which are inserted. By way of example,
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the frequency test using sensor circuit 21 will be further
discussed, but it should be understood that similar pro-
cessing is performed for each test undertaken in the coin
validation process.
The flowchart of Fig. 4 illustrates the process
involved in the coin telephone context. It will be
understood that the method and apparatus of the present
invention can be used in other contexts. The general
method of Fig. 4 may be understood by taking all f vari-
ables as representing any function which might be tested,
such as frequency, amplitude and the like, for any coin
test. The specific discussion which follows will be in
terms of frequency testing for United States S-cent coins.
After a phone off-the-hook condition is detected,
the microprocessor 35 is powered up, an idling frequency,
fO, is measured and stored and the microprocessor 35
enters its low power rest stateO For initial calibration
and tuning, a phone off-the-hook signal may be artific-
ially simulated. Then, in one embodiment, a series of
eight acceptable 5-cent coins are inserted to tune the
apparatus for 5 cent-coins. Microprocessor 35 stays in
its rest state until the first 5-cent coin is detected.
The frequency of the output of sensor circuit 21 is
repetitively sampled and the frequency values fmeasured
are obtainedO A maximum difference value, Qf, is com-
puted from the maximum difference between fmeasured
and fO during passage of the first 5-cent coin.
Q~ = ma~(fmeasured
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Next, a dimensionless quantity, F, is calculated by
dividing of by fO. F-~/fo- The computed F for the ir~t
5-cent coin is compared with the stored acceptance limits to
see if it lie within those limits. Since the first S-cent
coin is an acceptable 5-cent coin, its F value is within the
limits. The first 5-cent coin is accepted and microprocessor
35 obtains a coin count C for that coin.
For the first coin the coin count C equals zero.
C-0. This coin count is then incremented by one. C=C~l.
The coin count C=1 is now compared with the number 32. C-32?
Since C is not equal 32, the next step is to compare C with 8
to see if C is greater than or equal to 8. C 8? Since C
is not greater than or equal to 8, the next step is to
compute a new average F, FAvE JEW' for 5-cent coins.
FAVE NEW = (((C-l) x F~JE OLD) F) /C- FAVE OLD for the
first coin equals 0. Consequently, FAVE NEW ' F/C - F.
FAVE NEW is now stowed as FAVE OLD FAVE OLD FAVE NEW
This step completes the processing of the first 5-cent coin.
As additional 5-cent coins are inserted to tune the
apparatus the process repeats until the eighth 5-cent coin is
inserted. For the eighth 5-cent coin the coin count C=7,
when it is inceemented by 1 it becomes equal to 8~ When C is
now compared with 8 it is found to equal 8. As a result, a
flag is set to use the computed FAVE NEW
acceptance limits. FAVE NEW is computed as before, but now
it is used in determining the acceptance limits for
subsequently inserted 5-cent coins. The orîginally stored
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limits are no longer used. The new limits may be FAVE NEW
plu6 or minus a constant, that is, upper limit FAvE NEW
X, lower limit DAVE NEW - X; or FAVE NEW plus or minus a
fixed percentage of FAVE NEW upper limit (FAVE NEW~(l K
it (FAvE NEW)(l-X); or computed from FAVE NEW in
any logical manner. Once the apparatus is tuned as discussed
above, it may be used on an actual operating environment.
As additional 5-cent coins are inserted, FAVE NEW
and new acceptance limits are continually recomputed. If a
coin other than an acceptable 5-cent coin is inserted, its F
value will not be within the acceptance limits and that coin
will be rejected. After that occurs, a new idling frequency,
fox is measured and then microprocessor 35 returns to a rest
state to await coin arrival.
The recomputation of FAVE NEW end the aCceptan
limits with each acceptable 5-cent coin after the eighth
allows the system of the present invention to self-tune and
recalibrate itself and thus to compensate for parameter
drift, temperature and environmental shifts and the like. In
order for this beneficial compensation to be achieved, it is
P at FAVE NEW not become overly weighted by the
previously accepted coins Consequently, when the
thirty-second S-cent coin is inserted, the 1ncremented count
C=32 and the process branches differently. When C=32, the
coin count C is reset to 16. C=16r The coin count value C=16
is then used for computing FAVE NEW When the thirty third
coin is received, the coin count C=16 is incremented for use
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1~2~39~
in the later process steps. The above process continues
indefinitely as Dddi~ional 5-cent coins are lnserted
As discussed above, the method of the pre6ent
invention is not limited to frequency based testing. Neither
is the fitatistical function limited solely Jo a running
average Further, while the specific example of the
flowchart discussed above uses the numbers 8, 16 and 32 in
the computation process, other predetermined numbers may be
used without departing from the present invention The
values B, 16 and 32 were selected because: a) FAVE NEW is
fairly well determined after eight coins have been accepted;
b) FAVE NEW becomes heavily weighted after 32 coins have been
inserted 80 that the insertion of additional acceptable coins
has little effect; and c) the number 16 is between 8 and 32.
In the preferred embodiment, the microprocessor 35
is programmed according to the attached printout; however,
the operation of the electronic coin testing apparatus 10
will be clear to one skilled in the art from the above
discussion.
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