Note: Descriptions are shown in the official language in which they were submitted.
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This application is a division of Canadian
Patent Application, Serial No. 462,783, filed
September 10, 19~4
This invention relates to imaging systems,
and in particular to the control of light sources
in synchronization with scanning fiber optics in
phototypesetters.
During the last 30 years, numerous so-called
second generation phototypesetters have been
marketed. These machines flash-illuminate charac-
ters posi~ioned upon a whirling character disk or
drum, and the resulting optical image is projected
by a lens system upon a photosensitive film. The
size of the characters are changed by means of
moving zoom lenses or the like or by rotating a
lens turret to position various lenses at the
optical projection axis. The characters are
sequentially recorded upon the photosensitive film
by mechanically scanning such film. The film
carriage may be moved relative to the optical
axis, the projection lenses may be moved relative
to the film platen, the whirling character disk
may be moved relative to the film platen, or
various combinations of the foregoing may be
employed to sequentially project the characters
upon the film to form a line of characters.
Generally, the projection lens carriage assemblies
are relatively heavy and bulky, as is the drum or
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l disk bearing the images of the characters to be
projected. Also, changes in the fonts involve
manual replacement of the character disks, or film
strips mounted upon a drum. Additionally, the
electro-mechanical stepping devices for producing
the above mentioned scanning motions are also
relatively bulky and cumbersome. The speed of
second genera~ion machines is limited by the
output carriage escapement speed and by character
access time determined by the rotational speed of
the font disk.
So-called third generation phototypesetters
were introduced in the 1960s, most of which
utilize cathode ray tubes for generating the
characters upon the faces of the tubes. These
character images are thereafter optically pro-
jected upon the film. In contrast with the
components of the second generation machines, the
electron beam is essentially unhindered by inertia
and the computer codes thus may actuate the beam
at much higher speeds than those obtainable by the
second generation machines. Laser generated light
beams have also been employed rather than cathode
ray tubes. Many font farnilies may be generate~ by
these machines since the character generating
codes may be densely packed during recording upon
magnetic storage media, such as floppy disks.
~lso, the character size may be electronically
changed by changing the length of the beam traces
making up the character compo~ents (See Figure 1 of "
VS Paterlt l~o. 3,952,311).
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l The result of the foregoing is that these
machines have higher speeds, and greater flexibil-
ity in the character shapes and sizes produced.
However, the third generation machines are usually
considerably more expensive than the second
generation machines; in 1979, they typically sold
for $40,000 and more. In contrast, second genera-
tion machines in 1979 were marketed for around
$10,000.
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A fourth generation typesetter is disclosed
in U. S. Patent 4,392,504 to`Peter Ebner, for an
LED-fiber-optic character printer The fourth
generation typesetter can be marketed for about
$1Q,000, and yet it has the speed and flexibility
of the third generation machines. These results
have been accomplished by providing a flexible
ribbon of a small number of fiber optic filaments.
Each filament is illuminated by one of a matrix of
light emitting diodes (LEDs) and has its output
end positioned within a printing head. The
printing head has at least one relatively short
linear array of fiber optic filaments embedded
therein. Means are provided;for causing the head'
to scan,across,the photosensitive material and to
record a,line of,type there,o,n,,,,wi,th light provided
by selective energizati,on,of,tlle LEDs., The in,ven-
tion claimed in the above application utilizes a
.loop of,fiber optic cable ~ompr!ising!fiber optic
filalnents mounted upon a belt-like substrate.
This f,lexible fiber optic loop enables rapid
scanning,by the printing hqad.with a fiber optic ,"
cable containing a drastic~lly reduced number of
1.
l fiber optic filaments, for example, 128, in
contrast with the thousands of filaments called
for by prior cables in general usage.
The present invention provides an electronic
control system for fourth generation typesetters.
In accordance with one aspect of this inven-
tion, the sequence of control of an array of
imaging elements is established electronically to
account for the dependence of-the sequencing on
the relative displacement of imaging elements in a
staggered array of elements and on the direction
f ~scan of a tilted array. Image element control
data is supplied in a sequence which is indepen-
dent of the staggered relationship of the imaging
elements and the direction of scan. A random
access memory is sequentially addressed and the
control data is written into the memory in a first
sequential order. The control data is subse-
quently read from the memory in an order other
than that first sequential order to delay certain
f the element control data in the random access
memory. This new sequence of control data is then
applied to an imaging elernent driver.
Preferably, the sequential addressing of the
random access memory is obtained from a read only
~0 memory which stores a first address sequence for
forward scan and a second a~dress sequence for "
reverse scan. Further, at each memory location of"
the random access memory, dlata is first read from
1 that location and new data is then immediately
written into that location. The element control
data is delayed by addressing groups of memory
locations and the groups are greater in number for
the data which is to be delayed than~for the data
which is not to be delayed. Thus, once a byte of
data is written lnto memory at a particular
address, subsequent data bytes are written into
groups of memory locations before the first data
,byte is read from the memory, and the number of
groups determines the time d~elay between write in
and read out. In reverse scan, ~he sequential
order of addressing within each group of memory
locations is alternated such that data written
lnto the random access memory in one order within
the group is subsequently read from the memory in
reverse order during a subsequent address se-
quence.
In the preferred control of the imaging
elements, data bytes are segregated according to
~he staggered leading and lagging rows of pels to
which they correspond. In forward scan, the bytes
are written into and read from!the random access
memory in the same sequential order; however, the
bytes corresponding to the lagging row of pels are
stored in the memory for an additional odd/even
tlme whicll corresponcl5 to the difference in times
at which the staggered rows,p,ass e,ach slice. In
reverse scan the bytes of successive slices are
~ead out of storage in a reverse order. Each byte
of the lagging rows is held in storage for a slice,
time which corresponds to t~le difference in times
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1 at which each row passes adjacent slices plus an
odd/even time which corresponds to the diEferenee
in times at which the staggered leading and
lagging rows pass each slice. The leading rows
are only stored for a sliee time.
In accordance with other aspects of the
invention, memory control bits sueh as row address
strobe and column address strobe signals for a
dynamic memory are part of an instruction word
from a program memory. Thus, the instruction word
from the program memory ineludes instruction bits
and address bits reauired by the'eentral proeessor
and additional data memory eontrol bits. The need
for extensive memory control eireuitry is thereby
avo~ded.
In aceordance with further aspect of the
invention a character contour is written into an
electronic memory in which the memory addresses
correspond to specific pel locations in a charae-
ter image. Image data eorresponding to sliees of
pels in the charaeter image is read from the
memory for suceessive sliees through the eharae-
ter. Color data for eaeh pel in eaeh sliee is
provided by ehanging the pel eolor as a eharaeter
contour is intersected. By writin~ the eharaeter
eontours of sueeessive~image characters into
alternate memory seglllellts and subsequently eon~in-
ing the color data in logic circuitry, problems
due to overlap of charaeters are avoided.
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1 The foregoing and other objects, features and
advantage5 of the invention will be apparent from
the following more particular description of a
preferred embodiment of the invention, as illus-
trated in the accompanying drawings in which like
reference characters refer to the same parts
throughout the different views. The drawings are
not necessarily to scale, emphasis instead being
placed upon illustrating the principles of the
invention.~
Fig. 1 is a perspective~illustration of a
phototypesetter having a scanning head associated
with a light source array which may be controlled
by the system of this invention;
Fig. 2 illustrates the arrangement of fiber
optic elements in the scanning head of the system
of Fig. 1;
Fig. 3 is an enlarged view of a two-byte
group of fiber optic elements from Fig. 2;
Fig. 4 is an illustration of a character
positioned within a character field segment;
Fig. 5 illustrates the,drawing of contour
lines within a character field by means of com-
pressed data codes;
Fig. 6 i5 an electrical block diagram of an
electronic control system for illumination of the
fiber optiG filaments in synchronization with
scanning of the print head of Fig. l;
Fig. 7 is an illustration of contour lines of
successive characters written into alternating RAM
groups;
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Fig. 8A illustrates a shift register analogy of the
control of odd and even bytes in the system of Fig. 6
wlth forward scanning of the print head;
Fig. 8B illustrates a shift register analogy of the
handling of odd and even bytes by the circuit of Fig. 6
in reverse scan;
Fig. 9 is a more detailed electrical schematic of
the P~OM with sequencer of Fig. 6.
The control system of this invention has been
designed for use in a phototypesetting system such as
described in U.S. Patent 4,342,504 in the name of Peter
Ebner.
As shown in Fig. 1, the phototypesetting system
comprises a scanning head 22 which houses the ends of
fiber optic filaments such that the end faces 23 are
pressed against a photosensitive film 24. As the
scanning head is moved across the film 24 in the
directions indicated by arrow 26, the fiber optic
elements are selectively energized to collectively
provide a line of print 28 on the film 24. Once the
head 22 is scanned across the film 24 in one direction
to provide one line of print 28, the film is stepped in
the direction 30. The scanning head 22 then scans the
film in a reverse directlon to provide a subsequent line
of print.
The fiber optic f:i:lamerlts leading to -the scanning
head 22 are carried by a Elexible, elas-tomeric belt 32
which leads from a stationary light source 34. As will
be described below, the stationary light source includes
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stationary light source includes an array of light
emitting diodes (LEDs). The end face of each fiber
optic filament is fixed to one LED of the array. Thus,
by selectively energizing the LEDs as the scanning head
22 scans across the film 24, a high resolution
phototypesetting operation can be obtained.
The particular scanning head used in the system has
the fiber optic filaments 23 arranged in a 64x2 array as
shown in Fig. 2. The filaments in the two columns of
filaments are staggered as best shown in the exploded
view of Fig. 3. In typesetting, the array of Fig. 2 is
moved across the film in the directions indicated by
arrow 26. As the array is moved from left to right as
viewed in Figs. 2 and 3, the leading group of filaments
is referred to as the even filaments and the lagging set
of filaments is referred to as the odd filaments.
The 128 filaments in the 64x2 array are
conveniently considered as eight two-byte groups, a byte
being eight bits of binary information. In this case,
the binary information is the on/off state of an LED
associated with each filament.
A single two-byte group of 'ilaments in the
scanning head is shown in exploded form in Fig. 3. As
shown, each filament has a diameter of about 2 mils
(.002 inch). The filaments are arranged to overlap with
a center-to-center, vertical or horizontal, distance
between ad~acent filaments of 1.5 mils. The LEDs are
energized in synchronization with the scanning head
movement such that odd
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1 bytes in one cycle of illumination are energized
at tlle same location along the film 24 as the even
bytes had been energized in the previous cycle.
Thus, when the LEDs are first energized they are
in the positions indicated by bold lines in Fig.
3, and in the next cycle they are energized at the
locations indicated by the broken li~es of Fig. 3.
It can be seen then that when properly
energized in synchronization with the scanning
movement, the odd and even bytes energized in
successive cycles form a sli~e of overlapping
e~posure regions; a two-byte portion of a 16-byte
slice is shown as solid and broken circles over
the even byte designation in Fig. 3. Also,
1~ because the LEDs are energized with each 1.5 mil
of movernent, the successively illuminated LEDs
form overlapping exposure regions along lines
parallel to the direction of scanning movement.
By an extension of the overlapping exposure
regions as shown in Fig. 3, it can be recognized
that, with scanning of the scanning head across
the film 24, an array of overlapping circular
e~posure regions of a height of 128 elements high
and of a width determined by the length ~f scan is
provided. It will be recognized, however, that to
set a vertical ]ine of a widkh of ollly one ex-
posure region, or example, it is necessary to
energize the even bytes at one instant and the odd
bytes at the next instant. One of the features of
the present system is that it provides for that
displacement in time between the two sets of
filaments positioned over aysingle slice of type.
.
l As noted above, the exposure regions can be
considered a large array of overlapping regions~
~ith the present scanning head, those exposure
regions, or pels, expose a segment 128 pels high,
or .192 inch. The width of the scan~determines
the total width of a pel array, but a scan segment
168 pels wide, or .252 inch, is conveniently set
electronically. Within that 128x168 segment, or
character segment field, most characters can be
,defined in~a single scan.
The term character is us~ed here to refer to a
graphic character to be printed and is not to be
confused with a digital code. To designate an 8
bit digital code, the term "b~rte" is used exclu-
sivel~
To set a character within a 128x168 segment
field, the on/off state of each LED as its associ-
ated fiber filament passes through each of the 168
slices of the segment must be defined. Thus, for
each character segment field 128x168, or over
20,000, pels must be defined by over 20,000 bits
of information stored in memory. Because just a
single line of type may include as many as 55 such
2~ segments, the electronic storage space to define
each character of a line and to properly energize
the I.EDs is very significant. A further feature
of the present systelll is that it allows for
storage of the character informatiQn in a con-
densed form. The character information is con- ;
verted on a real time basis to an expanded, pel
and slice oriented format prior to printing.
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1 Fig. 4 shows a 128x168 pel character segment
field with a character to be printed positioned
therein. Because the scanning head prints a
ver~ical slice at a time, or more properly even
and odd portions of two adjacent slices, the
signals driving the LEDs must be slice oriented.
~ithin each slice, 128 signals must be applied to
the 128 LEDs to control whether the LED is "on" to
pxovide a dark pel or "off" to provide a light
pel. ~s notëd, the 128 bits of data necessary for
each slice along an entire character segment, and
then along an entire line of print, would be
voluminous.
The amount of data which must be stored prior
to ~rinting can, however, be greatly reduced by
recognizing that the information of a slice, such
as slice 42, can be defined by the black or white
color at any one point of the slice along with the
pel locations at which the slice intersects the
character. In moving up or down along the slice
42, a transition from light to dark or dark to
light occurs at each intersection of the slice
with the~character image. Specifically, a slice
42 drawn through the character field from the
bottom of the field to the top is initially light.
The color of successive pels in the slice remains
light until a contour of the character is inter-
sected at 44. At that contour, there is a transi-
tion from light to dark. From there the pels of
the slice are dark until the second contour is
intersected at 4G. There i~ then a transition ,
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1 from dark to light, and the pels remain light
throughout the remainder of the slice.
From the above, it can be seen that the color
of eaçh pel within the slice is accurately defined
by the initial light color and by the locations of
intersections with the character contours. Ex-
tending that concept through the entire character
field, every pel within the field can be defined
by defining the contour lines where transltions
are made. The data required to draw those contour
lines can be stored in a subs~antially reduced
memory space.
A compressed character defined by contours is
conveniently thought of as a stream of commands to
an x-y plotter. The commands dictate a sequence
of pen rnotions which the plotter executes on an
x-y grid. The pen has two states: "on" and "off".
If, while in motion, the pen is "on", the pen's
trajectory is recorded on the grid. If the pen is
off, the pen's trajectory is not recorded.
Any contour can be defined by a combination
of three types of commands: the point command,
the line command and the curve command. Execution
f the point command moves the pen to a point in
the segment field whose coordinates are part of
the command. As an example, a pOillt co~nAtld might
move the imagined pen to point ~8 of the grid of
Fig, 5. Execution of the~ line command moves the
pen in one of the four coordinate directions. As
an example, a line command would provide the line
50 from point 48, and anothçr line command would "
provide the vertical line 5~ from point 54. When
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1 e~ecuted, the curve command moves the pen along a
curve whose length, general direction, and de-
tailed shape are encoded as part of the cornmand.
As an example, a curve command would provide the
curve from point 56 to point 58 in Fig~ 5.
Any characters larger than about 12 pt cannot
be printed in a single segment field'and are
subdivided into character segments which are
treated substantially independently. Such large
characters a~e-printed in adjacent character
segment fields. If two or mor~e vertical segment
fields are required for a character, those fields
are printed in successive scans of the fiber optic
scanning~head.
- The electronic system for controlling the
scannin~ of the fiber optic scanning head and the
selective illumination of the fiber optic fila-
ments by the LED array is shown in Fig. 6. The
system includes a microprocessor based subsystem
100 which utilizes a Z80A type microprocessor 101
operating at 4 megahertz. This microprocessor
based subsystem 100 also includes a random access
memory 102.
At start-up, the Z8,0,prograt,n,is~loaded fro,m a
main computer 104 in,to,the RAM 102. The subsystem
100 then receives font information from the main
computer 104. That font information defines the
contours of each permissible character of a font
in compressed form as discussed above. The fonts,
each of which may include up to 128 characters, ',
are stored in the R~M 102 alotig with the Z80
program. ~ l~
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1 ~ith the font information on store, the Z80
s~lbsystem 100 is ready to convert any characters
to be printed into the desired print type, such as
ten point gothic or the like. The main computer
104 then reads into the Z80 subsystem~100 the
specific characters to be printed on a line. ~his
information is also stored in the RA~I 102.
I~hen the characters provided by the main
computer 104 are to be printed, the subsystem 100
transmits s~ccessive characters to be printed, in
compressed form determined by~the font selected,
along a data bus 104 through a set of first-in '
first-out registers 105 and 106 to a high speed
microprocessor subsystem 108. The registers 105
and 106 serve as an asynchronous buffer between
the two microprocessor subsystems.
In order to deliver the compressed character
data to the high speed microprocessor subsystem
108 at a high rate, an 8257. type direct memory
access (Dl~lA) chip 90, operating at 3 megahertz,
controls the transfer of the compressed data from
the RAM 102 to the buffers 105 and 106. After a
line' of type has been received by the Z80 sub-
system 100 and stored in the RAM, the memory
access information required by the DM~ to access
the first two characters of the line and associ-
ated control information from memory is provided
in`~the four chatinels'avail'able in the''DMA. Just
before the fiber optic scanning head begins to
scan, the first character, defined by a long
series of data bytes, is accessed from the RA~I 102
and transferred through the~first in, first out
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1 registers 105 and 106. As the registers are
emptied of each byte by the high speed subsystem
108, a request is made by the register control
circuit 92 to the D~ to access the next byte of
compressed character data and strobe it into the
first register 105.
Once all of the bytes for the first printed
character are accessed from memory, the D~A 90
steps to its third and fourth channels which
include thë memory access information for the
second character of the line ,of print. It then
responds to requests from the register status
circuit 92 to transfer the series of bytes for
that character from RAM 102 to the first in, first
ou,~ registers 105 and 106. Also, the DMA requests
further memory access information from the micro-
processor 101 for the third character in the line
of print to replace the first character informa-
tion in the first channel. The DMA continues to
step from channel to channel and to request memory
access information from the microprocessor for
successive characters of print until the data
.. . . , .. .. .. _ . .. . ... . ~ . .. .. . .
required for an entire line of print has been
transferred to the high speed subsystem 10a.
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The high speed subsystem 108 is based on a
2901 type microprocessor under control of micro-
instructions stored irl a progra~able read only
memory.(PRO~I) 112, Using a 6 megahertz clock, the
2901 is able to expand the compressed character l;
~ont data in real time using a small buffer area.
Only an amount of expanded data which is small
relative to the expanded djta required for an
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entire line of print need be stored. The 2901 receives
compressed character data and expands that data as
rapidly as the fiber optic scanning head scans the film
on which the line of print is to be set. In the presen-t
case the expanded data Eor only two character segment
fields need be stored at any time so that one can be
expanded while another is being read to control the LED
array.
Following the contours presented by the compressed
data, the 2901 microprocessor stores those contours in a
character buffer RAM 114. Referring back to the x-y
plotter analogy, as character eode information is pro-
cessed by the 2901 proeessor system, a "1" is written
into memory eaeh time the pen steps in a horizontal
direction as the pen traces the eharacter segment out-
lines under control 29 oE the 2901. In the dynamic RAMs
114, each pel of a character image field has a corres-
ponding one bit location in memory. The memory 114 can
be thought of as a pel map with transitions, or con-
tours, written into it; and one can determine whether a
contour line is at a specifie pel on the image field by
looking to the memory 114 and determining whether the
corresponding bit in memory is high or low.
The buffer RAM 114 is actually two 16K x 4 groups
of RAMs 114a and 114b. Successive charaeters are writ-
ten into alternating groups in order to account for
overlapping characters. For example, the characters
shown in Fig, 7 would be written into the two groups oE
RAMs 114a and 114b
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1 as sho~n in Fig. 7. The contour lines for the
letter a would be written into the first group
114a and the contour lines of the letter "e" would
be written into the second group 114b. The con-
tour lines for the third and fourth lètters "b"
and c would then be written into the respective
groups 114a and 114b. - !
Once the contour lines have been drawn into
the character buffer RA~5s 114 by the processor
110, the pel data is read out, eight bits (or
pels~ at a time, into respective registers 107 and
109. The data is read from memory 114 to form
successive slices, starting from the bottom of
each slice. The data in the registers 107 and 109
is shifted serially to respective color flip
flops 111 and 113. Each "one" bit received by
either flip flop indicates intersection of the
slice with a contour line and causes a transition
in the output of the flip flop. The high or low
flip flop outputs control the color of correspond
ing pels in the slice. By cornbining the two bit `
streams in an OR gate 117, the dark pels of
characters from both RAM groups 114a and 114b are
provided as "ones" on line 115.
Because the color of characters is determined
solely by contour lines and the color is inverted
Wit}l the intersection of each contour line, over-
lap of separate contours prior to generation of
the color data would result in irnproper coloring
of the overlapping characters. For example, the
contour line of the letter ~'a" might be inter-
sected in a slice such that~the color would switch
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1 to dark, and a contour line from the letter "e",
intended to switch the color to dark, might then
be intersected; the color would be inverted to
light at the second contour -- an improper output.
In the present case, the colors from successive
characters are derived independently from the
alternating RAM groups 114a and 114b!and the color
is then combined in the OR gate 117. Thus a dark
data signal is provided on line 115 wherever there '
was a dark''signal in either of the overlapping
characters.
The data on line 115 is shifted serially, in
groups of 16 bits from single slices, into an
even/odd logic circuit 116. Each set of 16 bits
fed into the logic circuit 116 corresponds to two
bytes of pels as shown in Figs. 2 and 3. That is,
it includes eight bits of information to control
the odd byte LEDs and eight bits of information to
control the even byte LEDs of a two-byte section.
For each 1~ mil displacement of the scanning head,
eight two-byte segments are defined by similar 16
bit streams of data from the high speed micropro-
cessor subsystem 108-. The two bytes are for a
single slice, however, and not'for the adjacent
slices illuminated by the scanning head as shown
in Fig. 3.
As just note(l, the 16 bits provided at any
one time on-line 115 correspond to a single slice
in the character field. For e~xample, as shown in
Fig. 3, the 16 bits might be for the even byte
shown in solid lines and for~'the odd byte shown in "
broken lines in line with th~t even byte; that is,
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l it includes even byte information for immediate
control of LEDs and odd byte information to be
delayed for control of the LEDs after the scanning
head has moved l~ mils. To properly control the
LEDs which correspond to the even and odd fiber
optic filaments, the 16 bits are divided into even
and odd groups in a set of registers 118 and 1200
It should further be noted that the eight
sections of two bytes in the scanning head, shown
in Fig. 2, are energized sequentially and not
simultaneously. The scanning movement is contin-
uous, so each set of two bytes is enèrgized a
small incrernent of time after the previous set.
~ith such a system, if all eight sets of two bytes
were aligned perpendicular to the direction of
movement of the scanning head, there would be a
near 1~ mil displacement in type in the direction
of scan between the uppermost and lowermost two
byte set of pels. That displacement would be
viewed as a tilt in the characters.
To minimize aberrations due to sequential
firing of the sets of two byte LEDs with continu-
ous scanning movement of the sca~ning head, the
entire array is aligned at an angle relative to
the direction of scan 36. Thus, with the lower-
most two byte set of filaments leading the others,
the LEDs of that set can be energized as the set
passes one pair of~slices in the character field.
By synchronizing the scan speed with the elec-
tronic timing, the second set of two-byte LEDs, is
energized a short time afte~ the first set, but "
the associated fibers are, ~t that later time, in
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1 line with the same pair of slices in the character
f ield.
The phototypesetter prints in both the
f orward and reverse directions of movement of the
scanning head. Thus, the two-byte set of fibers
which leads in the forward direction lags in the
reverse direction.
To account for the delay between even and odd
fibers and to provide for both forward and reverse
printing, the even and odd portions of each
two-byte input for a single slice on line 115 is
stored in a static video RA~I 122 under the control
of a programmable read only memory (PROM) 124.
Also under the control of the PROM 124, the video
RAM 122 outputs even and odd portions of different
16 bit inputs from line 115 into respective output
registers 126 and 128. Because the even byte is
read into the xegister 128 before the odd byte is
read into register 126, the former-is delayed in
another register 129. Then the signals in regis-
ters 126 and 129 are applied simultaneously to a
driver circuit 130 to drive 16 rows of LEDs in a
LED array 13Z. Simultaneously, a column of LEDs '
corresponding to a particular two-byte set of
fibers is enabled through a decoder 134.
A 93.75 kilohertz two-byte clock is available
to the system, and a stepper motor which drives
the scanning head-is synchronized to that-clock
under control of the Z80 microprocessor 110. ~ith
each cycle of the t~o-byte clock, another column
of the LED array is enabledlthrough the decoder ~l !
drivers 134, and another t~o- byte group of LEDsl,
1 ,,
' I
.
,
- 22 -
1 is energized according to the input from the row
drivers 130. To designate which column is driven
by the drivers 134, the two byte clock is divided
in an up/down counter 150 to form four byte, eight
byte and slice clock signals. As noted~above, the
two-byte groups must be energized in reverse
direction when the scanning head scans in the
reverse direction; thus, the up/down cour.ter 150
counts down when a reverse direction signal is
received. ~his causes the byte groups of fibers
on the scanning head to be illuminated from top to
bottom relative to the printed character during
reverse direction~
It can be seen, then, that in the system of
Fig_ 6 the zao based microprocessor 100 first
supplies the font information for specific charac-
ters to be printed, in compressed form, to a 2901 ;~
based microprocessor 108. The 2901 subsystem then
expands that compressed data in approximate real
time and stores the expanded data in the buffer
memory 114 to define the contour of each pel in a
character. The conversion must be in approximate
real time to minimize storage space requirements
and to provide the information even as the scan-
ning head rnoves quickly across the film. Then,
the color information for each two byte segment of
a slice of a character field is read from the
memory 114 and divided into even and odd segments
and stored in a video R~M 122. The pair~ of bytes
are read out from that RAM to control the LEDs in ;
a manner which allows for the mechanical ~l !
;; ! !
~L2~46i~4
- 23,-
1 orientation of the individual fibers during
scanning movement.
The Video RAM
As noted above, the proper sequencing of
bytes read into and out of the video RAM 122
accounts for the delay between even and odd bytes
on the scanning head with scanning movement; and
the sequencing also accounts for the slant of the
~scanning head as direction is reversed. The video
iRAM 12Z is;controlled by a PROM sequencer 124
which determines the correct sequence of RAM
addressing and of enabling of the even and odd
data registers 118 and 120. The PROM 124 also
controls resetting of the color flip flops 111 and
11~ at the end of each slice. The sequencing is
dependent on the direction of scanning movement.
The RAM addresses and the even and odd register
control signals and reset signal are latched
through a latch 152.
Table 1 illustrates how sequencing of the
reading and writing of bytes into and out of the
RAM 122 accounts for the mechanical orientation of
the fibers duriny bidirectional scanning movement 7
At each step of the sequence, a byte is read from
a byte address and a new byte is written into that
address. The addre3ses are designated by a hexa-
decimal numbering system.
',~, .
' ~ ~
..... ~!
' '" ~' '.
- 2~ -
TABLE 1
FORWARD SETTING REVERSE SETTING
Even Data Odd (Delayed) Even (Delayed) Odd Data
5Locations Data Locations Data Locations Locations
RD/WR O RD/WR 10 RD/llR O RD/WR 11
R /WR 2 RD/WR 12 RD/11R 2 RD/I~R 12
~D~R 3 Group I RD~ 13 Group I RD/~I~ 3 Group I RD/WA 13 Group 1
RD/WR 1 RD/WR 19 RD/llR 9 RD/WR 16
RD/WR 3 Grou p 1 RD/WR lB Group 2 RD/WR B Group 2 RD/W~R 14 Group 2
5RD/WR 5 RD/I~R lD RD/WR D . RD/tYR 12
RD/WR 6 RD/WR lE RD/WR E RD/llR 11
RD/WR 7 RD/WR lF RD/llR F . RD/llR 10
Etc. Etc. RD/WR 7 RD/WR 10
RD/WR 6 RD/WR 11
RD/WR 5 RD/WR 12
RD/WR 4 Group 1 RD/WR 13 Group 1
RD/WR 3 RD/WR 14
RD/llR 2 RD/WR 15
RD/WR 1 RD/WR 16
RD/WR 0 RD/WR 17
RD/WR P RD/WR 17
RD/WR E RD/WR 16
. RD/WR D . RD/WR lS
RD/WR C Group 2 RD/WR 14 Group 2
R/WR B RD/WR 13
RD/WR A r~/WR 12
RD/WR 9 R/WR 11
RD/Wn 8 RD/WR 10
Etc. Etc.
3o
~S4~
25 -,
1 With forward scanning movement, the odd bytes
must be delayed by one slice, or eight odd bytes,
relative to the even bytes. To accomplish this
delay, each odd byte is held in the RAM 122 for
two ci~cles of a one-slice clock, wherèas the even
data bytes are held in memory for only a single
cycle of a one slice clock. - ,
Specifically, noting the "forward settingl' of
Table 1, an even byte is first read from address 0
and then a ;nèw even byte is written into that
address from register 118. N~ext, an odd byte is
read from address 10, and a new odd byte is
written into that address from the odd register
120. In the next two byte cycle, bytes are read
out of and written into the even 1 address and odd
11 address. This sequence continues through the
writing of an even byte into address 7 and an odd
byte into address 17. In the next two byte cycle
an even byte is read from the 0 address, that byte
having been stored for one cycle of a slice clock.
~he 10 address of the odd data locations is not
read out, however. Rather, a byte is read from
the 18 address and a new byte is written into that
address. As the PROM sequencer continues to cause
even bytes to be read from and writtèn into the
first eight even data locations, it causes odd
bytes to be read frorn and written into 16 (hexa-
decimal 10 through lF) addresses in the odd data
3o locations. It is only after the lF address has
been filled that the sequencer causes odd data to
be read from the 1() address~. The byte stored in
t `
j . `
:'`
~2s4~
- 26 -
l the lO address will have been stored at that
address for two cycles of the one slice clock.
The addresses can be considered as groups of
eight even or odd addresses. In the forward
setting, a single even group is addressed repeat-
edly. However, the odd data must be delayed and
it is read from and written into two groups of
addresses before sequencing through thGse groups
is repeated. The added group of addresses adds a
delay from the time that the data is written into
the memory location to the t~me that it is read
from the memory location.
This sequencing of the even and odd bits can
conveniently be considered as the shifting of
bytes as parallel bits through banks of shift
registers. This is illustrated by Fig. 8A. As
shown, the even bytes, in the form of eight
parallel bits, are fed into a bank 154 of 8 x 8
bit shift registers which delay each even byte by
eight two-byte cycles. After that delay, each
byte is read out as eight parallel bits. The odd
bytes are delayed in a similar 8 x 8 bit cycle
shift register 156. However, they are not immedi-
ately read out but are further delayed in a second
8 x 8 bit shift register 158.
The above description of the sequencing of
bytes into and out of the video RAM~122 provides
for delay of odd bytes with forward scanning
movement. With reverse scanning movement, the
even bytes must be delayed relative to the odd
bytes; further, the bytes must be read from the
RAM from top to bottom of e~ch slice even though
.'
,
` !,~ : `
1~4~4
- 27,-
1 they are read into the R~ from bottom to top.
This is accomplished by the addressing scheme
shown for the "reverse setting" of Table 1. The
odd bytes are read from and written into addresses
' 5 1r through 17. Then, those bytes are read from
ar._ written into the same addresses in reverse
order, that is, from address 17 through address
10. This sequence is then repeated. That addres-
~sing scheme provides for a top-to-botto~ output of
bytes which"are read in bottom-to-top.
The even bytes, which are to be delayed
relative to the odd bytes, are read'from and
written into 16 data locations, 0 through F.
Then, the first eight bytes,0 through 7, are read
out in reverse, and are followed by the next eight
bytes, addresses 8 through F, read from memory in
reverse. These bytes are thus read out
top-to-bottom and are also delayed by one slice
cycle relative to the odd bytes.
As with the forward setting, delay of data in
the reverse setting is obtained by storing the
delayed even data in two groups of addresses while
storing the odd data in only a single group of
addresses. Further, because:the data must be read
out in reverse, within ëach group the order of ;
addressing is alternated for both even and odd .
data.
The reverse scan addressing can be considered
by the shift register analog of Fig. 8B. In the
reverse direction, odd bytes are read into a bank
160 of shift registers. 0~ a slice clock, they , 1'
are then read in parallel ~nto a second bank 161
;
~4b;~4
- 28 ~
1 of shift registers; from that bank of shift
registers they are read out in reverse. The even
bytes are read ir.to two banks of shift registers
162 and 164 and are then transferred to the
registers 163 and 165 on a slice clock. They are
then read out, in reverse, first from the second
bank of registers 165 and then from ~he first bank
of registers 163.
Each address of the Video ~AM 122 is deter-
Imined by thé data stored in the PRO~ 124 for the
particular clock time within an overall four slice
cycle. In the forward direction the counter 150,
which generates several of the timing signals to ,'
the PROM, counts up; however, in the reverse
direction, the byte and two byte clocks count up ,;
while the up/down counter 150 count downs. The
mapping of addresses in the PROM 124 must take
that into account.
The above-described sequence of addressing of
the video RAM 122 is simplified to some extent by
the physical arrangement of the present system i`
wherein the displacement between odd and even
groups of,fibe~, optic ~ilaments equals the dis~ ?
placement between character image slices. It is
also simplified by the~fact that the tilt of the
fiber optic fibers relative to the direction of ,'
scan,is such that the eight two-byte groups of
fiber optic filarnents span the distance between
two slices. A more generalized sequencinq
approach can be recognized by defining three time
intervai,s which must be co~npensated for in the ,, ,'
addressing scheme.
,' ~
' , ,
. .
~ ,............... .
::~Z5~ 4
- 29 -
1 First, a "tilt time" is the total time during
which the several groups of LEDs are energized to
compensate for the tilt in the scanning head
relative to the direction of scan; it is the time
over which the entire LED array is enabled. In
this case eight two-byte groups are energized over
a slice clock cycle; the tilt time is the time of
one slice cycle.
Another time to be considered results from
jthe need''to'first read in a slice and then read
that slice out in reverse. ~hat time can be
termed the "slice time" and is the difference in
times at which an odd ~or even) group of fibers
passes adjacent slices. Because, with reverse
sca~, the data for a slice cannot be read out in
xeverse until the entire slice has been written
into memory, read-out must be delayed with reverse
scan by at least one slice time. The data for any
slice might actually be delayed any multiple of a
slice time.
A final time that must be considered is the ~ "
difference in times at which the respective even
and odd-groups of fibers-pass-a given slice. This
time can be termed the 'iodd/even''time".
' ''' In the present system, th~e tilt time, slice
time and odd/even time are each equal to one cycle
of a slice clock. ' '
For both odd and even bytes in both forward
and reverse scan, the tilt time is determined by
the rate at which bytes are read out of the video
R~M. Conveniently, in the 'present system the
bytes are read into the vic~eo RP~I at the same rat'e
`, .
(
54til~
- 30
1 so that at each address, a byte can be read from
the memory address and then a new byte can be read
into the address. In the analogs of Figs. 8A and
8B, the tilt time is provided by each final shift
register 154, 158 161, 163 and 165.~
With forward scan, the only additional
concern is the odd/even time. With reference to
Fig. 8A, that time is accounted for by the delay
of the odd bytes in the register 156;
. ~ ~
lU ~ In reverse scan, one must be concerned with
both the slice time and the ,odd/even time. For
the odd bytes, only the slice time is of concern
and that delay is provided by the bank of shift
registers 160 in the analog of Fig. 8B. Thus the
bytes are written into memory in the sl~ce time
(registers 160) and the last byte to be written in
can be read out over the tilt time (registers
161).
The even bytes in reverse scan must first be
2û delayed by the slice time and then be further
delayed by the odd/even time. With reference to
the analog of Fig. 8B, for the first eight bytes,
the slice time is provided by the register 162 and ~`
the odd/even time is provided by the register 164.
The eight bytes are then read out over the tilt
time from the register 165.. The.second eight
bytes are delayed by the slice time in the regis-
ter 162.. They..are then..delayed by the-odd/even
3û time while held in the register 163 as tlle first
eight bytes are read from the bank of registers
165 (over the tilt time). That second group of
~
,` ,1 ' ~ ';',
~Z5~4
- 31 ~
1 eight bytes is finally read from the register 163
over its tilt time.
PROM With Sequencer
The PROM with sequencer 112 in the high speed
microprocessor system 108 is shown in greater
detail in Fiy. 9. The PROM is a bank 200 of six
256x8 PROMs which provides a 48 bit output for
each eight bit address. To implement a pipelining
technique, the PROM outputs are latched into a
jbank of pipeline registers 202. As the instruc-
tion held by the registers 2~02 is being executed,
the next instruction is being fetched by a new set
of address bits applied to the PROMs 200. This
increases the speed of the high speed microproces- j
sor 108 by breaking the timing delays into two
loops: the processor loop and the memory access
loop. The two loops are executed in parallel.
The following is a description of each bit of
the 48 bit instruction word:
The CARRY RND output is gated with a CARRY
OUT bit from the 2901 microprocessor-110 to select
whether the CARRY OUT of the c~rrent cycle is used
as a CARRY,IM for the next çycle. A CARRY signal,
forces a CARRY IN to the 2901 through an OR gate
204.
, The next nine bits of the instruction word
are a microinstruction code word readable by the
2901 rllicroprocessor ,110.~ T,his,,rnicroinstruction
selects arithmetic logic u~it ~LU) source oper-
ands, an ALU arithmetic function and an ALU
destination control. The microinstruction code
1.
1'254~34
- 32 -
1 word is acco~panied by an eight bit address to the
RAM within the 2901.
BANK and WRITE ONE bits axe provided to the
character buffer RAM 114. The BANK bit allows
selection of one of the two memory banks in the
RAM 114. The WRITE ONE bit is used in timing to
generate a write pulse which allows writing into a
single memory location of the character buffer RAM
114.
The Z80-INTR bit generates an interrupt to
the Z80 microprocessor 101 a~ter completion of a
line of print.
A Z80 INPEN bit selects data input to the
2901 microprocessor 110 from either the FIFO
register 106 (by means of the register control 92)
or from the register 206. The register 206 may
receive a data word from the fifth PROM of the
PROM ban]c 200.
A seven bit row address and seven bit column
address are multiplexed into the character buffer
RAM 114 from the microprocessor llO. To that end,
an ENROW bit controls enabling of the row and
column addresses. into. the memory 114. . .
The LSREGLOAD bit controls loading of data
from the character buffcr memory 114 into shift
registers 107 and 109 during a read operation of
the memory.
The LSAVSTCL bit is used to clock a jurnp
signal used in sequence control as discussed
below.
The next five bits are applied to the charac "
ter buffer memory 114. T}~ COLACO bit controls '
I;
~5~
l clocking of a column address lateh assoeiated with
the memory. The LCAS and LRAS ~its control the
column address strobe and row address strobe to
the character buffer RAM. The L~RITEALL signal
controls writing in.o the entire RA~l 114 for rapid
clearing of memory. The DINALL bit applies data
to the address selected by the microprocessor llO.
In order to reduce the eost of the eireuitry,
'dynamie RP~Is, rather than statie RAMs, were used
'in the RAMs 114. The disadvantage of dynamie
RAMs, however, is that they~require periodie
refreshing of eaeh memory eell and this in turn
requires additional eireuitry. The additional
circuitry is required to ge~erate memory control
bits such as row address strobes (RAS), column
address strobes (CAS), write signals and address
control signals, and the eireuitry ~enerally
includes relatively expensive analog delay lines
2 to generate the eorreet timing signals. Timing of
those memory eontrol bits is eritieal.
The present system rnakes use of a dynamie RAM
but avoids the need for the additional eontrol
eireuitry. This is aeeomplished by generating the
memory control bits as part of an instruetion word
from the program memory 200. The mieroinstruetion
from the program memory 200 also eontrols a
refresh address register in the mieroproeessor 110
so that the refresh address and the memory control
bits are in synchronization. Thus, the
conventional dynamic R~M controller circuitry is
replaeed by additional program memory, and the
control bits are part of ~he microinstruction.
1. ,
~, ~
I~ "
;. .: " : '
46~
- 34 ~
1 Four bits from the final register of the bank
of registers 202 are applied to a condition code
multiple~er 208. That four bit input selects one
of up to 16 inputs to the multiplexer to control a
jump bit. That jump bit is applied through a
latch 210 to a two-to-one multiplexer 212 which in
turn applies a control input to a program sequence
controller 214. The sequence controller 214
sequences through the microprogram stored in the
PRO~5 bank 200 by sequentially selecting an eight
bit address to the PROM bank~. The sequence
controller 214 can select an address from one of
four sources: 1) a set of external direct inputs
received from register 206, 2) external data
previously received frorn the register 206 and
stored in an R register within the controller, 3)
a four word deep push/pull stack register, or 4) a
program counter register which usually contains
the last address plus one. Two of the inputs from
the multiplexer 212 to the sequence controller 214
control the push/pull stack. The other two inputs
determine the one of four sources used to output
an address to the PROMs. -In-the absence of a jump
condition, the commands for the sequencer come
from hardwired inputs to the multiplexer 212.
~hat hardwired instruction is a continue instruc-
tion. When a jump signal is received by the
multiplexer 212 from the condition code multi-
plexer 208, the control signals applied to the
sequence controller are those received from
registe~ 216 of the regis~ër bank 202.
1.
4~4
- 35 ~
1 As previously noted, the jump signal is
selected from one of a possible 16 conditions
input to the multiplexer 208. Under control of
its four inputs from the register 216 of the
pipeline registers 202, the jump signal is sel-
ected from one of the other inputs to the multi-
plexer 208. A jump always input will always
provide a jump in the sequence if selected. The
second input to the multiplexer is a CARRY OUT bit
received ~rom the 2901 microprocessor 110. Four
additional inputs from the microprocessor 110 are
also applied to the condition-code multiplexer
208. Direction and inverted direction bits are
applied. A Z80 ready bit is asserted from the
register control 92 when data is available from
the register 106 of the ~IFO registers. This
condition code is checked before data is input
from the FIFO register. A NEVIBYTE bit is
synchronized with the fiber optic head scan to
signal that two more video bytes arereyuired by
the odd even logic circuitry 116. Additional
inputs to the condition code multiplexer 208
include a previous JUMP bit applied through an -
inverter 218 and a D flip flop 220. A NEVER JU~P
input casl also be selected. ,~
~hile the invention has been particularly
shown and described with reference to a preferred
embodiment thereof, it will be understood by those
skilled in the art that various changes in form
and details may be made therein without departing
from the spirit and scope of the invention as
defined by the appended cljims. For example,
,. " .,
~4~
- 36 - i
1 principles of the invention may ~e applied to
arrays of imaging elements other than light
sources and arrays with more than two columns of
imaging elements can also be controlled with
similar circuits.
~.
,,
~' ~.~ ;,' ! `
j~ " . - .,
