Note: Descriptions are shown in the official language in which they were submitted.
3~i6
FLYBACK POWER SUPPLY
Backqround o~ the Invention
The present invention i9 related to the ~ield o~
~lyback power supplies. ~ore particularly, the present
invention i~ related to stable ~lyback power ~uppli8s
which include an output sensing ~eedback control loop and
wherein the power supply remains stable even when
operated in a continuous excitation mode with respect to
current excitation of the primary winding oi a flyback
trans~oxmer in the power supply.
In known flyback power supplies, pulsed current
excitation is ~upplied to the primary winding o~ a
flyback transformer and a secondary winding of the
trans~ormer is couple~, typically through a rectifier, to
a load. The recti~ied output i~ sensed and provided by a
~eedback path as an input to a drive circuit which
provides drive signals that determine the primary winding
current excitation pulses. The drive signals vary in
accordance with the sensed output ~o as to maintain the
output at a desired 18vel, thus regulating the output.
Typiaally these ~lyback power supplies are
operated in a discontinuous mode ~or ~tability reasons.
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In a discontinuous mode, magnetic flux will increase in
the transformer during primary winding currenk pulses,
and between primary winding current pulses the flux
decreases to a substantially zero value~ Typically the
decrease of ~lux to zero i8 abrupt, and ~lyback
trans~ormers operated in the discontinuous mode typically
generate sub~tantial radio ~requency inter~erence (RF~).
In addition, typically large primary winding current
pulses mu~t be utilized in order to ~tore a substantial
amount o~ energy for 3ubsequent tran~er to the secondary
winding, or else the ~requency o~ the primary excitation
pulses must be increased.
If the flyback power supply i5 ope~ated in a
continuous mode such that the transformer ~lux has a
substantial non-zero magnitude prior to the drive circuit
causing an increase in flux to store additional energy,
less primary current can be utilized and less RF
interference is generated. Alqo a lower excitation
frequency can be used i~ desired. However~ operating in
a continuous mode typically results in stability problems
for the power supply, thu~ preventing the utilization of
a continuous mode flyback power supply or requiring tight
controls on ~he system gain, the input signal magnitude
and the ~requency o~ primary current excitation in order
to maintain limited stability. However, due to load
variation, typically this stability cannot be maintained.
There~ore, substantially all ~lyback power ~upplies are
operated in the discontinuous mode.
Summary o~ the Invention
An ob~ect o~ the present invention is to provide
an improved ~lyback power supply which overcomes the
above-mentioned de~iciencie~ of prior ~lyback power
supplies.
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A more speci~ic ob~ect of the present invention
is to provide a stable flyback powçr supply which can be
operated in a continuou~ mode.
In one embodiment of the present invention a
~lyback power supply i~ provided. The ~lyback power
supply comprises- terminal mean~ for receiving a DC
power supply voltage input ~ignal having a magnitude
which may vary over a ranga o~ magnitudes; trans~ormer
means having a primary winding coupled to said terminal
mean~ and a secondary winding; drive circuit means having
at least a sense signal input and providing, as an
output, a control input signal to a control electrode o~
a drive devia~ coupled to said primary winding ~or
controlling primary current therein provided by said
power supply voltage input signal; rectifier means
coupled to said secondary winding ~or rectifying signals
induced in said secondary winding and providing, at an
output terminal, a DC power supply output voltage in
response thereto; ~eedhack path means connected between
said output terminal and said sense input for controlling
said drive circuit means to maintain said power supply
output signal at a desired level; wherein the improvement
comprises; said feedback path means comprising a sample
and hold circuit comprising a controllable gate device
provided between said output terminal and a holding
capacitor connected to said sen~e input, a control
terminal o~ said gate device receiving switching signals,
wherein said gate device i9 alternately opened and closed
such that said power supply output ~ignal is e~eatively
sampled by said holding capacitor whan said control
device causes primary windlng current ~low causing a ~lux
increase in said trans~ormer means so as to store energy
therein, and wherain said holding capacitor is
e~ectively disconnected ~rom said output terminal at all
other time~ when ~lux in said krans~ormer mean~ decreases
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and said stored energy is provided to ~aid secondary
winding and to said recti~ier ~eans, whereby stability o~
said powsr supply is provided by discontinuous feedback
path sampling at times other than the times at which
energy i9 txan~ferred from said primary to secondary
windings.
More particularly, in the preferred embodiment of
the pre~ent invention, ths driva device will implement a
continuou~ mode o~ excitation ~or the ~lybaak transformer
such that the trans~ormer ~lux ha~ a ~ubstantial non-zero
magnitud~ prior to the drive device initiating primary
winding current ~low causing the ~lux to increase. The
preferred embodiment of the present invention utilizes a
pulse width modulation circuit as the drive circuit means
and provides for alternately opening and closing the gate
device in accordance with an output of the pulse width
modulation circuit that is provided as the control input
signal to the drive device t~at determines the primary
winding excitation. This insures the proper
synchronization of the controllable gate device with
respect to primary winding excitation. In addition,
preferably the gate device comprises a series pass device
connected between the output terminal and the pulse width
modulation sense input. Pre~erably the drive device
comprises an FET transistor.
By providing a discontinuous ~eedback path in
accordance with the keachings o~ the present invention, a
~lyback power supply has been provided which i8
unconditionally stable regardless o~ variations in power
supply load and regardless o~ variations in the magnitude
o~ the DC power supply voltage input signal. This mean~
less expensive, looser tolerance circuit components can
be used. When ~he power supply is operated in a
continuous mode, this results in less radio ~requency
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inter~erence being generated by the ~lyback power supply
and can result in utilization of lower magnitude primary
wind~ng current excitation pulses. In addition, the
present invention provide~ greater de3ign flexibility
with regard to determining the frequency of operation o~
the pulse width modulakion circuit such that eithar high
or low ~requencies can be selected for the period of the
signal that determine~ the primary winding current
excitation pulses. If a high frequency of operation is
5elected, which i5 now pos3ible sinco less RF
inter~erence is produced, less expen~ive, smaller size
circuit components can be utilized ~or the power supply.
These and other advantages of the present
invention are best under~tood by reference to the more
detailed description of the present invention which
follows.
Brie~ Description of the Drawinq
For a more complete understanding o~ the present
invention, reference should be made to the drawing in
which:
Figure 1 comprises a schematic diagram of a
flyback power supply constructed in accordance with the
teachings of the present lnvention.
Description of the Preferred Embodiments o~ the Invention
Referring to the drawing, a flyhack power supply
10 is illustrated. The power supply include~ an input
terminal 11 at which a DC power supply voltage input
signal Vin is received wherein the magnitude o~ this
35 signal may vary over a wide range of magnitudes. In
e~sence, the ~lyback power supply raceives a DC input
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~ignal Vin and provides, in responRe thereto, a well
regulatQd DC output signal VOUt at an output terminal
12. It is contemplated that various load~, shown
schematically in the Figure ag load 13, may be connected
to the output terminal 12. Thus the flyback power supply
perform~ a regulating and pow~r transfer function so as
to yenerate the desired regulated ~ignal Vout~
The input terminal 11 is connected to a terminal
14 through a ~ilter network 15 shown dashed ln the
Figure. The Pilter network per~orms an initial voltage
smoothing ~unction ~or the signal Vin 80 as to provide
a DC signal at the terminal 14 with somewhat le88 ripple.
The flyback power supply 10 includes a tran~ormer 16
having a primary winding 17 having one end dir~ctly
connected to the termlnal 14 and another end directly
connected to the drain terminal of an FET transistor 20.
The transformer 16 include~ a transformer core 18, in
which trAnsformer flux is created by excitation of the
primary winding 17, and a secondary winding lg coupled to
th~ transformer core and primary winding. One end of the
secondary windiny 19 is connected to ground, and another
end is connected through a rectifying diode 21 to the
output terminal 12 while a capacitor 22 is aonnected
between the terminal 12 and ground. Essentially, the
diode 21 and capacitor 22 ~orm a rectifying means coupled
to the secondary winding 19 Por rectifying signals
induced in the secondary winding and provi~ing a DC power
supply output voltage in response there~o at the output
terminal 12.
The FET tran~istor 20 essentially controls the
current excitation o~ the pri~ary winding 17 by being
periodically dr:Lven on and o~f. A ~ource terminal o~ the
FET transistor is directly connected to ground and a gate
or control electrode terminal oP the FET transistor
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receives periodic variable duty cycle pul~e~ fro~ a pulse
width modulation (PWM) circuit 23 shown in the Figure.
The pulse width modulation circuit 23 ha~ a sense input
terminal 24 ~or receiving signal~ generally related to
the magnitude o~ the output signal Vout~ Tha PWM
circuit 23 also includes a reference terminal 25 at which
an external predetermined re~erence voltage may be
provided. Alternatively, the circuit 23 may internally
generate the re~erence voltage at terminal 25. In
response to the di~erence between the output r~lated
sen~e voltage at the terminal 24 and the reference
voltage at the terminal 25, the pulse width modulation
circu~t 23 provides, ae an output at a terminal 26, a
control input signal which is applied to tho gate of the
FET transistor 20. The FET 20 serves as a drive device
for the primary winding 17 of the trans~ormer 16. In
this manner, the output of the pulse width modulation
circuit, via the dri~e device 20, controls the primary
winding current which i~ provided by the voltage at the
terminal 14 that is determined in accordance with the
voltage input signal Vin
It should be noted that preferably the pulse
width modulation circuit 23 shown in the Figure can
comprise a Motorola integrated circuit MC34060 which is
re~ponsive to DC sense signals so as to provide a
variable duty cycle pulse width modulated output signal
in accordance with the di~ference between the sensed
signal magnitude and a re~erence voltage maintained at
the terminal 25. The ~inal output device o~ the pulsa
width modulation circuit 23 is ~hown in the Figure as an
NPN transistor 27 having its collector connected to the
terminal 26. Due to this con~iguration, a biasing/load
resistor 28 is coupled betwaen the terminal 26 and the
terminal 1~. In addition, the ~lyback power supply 10
shown in the Figure includes a conventional "snubber"
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circuit 29 shown dashed as comprising a dioda 30, a
resistor 31 and a capacitor 32 connacted between the
drain terminal of the FET 20 and ground. The function of
the snubber circuit i3 essentially ko protect the FET
device from high reverse bias voltages which may be
generated by abruptly interrupting the current flow in
the primary winding 17 when the ~ET transistor is turned
o~. The snubber circuit 29 e~sentially ~unctions to
limit the magnituda o~ the reverse bias voltages produced
at the drain terminal o~ the FET. The operation of the
snubber circuit is not particularly significant with
respect to the present invention.
It should be noted that an FET transistor is
utilized to control the switching of the primary winding
current since suc~ transistors have good high ~requency
and temperature characteriatics thus enabling operation
of the flyback power ~upply over wide temperature ranges
and enabling tha selection of a relatively high
~requency, if desired, ~or the periodic s~itching on and
o~ of the FET transistor which results in the generation
of periodic current pulses for the primary winding 17.
A feedback path is provided between the output
terminal 12 and the sense input terminal 24 o~ the pulse
width modulation clrcuit 23. The function o~ this
feedback path is to provide, at the sense terminal 24, a
signal related to the magnitude o~ the output voltage
VOUt. Typically this ~eedback path can comprise either
a direct connection or a trans~ormer couplad conneation
between the output terminal 12 and the sense terminal 24.
However, the provision in prior ~lyback transformers o~
this feedback path generally resulted in stability
problems ~or the ~lyback pow~r supply, particularly i~
the power ~upply was operated in a continuous mode
wherein the transformer ~lux had a substantially non-zero
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magnitude at and immediately prior to the turning on of
the drive device that then requlted in causing primary
winding current 80 as to increase the trans~ormer ~lux.
In such situations, substantial stability problem~
existed which typically resulted in all prior ~lyback
trans~ormers being operated in the discontinuous mode
despite the fact that in such a mode high primary current
pulse~ wero required and substantial RF inter~erence was
generated. These disadvantages have been overcome by the
present invention.
In the ~lyback power supply 10, a selective
discontinuous ~eedback path 40 is provided between the
outpu~ terminal 12 and the input sense terminal 24. This
~eedback path 40 is shown dashed in the Figure and
comprises a PNP series pass transistor 41 having its
emitter terminal directed connected to the output
terminal 12 and lts collector terminal directly connected
to one electrode of a holding capacitor 42 having its
other electrode connected to ground. The transistor 41
forms a controllable gate device. The base o~ the
transistor 41 is connected to the terminal 12 through a
biasing resistor 43. An NPN control transistor 44 i
provided in the feedback path 40 and has its emitter
connected to ground, its collector connected to the base
of the transistor 41 through a resistor 45 and its base
connected to ground through a capacitor 46 and connected
to the terminal 26 through a resistor 47. The collector
o~ the transistor 41 is directly connected to the sensed
terminal 24 through a series resistor 48 wherein a
resistor 49 connected bekween the terminal 24 and ground
and performs a vol~age divider ~unction in combination
wlth the resistor 48. Essentially the components 41
through ~9 comprise the selective ~eedback path 40 o~ the
present lnvention. The path 40 comprises a DC circuit
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path between the serie~ pa~ device 41 and terminal~ 12
and 24.
Essentially, the selectiva feedback path 40
implements a sample and hold function by v.irtue of the
selsctive conduction o~ the serie~ pass device 41 and the
holding capacitor 42 such that an effective direct
connection between the terminal 12 and the sense terminal
24 is only provided at certain times. In the present
invention, these time~ occur during the existence o~
primary winding current pulse~ which cause an increase in
the transformer ~lux so as to store energy in the
transformer. This occurs by virtue of the periodic pulse
width modulation control input signal provided at the
terminal 26 functioning a~ a switching signal. This
switching signal cause~ the FET transistor 20 to turn on
and, at the æame time, turns on the transistor 4~ which
results in turning on the transistor 41. Thus during
primary winding current pulses causing an increase in
transformer flux, the series pass transistor 41 couples
the voltage at the terminal 12 to the holding capacitor
42. This effectively ~amples the signal Vout~ When
the pulse width modulation control signal at the terminal
26 turns off the FET drive device 20, current effectively
ceases in the primary winding 17 and flux in the
transformer 16 will decrease resulting in the transfer of
the stored energy in the transformer to the secondary
winding 19 and to the rectifier circuit comprising ths
components 21 and 22. At this time, the transistors 44
and 41 are turned of~, thus preventing any transient
signals at the tsrminal 12 from reaching th~ holding
capacitor 42 and the sense input terminal 24. Because o~
thi~, the ~tability of the ~lyback power supply 10 is
mainkained since instability typically results from
providing a continuous feedback path between the output
and sense terminals during the time that energy is
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P-00612
~ransf2rred from the trans~ormer to the recti~ier
circuit.
Because o~ the configuration o~ the present
invention, the ~lyback power supply 10 is unconditionally
stable, thus allowing the power supply t4 be operated in
a continuous mode, whereas previously operating a flyback
power ~upply in a continuous mode would nok be possible
since the power supply would not remain stable and would
produce undesired signal 09cillation~. In the continuous
mode o~ operation, the period o~ the control signal
provided at the terminal 26 by the pulse width modulator
circuit 23 i~ such that the trans~ormer ~lux, while
decreasing during the off time o~ the FET transistor 20,
never reaches a substantially zero magnitud~ prior to the
occurrence of the next primary winding current pulse.
Thus pre~erably the flyback transformer 10 is operated in
a continuous mode such that flux in the transformer will
have a substantial non-zero magnitude at and immediately
prior to the time the FET transistor inltiates primary
winding current ~low pulses which cause the transformer
flux to increase. Because of this, the ef~ective
inductance of the primary winding 17 is increased such
that a larger amount of energy is storable in the
trans~ormer 16 while a smaller amount o~ current can be
utili~ed to provide this larger amount of stored energy.
In addition, operation in the continuous mode reduces RF
interference which may be produced by the switching on
and o~ o~ the primary current.
It should be noted tha~ while the present
invention is described in terms o~ a ~lyback power supply
designed to operate in a continuous mode, the present
invention is also applicable to ~lyback power supplies
that are des.igned to operate in a discontinuous mode, but
may occasionally be inadvertently opcrated in a
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continuous mode dua to variations in the load 13. Thus
the present invention provides for unconditional
stability of flyback power supply 10 regardless of what
kype o~ mode it is dasigned to be operated in. This
stability i8 achieved despite any variations in the load
13. In addition, this stability is also maintained
despite wide variation~ in the magnitudQ o~ the input
signal Vin
While specific embodiments of the present
invention have beQn shown and described, further
modi~ications and improvements will occur to those
skilled ln th~ art. All such modi~ication~ which retain
the basic underlying principles di~closed and claimed
herein are within the scope o~ this invention.
