Note: Descriptions are shown in the official language in which they were submitted.
03AM 5939
1293'7~9
CONTROL SYSTEM FOR AN ELECTRONICALLY COMMUTATED
MOTOR, ELECTRONICALLY COMMUTATED MOTOR SYSTEM,
LAUNDRY APPARATUS AND METHODS FOR CONTROLLING SAME
This application is a division of Canadian
application Serial No. 479,501, filed April 18, 1985.
Field of the Invention
This invention relates in general to
dynamoelectric machines and domestic appliances and
more particularly to control systems with special
applicability to electronically commutated motors,
electronically commutated motor systems, laundry
apparatus and other appliances, and methods for
operating them.
Background of the Invention
While conventional brush-commutated DC motors
may have numerous advantageous characteristics such as
convenience of changing operational speeds and
direction of rotation, it is believed that there may be
disadvantages, such as brush wear, electrical noise,
and radio frequency interference caused by sparking
between the brushes and the segmented commutator, that
may limit the applicability of such brush-commutated DC
motors in some fields such as the domestic appliance
field including the laundry apparatus field.
Electronically commutated motors, such as brushless DC
motors and permanent magnet motors with electronic
commutation, have now been developed and generally are
believed to have the above-discussed advantageous
characteristics of the brush-commutated DC motors
without many of the disadvantages thereof while also
having other important advantages. Such electronically
commutated motors are disclosed in the David M. Erdman
U.S. patents 4,005,347 and 4,169,990 and Floyd H.
Wright U.S. Patent 4,162,435, all of which are commonly
assigned with the present application. These
e~ectronically commutated motors may be advantageous
1293'789
03AM 5939
employed in many different fields or motor applications
among which are domestic appliances, e.g., automatic washing
or laundry machines such as disclosed in commonly assigned
Canadian Patents No. 1,193,651 - Boyd, Jr., issued September
17, 1985; No. 1,140,658 - Erdman et al, issued February 1,
1983; No. 1,150,962 - Hershberger, issued August 2, 1983;
and No. 1,199,997 - Erdman, issued January 28, 1986.
Laundry machines as disclosed in the above patents
are believed to have many significant advantages over the
prior art laundry machines which employ various types of
transmissions and mechanisms to convert rotary motion into
oscillatory motion to selectively actuate the machine in its
agitation washing mode and in its spin extraction mode.
Such prior art laundry machines are believed to be more
costly and more complicated to manufacture, consume more
energy, and require more servicing. Laundry machines with
electronically commutated motors require no mechanical
means, other than mere speed reducing means, to effect
oscillatory action of the agitator or tumbler, and in some
applications, it is believed that the spin basket might be
directly driven by such a motor. While the past control
systems, such as those disclosed in the aforementioned
coassigned patents for instance, undoubtedly illustrated
many features, it is believed that the control systems for
electronically commutated motors in general, and for such
motors utilized in laundry machines, could be improved, as
well as the methods of control utilized therein.
In some of the known control systems, the
position of the rotatable assembly (i.e., the rotor) of
the electronically commutated motor was located by
sensing the back emf of one of the winding stages on the
stationary assembly (i.e., the stator) thereof. More
particularly the back emf of an unenergized winding
stage was sensed and integrated to determine rotor
position during any one commutation period in a
lZ93'7~9
03AM 5939
sequence of commutation. With the advent of inexpensive
microprocessor chips, controlling an electronically
commutated motor with a microprocessor and discrete element
control system has been described. Coassigned U.S. Patent
4,250,544, "Combination Microprocessor and discrete Element
Control System for a Clock Rate Controlled Electronically
Commutated Motor" issued February 10, 1981 to R.P. Alley
discloses such an arrangement. It is believed that further
improvements and other departures can be made in methods and
systems for controlling electronically commutated motors and
for domestic appliance applications including laundering
apparatus applications.
Summary of the I~vention
Among the objects of the present invention are to
provide improved control systems for an electronically
commutated motor, improved electronically commutated motor
systems, improved laundry apparatus, and improved methods
for controlling them which do not require position sensing
by integration during a commutation period: to provide such
improved control systems for an electronically commutated
motor, electronically commutated motor systems, laundry
apparatus and other appliances, and methods for controlling
them which can screen out unexpected or accidentally
produced signals and transients from a microprocessor or
digital computer to maintain proper operation of the
system, the motor, or the appliance; to provide such
improved control systems for an electronically commutated
motor, electronically commutated motor systems, laundry
apparatus, and methods for controlling them which can
reliably start an electronically commutated motor and
insure its operation in a selected direction of rotation; to
provide such improved control systems for an electronically
commutated motor, electronically commutated motor systems,
laundry apparatus, and methods in which the motor is
protected from excessive current; to provide such improved
control systems for an electronically commutated motor,
~3789 03AM 5939
electronically commutated motor systems, laundry apparatus,
and methods in which the speed of the motor is adjustably
controlled; to provide such improved control systems for an
electronically commutated motor, electronically commutated
motor systems, laundry apparatus, and methods for
controlling them in which the rotor position is sensed from
the back emfs of the winding stages when the rotor is
coasting and there are no commutation periods; to provide
such improved control systems for an electronically
commutated motor, electronically commutated motor systems,
laundry apparatus, and me.thods for controlling them which
are resistant to error in determining the rotor position
from the back emfs of the winding stages when the rotor is
coasting and there are no commutation periods; to provide
such improved control systems for an electronically
commutated motor, electronically commutated motor systems,
laundry apparatus, and methods for controlling them which
can commutate an electronically commutated motor in a
preselected sequence, discontinue the commutating, and then
resume commutating at a proper point in the sequence to keep
the motor running smoothly determined from the back emfs of
the winding stages when the commutating was discontinued; to
provide such improved control systems for an electronically
commutated motor, electronically commutated motor systems,
laundry apparatus, and methods for controlling them which
accelerate the motor in a low speed connection arrangement
of the winding stages, change from the low speed connection
arrangement to a higher speed connection arrangement of the
winding stages and sense the rotor position to smoothly
resume accelerating the motor in the high speed connection
arrangement; to provide such improved control systems for an
electronically commutated motor, electronically commutated
motor systems, laundry apparatus, and methods for
controlling them which brake the motor; to provide such
improved control systems for an electronically
~37~ 03AM 5939
commutated motor, electronically commutated motor systems,
laundry apparatus, and methods for controlling them which
smoothly and rapidly reverse the motor; to provide such
improved control systems for an electronically commutated
motor, electronically commutated motor systems, laundry
apparatus, and methods for controlling them which periodically
reverse the motor; and to provide such improved control
systems for an electronically commutated motor, electronically
commutated motor systems, laundry apparatus, and methods for
controlling them which power at least some of the winding
stages and rotate the rotor, and then leave all the winding
stages temporarily unpowered and provide a current path for
the previously powered winding stages to facilitate rotor
position monitoring and accomplish other purposes.
Other objects and features will be in part apparent
and in part pointed out hereinafter.
In general and in one form of the invention, a control
system for an electronically commutated motor including a
stationary assembly having a plurality of winding stages
adapted to be selectively commutated, and rotatable means
associated with the stationary assembly in selective magnetic
coupling relation with the winding stages, and means for
commutating the winding stages by selectively supplying power
thereto in response to a pattern of control signals leaving at
least one of the winding stages unpowered at any one time while
the other winding stages are powered, comprises circuitry
coupled to the winding stages for simultaneously converting the
voltages across the winding stages to digital form thereby to
digitize the voltages. The circuitry for digitizing the
voltages is combined with circuitry for producing successive
patterns of digital signals in at least one preselected
sequence, for selecting the digitized voltage across the at
least one unpowered winding stage depending on the digital
signal pattern produced, and for producing a following pattern
in sequence after at least one predetermined logic level of
03AM 5939
lZ~37~
Lhe seler~eà àigiti~ea ~Ltaqe has occur,ea: and also combined
~lith circuitry responsive to the successive patterns of the
digital signals for generating the successive patterns of the
controi ~ignals for t~,e commutating means.
In general and in another form o~ the invention, a
control system for an eiectronically commueated motor includ-
ing a stationary assemDly having a plurality of winding stages
adaptea to be selectively commutated, and rotatable means
associa.ed with the statlonary assembly in selecti-e ~agnetic
coupling relation with the winding stages, and means for com-
mutating the ~inding stages ~y selectively supplying power
thereto in response to a pattern of control signals leaving at
least one of Lhe winding stages unpowerea a~ any one time
while the other winding stages are powered, comprises cir-
lS cuitry coupled to the winding stages for digitizing the volt-
ages across the winding stages and circuitry responsive to
successive patterns of digital signals for generating succes-
sive patterns of the control signals for the commutating
means. r digital computer operating under stored program con-
trol has inputs for the digitized voltages. The computer hasmemory elements for storing data representing at least one
preselected sequence of the patterns of the digital signals
and for storins data, corresponding to each pattern of the
digital signals, identifying the respective input for the
digitizeà voltage for the at least one unpowered windinq
stage. The computer successively produces one of the patterns
of the digital signals, senses only the digitized voltage at
the identified input corresponding to the one pattern and pro-
duces the following pattern in sequence after at least one
predetermined logic level of the digitized voltage at the
identified input has occurred.
In general, and in a ~urther form of the inYention,
an electronically commutated motor system comprises an elec-
tronically commutated motor including a stationary assembly
having a plurality of winding stages aàapted to be selectively
03AM 5939
1293789
cammutatea, and rotatable m~ans associated ~l~h the stationary
assembly in selective magnetic coupling relation with the
~ln~lng stages, first and second conductors for supplying
power, and a circuit ~or commutating the winding stages by
selectively switching the winding stages to the supply conduc-
tors in response to a pattern of control signals leaving at
least one of the winding stages unpowered at any one time
while the other winding stages are powered. A circuit is cou-
pled to the winding stages for digitizing the voltages across
the winding stages, and another circuit responds to successive
patterns of digital signals for generating successive patterns
of the control signals for the commutating circuit. The sys-
tem has a digital computer operating under stored program con-
trol and having inputs for the digitized voltages. The com-
lS ?uter has memory elements for storing data representing atleast one preselected sequence of the patterns of the digital
signals and for storing data, corresponding to each pattern of
the digital signals, identifying the respective in-~ut for the
digitized voltage for the at least one unpowered winding
stage. The comuter successively produces one of the patterns
of the digital signals, senses only the digitized voltage at
the identified input corresponding to the one pattern and pro-
duces the following pattern in sequence after at least one
predetermined logic level of the digitized voltage at the
2S identified input has occurred.
In general, and in still another form of the inven-
tion, laundry apparatus comprises means operable generally in
a washing mode for agitating water and fabrics to be laundered
therein and operable generally in a spin mode for thereafter
spinning the fabrics to effect centrifugal displacement of
water from the fabrics, an electronically commutated motor
including a stationary assembly having a plurality of winding
stages adapted to be selectively commutated, and rotatable
means associated with the stationary assemblv in selective
macnetic coupling relation with the windina stages for driving
03AM 5939
12~37~9
~he a~itating and s~inninq means in the wasning moàe operation
and in the spin mode operation thereof upon the commutation of
said winding stages. ~i~st and second conauctors are provided
or 5l~DDlying power. The laundry apparatus also includes a
circuit for commutating the winding stages Dy selectively
Switching the winàing stages to the supply conductors in
response to a pattern of contrcl signals leaving at least one
o~ the winding stages unpowered at any one time while the
other winding stages are powered. A circuit is coupled to the
winding stages for digitizing the voltages across the winding
stages. A circuit responds to successive patterns of digital
signals for generating successive patterns of the controL sig^
nals for the commutating means. The laundry apparatus has a
digital comput_r operating unaer stored program control and
having inputs for the aigitized voltages. The computer has
memor~ elements for storing data representing at least one
- preselected sequence of the patterns of the digital signals
and for storing data, corresponding to each pattern of the
digital signals, identifying the respective input for the
digitized volta~e for the at least one unpowered winding
stage. The com?uter successively produces one of the patterns
of the digital signals, senses only the digitized volt2ge at
the identified input corresponding to the one pattern and pro-
duces the following pattern in sequence after at least one
2S predetermined logic level of the digitizea voltage at the
identified input has occurrea.
In general, and in a method form of the invention, a
method for controlling a system having an electronically com-
mutated motor including a stationary assembly having a plural-
ity of winding stages adapted to be selectively commutated,and rotatable means associated with the stationary assembly in
selective magnetic coupling relation with the winding stages,
and means for commutating the winding stages by selectively
supplying power thereto in response to a pattern of control
signals leaving at least one of the winding stages un~owered
03AM 5g3g
~2937~9
t any ^ne time wnile t~e other winding s~a~es are powered,
compris2S the seeps of digitizing the voltages across t~.e
windir.g stages and generating successive patterns of the con-
trol sl~nals 'or the commutating means in response to succes-
sive patterns of diqital signals. Data is prestored represent-
ing at least one preselected sequence of the ~atterns of the
digital signa}s. Data is also prestored correspondinq to each
pattern of the digital signais, identifying the respective
digitized voltage for t~e at least one unpowered winding
stage. One of the patterns of the digital signals is succes-
sively produced and only the identified digitized voltage cor-
responàing to the one pattern is sensed. The following pat-
tern in sequence is produced after at least one predetermined
logic 'evel o~ the identified digitized voltage has occurred.
Generally, and in another method form o the inven-
tion, c method for controlling a system having an electrcnic-
ally commutated motor including a stationary assembly having a
plurality of winding stages adapted to be selectively commu-
tated, 2nd rotatable means associated with the stationary
assembly in sel~ctive magnetic coupling relation with the
winding stages, first and second conductors for supplying
power, and means for commutating the winding stages and pro-
ducing a current in the winding stages by selectively switch-
ing the winding stages to the supply conductors in response to
a pattern of control signals, comprises the steps of producing
successive patterns of digital signals in at least one prese-
lected sequence and generating patterns of the~ control signals
for the commutating means in response to the successive pat-
terns of the digital signals. The current in the winding
stages of the electronically commutated motor is compared with
a predetermined level, and a preestablished pattern of the
digital signals is produced for a predetermined period of time
to reduce the current in the winding stages, whenever the pre-
determined level is exceeded. The current reducing pattern of
03AM 5939
lZ5~3~7~9
the afgital signais is periodically producea at an adjustable
rate wnen the predetermined level is not e~ceeàed.
Generally, and in a still further form of the inven-
tion, a control system for an electronically commutated motor
includin9 a stationary assembly having a plurality of winding
stages adapted to be selectively commutated, and rotatable
means associated with the stationary assemDly in selective
magnetic coupling relation with the winding stages, first and
second conductors for supplying power, and a circuit for com-
mutating the winding stages and producing a current in thewinding stages by selectively switching the winding stages to
the supply conductors in response to a pattern of control sig-
nals, comprises a circuit for generating patterns of the con-
trol signals for the commutating circuit in response to the
lS successive patterns of the digital signals and a circuit for
comparing the current in the winding stages of the electronic-
ally commutated motor with a predetermined level. A further
circuit is provided for producing the successive patterns of
digital signals in at least one preselected sequence for the
generating circuit, for producing in response to the comparing
circuit a preestablished pattern of the digital signals to
reduce the current in the winding stages upon the predeter-
mined level being exceeded, for monitoring the voltage across
the winding stages to monitor the position of the rotatable
means when the current is being reduced, and for resuming pro-
ducing the successive patterns of digital signals in sequence
after a predetermined time interval.
Generally, and in yet a further form of the inven-
tion, a control system for an electronically commutated motor
including a stationary assembiy having a plurality of winding
stages adapted to be selectively commutated, and rotatable
means associated with the stationary assembly in selective
magnetic coupling relation with the winding stages, and means
for commutating the winding stages by selectively supplying
power thereto in response to a pattern of control signals
lZ93789
03AM 5939
leaving at least one of the winding stages unpowered at any
one time while the other winding stages are powered,
comprises a circuit coupled to the winding stages for
converting the voltages across the winding stages to digital
form thereby to digitize the voltages. The circuit for
digitizing the voltages is combined with a circuit for
producing successive patterns of the control signals in at
least one preselected sequence to rotate the rotatable means,
for subsequently producing a pattern of the control signals
which causes the commutating means to leave all of the
winding stages temporarily unpowered, for sensing the
digitized voltage while the winding stages are temporarily
unpowered and then resuming producing the successive patterns
of the control signals in sequence beginning with a pattern
of the control signals determined from the sensed digitized
voltages.
Generally, and in an even further form of the
invention, laundry apparatus comprises means operable
generally in a washing mode for agitating water and fabrics
to be laundered therein and operable generally in a spin mode
for thereafter spinning the fabrics to effect centrifugal
displacement of water from the fabrics and an electronically
commutated motor including a stationary assembly having a
plurality of winding stages adapted to be selectively
commutated, and rotatable means associated with the station-
ary assembly in selective magnetic coupling relation with the
winding stages for driving the agitating and spinning means
in the washing mode operation and in the spin mode operation
thereof upon the commutation of the winding stages. First
and second conductors are provided for supplying power. The
laundry apparatus has a circuit for commutating the winding
stages by selectively switching the winding stages to the
supply conductors in response to a pattern of control
signals and a circuit coupled to the winding stages for
converting the voltages across the winding stages to
digital form thereby to digitize the voltages. In the
11
12937~9
03AM 5939
laundry apparatus is a circuit operable generally for switch-
ing the winding stages from a first connection arrangement to
a second connection arrangement, and a circuit for producing
successive patterns of the control signals in at least one
preselected sequence to rotate the rotatable means, for sub-
sequently producing a pattern of the control signals which
causes the commutating means to leave all of the winding
stages temporarily unpowered during switching of the winding
stages from the first connection arrangement to the second
connection arrangement, for sensing the digitized voltages
while the winding stages are temporarily unpowered and then
resuming producing the successive patterns of the control
signals in sequence beginning with a pattern of the control
signals determined from the sensed digitized voltages.
In general, and in an additional form of the inven-
tion, a control system for an electronically commutated motor
including a stationary assembly having a plurality of winding
stages adapted to be selectively commutated, and rotatable
means associated with the stationary assembly in selective
magnetic coupling relation with the winding stages, comprises
a circuit for commutating the winding stages by selectively
supplying power thereto in response to a pattern of control
signals leaving at least one of the winding stages unpowered
at any one time while the other winding stages are powered.
Another circuit responds to successive patterns of digital
signals for generating the successive patterns of the control
signals for the commutating circuit. Still another circuit
is provided for producing the successive patterns of the
digital signals in at least one preselected sequence, and for
subsequently producing a different pattern of the digital
signals which causes the commutating means to connect all of
the winding stages together, thereby braking the motor.
In general, and in a further method form of the
invention, a method for controlling an electronically commu-
tated motor including a stationary assembly having a plurality
. "
03AM 5939
l~g*~of ~incin~ staaes adaDted to be selectiveiy commutated, and
r~tatable means associated with the stationarY assemDly in
select;ve magnetic coupling relation with the windinq stages,
and means for commutating the winding s~ages by selecti;ely
suppl~ing power thereto in response to a pattern of control
signals leaving at least one o~ the winding stages unpowered
at any one time while the other winding stages are powered,
comprises the steps of producing successive patterns of the
control signals in at least one preselected sequence for com-
mutating the winding stages in a first connection Irrangementand producing a pattern of the control signals which causes
the commutating means to leave all of the winding stages tem-
porarily unpowered. The winding stages are switched to a
second connection arrangement, and the position of the rotat-
ing means is sensed while the winding stages are temporarilyunpowered. Production or the successive patterns of the con-
trol signals in sequence is resumed beginning with a pattern
of the control signals determined from the position of the
rotating means sensed while the winding stages are temporarily
unpowered.
Generllly, and in still another method form of the
invention, a method for controlling an electronically commu-
tated motor including a stationary assembly having a plurality
of winding stages adapted to be selectively commutated, and
rotatable means associated with the stationary assembly in
selective magnetic coupling relation with the winding stages,
and a circuit for commutating the winding stages by selective-
ly supplying power thereto in response to a pattern of control
signals leaving at least one of the winding stages unpowered
at any one time while the other winding stages are powered,
comprises the steps o~ converting the voltages across the
winding stages to digi~al form thereby to digitize the vol-
tages and producing successive patterns of the control signals
in at least one preselected sequence to commutate the winding
1~937~9 03AM 5939
staces and rotate the r~eatable means. ,~ pattern or the con-
trol si~nals is subsequently produced whicn causes the commu-
tating circuit to leave all of the winding stages temporarily
unpowered. The digitized voltages are sensed while the wind-
ing staqes are temporarily unpowered. ~ patter~ of the con-
trol signals is determined from the sensed digitized voltages.
Production of the successive patterns of the control signals
in sequence is resumed beginning with the pattern so
determined.
Generally, and in yet a further method form o~ the
invention, a method of controlling laundry apparatus compris-
ing means operable generally in a washing mode for agitating
water and fabrics to be laundered therein and operable gener-
ally in a spin mode for thereafter spinning the fabrics to
effect centrifugal displacement of water from the fabri~s, an
electronically commutated motor including a stationarv assem-
bly having a plurality of winding stages adapted to be selec-
tively commutated, and rotatable means associated with the
stationary assembly in selective magnetic coupling relation
with the windina stages for driving the agitating and spinning
means in the washing mode operation and in the spin mode oper-
ation thereof upon the commutation of the winding stages, and
first and second conductors for supplying power. The method
comprises steps of converting the voltages across the winding
stages to digital form thereby to digitize the voltages and
commutating the winding stages by selectively switching the
winding stages to the supply conductors in at least one prese-
lected sequence. The commutating is temporarily interrupted
to leave the winding stages temporarily unpowered, and the
winding stages are switched from a first connection arrange-
ment to a second connection arrangement. The digitized vol-
tages are sensed while the winding stages are temporarily
unpowered, and the commutating is resumed beginning at a point
in the sequence determined from the sensed digitized voltages.
1293789 03AM 5939
In general, ~nd in an even f~rt~er method form of
the i~ention~ a method for controlling an electzonicalli com-
mutatea ,notor including a stationary assemDly having a plural-
ity of ~inding stages aaapted to be selecti~ely commutated,
S and r~tatable means associated with the stationary assemDly in
selecti~e magnetic coupling relation with the winding stages,
and means for commutatlng the winding stages by selectively
supplying power thereto in response to a pattern of control
signals leaving at least;of the winding stages unpowered at
any one time while the other winding stages are powered, com-
prises the steps of generating successive patterns of the con-
trol signals for the commutating means in response to succes-
sive patterns of digital signals and producing the successive
patterns of the digital signals in at least one preselected
sequence. A different pattern of the digital signals is pro-
duced ~hich causes the commutating means t~ connect all of the
winding stages together, thereby braking the motor.
In general, and in a yet additional form of the
invention, a control system for an electronically commutated
motor including a stationary assembly having a plurality of
winding stages Idapted to be selectively commutated, and
rotatable means associated with the stationary assembly in
selective magnetic coupling relation with the winding stages,
and first and second conductors for supplying power, comprises
a circuit for commutating the winding stages in response to
successive patterns of control signals leaving at least one of
the winding stages unpowered at any one time while the other
winding stages are powered. The commutating circuit includes
sets of electronic devices connected across the supply conduc-
tors, each set having a junction point connected to a respec-
tive one of the winding stages. Each of the electronic
devices is respectively able to be switched by a correspondinq
one of the control signals in each pattern of control signals.
1~ ~ 3'~89 03AM 5939
The ~ntrol s~stem incl~_es a circuit for ?.oducing the cuc-
cessi~e patterns of the c~ntrol signals in ae least one prese-
lected sequence to switc.~ on only one elect.onic device in
each o~ at least two of tne sets of the electronic devices at
once and cause a current to flow in the winding stages to
rotate the rotatable means, and for subsequently producinq a
pattern of the control signals to switch orf one Ot the lec-
tronic switching devices which was previously switched on so
that the commutating means leaves all of the winding stages
temporarily unpowered and also provides a current path for the
previously-powered winding stages.
Generally, and in a yet further additional form of
the i~vention, a control system for an electronically commu-
tated motor including a stationary assemblv having a plurality
of winding stages adapteà to be selectively commutated, and
rotatable means associated with the stationary assemDly in
selectiye magnetic coupling relation with the winding stages,
and a circuit for commutating the winding stages by selective-
ly supplying power thereto in response to a pattern of control
signals leaving ~t least one of the winding stages unpowered
at any one time while the other winding stages are powered,
comprises a circuit coupled to the winding stages for simul-
taneously converting the voltages across the winding stages to
digital form thereby to digitize the voltages and a circuit
responsive to successive patterns of digital signals for gen-
erating successive patterns of the control signals for the
commutating circuit. The control system includes a circuit
for producing successive patterns of the digital signals in a
first preselected sequence, producing a different pattern of
the digital signals for causing the commutating circuit to
remove power from all of the winding stages, sensing the digi-
tized voltages while the power is so removed, and producing
successive patterns of the digital signals in a second prese-
lected sequence to rotate the rotatable means in the reverSe
16
lZ~3789
03AM 5939
direction after a predetermined time period has elapsed
subsequent to the last occurrence of a predetermined logic
level in any of the digitized voltages.
Brief Description of the Drawings
FIG. 1 is a block diagram showing a control system
having a high-low speed switching circuit, a commutating
circuit, a power supply, a control signal generator, a micro-
computer, a voltage digitizing circuit, and a current
interrupt and speed controlling circuit with an electronically
commutated motor in a laundry machine according to the
invention;
FIG. 2 is an exploded, perspective view of the main
elements of an electronically commutated DC motor which is
controllable by the control system of FIG. l;
FIG. 3 is a schematic diagram of the high-low speed
switching circuit, the commutating circuit, the power supply
and the motor of FIG. 1;
FIG. 4 is a schematic diagram of the control signal
generator with the microcomputer of FIG. l;
FIG. 4A is a diagram of current flowing in the motor
as a result of commutation in a preselected sequence;
FIG. 4B is four schematic diagrams of circuits
effectively resulting in the commutating circuit of FIG. 1
from different digital signal patterns and corresponding
control signal patterns produced in accordance with the
invention;
FIG. 5 is a voltage versus time diagram of a waveform
of voltage across an unpowered winding stage of the motor
during a commutation period;
FIG. 6 is a schematic diagram of the voltage
digitizing oircuit and of switches for providing commands to
the microcomputer of FIG. 1 according to the invention;
FIG. 6A is a voltage versus time diagram of a
digitized voltage to which the voltage of FIG. 5 is converted
in accordance with the invention;
lZ~3789
03AM 5939
FIG. 7 is a schematic diagram of current interrupt
and speed controlling circuit of FIG. 1 in accordance with the
invention;
FIG. 7A is a voltage versus time diagram of outputs Q
and Q-bar of a latch or flipflop in the circuit of FIG. 7 for
interrupting the microcomputer and causing the control signal
generator of FIG. 1 to generate a pattern of control signals
to reduce the current flowing in the winding stages of the
motor;
FIG. 8 is part of a flow diagram of operations of the
microcomputer of FIG. 1 in accordance with the invention;
FIG. 9 is an additional part of the flow diagram of
operations performed by the microcomputer of FIG. 1 in
accordance with the invention in accomplishing a washing mode
selected in the operations of FIG. 8;
FIG. 10 is a flow diagram of operations performed by
the microcomputer of FIG. 1 in accordance with the invention
in a low speed back emf routine of FIG. 9;
FIG. 11 is a flow diagram of operations performed by
the microcomputer of FIG. 1 in accordance with the invention
in a reversing routine of FIG. 9;
FIG. llA is a flow diagram of operations performed by
the microcomputer of FIG. l in accordance with the invention
for braking the motor as during a reversing routine;
FIG. 12 (appearing on the same sheet of drawings as
FIG. 8) is a flow diagram of operations performed by the
microcomputer of FIG. l in accordance with the invention upon
interruption by output Q-bar of FIG. 7A;
FIG. 13 (appearing on the same sheet of drawings as
FIG. 8) is a flow diagram of operations performed by the
microcomputer of FIG. l in accordance with the invention for
varying a duty cycle for the circuit of FIG. 7;
FIG. 14 is a flow diagram of operations performed by
the microcomputer of FIG. l in accordance with the invention
in accomplishing a spin mode selected in the operations of
FIG. 8;
18
1~3789
03AM 5939
FIG. 15 (appearing on the same sheet of drawings as
FIG. 10) is a flow diagram of operations performed by the
microcomputer of FIG. 1 in accordance with the invention in a
high speed back emf routine of FIG. 14;
FIG. 16 is a flow diagram of operations performed by
the microcomputer of FIG. 1 in accordance with the invention
in advancing in a sequence of commutation and turning off the
motor on command;
FIG. 17 (appearing on the same sheet of drawings as
FIG. 11) is a flow diagram of operations performed by the
microcomputer of FIG. 1 in accordance with the invention in a
relaying routine of FIG. 14;
FIG. 18 (appearing on the same sheet of drawings as
FIG. 8) shows voltage versus time diagrams of waveforms of the
digitized voltages of all of the winding stages when the rotor
of the motor is coasting clockwise or counterclockwise as
during the relaying routine of FIG. 17;
FIG. 19 is a flow diagram of operations performed by
the microcomputer of FIG. 1 in accordance with the invention
for determining a proper point in sequence to begin or resume
commutation when the rotor of the motor is turning, as in the
relaying routine of FIG. 17.
Corresponding reference characters refer to corre-
sponding parts throughout the several views of the drawings.
The exemplifications set out herein illustrate
preferred embodiments of the invention in one form thereof,
such exemplifications are not to be construed as limiting the
scope of the invention in any manner.
Detailed Description of Preferred Embodiments
Referring now to the drawings, and more particularly
to FIG. 1, a laundry apparatus 11 includes an electronically
commutated motor (ECM) M adapted to be energized from a DC
power supply 12 and having (see FIG. 2) a stationary assembly
including a stator 13 and a rotatable assembly including a
permanent magnet rotor 15 and a shaft 17. Stator 13 includes
a plurality (e.g., three) of winding stages Sl, S2 and S3
3789
03AM 5939
(FIG. 3). Winding stages Sl, S2 and S3 have coil sets of
sections SlA and SlB, S2A and S2B and S3B respectively.
Winding stages S1, S2 and S3 are adapted to be electronically
commutated in at least one preselected sequence. Each winding
stage has an end terminal Tl, T2, and T3, respectively, and an
intermediate tap I1, I2, and I3, respectively. The winding
stages Sl, S2, and S3 are adapted to be electronically
commutated at end terminals T1, T2, and T3, so that both coil
sets or sections in each winding stage are commutated, for
turning the rotor 15 at a low speed. It is noted that
sections SlA, S2A, and S3A define tapped sections of the
winding stages which are adapted to be electronically
commutated at intermediate taps Il, I2, and I3 respectively
for turning rotor 15 at a higher speed. When the winding
stages S1, S2, and S3 are energized or powered in a temporal
sequence, three sets of eight magnetic poles are established
that provide a radial magnetic field that moves clockwise or
counterclockwise around the bore of stator 13 depending on the
preselected sequence or order in which the stages are powered.
This moving field intersects with the flux field of the
permanent magnet rotor to cause the rotor 15 to rotate
relative to the stator 13 in the desired direction to develop
a torque which is a direct function of the intensities or
strengths of the magnetic fields. If a more detailed
description of the construction of electronically commutated
motor M is desired, reference may be had to the aforementioned
Canadian Patent No. 1,193,651 to John H. Boyd, Jr.
ECM M thus constitutes an electronically commutated
motor including a stationary assembly having a plurality of
winding stages adapted to be selectively commutated, and
rotatable means associated with the stationary assembly in
selective magnetic coupling relation with the winding stages.
03AM 5939
12~137~39
~urther, ~hile electronically commutated motor M is illus-
trated herein for purposes of disclosure, it is contemplated
that o~her such motors of different constructions, having 2,
4, 6, etc. poles and having 2, 3, 4 or more winding staqes
and/or different winding arrangements may be utilized in one
or another form of the invention so as to meet at least some
of the objects thereof.
The winding stages of motor M as explained for
instance in the aforementioned Alley U.S. patent 4,250,544 are
commutated without brushes by sensing the rotational position
of the rotatable assembly or rotor 15 as it rotates within the
bore of stator 13 and utilizing electrical signals generated
as a func~ion of the rotational position of the rotor to
sequentially apply a DC voltage to each of the winding stages
in different preselected orders or sequences that determine
the àirection of the rotation of the rotor. Position sensing
may be accomplished by a position detecting circuit responsive
to the back emf of the EC~ to provide 2 simulated signal
indicative of the rotational position of the ECM rotor to con-
trol the timed sequential application of voltage to the wind-
ing stages of tne motor
Referring back to FIG. 1, laundry apparatus 11 also
has a basket 23 which is rotatable within a tub (not shown)
which holds the water for washing the fabrics to be laundered,
and a coaxially mounted agitator 25, both of which are rotat-
able independently or jointly about their common axis. Agi-
tator 25 and basket 23 together comprise means operable gener-
ally in a washing mode for agitating water and fabrics to be
laundered therein and operable generally in a spin mode for
thereafter spinning the fabrics to effect centrifugal dis-
placement of water from the fabrics. However, it is contem-
plated that such means may also include only a basket which is
mounted on a horizontal or inc~ined axis and there is no sepa-
rate finned agitator ~ut the basket is operated in an oscilla-
tory mode to agitate t~e wash water and fabrics to launder
03A~1 5939
12~3'7~`~
t~em- ;?on the commuta.lon of the winding stages, ~he rotat-
able assembly of motor ~I drives the agitatin~ and spinning
means and is coupled selectively to the agi.ator alone during
the washing mode operation and to both the basket and the agi-
tator in the spin mode oDeration through a connection mecha-
nism 27 which suitably comprises a fixed ratio speed reducer,
such as a gear box or a pulley arrangement, for instance, or
in some applications, the shaft 17 of motor M can be directly
coupled to the agitator and the basket. The rotatable assem-
bly of motor M and any such fixed ratio speed reducer consti-
tute means for driving the agitating and spinning means in the
washing mode operation and in the spin mode operation thereof
upon the commutation of the winding stages.
Commutating circuit 31 is provided with power from
?ower suDply 12 and constitutes means for commutating the
winding stages by selectively supplying or switching power
thereto in response to a pattern of control signals 32 leaving
at least one of the winding stages unpowered at any one time
while t.~e other winding stages are powered. Commutating cir-
cuit 31 also corstitutes means for controlling the applicationof DC ~oltage t~ the winding stages to provide a resultant
effective voltage thereto.
A high-low speed switching circuit 41 couples commu-
tating circuit 31 to motor M, and constitutes means operable
generally for switching the winding stages from a first con-
nection arrangement (connecting each of winding stages Sl, 52,
S3 as a whole through terminals Tl, T2, and T3 to commutating
circuit 31) to a second connection arrangement (connecting the
coil sections SlA, S2A, and S3A of the winding stages Sl, S2,
and S3 through terminals Il, I2, and I3 to commutating circuit
31). In the present em~odiment the first connect~on arrange-
ment is a low speed connection arrangement and the second con-
nection arrangement is a higher speed connection arrangement.
It is to be understood that other connect on arrangements
22
lZ93789
03AM 5939
involving two or more speeds, or not involving speed
considerations at all are contemplated in the practice of the
invention for accomplishing the objects thereof. High-low
speed switching circuit 41 is responsive to a High on line H
for relaying the winding stages from the low speed connection
arrangement to the high speed connection arrangement and
responsive to a Low on line H for relaying the winding stages
from the high speed connection arrangement to the low speed
connection arrangement.
Commutating circuit 31 responds to a set of six
control signals, collectively designated 32 and individually
designated A+, A-, B+, B-, C+, and C-, from a control signal
generator 51. Since each of the control signals A+, A-, B+,
B-, C+, and C- can be high or low, there are 26 or 64
lS permutations or patterns of the control signals. Control
signal generator 51 constitutes means responsive to successive
patterns of digital signals 52 for generating successive
patterns of the control signals 32 for the commutating circuit
31.
A microcomputer 61 in FIG. 1 produces successive
patterns of the digital signals 52 in at least one preselected
sequence, which causes the control signal generator 51 to
produce successive patterns of the control signals 32 in the
at least one preselected sequence and in turn cause the motor
M to be commutated in the at least one preselected sequence by
the commutating circuit 31 to make the rotor 15 turn. The
direction of rotation which results is clockwise when a first
preselected sequence is used, and counterclockwise when a
second preselected sequence is used.
In the preferred embodiment disclosed herein, micro-
computer 61 is an Intel 8748 microcomputer having lK bytes of
user programmable and erasable read only memory (EPROM), an 8
bit central processing unit (CPU), 27 input/output (I/O)
lines, an 8-bit timer counter, reset and interrupt capability,
and an on-board oscillator and clock. The instruction set for
03AM 5939
1293~
the 8748 is set forth in ~1CS-~8 (~! F2milv ~ Sinqle ~hi~
~icroc~m~uters ~ser~s M2nual, Intel Corporation, Santa Clara,
California~ September, '981, ~ages 4-5, in addition to other
technical information. Since the im?lement~on and use o~
microcomputers as a general matter is well known to the person
skilled in the art, the details of the 8748 are omitted for
brevity. The microcomputer 61 is shown as a rectangle in
several of the ~igures with only those pin designations for
the 8748 shown for connections involved in the operations and
circuits of any given Figure, all other pins in a given Figure
being suppressed for clarity. It is to be understood that the
8748 is but one example of a digital computer which can be
utilized in the practice of the invention. In addition, it is
contemplated that the f~nctions of the microcomputer illus-
trated in the drawings can be alternatively implemented in thepractice of the invention by any appropriate means, including
but not limited to digital or analog circuits of a variety of
types whether operating from a stored program, utilizing firm-
ware, or being implemented in hardware, in custom or semi-
custom integra~d circuit form or having discrete components.
A vo'tage digitizing circuit 71 is coupled to thewinding stages and receives their terminal voltages Va,
Vb, and Vc through high-low speed switching circuit 41 and
constitutes means for simultaneously converting the voltages
across the winding staces to digital form thereby to digitize
the voltages. Digitizing circuit 71 also constitutes means
for generating a first logic level when the voltage across a
respective winding stage exceeds a predetermined value and a
second logic level when the voltage across it falls below the
predetermined value, the digital form of the voltage across
each respective winding stage comprising the logic levels so
generated. Digitizing circuit 71 has outputs A, B, and C
which are connected to corresponding inputs of microcomputer
61.
24
03AM 5939
1Z93'7~9
;~icrocom~uter 51 or FIG. 1 constituteS means for
?rd~cinq successive patterns of digital signals in at least
~ne preselecteà sequence, for selecting the digitized voltage
across the at least one unpowered windina staae dependirg on
~he digital signal pattern produced, and for producing a fol-
lowing pattern in se~uence after at least one predetermined
logic level of the selected digitized voltage has occurred.
In the preferred embodiment the following pattern in sequence
is produced after complementary logic levels of the selected
digitized voltage have occurred in a predetermined order
depending on the pattern which is being produced. ,~icrocom-
puter 61 is a digital computer operating under stored program
control and having inputs for the digitized voltages on lines
~, B, and C. ~icrocomputer 61 has memory elements for storing
data representing at least one preselected se~uence of the
patterns of the digital signals and for storir.g data, corre-
sponding to each pattern of the digital signals, identifying
the respective input for the digitized voltage for the at
least one unpowered winding stage. ~icrocomputer 61 succes-
sively producec one of the patterns of the digital signals,senses only the digitized voltage at the indentified input
corresponding to the one pattern and produces the following
pattern in sequence after at least one predetermined logic
level of the digitized voltage at the identified input has
occurred. ~hen the motor ~l is first being started, there is
no back emf to digitize until the rotor 15 begins to rotate.
For this reason, microcomputer 61 operates to produce the fol-
lowing pattern in~sequence after a predetermined time period
if the at least one predetermined logic level of the selected
digitized voltage has not occurred during the predetermined
time period. Then as soon as the rotor 15 begins to turn, the
following pattern is produced in se~uence in response to the
digitized voltage and the successive patterns are effectively
synchronized with the rotor and accelerate the rotor to an
operating speed.
03AM 5939
3~9
Current inter.upt and speea controlling circuit 81
compareS the current ~lowing in the other poweced winding
stages o~ the eiectronically commutated motor M with a prede-
termineà level ~ sensing a voltage ~JI proportional to the
current on line 83, and upon the level being exceeàed, inter-
rupting microcomputer 61 on line 85 and sending a signal Q on
line 37 for causing the control ~ignal generator 51 to gener-
ate a pattern of control signals 32 to reduce the current.
In FIG. 3 power supply 12 has diodes 101, 103, 105
and 107 connected as a full wave bridge rectifier for 117 volt
single phase AC power received at plug 109. Full wave recti-
fied DC is filtered by capacitor 111 and applied as voltage
across ~irst and second conductors 1}3 and 115 for supplying
DC power to com~utating circuit 31 and motor M. A voltage
drop V; is developed across shunt resistor R5 proportional
to the current from power supply 12 which is flowing in the
motor ~t.
Commutating circuit 31 is composed of three identi-
cal switching circuits 121, 123, and 125 which selectively
switch the winding stages to supply conductors 113 and 115
leaving at least one of the winding stages unpowered at any
one time while the other winding stages are powered. For con-
ciseness only switchinc circuit 121 is described in further
detail.
Switching circuit 121 has a set or pair o~ series-
connected upper and lower electronic devices 127 and 129 con-
nected across the supply conductors 113 and llS. The pair of
devices 127 and 129 has a junction point 131 connected through
high-low speed switching circuit 41 to winding stage Sl in the
connection arrangement selected by high-low speed switching
circuit 41. ~witching circuits 123 and 125 are respectively
connected to winding stages S2 and S3 similarly.
The switching circuits 121, 123, and 125 each con-
stitute sets o~ electrcnic devices connected across supply
37 conductors 113 and 115, each set having a. least one junction
lZ93789 03AM 5939
point c~nected to a respective one of the winding stages
Each o. .he electronic devices, e.g., 127 and 129, is able to
be Switched by a corresponaing one of the control signals in
each pattern of control signals 32 For instance, when con-
trol signal A+ is high, transistors 133 and 135 turn on tran-
Sistor 137 in electronic device 127. ~1hen control signal Ais
high, .ransistors 139, lÇl, and 143 turn on transistor 145 in
electronic device 129. When transistor 137 is on in elec-
tronic device 127, and a relay 147 in high-~ow speed switching
10 circuit 41 is set as shown in FIG. 3, then winding stage 51
terminal Tl is effectively switched to supply conductor 113.
When transistor 137 is off in electronic device 127 and tran-
sistor 145 is on in electronic device 12g, winding stage Sl
terminal Tl is switched to supply cond~ctor 115.
It is evident that when a control signal A+, ~+, or
C+ is High, a corresponding winding stage Sl, S2, or S3 is
switched to supply conductor 113, and when a control sign~l
A-, B-, or C- is High, a corresponding winding stage Sl, S2,
or S3 is switched to supply conductor 115.
Relay 147 in High-low speed switching circuit 41 has
three-pole-dou~,le-throw (3PDT) contacts for electrically sub-
stitutinq sections SlA, S2A, and S3A of the winding stages Sl,
S2, and S3 in place of the winding stages as a whole The
winding stages are connected together at neutral N. Relay 197
is driven by transistor 149. Transistor 149 is protected by
base resistor 151 and freewheeling diode 153. When a Hign
appears on line H, transistor 149 conducts, closing re}ay 147
and moving relay armature 155 upward from the Low Speed posi-
tion shown to a High Speed position, which accomplishes the
substitution o~ the high speed winding sections SlA, 52A, S3A
in place of the winding stages 51, S2, S3 and thereby selec-
tively electrically energizes at least one of the winding sec-
tions SlA, S2A, S3A of each winding stage Sl, S2, 53 to effect
lZ~37~9 03AM 5939
^ommuta-lon~ `hen relavina ~om low tO hign s~eea is to
o_cur, icrocomputer 61 outputs a Low on line DB6, ~hich is
invertea bv ~TAND-gate 157 and fed as the ~iah on line H.
Lines marked for voltages Va, V~, and Vc are
connecte~ to relay armature 155 to allow sensing of voltages
on terminals Tl, T2, T3 or Il, I2, I3 for each winding stage
as selected by relay 147. The Va, Vb~ Vc lines are con-
nected to the voltage digitizing circuit 71 as shown in FIG. 1.
In FIG. 4, control signal generator 51 generates
successive patterns of highs and lows for control sianals 52
on the lines respectively marked for each control signal
A+lA-~B+rB-~c+~ and C- which are fed to the correspondingly
marked inpNts of commutating circuit 31 of FIG. 3. The suc-
cessive Datterns of the control signals are Droducea in
response to successive patterns of digital signals produced by
~icrocomputer 61 on lines 62.
Control signal generator 51 acts in the preferred
embodiment as a protective device and switching means for
pulse width modulation. If a pair of the control signals hav-
ing the same l~ter designation, such as A+ and A-, were both
high simultaneo~sly, electronic devices 127 and 129 o FIG. 3
could short the supply conductors 113 and 115. Microcomputer
61 is capable of producing patterns of digital signals at
extremely high rates, and an undesired pattern of control sig-
nals such as A+,A- high s~ould not be permitted to occur over
an extended period of operation. Control signal generator 51
is hardwired logic circuitry which constitutes means for pre-
venting control signa1 patterns such as A+,A- high from being
generated regardless of the patterns of digital signals pro-
duced by microcomputer 61.
Control signal generator 51 has three identicalprotective circuits 161, 163, and 165. For conciseness, only
protective circuit 161 is described in detai}. Protective
circuit 161 has first and second AND-gates 157 and 169 feeding
control signals A+ and A- to the sets of electronic devices
28
~Z937~9
03AM 5939
127 and 129. AND-gates 167 and 169 have inputs 171 and 173
driven by a respective pair of digital signals through
inverting buffers 175 and 176 from port P2 lines 0 and 3 from
microcomputer 61. Corresponding AND-gates in protective
circuits 163 and 165 respectively feed control signals B+,
Band C+, C- to switching circuits 123 and 125 in FIG. 3.
These corresponding AND-gates in protective circuits 163 and
165 have their own inputs driven by digital signal pairs
through inverting buffers 177,178 (port P2 lines 2 and 5) and
inverting buffers 179,180 (port P2, lines 4 and 1)
respectively.
Exclusive-OR gate 183 has inputs connected to the
inputs of AND-gates 167 and 169 driven by a pair of the
digital signals. Exclusive-OR gate 183 has its output feeding
both AND-gates 167 and 169 for disabling them when the pair of
digital signals on lines 0 and 3 of port P2 identical logic
levels in the pair. Exclusive-OR gates corresponding to gate
183 in protective circuits 163 and 165 are identically wired
so that no pair of the control signals 52 having the same
letter designation can become high simultaneously. In this
way the contingency of control signals occurring which could
short the power supply is prevented, and reliability is
enhanced.
Control signal generator 51 thus constitutes means
for preventing at least one pattern of control signals 52 from
being generated regardless of the patterns of digital signals
on lines 62 produced by microcomputer 61.
Microcomputer 61 produces an additional pair of
digital signals, which are different an logic level from each
other, on lines 7 and 6 of port P2 which respectively feed
NAND gates 185 and 187. A disabling input Q on line 87 is
provided to both NAND gates 185 and 187 when power is to be
removed from the winding stages. In this way NAND-gates 185
and 187 constitute means for disabling in response to disabl-
ing signal Q a single one of the NAND-gates 167 and 169 in
lZ937~9
03AM 5939
each of the protective circuits 161, 163, and 165. The NAND-
gate 167 or 169 to be disabled in each protective circuit is
effectively identified by the additional pair of digital
signals on lines 7 and 6.
The control signal patterns during commutation are
normally the logical complements of the digital signal
patterns on lines 0-5 from port P2. FIG. 4A illustrates
currents 190 being caused to flow in motor M in the low speed
connection arrangement in a preselected sequence 190.0, 190.1,
190.2, 190.3, 190.4, 190.5 in response to successive patterns
of the control signals 52. Terminals Tl, T2, and T3 of motor
M are selectively switched to "+" supply conductor 113 of FIG.
3 and to "-" supply conductor 115 depending on the direction
of desired current flow indicated by the current arrows in
FIG. 4A. For instance, the first current 190.0 in the
seguence is to flow inside motor M from terminal Tl to
terminal T3. Terminal Tl is switched to "+" conductor 113 by
A+ high, and terminal T3 is switched to "-" conductor 115 by
C- high. Next, current 190.1 is produced by keeping C- high,
returning A+ low to disconnect terminal Tl, and bringing B+
high to connect terminal T2 to "+" conductor 113. Next,
current 190.2 is produced by keeping B+ high, returning C-
low, to disconnect terminal T3, and bringing A- high to
connect terminal Tl to "-" conductor 115. The sequence is
continued to produced currents 190.3, 190.4, and l90.S and
then repeated beginning with current 190.0 again. It is seen
that during commutation at least one of the winding stages is
unpowered at any one time while the other winding stages are
powered by application of the current in sequence through
selective switching.
Table I has columns corresponding to each point or
current step in the preselected sequence just described above.
Currents 190.0-190.5 in FIG. 4A correspond to the columns of
control signals shown in Table I in order from left to right
and indexed from O through 5 therein. The control signals
03AM 5939
12~3~39
esult ~ ~loc~ise rotati~n o~ t~e rotatable assemDly o~
~otor ; when a?plied in t~.e preselected sequence of Table I.
Counter-l~ckwise rotation is obtained by applying the control
Signais in a second preselected sequence snown in Table lI
:~hich is the reverse of ~e sequence o~ Ta~le I. The column
entries for the control signals of Table II are seen to be the
same when read fr~m right to left as the column entries of
Table I read from left to right.
In FIG. 4 the control signals 52 are normally the
complement of the digital signals on lines 0-5 of port P2 of
the microcomputer 61. Tables I and II summarize the relation-
ship o~ the digital signals to the control signais in each
column. The first eight rows of each ~able show the outputs
for each digital signal pattern in sequence from each P2 port
line from 7 down to zero. It is seen that in lines 5 through
zero there are exactly two lines in any one column which are
logic zero, or low. For example, in the left-most column in
the sequence in Table I, these two lines are lines 1 and 0.
By inspection of FIG. 4, lows on lines 1 and 0 are inverted by
invert~ng buffers 175 and 180 and bring control signals A+ and
C- high throug~ protective circuits 161 and 165. Table I,
left-most column, also shows control signals A+ and C-
tabulated at this point in the sequence. Comparison of the
rest or the columns of Tables I and II with FIG. ~ demon-
strates the preselected sequences of digital signal patternscorrelated with control signal patterns for clockwise and
counterclockwise rotation.
The digital signal pat~erns and control signal pat-
terns are here recognized as signifying directives produced by
microcomputer 61 and control signal generator 51 for motor M.
The directives are not only used for commutation in clockwise
and counterclockwise directions but for other operations of
motor M.
lZ937~9 03AM 5939
F~G. .a iilustrates interpretations of some o~ the
digital and control sianai ?atterns by showlng corresponding
eauivalent circu1ts in t~.e electronic àevices 127 and 129 o~
switching circuits 121, i23, and 125 of FI5. 3.
When microcom~uter 61 produces all ones on lines 0
througn 7, (11111111 binary which is FF hexadecima_), a con-
trol signal pattern consisting of all Lows i5 generated by
Control signal generator 51. Commutating circuit 31 has tran-
sistors 137 and 145 off in each switching c rcuit 121, 121,
and 125 and motor ~ is turned off. Only freewheeling diodes,
such as diode 197 in electronic device 127 and its counterpart
in electronic device 129 of FIG. 3, appear 25 shown in FI~. 4B
in the equivalent circuit.
The motor .'l is effect-Yely braked when the rotor is
spinning, by connecting all of the winding s.ages together.
In FIG. 4B this is acccmplished by bringina A+, B~, and C+
high, corresponding to control signals 101010 and digital sig-
nals 10010101. ~he electronic device 127 in FIG. 3 in each of
switching circuits 121, 123, and 125 becomes conductive and
the winding stages of motor M are all tied to the positive
supply conducto.- or rail 113. Mechanical energy in motor ~1 is
rapidly dissipated, braking the rotatable assembly lS of FIG.
2. It is to be noted that a complementary braking pattern
(not s;~own) brings A-, 3-, and C- high when A+, 3+, and C+ are
low.
As already discussed in connection with Tables I and
II, two of the windings in a wye-connecteà motor are powered
at any one time, leaving the third unpowered, by bringing two
control signals high in two of the switchinq circuits 121,
123, and 12S of FIG. 3. In F~G. 4B, for illustration, control
signals a+ and A- are brought high, causing current I to flow
from voltage V through an upper transistor turned on by
control signal B+ through two winding stages of motor ~ and to
ground through a lower t.ansistor turned on by control signal
A-. Different "Commutate" patterns are applied in at least
lZ~3789
03AM 5939
one preselected sequence to rotate the rotatable assembly in a
predetermined direction.
When the Commutate patterns are applied, at least one
of the winding stages is unpowered in sequence (see FIG. 4B)
while the other winding stages are powered in sequence. FIG.
5 illustrates the voltage behavior across an unpowered winding
stage from a terminal thereof to neutral N during a
commutation period when the other winding stages are powered.
Initially a voltage 191 having a high magnitude
occurs because of the collapsing field of the unpowered
winding resulting from its having been previously powered in
the sequence. Field collapse voltage portion 191 dissipates,
revealing a ramp-shaped back emf 195 induced in the winding by
virtue of the rotation of rotatable assembly 15. Back emf 195
is useful for position sensing of the rotatable assembly 15,
while field collapse voltage 191 is not believed to be so
useful for position sensing~
The position of the rotor 15 is able to be monitored
as it is coasting, by allowing "half" of an electronic
switching device to be connected to "half" a winding stage, by
turning off one of the two electronic switching devices which
would otherwise be both on. Then the proper pair of
electronic switching devices is turned on, as dictated by the
present rotor position (and not by the position when the power
was turned off), and the ECM M continues normal operation.
In FIG. 4B a pattern herein called a "Monitor"
pattern is temporarily applied to eliminate the field collapse
voltage 191 and reveal the back emf 195 sooner. A single one
of the control signals, e.g., B+, is kept high while a
previously high control signal, e.g., A- from the Commutate
pattern, is brought low. The current I freewheels through the
B+ transistor and diode 197 and the voltage at neutral N rises
from about half the supply voltage V to essentially the full
supply voltage V. The unpowered winding stage in FIG. 4B has
lZ937~9
03AM 5939
a current flowing therein when the field collapse voltage 191
of FIG. 5 is occurring. When the other winding stages are
being powered by the commutating circuit 31 in response to a
Commutate pattern of control signals B+ and A- as shown, the
unpowered winding stage temporarily has current 198
circulating through the system as shown and transferring
energy from its magnetic field to the rest of the system at a
moderate rate because the voltage at neutral N is about half
of the supply voltage V. When a monitor pattern for a fast
rate of energy extraction is applied as shown, for example by
turning off control signal A- and thereby removing its
transistor from the circuit, the current in the unpowered
winding stage, now designated 199, must release its energy
into the full voltage of the power supply 12 through diode
197, thereby transferring energy away from the unpowered
winding stage at a much faster rate. In this way, temporary
application of a monitor pattern as shown in FIG. 4B
eliminates the field collapse voltage 191 of FIG. 5 and
reveals the back emf 195 sooner.
It is also recognized that a monitor pattern for slow
rate of energy extraction exists when control signal A is kept
on and control signal B+ is turned off, thereby removing the
B+ transistor and keeping the A- transistor. Then current I
freewheels through ground (conductor 115) and the voltage of
neutral N i~ brought near ground potential (not shown in FIG.
4B), resulting in a relatively slow rate of energy extraction
for current 198. Since in some of the contemplated applica-
tions of the invention, the control signals such as A- or B+,
are pulse width modulated as a result of the disabling signal
Q of FIG. 4 or by means of microcomputer 61 directly, the rate
of energy extraction is of interest and can be chosen, for
instance, between fast and slow by the proper selection of the
monitor patterns for achieving at least some of the objects of
the invention.
34
03AM 5939
12937~9
It is conte~plated that the various digLtal signal
patterns and control slgnal patterns be applied as directives
to an electronically commutatea motor M in any sequence or
order, so as to accomplish at leas~ some of the objects of the
invention.
The voltage behavior (see FIG. ~ across the
unpowered winding stage during a commutation period is
inverted in polarity compareà to the voltaae across the wind-
ing stage which was unpowered in the next ?revioùs commutation
period. Accordingly, FIG. S shows but one example of volta~e
behavior across an unpowered winding staqe, and it is to be
noted that the bac~ emf l9S a?proaches the zero level from
opposite directions in successive commutation periods. !~
other word5, in one commutation period the back emf 1~5 ramps
lS up as shown, and in the next commutation period the back e~f
195 ramDs down with inverted polarity com~arec to FIG.
In FIG. 3, terminal voltages Va, Vb, and V
for the winding stage terminals selected by relay 147 are all
available. Microcomputer 61 automatically and correctly
selects the vo tage for the unpowered winding stage by looking
up an identifi_ation corresponding to the unpowered winding
stage in a table relating the point in the sequence of commu-
tation to the identification of the unpowered winding stage.
The relationship, or function, is different for clockwise and
counterclockwise rotation.
In a further feature the voltages across the winding
stages are simultaneously converted by circuit 71 to digital
form thereby to digitize the voltages. As shown in FIG. 6,
the digitizing is accomplished with the use of voltage compar-
ators 201, 203, and 205. Comparators 201, 203, and 205 eachhave noninverting (+) and inverting (-) input terrinals for
accepting signals to be compared. and when one signal falls
below the other at a given comparator, ,he output of the
respective comparator ~hanges state. The noninverting input
1Z~33~89 03AM 5939
erminais of t;e comparators 201, 203~ and 205 are res~ective-
Iy coupled by three voltage dividers having resistors 207,209,
211,213; and 215,217 to the the respective winding stages via
the li~es 206 bearing terminal voltages Vc, ~, and Va,
~he voltage dividers are equal in their voltage division
ratio. The inverting in?ut terminals of the comparators are
coupled by direct connection to a network of resistors 219,
221, 223, 225 for synthesizing a neutral ~!' from the voLtages
available from the voltage dividers having resistors 207,209;
211,213; and 215,217. The resistor network constitutes means
for providing a voltage corresponding to the neutral N of the
winding stages in FIG. 3. The output terminals C, B, and A of
comparatorS 201, 203, and 205 are respectively coupied to port
Pl input lines 2, 0, and 1 of microcomputer 61 and provided
l; with pullup resistors collectively designateà 227. It is
noted ~hat the neutral `.~ can be directly brought to the cir-
cuit o FIG. ; without use of the resistor network for synthe-
SiZing a neutral and that a variety of circuits for digitizing
the voltages can be utilized for achieving at least some of
the objects of the invention.
Because of the voltage dividers 207,209; 211,213;
and 21S,217 each comparator 201, 203, and 205 respectively
sees at its noninverting input terminal a voltage proportional
to a terminal voltage ~ia~ Vb~ and Vc of a respective
2S winding stage Sl, S2, cnd S3. Each comparator at its invert-
ing input terminal sees the voltage VNI which is proportion-
al with the same constant of proportionality to the voltage
VN of the neutral N. ~he constant of proportionality is
then effectively disregarded in the comparing process. Each
of the comparators generates a first logic level (one) when
the voltage Va - VN~ Vb - VN~ or Vc N
respective winding stage exceeds a predetermined value of zero
(i.e. when the voltage across a respective winding stage is
positive) and generates a second logic leYel when the voltage
36
~ 3~ ~9 03AM 5939
~cro5a ;z ~alls below r;~ ~re~e~ermrnea vai~e or ~ero (i.e.
~hen t:~e voitage across a respective winaing stage is
negativel.
Where it is cesired to provide a voltage offset such
as by aijustment of the value of resistor ~,9 or by other
means, it is to be understood that the predetermined voltage
~alue departs from zero.
The voltage digitizing circuit of FIGS. 1 and 5 thus
consti~uteS means for providing a voltage corresponding to a
neutral for the winding stages and further includes a plural-
ity of comparators each having an output and first and second
input terminals, the first input terminals being respect~vely
coupled to the respecti~e winding stages, ~he second input
terminals being coupled to the neutral voltage means, the out-
put terminals being resoectiveiy coupled to the inputs of thedigitai computer (microcomputer 61).
The digital form of the voltage across each respec-
tive winding stage comprises the logic levels so generated at
outputs C, B, and A. rIG. 6A illustrates a digitized voltage
at output B corresponding the analog voltage Vb - VN of
FIG. S. The d gitized voltage in FIG. 6A begins high during
the field collapse voltage 191, goes low when the field col-
. lapse voltage 191 ends, and then goes back high as soon aszero crossing 229 occurs. It is to be understood that in the
~ollowing commutation Deriod, the voltage oehavior shown in
FIG. 5 is inverted in polarity, so that the digitized voltage
corresponding to FIG. 6A for the unpowered winding in the fol-
lowing commutation period is the logical complement of the
pulses shown in FIG. 6A. In either event a transition 230
occurs in the digitized voltage of FIG. 6A substantially
simultaneous ~ith zero crossing 229 and corresponding to a
speci'ic physical position of the rotatable assembly 15 in
relation to the poles of motor M. In the Dreferred e~bodi-
ment, the zero crossing 229 is used to trigger the beginning
1~937~9
03AM 5939
of the next commutation period by causing microcomputer 61 to
advance in the sequence of commutation and produce a following
pattern of control signals.
Referring again to FIG. 5, microprocessor 61 is
provided with a set of switches 231.1-231.9 for providing the
Commands indicated in FIG. 1. Switches 231.1-231.9 are
provided with pullup resistors collectively desi~nated 233 and
are respectively connected to lines 3,~,5,6,7 (in Port Pl) and
lines DB0, DBl, DB2, and DB3. One or more of switches
231.1-231.9 are incorporated in user-operable mechanisms of
any familiar type on laundry apparatus 11 which accomplish
laundering of different types of fabrics by washing, rinsing,
and spinning the fabrics with different temperatures of water
and by executing the various operations of the laundry
apparatus for different lengths of time. Switches for
operations which are relevant to controlling an electronically
commutated motor M in laundry apparatus 11 are discussed
below.
ON/OFF switch 231.5 is used to signal microprocessor
61 to tell it whether the laundry apparatus is to be on or
off. This switch 231.5 is suitably polled every six
commutations, or each revolution of the motor. Reception of a
logic 0 at line 7 of port Pl indicates the Off condition.
Line 7 is polled continuously when line 7 is low. When line 7
goes high, the microcomputer 61 commences operations to run
the motor M.
WASH/SPIN switch 231.4 provides a logic level on line
6 of port Pl by which microcomputer 61 determines whether a
washing or spinning mode is called for.
CW/CCW rotational direction switch 231.3 provides a
logic level on line 5 of port P1 for setting the direction of
rotation of motor M in the SPIN mode. Microprocessor 61
utilizes this direction information in determining whether a
preselected sequence of digital signal patterns should be
produced for clockwise rotation or another preselected sequence
38
1~93'~9 03AM 5939
_ho~ e prod~cea for ~unterclockwise rotation. ~n some
e~bodi ents the settin9 o~ the C~/CC~ switca 231.3 is i~nored
by micr~computer 61 when the ~ASH/SPIN switch 231.~ is set to
WASH.
5/250 REV switch 231.2 provides a logic level on
line ~ of port Pl. This switch 231.2 is used when microcom-
puter 61 counts revolutions of the rotatable means 15 b~
counting successive patterns of digital signals produced. A
revolutlon counter in microcomputer 61 is s_t to 5 when the
switch 231.2 is set to the "5" position, as for setting the
number of revolutions of motor M in a washing mode of a
center-pOst-a9itator-type laundry apparatus. When an 8:1
speed reducer is used with motor M, a stroke of agitation of
less than one revolution results in the laundry apparatus.
The revolution counter .s illustratively s~t to 250 by switch
231.2 Cor setting the number of revolutions to be simila!ly
reduce~i in a washing mode of tumbler-type laundry appa~atus.
HI/LOW SPEED switch 231.1 is connected to line 3 of
port Pl, and is usable, for instance, to indicate when micro-
computer 61 is to issue a signal on line D36 for controllingHigh-low speed switching circuit 41 of FIG. 1.
Switches 231.6, 231.7, 231.8 and 231.9 are able to
be utilized for other control functions as desired by the
skilled worker. ~or instance, if the SPI~ mode is selec~ed on
switch 231.4, these switches are suitably used to provide
logic levels on lines DB0-DB3 which determine the maximum
speed to which the ECM M accelerates. The motor is caused to
accelerate or decelerate to the speed selected at a maximum
rate preestablished in memory. A value is suitably selected
from a table stored in the microcomputer 51 to determine the
desired elapsed time between commutations and therefore the
maximum speed. Power to the motor is pulse width modulated
with adjustable duty cyc}e to accelerate as fast as possible
without exceeding a maximum motor current level to the
39
~937~9 03AM 5939
~elec~ea s~ee~ l~vel. ~icroco~puter 61 can aiso be programmed
to execu~e dynamic brakina to zero motor s?eed when the lines
D30-DB3 are all low.
In further control functions obtainable with the
awitches 231.6-231.9, ,icrocomputer 61 interprets any one of
16 possible settings or the four switches as instructions for
amplitudes and waveshaoes of agitation soeed profiles (effec-
tive volta~e to motor ~1) or torque profiles (current in motor
~I) when s~itch 231.4 is in the WAS~ position.
In FIG. 6, hexadecimal numbers are set off in quotes
and marked inside the rectangle symbolizing microcomputer 61
to identify the lines 0-7 of port l when microcomputer 61
selects or "masKs~ the port to read the logic level on a given
one of t.~e lines. It is noted that each of the hexadeci,,al
1~ numbers 01,02,04,08,10,20,40,80 in binary notation is all
zeros except for a "1" in a bit position corresponaing to the
number of its respective line. When the hexadecimal number is
ANDed with the logic leve}s of the lines in an accumulator
register (not shown) of microcomputer 61, only the logic
level, if a one (1), of the line signified by the hexadecimal
number remains in the accumulator. When it is desired to mask
the port for a multiple number of lines such as lines 0,1, and
2 to determine whether any of the lines is active, the masking
number ALLHI = 07 (00000111) is ANDed with the logic levels of
the lines in the accumulator.
~ eferring again to Tables I and II, each of the
digital signal patterns and control signal patterns in the
sequence is identified by values of an index in the row marked
INDEX, Another index row is designated I~SDEXR to correlate
with the flow diagrams discussed below in connection with
FIGS. 9,11,14,16, and 19. The INDEXR row has entries which
are distinct to each pattern in the sequence and different for
Table I and Table II, so that a given pattern is uni~ue}y
identified for clockwise and counterclockwise rotation.
lZ93789 03AM 5939
In T~bles I ana II, ;;~e hexadeci al value for "ask-
ing ~.t Pl a~d thereDv selecting the digitized voitage across
the 2t least one unpowe~ed winding stage is tabulated in the
row "~igitized Voltage ~lask. n The mask number depends on, and
is a function of, INDEX and therefore also depends on and is a
funct~on of the digital signal pattern produced by microcom-
puter 61. The comparator 201, 203, 205 output desiqnation A,
~, or C which is selected is also entered for mnemonic pur-
poses in Tables I and II ~eneath the hexadecimal mask number.
Microcomputer 61 outputs a pattern of digital sig-
nals from a column in Tab~e I when clockwise rotation is
selected on switch 231.3 of FIG. 6. The next pattern of digi-
tal signals is produced by incrementing INDEX after comple-
mentary logic levels are sensed on the masked line from the
unpowered winding stage. The complementary logic levels which
microcomputer 61 seeks depend on the point its operations have
reached in the sequence, so the logic levels are tabulated in
the row "Test Bit Order~' in Table I as a function of INDEX.
For example, assume that INDEX is zero, and microcomputer 61
has just produced the àigital signal pattern 01111100 causing
control signal; A+ and C- to go high. Then microcomputer 61
masks port Pl with "01" to obtain only the B output from the
comparators corresponding to winding stage S2. As shown in
FIG. 6A, microcomputer 61 senses the digitized voltage for
that ~inding stage in repeated operations indicated by arrows
235.1-235.8. (It is to be understood that the arrows do not
necessarily correspond in number and spacing to the actua}
rate of instances of sensing by microcomputer 61 in any par-
ticular embodiment.) During the duration of field collapse
voltage 191 in ~IG. 5, only logic ones are sensed correspond-
ing to arrows 235.1 and 2~5.2. Since the test bit order in
Table I calls ~or 0,1 the operations continue looking first
for the initial zero. ~t arrow 235.3, the initial zero i5
found. Now microcomputer 61 looks for the logic level one in
1 2 9 3 71~g 03AM 5939
the 0,1 test bit order. It continues looking but ~nses 0 at
times indicated by arrows 235.4, 235.5, 235.6 and 235.7. Then
at the time indicated b- arrow 235.8, just when the back emf
195 has had i~s zero crossing 229 and transition 230 has
occurred in the digitized voltage, microcommputer 61 senses a
logic level 1 matching the second entry in the test bit order.
The complementary logic levels 0,1 of the selected digitized
voltage B have now occurred in the predetermined order.
Microcomputer 61 now advances in the se~uence of commutation
by incrementing INDEX by 1, produces the digital signal pat-
tern 10111001, masks with mask 02 (comparator output A), and
advances in sequence after complementary logic levels in the
order 1,0 for the digitized voltage A have occurred, indicat-
ing another zero crossing.
In FIG. 7, a source of 5 volts DC is connected to
positive voltage supply pin Vcc of microco puter 61, and
supply return pin VDD is connected to ground. A crystal 241
with associated capacitors 243 and 245 is connected to pins
XRLl and XRL2. The operations of microcomputer 61 are reset
by a circuit connecting input RESET-bar to reset switch 247
and capacitor 249 to ground, and RESET-bar is also connected
to Vcc through reverse-biased diode 251. Pin EA of the 8748
chip is connected to ground. The connections described in
this paragraph are conventional and are not descri~ed furt.~er.
The current interrupt and speed circuit B1 of ~IG. 1
is now described in more detail using FIG. 7. Comparator 261
has its inverting input connected through resistor 263 to
voltage VI from shunt resistor R5 of FIG. 3. The nonin-
verting input of comparator 261 is connected to a voltage
divider 265 consisting of resistors 267 and 269 ano variable
resistor 271 for setting a ~urrent interrupt level. Adjusting
variable resistor 271 sets a predetermined level. Comparator
261 with its pullup resistor 262 compares the current flowing
in the powered winding stages of motor .~ with the predeter-
mineà level fed to the noninverting input of comparator 261.
lZ93'7t~9 03AM 5939
~pon t-e Dredeterminea '_vel heing eYceeaed by voltage V ,
the output of comparator 261 goes low at t~,e PRESET input of a
74Ls74 flipflop, or latcn, 273, so that output Q of flipflop
273 goes high and output Q-bar (complement or Q) goes low.
5 Output Q-bar going low interrupts microcomputer 61 at low-
active interrupt pin IMT-bar. Output Q going high causes the
control signal generator 51 of FIG. 4 to generate 2 pattern of
control signals to reduce the current in the winding stages by
changing the Commutate pattern to a Monitor pattern (see FIG.
4B3.
Current interrupt and speed circuit 81, microcom-
puter 61, and control signal generator 51 together constitute
means 'or producing the successive patterns of the control
signals in at least one preselected sequence to s~itch on only
one electronic device in each of at least two of the sets of
the electronic devices,at once and cause a current to flow in
the winding stages to rotate the rotatable means, and for sub-
sequently producing a pattern of the control signals to switch
off one of the electronic switching devices which was pre-
viously switc~ed on so that the commutating circuit 31 leavesall of the win~ing stages temporarily unpowered and also pro-
vides a current path for the previously-powered winding
stages. Current interrupt and speed circuit 81 together with
microcomputer 61 consti ute means for proàucing the successive
patterns of the diqital signals in at least one preselected
sequence to switch on only one electronic device in each of at
least 'wo of the sets of the electronic devices at once and
cause a current to flow in the winding stages to rctate the
rotatable means, and for subsequently producing a pattern of
the digital signals to switch off one of the e}ectronic
switching devices which was previously switched on, the
identit~I of the one device switched off depending on the last
pattern produced in the sequence (e.g. as a result of the Rail
Disable information in the first two rows of Tables I and II),
43
03AM 5939
12~37~9
so that ~he commutatir,~ ~eans leaves all Ot the winding s~ages
temporarilv unpowered and also provides a current ~ath for the
previou5ly-powered winding stages.
Control signal generator 51 constitutes means
responsive to successive patterns of digital signals for gen-
erating the successive Datterns of the control signals for the
commutating means, the generating means including first and
second logic gate means (e.g. 167 and 169~ feeding the sets of
eLectronic devices in the commutating means and having inputs
driven by respective pairs of digital signals (e.g. inverting
buffers 175,176; 177,178; and 179,180) in the digital signal
patternS, means for disabling the first and second logic gate
means when any of the pairs of digital signals has identical
logic levels in the pair (e.g. exclusive-OR gate 183), and
means for disabling (e.g. NAND gates 185 and 187) in response
to a disablin- -ignal (~.g. Q) a single one of the first and
second logic gate means identified by an additional pair of
digital signals in the digital signal patterns (e.g. on port
P2 lines 7 and 6). Microcomputer 61 constitutes means for
producing the successive patterns of the digital signals in at
least one preselected sequence to switch on only one elec-
tronic device in each of at least two of the sets of the elec-
tronic devices at once and cause a current to flow in the
winding stages to rotate the rotatable means, and for p~oduc-
ing the additional pair of digital signals to have logiclevels depending on each pattern in the sequence ~e.g. top and
bottom disable signals in first two rows of Tables I and II).
Current interrupt and speed circuit ~1 constitutes means for
providing the disabling signal (e.g. Q) in response to an
occurrence of a predetermined condition (e.g. excessive
current) thereby to switch off one of the electronic devices
which was previously switched on.
FIG. 7 illustrates an embodiment adapted for supply-
ing t~e disabling signal Q by a hardwired circuit comprised in
03AM 5939
1~33~7~39
current ~terrupt and ~?eea circuit 81 ~nich is outboard of
microcon~uter 61. It is to be understood t~at Monitor pat-
terns as in FIG. 4B are in alternative embodiments produced by
performing operations inside microcomputer 61. In order to
accomplish such operations in microcomputer 61, monitor pat-
terns wnich vary as a function of INDEX are stored in the
memory. These monitor patterns are output on lines 62 when-
ever desired, and they are tabulated for clockwise and
Countercloc~wise rotation respectively in Tables V and VI.
In Fig. 7A, logically complementary waveforms for
the Q and Q-bar outputs of flipflop 273 show Q low ~ntil the
PRESET input of flipflop or latch 273 receives the aforemen-
tioned output from comparator 261 or becomes otherwise preset.
After a predetermined period of time Tl of nominally 100
microseconds, microcomputer 61 completes an interrupt routine
and senas a pulse on line DB7 to input CLR to clear flipflop
273, causing the Q output to go low again, and Q-bar to go
high. If and when the motor current rises above the predeter-
mined level again, comparator 261 again presets flipflop 273,
protec~ing motor M from overcurrents. Flipflop 273 has its
data (D) input and cloc~ ~CL~) inputs grounded. The output of
comparator 261 is also connected to the T0 testable input of
microcomputer 61 for advantageous f lexibility of operations.
In addition to pcotecting motor .~., circuit 81 also
provides a means for producing pulses at an adjustable rate,
as if the predetermined level were exceeded, when the current
is actually less than the predetermined level, so that the
speed of the motor in the laundry apparatus 11 is adjustable.
With output Q of flipflop 273 low, inverter 27S produces an
output High, charging capacitor 277 through resistor 279. The
time constant of capacitor 277 with resistor 279 is on the
order of one millisecond, for e~ample. The voltage acroSS
capacitor 277 is appLied through a voltage divider consisting
of resistors 281 and 283 to the inverting (-) input of 2 com-
parator 285. Comparator 285 has a positive feedbacK resistor
03AM 5939
1233~39
87 f~r ~ysteresis. ~he noninverting (+~ input of comparator285 i~ fed with the adjustable speed-related output o~ a
volta~e divider consisting of resistor 289 and potentiometer
291 t.~rough resistor 293. As capacitor 277 char~es, it
reaches a voltage greater than that set by potentiometer 291,
causin~ the output of comparator 285 to go low. The low out-
put of comparator 285 is fed to the preset input of flipflop
273, causing output Q to go high and Q-bar to go low, inter-
rupting microcomputer 61. During time Tl, the High from out-
put Q is inverted by inverter 27S so that the output ofinverter 27S goes low and at least partially discharges capac-
itor 277. Microcomputer 61 clears flipflop 273 after time Tl,
causing output Q to go low. Inverter 275 in turn goes high,
progressively char~ing capacitor 277. Then comparator 285 in
circuit portion 295 of current interrupt and speed circuit 81
causes flipflop 273 to produce a disablin~ si~nal Q high and
interrupt microcomputer 61 again when a second time interval
T2 has elapsed. Setting potentiometer 291 to a higher voltage
position increases the time interval T2. Increasing time
intervai T2 increases the speed of the motor because the speed
of the motor increases with increasing duty cycle, and the
duty cycle is the ratio T2/(T2 ~ Tl). It is noted that in the
embodiment of FIG. 7, Tl is set inside the microcomputer 61,
and T2 is set outside bv circuit 295. In other embodiments Tl
is set outside microcomputer 61 and T2 is set inside the
microcomputer 61. In still other embodiments both Tl and T2
are set inside microcomputer 61. In yet other embodiments
both Tl and T2 are set outside microcomputer 61.
=~
1Z93'7~9 03AM 5939
TABLE I
DATA FOR CL~CKWIS- ROTATION
P2 Rail
Line Disable Seouence of Patterns
D 7 Top 0 1 0 1 0
I
G 5 Btm 1 0 1 0 1 0
I
T _____________________-______________
A 5 1 1 1 1 0 0
L
4 1 1 1 0 0
S
I 3 1 1 0 0
G
N 2 1 0 0
A
L 1 0 0
S
O 0 1 1 1 1 0
____________________________________
INDEX: 0 1 2 3 4 5
INDEXR: 0 1 2 3 4 5
CONTROL A+ B+ B+ C~ C+ A+
SIGNALS: C- C- A- A- B- B-
DIGITI2ED
VOLTAGE 01 02 04 01 02 04
MASK: (B~ ~A) (C) (B) (A) (C~
TEST BIT
ORDER: 0,1 1,0 0,1 1,0 0,1 1,0
1~93~7~9 03AM 5939
TABLE II
DATA EOR COUNTERCLOCKWISE ROTATION
P2 Rail
Line Disable Seauence o~ Patterns
D 7 Top 0 1 0 1 0
I
G 6 Btm 1 0 1 0 1 0
____________________________________
T 5 0 0
A
L 4 1 0 0
S 3 1 1 0 0
I
G 2 1 1 1 0 0
N
A 1 1 1 1 1 0 0
L
S O 0 1 1 1 1 0
____________________________________
INDEX: 0 1 2 3 4 5
INDEXR: 12 13 14 15 16 17
CONTROL A+ C+ C+ B+ B+ A+
SIGNALS: B- B- A- A- C- C-
DIGITIZED
VOLTAGE 04 02 01 04 02 01
MASK: (C) (A) (B) (C) (A) (B)
TEST BIT
ORDER: 0,1 1,0~ 0,1 1,0 0,1 1,0
~Q
03AM 5939
1~37~39
TAB LE I I I
CLOCK~ISE ROTOR POSITION S_NSING
Pl Diaitized Back EMFs
0 B 0 0 1 1 1 0
A 1 1 1
2 C 1 0 0 0
____________________________________
HEX: 6 2 3 1 5 4
R3: -4 1 -2 4 -1 2
OFFSETR3: -8 5 -6 8 -5 6
INDEX: ` 1 0 5 4 3 2
INDEXR: 1 0 5 4 3 2
DIGITI ZED
VOLTAGE ALLHI=07. `lask for A, B, C at same time.
MASR:
_
49
03AM 5939
125'37~9
TABLE IV
COUNTERCLOCXhISE ROTOR POSITION SENSING
P1 Diaitized ~ack EI~Fs
3 1 0 0 0
1 A 1 1 1 0 0
2 C 0 D 1 1 1 0
____________________________________
HEX: 3 2 6 4 5
R3: -~ 4 -2 1 -4 2
INDEX: 1 0 5 4 3 2
INDEXR: 13 12 17 16 15 14
DIGITI,ZED
VOLTAGE ALLHI=07. .~lask for A, B, C at same time.
~IASK:
.
03AM 5939
lZ~33~7~9
TABLE ~
MONITOR PATTERNS FOR CLOCKWISE ROTATION
P2 Rail
Line Disable Seauence o~ Patterns
D 7 Top 0 1 0 1 0
G 6 Btm 1 0 1 0 1 0
I
T ____________________________________
A 5 ` 1 1 1 1 1 0
L
4 1 1 1 1 0
S
I 3 1 1 1 0
G
N 2 1 1 0
A
L 1 1 0
s
O
____________________________________
INDEX: 0 1 2 3 4 5
INDEXR: 0 1 2 3 4 5
CONTROL
SIGNALS: A~ C- B~ A- C~ 8-
1~37~9 03AM 5939
TAaLE VI
;~IONITOR PATTERNS FOR COUNTERCLOC~hISE ROTATION
P2 Rail
Line Disable Seauence o. Patterns
D 7 Top 0 1 0 1 0
I
G 6 Btm 1 0 1 0 1 0
______________________--_-__________
T 5 1 0
A
L 4 1 1 0
S 3 1 1 1 0
I
G 2 1 1 1 1 0
N
A 1 1 1 1 1 1 0
L
S O 0
INDEX: 0 1 2 3 4 5
INDEXR: 12 13 14 15 16 17
CONTROL
SIGNALS: A+ B- C+ A- B+ C-
.
52
12~37~9
03AM 5939
The flow diagrams of FIGS. 8-17 and 19 describe
processes, methods, and operations contemplated in some of the
embodiments of the invention, regardless of any particular
manner of implementation using hardware or software. A listing
of an illustrative assembly language program for the Intel 8748
microcomputer as microcomputer 61 is included in the present
application as Appendix I. A table correlating the listing of
Appendix I with the flow diagrams is included as Appendix II.
It is to be understood that the assembly language program is
used in microcomputer 61 to make it perform many of the same
processes, methods and operations shown in the flow diagrams
while differing in order of listing and in some details from
the flow diagrams of FIGS. 8-17 and 19. Thus Appendix I
further illustrates and discloses some of the variety of
implementations possible in the practice of the invention
according to the principles thereof.
In FIG. 8, operations commence at START 301 and at
step 305 equates are made to set up in memory some or all of
the information contained in Tables I through VI of the present
specification. More specifically, the information includes the
patterns of digital signals for clockwise and counterclockwise
rotation, which are designated "Control Driver Pattern For
Clockwise Direction" and "Control Pattern For Running Counter
Clockwise Direction" in Appendix I. In addition, the
information includes identified inputs to the microcomputer 61
in the rows designated "Digitized Voltage Mask" in Tables I and
II and the lines designated "Test Pattern For CW/CCW" in
Appendix I. Control equates are also made in Appendix I for
maskinq the input lines to port Pl from the switches for
On/Off, Wash/Spin, CW/CCW, 5/250 REV, and Hi/Low Speed, for
clearing flipflop 273 of FIG. 7, setting certain time values,
and for other purposes.
At step 307 and step 309 outputs are turned off and
other housekeeping functions are accomplished. These include
producing a digital signal pattern "OFF" consisting of all
1~3~7~9 03AM 5939
~nes f.om output port ~ on lines 62 of FIG. ~ so that ail
zeros are ~enerated by c~ntrol signai generatOr 51 for turning
off the motor M. Flipflop 273 is cleared, ~igh/Low Speed
circuit ~1 of FIG. 1 is set to Low, and initializing of the
microcomputer 61 is performed.
A point 311 in the operations is designated ST~TST.
STRTST is located at the beginning of operations which deter-
mine whether the laundrv apparatus is still on and whether the
wash or spin mode is to be changed. At step 313 the state of
On/Off switch 231.5 is read at port Pl, line 7, and at step
315 operations branch back to STRTS~ until switch 231.5 is
turned from the Off position to the On position. When switch
231.5 is on, point 316 designated RUN is reached. Then at
step 317 the C~J/C~J switch 231.3 is read at port Pl, line 5,
and the setting as clockwise or counterclockwise is storeà.
At step 319 the Wash/Spin switch 231.4 is read at port P1,
line 6, and the mode commanded by it is stored. At step 321,
the mode stored is tested, and if it is "Wash", operations
proceed to point 323 and FIG. 9, otherwise to "Spin" point 325
and FIG. 14.
In FIG. 9, the wash mode is executed beginnin~ at
point 323. A predetermined point in the preselected sequence
for clockwise rotation (left-most column of Table I) is
selected by setting I~EX and INDEXR to zero at step 351.
Flipfloo 273 is cleared and current and timer interrupts are
enabled at step 353. Steps 355, 357, and 359 check INDEXR to
assure that it does not have a value clearly indicating some
error in the system. If INDEXR is negative or greater than
23, an 0FF digital signal pattern ~all ones~ is produceà at
step 3~9, and operations loop back to step 351.
Next at step 363 a digital signal pattern is
obtained from memory and stored in the accumulator. For
example, the first digital signal pattern so obtained is
01111100 from the leftmost column of Table I. Next at seep
365, the digital signai pattern is produced from the
12~37~9 03AM 5939
~ccu~lluia~or as an o~tpu~ ~n l~nes 62 ror c~n~roi signal ener-
ator ~. (termeà '`~river 109ic" on the flow ciagram). In step
367 a test pattern, whiah is 0,1 or 1,0 is obtained ~rom mem-
ory for use in testing t~.e digitized voltage as explainea in
connection with FIG. 6A. ~he test pattern to be used is tabu-
lated i~ Tables I and IT i~ the same column as the digital
signal ~attern whicA has just ~een producea. Equivalentl~,
and as discussed in connection with FIGS. 10 and 15, the test
bit order is directly implemented in the coding as a function
of whether INDEX is even or odd, and step 367 is omitted. At
step 369 a register for a flag ~LGl is set to zero, indicating
that the low speed connection zrrangement for the winding
stages is intended. At step 371 and as more fully discussed
in connection with FIG. ~, the digitized voltage of F;G. 6A
is tested, and as soon as complementary bits, or logic levels,
in the ~ODer test bit order have been sensed, operations pro-
ceed to advance in sequence to commutate the winding stages.
If complementary bits are not sensed in the predetermined
proper lest bit order in a predetermined time period, opera-
tions proceed to advance in the sequence anyway andforce-commutate the motor.
At step 372 the rail disable signals on lines 7 and
6 of port P2 of microcomputer 61 are reversed. "~ail" as used
herein means either one of SuDply conductors 113 and 115. In
2S this way control signal generator 51 is prepared by microcom-
puter 51 for any pulse width modulation (PWM~ which may occur
by output Q going high as soon as the back emf routine 371 is
complete. As such, microcomputer 61 constitutes means f or
also selecting the digitized voltage across the at least one
unpowered winding stage when digital signal patterns are pro-
duced in sequence and changing the logic levels of the zddi-
tional pair of digital signals (e.g. on lines 7 and 6 of port
P2~ as soon as at least one predetermined logic level (e.g. of
the test bits) of the selected digitized voltage has occurred.
12~37~9 03AM 5939
At s-eps 373 anà 375, I~lDEXR and I~DEX are resDac-
tively incremented, ~oving one coLumn to the right, in effect,
in Table I or II. If I,~DEX has not reachea the number 6 at
step 377, operations loop back to a point 3,9 designated :IAINl
~nd continue with the sequence of steps 355-377, commutating
the motor until INDEX reaches 6. ~hen INDEX reaches 6, a
brancn is made from step 377 to step 381. The value Il~DEX is
eSsentially treated modulo 6, so that opera~ions cycle through
Tables I and II, to commutate the motor as long as desired.
INDEX is reset to zero at step 381. At step 333, INDEX~ is
decreased by 6. The latter operation reco~nizes that when
counterclockwise rotation i5 being executed in Table II,
INDEX~ reaches the number 18 when INDEX is 6, so that I`'DEXR
m~st be cycled back to a permitted number 12 in Table I; by
subtraction by 6.
At step 3~5 the On/Off switch 2'1.5 of FIG. 6 is
tested. If the switch has been turned off, a branch is made
from step 387 to step 3ag whence the pattern OFF (all ones on
lines 62) is output to shut the motor off, and operations
return to STRTST point 311 in FIG. 8 to poll the switch until
it is turned on. Assuming On/Off switch is on when step 387
was first reached, operations proceed to step 391 to decrement
a eevolution counter which has been originally loaded in step
309 o. FIG. 8 with a number 5 (center-post agitator laundry
apparatus) or a number 250 (tumbler-type laundry apparatus~.
In this way microcomputer 61 counts revolutions of rotatable
means 15 in step 391 by counting at steps 37S, 377, and 381
the successive patterns of digital signals produced. When the
revolution counter has been decremented at step 391, a test of
its contents at st~p 393 for the number zero is made to deter-
mine whether all of the revolutions in a stroke of aqitation
have been completed by motor M. If not, operations loo~ to
MAINl and continue with step 355 and the subsequent steps to
continue commutating motor M in the same direction of rota-
tion. If the revolution counter has reached zero, a branch is
56
lZ~3~789
03AM 5939
made from step 393 to step 395 where the counter is reloadedwith the number 5 or 250, depending on the setting of switch
231.2 of FIG. 6. In step 397, operations are performed to
prepare for commutation in the opposite direction, as discussed
more fully in connection with FIG. 11.
In FIG. 10, low speed back emf routine 371 commences
with BEGIN 401. A two-millisecond interrupt timer is started
running at step 403. At step 405, the value of INDEX
representing the point in the sequence in the Table I or II is
checked for being even or odd. If it is even (INDEX = 0,2,4)
the test bit order is 0,1. The digitized voltage of FIG. 6A is
tested at step 407 and the testing is prepared by branching
back from step 409 until the first test bit of 0 is found,
whence the two-millisecond interrupt timer is cleared at step
411 and step 417 is reached. It is noted that the repeated
execution of steps 407 and 409 until the zero (0) is found
corresponds to arrows 235.1-235.3 in FIG. 6A. If INDEX is odd
(1,3,5), the test bit order utilized is 1,0. The digitized
voltage (which is inverted in polarity from that of FIG. 6A) is
tested at step 413 and the testing is repeated by branching
back from step 415 until the first test bit of 1, this time, is
found, whence the two-millisecond interrupt timer is cleared at
step 411 and step 417 is reached. If the repeated testing at
either step 407 or 413, as the case may be, continues for 2
milliseconds without avail, a timer interrupt occurs and
operations proceed to step 417.
An 18-millisecond interrupt timer is started running
at step 417. At step 419, the value of INDEX representing
the point in the sequence in the Table I or II is checked for
being even or odd. If it is even (INDEX = 0,2,4) the test
bit order is 0,1 as already stated. The digitized voltage of
FIG. 6A is tested at step 421 and the testing is repeated by
branching back from step 423 until the second test bit of 1
(in 0,1) is found, whence the 18-millisecond interrupt timer
57
12S~37~39
03AM 5939
is cleared at step 425 and RETURN 427 is reached. It is noted
that the repeated execution of steps 421 and 423 until the one
(1) is found corresponds to arrows 235.4-235.8 in FIG. 6A. If
INDEX is odd (1,3,5), the test bit order utilized is 1,0 as
already stated. The digitized voltage (which is inverted in
polarity from that of FIG. 6A) is tested at step 429 and the
testing is repeated by branching back from step 431 until the
second test bit of 0 (zero), this time, is found, whence the
18-millisecond interrupt timer is cleared at step 425 and
RETURN 427 is reached. If the repeated testing at either step
421 or 429, as the case may be, continues for a full 18 milli-
seconds without avail, a timer interrupt occurs and operations
proceed to RETURN 427.
FIG. 11 shows the reversing routine 397 of FIG. 9 in
greater detail~ Operations commence therein at BEGIN 451.
INDEX is initialized to zero at step 453. The direction
variable DIRECT is tested at step 455. If DIRECT is 0, for
clockwise (CW) rotation, step 457 changes it to 1, for counter-
clockwise (CCW) rotation, and INDEXR is increased by 12 at step
459 in order to enter the range of INDEXR in Table II. If
DIRECT is 1 for CCW rotation in step 455, step 461 changes it
to 0, for CW rotation, and INDEXR is decreased by 12 at step
463 in order to enter the range of INDEXR in Table I. Steps
455-463 in effect are operations by which microcomputer 61
changes INDEXR and the direction variable DIRECT which are
subsequently used in producing successive patterns of digital
signals for achieving the desired direction of rotation of
motor M.
Before the motor M is commutated in the opposite
direction from that in which it was turning previously, it is
caused to stop rotating by operations which commence at MTROFF
point 465, and proceed to produce an OFF pattern (all ones on
lines 62) at step 467. The motor M, having its power removed,
coasts to a stop. However, microcomputer 61 needs to know
when the motor has actually stopped. This information is
58
3~9
03AM 5939
obtained by first loading a counter at step 469 with a
predetermined number indicative of a predetermined time period
during which there should be no back emf observed when and if
the motor has actually stopped. Next at step 471 one or more
of the port P1 inputs 0, 1, and 2 is sensed for its digitized
voltage. As long as the rotor is coasting, the digitized
voltage from each of the winding stages is a succession of
highs and lows. If a zero, or low, is sensed, the rotor may
still be coasting or it may have stopped, but if a one, or
high, is sensed, the rotor must still be coasting.
Accordingly, a branch is made from step 473 if a high bit, or
logic level of one, is sensed and the counter is reloaded with
the predetermined number at step 469 since the rotor must
still be coasting. On the other hand, operations proceed from
step 473 to step 474 if a low bit, or logic level of zero, is
sensed, and the counter is decremented. Since the rotor may
still be coasting, however, a branch is made from step 477
back to testing step 471 unless the counter has been
decremented to zero. In this way if the rotor is still
coasting, a one (1) bit indicating existence of back emf is
sensed sooner or later at step 471 and the counter can be
reloaded at step 469 as a re~ult of the branch from step 473.
Eventually the rotor stops and a sufficient time period
elapses without back emf to assure microcomputer 61 that the
rotor has stopped. The counter is decremented to zero and
operations proceed from step 477 to RETURN 479.
In having the capability to perform the reversing
routine of FIG. 11, microcomputer 61 and control signal gener-
ator 51 together constitute means for causing the rotatable
means to reverse in its direction of rotation by producing a
pattern of the control signals for causing the commutating
means to remove power from all of the winding stages, for
sensing the digitized voltages while the power is so removed,
and for producing successive patterns of the control signals in
a second preselected sequence to rotate the rotatable means
59
12937~9
03AM 5939
in the reverse direction only after a predetermined time period
has elapsed subsequent to the last occurrence of a
predetermined logic level in any of the digitized voltages.
FIG. llA shows a series of operations of microcomputer
61 for braking motor M to stop the rotation more quickly than
occurs when motor M is permitted to coast to a stop as in FIG.
11. The operations of FIG. llA are performed in substitution
for the steps 467, 469, 471, 473, 475, 477 and 479 of FIG. 11
in a reversing routine and performed at any point in the
operations of microcomputer 61 where braking is deemed
desirable by the skilled worker. Braking operations commence
with BEGIN 481 and proceed to produce an OFF pattern 483 (all
ones on lines 62) for leaving all of the winding stages of
motor M unpowered. Microcomputer 61 waits for a delay period
of illustratively 3 milliseconds at step 485 before proceeding
to step 487. At step 487 a braking pattern of the digital
signals is produced as shown at FIG. 4B in connection with the
entry "BRAKE." The braking pattern causes commutating circuit
31 to connect together all of the terminals of the winding
stages selected by High-low speed circuit 41. The mechanical
energy stored in the rotor is rapidly dissipated electrically
because the winding stages are in effect shorted together. At
step 489 another delay period, this time for 12.5 milliseconds,
is executed by microcomputer 61. Another OFF pattern is
produced at step 491, followed by another 3 millisecond delay
by the microcomputer 61 at step 493, and braking operations are
completed at RETURN 495.
In having the capability to perform the steps
described in connection with FIG. llA, microcomputer 61 and
control signal generator 51, as pattern producing and digitized
voltage sensing means, constitute means for also producing a
pattern of the control signals which causes the commutating
circuit 31 to switch all of the winding stages to one of the
supply conductors 113 or 115, thereby braking the motor M.
1~937~9 03AM 5939
.`.n in~errupt ~w at the INT-bar -in of miczoco~Duter
61 can occur at any ti~e auring the washin mode or spin mode
operationS of laundry apparatus 11. FIG. 12 illustrates a
sequence of operations which occurs upon interrupt. Interrupt
operations commence at BEGIN 501. Optional step 507 is
descri~ed later in connection with FIG. 13. The high-low
speed flag FLGl is checKed at step 513. ,f the flag is a zero
(low s?eed winding selection~, an internal timer (not shown~
in microcomputer 61 is loaded with a number correspondina to
the predetermined time period Tl ~FIG. 7~) of 100 microseconds
in step 515, and if the flag is a one (high speed winding
selection~, the timer is loaded for a predetermined time
period Tl of 50 microseconds at step 517 to take account of
the higher motor s~eeds. ~ex~ at steps 5'9 and 521 the timer
is decremented until i' reaches zero thereby to execute a
delay for the time period Tl and indicati.? that ti~e period
Tl has elapsed. An optional step 523 is discussed below in
connection with FIG. 13. At step 525 microcomputer 61 trans-
mits a pulse on the line DB7 of FIG. 7 to clear the latch or
flipflop 273 whence interrupt operations are completed at
RETURN 527.
In FIG. 7A the duty cycle of pulse width modulation
(PWM) for motor M is controlled by causing the ~ and Q-bar
outputs of latch 273 to change state between time periods Tl
and T2 as shown. FIG. , reflects a hardware approach for set-
ting T2 by means of circuit portion 295, and the microcomputer
61 sets Tl in the interrupt routine of FIG. 12.
In FIG. 13 a software approach is suggested for con-
trolling the time period T2 when the motor M is powered. The
circuit portion 295 of FIG. 7 is deleted in a now-described
alternative embodiment. An otherwise unused output line such
as DB5 (not shown) is connected to the PPESET input of latch
273. '~ariable duty cycle instructions corresponding to the
operations called for in FIG. 13 are inserted between steps
315 and 317 of FIG. 8 at the point designated RUN. At step
61
1293'î~89
03AM 5939
531 input information corresponding to the desired duty cycle
is read in to microcomputer 16 as from switches 231.6, 231.7,
231.8, and 231.9 at pins DB0-DB3 of FIG. 6. This duty cycle
information is a 4 bit binary code when pins DB0-DB3 are used
for input, so that 16 values of duty cycle Dl are selectable.
Given a predetermined time period Tl value, there corresponds a
particular value of T2 which solves the duty cycle equation
Dl = T2/(T2 + Tl) (1)
The duty cycle equation (1) is solved for time period T2 for
time-on with result:
T2 = Tl(Dl/(l-Dl)) (2)
Values of T2 are stored in a table in memory corresponding to
the values of desired duty cycle D1 which can be read in in
step 531. When one of the values Dl is read in, the corre-
sponding value of T2, or time-on, is fetched from the table in
step 533. At step 535 the interrupt process is enabled so that
microcomputer 61 can be interrupted by excessive current sensed
by comparator 261 of FIG. 7. Then at step 537 a timer is
loaded with a number corresponding to the time-on T2 and set
running. The timer (not shown) is an internal timer in
microcomputer 61 which is for present purposes called a duty
interrupt timer. Microcomputer 61 executes the operations of
FIG. 8 and of the washing and spin modes selected, but is
interrupted when the duty interrupt timer times out at the end
of time period T2, beginning the interrupt routine of FIG. 12.
The FIG. 12 interrupt routine now is described with
the optional steps 507 and 523 included. At step 507 inter-
rupt pin INT-bar is masked to avoid interaction with latch 273,
and latch 273 of FIG. 7 is set by transmitting a zero or Low
from microcomputer 61 to its PRESET input. The Q output
03AM 5939
1~93789
of latc.~ 273 goes high, leavin~ motor ~l unpowered througn con-
trol signal generator 51 and commutating circuit 31. The
interru?t operations proceed in steps 513-521 so that prede-
termined time period Tl elapses. At step 523, the duty inter-
~upt timer in microcomputer 61 is reloaded with a value corre-
sponding to time period T2 and set runnina again. Latch 273
is cleared at step 525, bringing its Q output low and powering
the motor M again. Also at step 525 interrupt pin INT-bar is
enabled so that any overcurrent interrupt caused by comparator
261 can be sensed.
The spin mode of laundr~ ap ara~us 11 has operations
shown in FIG. 14 which commence at point 325. ~icrocomputer
61 clears latch 273 and enables interrupts in step 551. ~he
value of INDEX is set to zero (O) for purposes of Tables I and
iI in s.ep 553. The directi~n in which the motor M is to turn
during the spin mode is determined from the setting of switch
231.3 (CW/CCW in FIG. 6) in step 555. If switch 231.3 is set
to CW, operations proceed from step 557 to step 559 and the
preselected sequence defined in Table I is selected by setting
INDEXR to zero in step 559. If switch 231.3 is set to CCW,
operations proceed from step 557 to step 561 and the preselec-
ted sequence defined in Table II is selected by setting INDEXR
to 12 in step 561. Ope~ations of microcomputer 61 reach point
563 designated MAIN2 when either step 561 or step 559 has been
completed.
Steps 565, 567, and 569 check INDEX~ to assure that
it does not have a value clearly indicatinq some error in the
system. If INDEX~ is negative or greater than 23, an OFF
digital signal pattern (all ones) is produced at step 569, and
operations loop back to step 553.
When operations reach step 571, the high-low speed
winding flag FLGl is tested to determine which selection is
being made by high-low speed circuit 41. Assume that the
03AM 5939
7~39
selection is initially io~ and the spin mode is just begin-
ning. FLGl is zero, indicating low speed winding, and oDera-
tions pass through point ~ to step 573 where HI~LOW Speed
switch 231.1 is tested. In the present embodiment, switch
; 231.1 can be initially set in the LOW speed position and the
motor ~ is brought up to a steaày speed. Then switch 231.1 is
changed to the HI speed position for commandina microcomouter
61 to cause relaying bv High-low speed switching circuit 41
and causing motor M is accelerate to a higher speed. The
operations of microcomputer 61 in responding to switch 231.1
are described in greater detail next.
When switch 231.1 is set to LOW, indicating that the
motor M is to be in the low speed connection arrangement for
the time being, a branch is made at step 575 to step 577. At
step 577 a digital signal pattern is obtained from memory and
stored in the accumulator. For example, the f.rst digital
signal pattern so obtained is 01111100 from the leftrost col-
umn of Table I when C~/CC~ switch 231.3 is in the C~ position.
Next at step 579, the digital signal pattern is produced from
the accumulator as an output on lines 62 (termed "output run
patrn" on the flow diagram) for control signal generator 51.
In step 581 a test pattern, which is 0,1 or 1,0 is obtained
from memory for use in testing the digitized voltage as
explained in connection with FIG. 6A. The test pattern to be
used is tabulated in Tables I and II in the same column as the
digital signal pattern which has just been produced. Equiva-
lently, and as discussed in connection with FIGS. 10 and 15,
the test bit order is directly implemented in the coding as a
function of whether INDEX is even or odd, and step 531 is
omitted. At step 583, depending on whether FLGl is set for
Low (0) or High (1) speed, a branch is made through point F to
low speed back emf routine 371 or through point E to high
speed bac~ emf routine 585. In each of back emf routines 371
and 535 and as more fully discussed in connection with FIGS.
fi4
03AM 5939
3~9
10 and lS, the digiti-e~ voltage of ~TG. ~A is tested '-~r com-
21ementary bits, or logic levels, in the ~roper test bit order
whence point G is reacheà.
When motor ~l is running at low speed, f~ag FLGl has
been set to zero. Assume that it is desired to accelerate
motor `~ to a higher s?eeà so that switch 231.1 is physically
changed to HI. (It is also contemplated that the change from
low to high can be alternatively accomplished in software.)
FLGl is still set to zero and in FIG. 14 operations pass
through point D to step 573. Now when switch 231.1 is tested
at step 573, a branch is made from step 575 to step 587 where
flag FLGl is set to one for High Winding Tap. Then a relaying
routine at step 588 is executed for actuaily relaying from the
low speed to the high speed winding connections to motor M and
for determining the proper point in the sequence for resuming
commut2tion when the relaying is completed. Relaying routine
588 is described in qreater detail in connection with FIG.
17. When operations at steps 573, 575, 587, and 588 have been
completed, motor M is commutated and accelerated, and steps
573, 575, 587, and 588 are bypassed by a NO branch from step
S71 to step 577 subsequently during high speed rotation.
Steps 577, 579, and 5Bl are performed. At step 583 flag FLGl
is now set for High speed and operations pass through point E
to high speed back emf routine 585.
2S In FIG. 15 high speed back emf routine 585 is simi-
lar to low speed back emf routine 371 of FIG. 10 except in
being adapted for the shorter time intervals encountered at
higher rotor speeds. Operations commence at BE~IN 589 and a
one-millisecond interrupt timer is started at step 590. Step
591 unifies the operations performed in steps 405 and 419 of
FIG. 10. At step 591, the value of INDEX representing the
point in the sequence in the Table I or II is checked for
being even or odd. If it is even (INDEX = 0,2,4) the test bit
order is 0,1. The digitized voltage of ~IG. 6A is tested at
step 593 and the testing is repeated b~ brancning back from
G~
03AM 5939
1'~93~789
s~ep 595 until the first test bit of 0 is found. The digi-
tized voltage of FIG. 6A is again tested at step 597 and the
testing is repeated by branching back from step 599 until the
secona test bit of 1 is founa. Then the one-milliseconG
S interrupt timer is cleared at step 601 and RETU~N 603 is
reacheà. It is noted that the repeated execution of steps 593
and 595 until the zero (0) is found corresponds to arrows
235.1-235.3 in FIG. 6A, and repeated execution of steps 597
and 599 until the one (1) is found corresponds to arrows
23s.4-235.8~ If INDEX is odd (1,3,5), the test bit order uti-
lized is 1,0. The digitized voltage (whicn is inverted in
polarity from that of FIG. 6A) is tested at step 605 and the
testing is repeated by branching back from step 607 until the
first test bit of 1, this time, is founa. Then the digitized
voltage is tested at step 609 and the testing i5 repeated by
brancning back from step 611 until the second test bit of 0,
this time, is found, whence the one-millisecond interrupt
timer is cleared at step 601 and ~ETURN 603 is reached. If
the repeated testing at steps 593-599 or 605-611, as the case
may be, continues for a full one millisecond without avail, a
timer interrupt occurs and operations proceed to RETURN 603.
FIG. 16 shows more operations of microcomputer 61 in
the spin mode continuing from point G from FIG. }4. The oper-
ations advance in sequence ol commutation beginning at step
621. At steps 621 and 623, INDEXR and I~IDEX are respectively
incremented, moving one column to the right, in effect, in
Table I or II. If INDEX has not reached the number 6, opera-
tions branch from step 625 to the point 563 designated MAIN2
in FIG~ 14 and continue with the sequence of steps from MAIN2
to point G, commutating the motor until INDEX reaches 6. When
INDEX reaches 6, a branch is made from step 625 to step 627.
The value INDEX is essentially treated modulo 6, so that oper-
ations cycle through Table I or II, depenàing on rotation
direction, to commutate motor M as long as desired in the spin
66
lZ93'789
03AM 5939
mode. INDEX is reset to zero at step 627. At step 629,
INDEXR is decreased by 6. The latter operation recognizes
that when rotation is being executed in either Table I or II,
INDEXR reaches the number 6 or 18 when INDEX is 6, so that
INDEXR must be cycled back to a permitted number 0 or 12 in
Table I or II by subtraction by 6.
At step 631 the On/Off switch 231.5 of FIG. 6 is
tested. If the switch is still set to "On," operations pass
from step 633 back to FIG. 14 point MAIN2 so that commutation
continues. If the switch has been turned off, a branch is
made from step 633 to step 635 whence the pattern OFF (all
ones on lines 62) is output to shut the motor off. At step
637 a loop or counting operation is provided so that
microcomputer 61 waits 100 milliseconds or for any other
desired time interval. In step 639 microcomputer 61 issues a
High on line DB6 (FIG. 3) producing a Low on line H from NAND
gate 157, and causing relay 147 in high-low speed circuit 41
to switch back to a low speed connection arrangement. The
high-low speed flag FLGl is reset to zero (low speed) at step
641, and operations pass to STRTST point 311 of FIG. 8, there
to poll On/Off switch 231.5 until it is turned on.
In FIG. 17 the relaying routine of step 588 of FIG.
14 is shown in greater detail. Operations commence with BEGIN
651 and proceed to produce the OFF pattern (all ones on lines
62) at step 653 to turn off the motor M. At step 655 micro-
computer 61 issues a Low on line DB6 (FIG. 3) producing a High
on line H from NAND gate 157, and causing relay 147 in high-
low speed circuit 41 to switch from the low speed connection
arrangement to a high speed connection arrangement.
Microcomputer 61 waits for ten milliseconds as by any suitable
routine, such as counting from a preset number down to zero,
in step 657 in order to permit the relay 147 armature 155 to
come to reset in the high speed position. However, during
this waiting period, the rotor 15 of motor M has, or may have,
67
,, ,
03AM 5939
l Z~3'~9
rotateà a throuaA a significant angle ror oommutation pur-
poses. Accordingly, at step 6~9 a routine is executed for
determining the value of I~DEX from the sensed digitized ~olt-
ages on comparator outputs A, B, and C of FIG. 6 when the
~inding stages are temporarily unpowered, and resuming produc-
lng patterns o~ digital signals on lines 62 beginning with the
pattern of digital signals (and thus a corresponding set of
control signals from control signal generator 51) identified
by the value of INDEX so determined. After step 659 RETURN
661 is reached.
Step 659 of FIG. 17 recognizes that when motor M is
unpowered and the rotor is coasting, all of the winding stages
are producing bac~ emfs. As shown in FIG. 6, the back emfs
are digitized by comparators 201, 203, and 205. The digitized
back emfs for three wye-connected winding stages Sl, S2, and
S3 are illustrated in FIG. 18 and tabulated in Tables III and
IV for clockwise and counterclockwise rotation respectively.
In FIG. 18 and in the first three rows of ~ables III
and IV, the logic levels of the digitized voltages on input
lines 0, 1, and 2 of microcomputer 61 are shown when rotor 15
is coasting. Each of the six columns shows the logic levels
of the digitized back emfs present at any given time. As the
rotor turns, the logic levels of a given column are replaced
by the logic leveLs in the column next to the right. When the
right-most column is reached, the logic levels begin again in
the left-most column, cycling through the columns as before.
FIG. 18 shows superimposed on the logic zeros and ones a wave-
shape of the digitized back emfs on the input lines 0, 1, and
2. The digitized bac~ emfs at any one time and their changes
to other values at other times bear sufficient information to
permit sensinq the position of the turning rotor 15 and to
identify the proper point in sequence for be~inning commuta-
tion of such turning rotor and for resuming commutation when-
ever commutation is interrupted or discontinued. Accordingly,
68
1~937~9 03AM 5939
the i~àex-determinin9 operati~ns of s.ep 659 as described in
further detail in ~IG. is are ~sed in relaying rout~ne 588 in
the preferred embodiment, and are used in other e~bodiments of
the invention whenever it is desired to begin commutation in
sequence.
In FIG. 19 operations commence with BEGIN 671, and
microcomputer 61 inputs all the lines 0,1, and 2 of port Pl at
once by masking with ALL~I=07 (binary 00000111). As a result
there resides in microcomputer 61 a three bit binary number
having binary digits correspondin~ to each of the digitized
voltages on the ~hree lines. This binary n~mber is designated
DATAl and stored in step 673. Then at step 675, microcomputer
61 inputs all the lines 0,1, and 2 of port Pl again in search
of digitized voltages corresponding to an adjacent column of
digitized voLtaqes in FIG. 18. In order to avoid error, if
the latest set of digitized voltages is all zeros (decimal
zero (0~) or all ones (decimal seven (7)), then the index
determining routine is aborted by passing to RETURN 679. The
reason for this is that as shown in FIG. 18, the digitized
voltages are never all high at the same time when the rotor is
coasting. Also, the digitized voltages are all zero only when
the rotor has stopped.
If the digitized voltages are not 0 or 7 as just
discussed, then operations proceed from step 677 to step 6Bl
where the digitized voltages just obtained in step 675 are
stored and designated DATA2. In step 683, DATAl is compared
with DATA2. If they are the same number, (i.e. DATAl-DATA2=0)
the rotor has not turned sufficiently to move to the adjacent
rightward column in FIG. 18 and in the Table III or IV corre-
sponding to the direction of rotation. ~hen DATAl=DATA2 abranch is made back to step 615 to input another set, or
instance, of digitized voltages until an instance of digitized
voltages is found at step 67~ which is different f om DATAl.
At step 685, the difference DATA2-DATAl is computed. Step 687
69
12937~9 03AM 5939
chec~s the value of the difference, which from inspect~on of
àifferences between the hexadecimal eauiYalents o~ the digi-
tized voltages (tabulated in row HEX of Tables III and IV)
should not be equal to 3 or -3 if the data is unaffected by
noise. If the difference is eqùal to the unpermitted numbers
3 or -~<, a branch is made from step 687 to step 675, until a
value of DATA2 is foun~ which passes the test of step 687.
When step 689 is reached, microcomputer 61 has
stored values of DATAl and DATA2 which are in adjacent columns
of one of the Tables III or IV. Each Table III or IV lists
values of R3, which is the difference DATA2-~ATAl, in the
column corresponding to the digitized back emfs in DAT~l.
Beneath a va~ue of difference R3 in each of column of Table
III or IV are values of INDEX and INDEXR. The values of INDEX
lS and I~DEXR are precisely the values for identifying the Droper
Table I or II and the proper column therein containing the
diqital signal pattern which microcomputer 61 can and does
then produce to resume commutation of the winding stages at
the proper point in sequence. (Beneath the tabulated value of
R3 in Table III is an entry designated "Offset R3" which is a
number calculated in the program listing of Appendix I for
microcomputer table lookup purposes.)
At step 689 microcomputer 61 determines which
direction the rotor 15 has been made to turn in. When switch
231.4 is in the spin mode, the direction is given by the
setting of switch 231.3 as CW or CCW. When switch 231.4 is in
the wash mode, the direction is given by the value of the
variable DIRECT of FIG. 11. In either mode the direction can
also be obtained from INDEXR. If INDEXR is in the ranqe 0-5,
the direction is clockwise, and if INDEX~ is in the range
12-17 the direction is counterclockwise.
If the direction determined is counterclockwise, a
brancn is made from step 689 to step 691 for table lookup in a
table in microcomputer 61 having the information found in
lZ937fi9 03AM 5939
Table I~. in rows R3 and I~DE~ hen I~DE~ is founa, I.~E~ is
reset ~ adding 12 to I,IDEX. If the direction determined is
clockwise, a branch is made from step 689 to step 693 for
table lookup in a table in microcomputer 61 having the infor-
; mation found in Table III in rows R3 and INDEX. INDEXR isreset as equal to INDEX when the direction is clockwise.
After step 691 or step 693 is executed, .-~TU~N 679 is reached.
The operations of ~IG. 19 can be described more gen-
erally as follows. ~,~icrocomputer 61 identifies successive
patternS of the control signals and of the digital signals of
Tables I and II by values of an index designated INDEX. A
value of the index is determined from the sensed digitized
voltages when the winding stages are temporarily unpowered.
~licrocomputer 61 resumes producing successive patterns of the
lS digital signals which causes control signal generator 51 to
generate successive patterns of the control signals in se-
quence beginning with a pattern of the digital signals and
control signals determined from the sensed digitized voltages.
The lookup table information stored in microcomputer 61 is a
function, i.e. a predetermined correspondence bet~een members
of two sets of numbers. The sets of numbers involved here are
values of INDEX on the one hand and values of the differences
R3. Equivalently, Tables III and IV can be regarded as tabu-
lating INDEX as a function of digitized back emf itself. It
is also to be understooà that there are a multitude of equiva-
lent ways made known by the disclosure made herein, of setting
up a function relating the digitized back emf information to
some variable such as INDEX which can be used to determine the
proper point for beginning in sequence when commutation begins
again. When the successive patterns of digital signals and
control signals are identified by values of an index, the
index is advantageously determined as a function of a number
represented by the sensed digitized voltages when the winding
stages are temporarily unpowered, and microcomputer 61 resumes
~ 3789 03AM 5939
proà~c a patterns Deg1nning ~ith the pattern o~ the conerol
Sisnal5 identified bv the value of the index 50 determinea.
The index is determined as a first function of a number repre-
sented by the sensed digitized voltages when the winding
stages are temporarily unpowered and the preselected sequence
is ~or cloc~wise rotation of the rotatable means 15 and deter-
mined as a second function of the number so represented ~hen
the preselected sequence is for counterclockwise rotation, and
microcomputer 61 resumes producing patternS beginning with the
pattern of the control signals identified by the value of the
index so determined. The value of the index is also deter^
mined as a function of the difference of first and second num-
bers represented by different instances of the sensed digi-
tized voltages, and microcomputer 61 begins with the pattern
of the control signals identified by the value of the index so
determined. The value of the index is determined as a func-
tion of the difference of first and second numbers represented
by different instances of the sensed digitized voltages unless
one of the numbers is in a set of predetermined numbers, such
as 0 and 7, and microcomputer 61 begins with the pattern of
the control signals identified by the value of the index so
determ-ned. A difference of first and second numbers repre-
sented by different instances of the sensed digitized voltaqes
is calculated and a value of the index is determined as a
function of the difference unless the difference is in a set
of predetermined numbers, such as 0, +3, and -3, and microcom-
puter 61 begins with the pattern of the control signals iden-
tified by the value of the index so determined. Microcomputer
61 in this way prevents sensed digitized voltages representing
a number in a predetermined set, such as 0 and 7, from being
used to determine the beginning pattern of control signals.
Microcomputer 61 in FIG. 19 repetitively senses the digitized
voltages while the winding stages are temporarily unpowered
and determines the beginning pattern of the control signals as
1'~3789 03AM 5939
soon as a change occucs in any one of the sensed digitized
volt2ges.
In some applications of the inYention involving cur-
rent interrupt as in FIG. 7, the time period Tl when the motor
~l is unpowered can be long enough to make index-determination
as in FIG. 19 advisable. In such circumstances, the index-
determining operations of FIG. l9 are inserted in the inter-
rupt routine of FIG. 12 immediately following step 521 so as
to update INDEX and INDEXR. Then the control system of FIG. l
constitutes means for comparing the current flowing the other
powered winding stages of the electronicallY commutated motor
with a predetermined level, and upon the level being ex-
ceeded, interrupting the digital computer and also causing the
control signal generator 51 to generate a pattern of control
1~ signals to discontinue the supply of power to the winding
stages, the digital computer comprising means for also moni-
toring the position of the rotatable means lS when the winding
stages are thus unpowered and resuming producing patterns of
the digital signals after a predetermined time interval begin-
ning with a pattern then corresponding to the posi_ion of the
rotatable means.
In view of the above, it.will be seen that the
. several objects of the invention are achieved and other
advantageous results attained.
As various changes could be made in the above
constructions without departing from the scope of the
invention, it is intended that all matter contained in the
above description or shown in the accompanying drawings shall
be interpreted as illustrative and not in a limiting sense.
