Note: Descriptions are shown in the official language in which they were submitted.
312~
TRANSMITTER ~AVING PLL CIR~UIT
/
BAC~GROUND OF T~E INVENTIO~
The present invention relates to ~ transmitter
having a phase-locked loop (PLL) circuit which
receives a modulation signal and supplies a modulated
signal, and an amplifier connected to the output of
the PLL circuit.
If a transmitter has -'a PLL circuit, a
transmission frequency can ~e changed and set to a
desired frequency. The output of the PLL circuit is
usually a~plifi~d by an amplifier connected thereto~
To save power, power is supplied to the amplifier
only during signal transmission. However, the input
impedance of the amplifier fluctuates when the
amplifier ls turned on. This causes the output
frequency of the PLL circult to also fluctuate,
resulting in improper transmission.
SUMMARY OF THE INVENTION
An object of the present invention is therefore
to provide a transmitter comprising an improved
phase-locked loop (PLL) circuit which does not suffer
the aforementioned disadvantage of conventional
transmitter with a PLL circuit.
Another object o~ the present invention is to
provide a transmitter which comprises a PLL circuit
and a circuit for depressing frequency fluctuations
in the output of the PLL circuit.
Yet another object to the invention is to
provide a transmitter which comprises a frequency
~luctuation depressing circuit to depress frequency
fluctuations in the output of a PLL circuit, which
fluctuation is caused by the turning on of an
amplifier connected to the PLL circuit.
According to the present invention, there is
provided a transmitter comprising a PLL circuit to
produce an oscillation signal, the fre~uency of the
oscillation signal varying ~ith a modulation signal.
An amplifier is connected to the PLL circuit to
amplify the output thexeof. A switch circuit turns
on and off the amplifier. A frequency fluctuation
depressing (FDD) circuit is connected to the PLL
circuit and the switch circuit to depress frequency
fluctuations in the output o~ the PLL circuit by
changing the voltage of the modulation signal at a
time when the amplifier is turned on.
BRIEF DESCRIPTION OF THE DRAWINGS
The above and other objects, features and
advantages of the present invention will become more
apparent from the following description referring to
the accompanying drawings, in which:
Fig. 1 is a block diagram showing a pre~erred
embodiment of the pres~nt invention;
Fig. 2 shows a modulation input voltage vs.
output fre~uency characteristic of a
voltage-controlled oscillator (VCo) in the circ~it of
Fig. 1; and
Figs. 3A to . 3E show timing diagrams for
explaining the operation of the circuit shown in
Fig. 1.
-- 2
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
In Fig. 1, a transmitter includes a phase-locked
loop (PLL) circuit 4 to change the transmission
frequency. The output of PLL circuit 4 is amplified
by an amplifier 3 and provided to a power amplifier
(not shown) and then to an antenna (also not shown)
for radiation to a receiver. Power to the amplifier
3 is provided from a power supply terminal 6 through
a switch circuit 2. Power to tXe components of PLL
circuit 4 is provided from the terminal 6 directly
and through a switch circuit 1 as shown in Fig. 1.
The PLL circuit 4 comprises a voltage-controlled
oscillator (VCo) 41 which generates a desired
frequency. The output of VCo 41 is amplified by an
amplifier 42 and then applied to a pre-scaler 43.
The pre-scaler 43 frequency divides the output of
ampllfier 42 and provides a fre~uency divided signal
to a phase detector 44. The phase detector 44 is
also provided with a reference signal from a crystal
oscillator 47 and compares the phases of two inputs
to produce a phase error signal. The phase error
signal is applied to VCo 41 through a charge pump
circuit 45 and a low-pass filter 46 to control the
output frequency of VCO 41.
A modulation signal is applied to VCO 41 through
a terminal 8. VCo 41 has a frequency characteristic
with respect to the input voltage of the modulation
signal, as shown in Fig. 2. Thus, VCO 41 produces a
signal frequency modulated with the modulation
signal. ~he modulated signal is fed to the amplifier
3.
When the transmitter transmits the modulated
signal, the amplifier 3 is turned on by being
-- 3 --
~Z~ 2
I
provided with power through the switch circuit 2.
The s~itch circuit 2 is controlled with a transmitter
on/off signal which has high and low levels when the
transmitter is turned off and on, respectively (see
Fig. 3A). When the transmitter on/off signal has a
high level, the switch circuit 2 is open to provide
no powex to the amplifier 3. When the transmitter
on~off signal has a low level, the sw.itch circuit 2
is closed to provide power to the amplifier 3.
As mentioned earlier, the input impedance of the
amplifier 3 fluctuates at a time when the amplifier 3
is turned on. This input impedance fluctuation
causes t~e output frequency of VCO 41 to also
fluctuate, as shown in Fig. 3B. More partïcularly,
when the amplifier 3 is turned on at a time tl in
Fig. 3A, the output frequency of VCO 41 fluctuates
from a desired frequency f2 to a frequency of f2-f1,
as shown in Fig. 3~. This frequency fluctuation may
be about 5 k~z.
A frequency fluctuation depressing (FDD~ circuit
: 5 is added to depress the above-mentioned frequency
fluctuation. FDD circuit 5 includes resistors 51 and
52, a capacitor 53 and a diode 54. The resistor 51
has one terminal connected to the power supply
terminal 6 and the other terminal connected to an
anode of diode 54. A cathode of diode 54 ;.s
connected to one terminal of resistor 52, the other
terminal thereof being connected to the transmitter
on/off signal supply terminal 7. Also, one terminal
of capacitor 53 is connected to the anode of diode
54. The other terminal of capacitor 53 is connected
to the modulation signal supply terminal 8.
-- 4
1%94~ 02
In operation, when the transmitter is turned on,
i.e., the transmitter on~off signal changes from a
high level to a low level at a time tl, as shown in
Fig. 3A, the diode 54 is turned on. At this time, a
negative-going pulse passes through the resistor 52,
the diode 54 and the capacitor 53. Then, the
capacitor 53 is charged through the resistor 51. As
a res~lt, a voltage at a connection point A ch~nges
as shown in Fig~ 3C. Since VCo 41 has a fre~uency
characteristic Of Fig. 2, the voltage change at node
A (Fig. 3C) causes the output frequency of VCO 41 to
fluctuate from the desired frequency f2 to a
frequency of f~f1, as shown in Fig. 3D.
The frequency fluctuation of Fig. 3D is the
reverse direction of the fre~uency fluctuation (Fig~
3B) due to the turning-on of the arnplifier 3. Thus,
if the resistances of resistors 51 and 52 and the
capacitance of capacitor 53 are properly selected,
the frequency fluctuation due to the turning-on of
the amplifier 3 can be cancelled, as shown in Fig.
3E. The resistors of 10 kn and 18 kQ have been
employed as the resistors 51 and 52, respectively,
and the capacitor of 1 micro~arad (~F) as the
capacitor 53, so that the frequency fluctuation o 5
kHz has sufficiently been depressed.
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