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Patent 1299069 Summary

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Claims and Abstract availability

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(12) Patent: (11) CA 1299069
(21) Application Number: 1299069
(54) English Title: METHOD OF MAKING AN ARTICLE COMPRISING A BURIED SIO _LAYER, AND ARTICLE PRODUCED THEREBY
(54) French Title: PROCEDE POUR L'OBTENTION D'UN ARTICLE RENFERMANT UNE COUCHE PROFONDE DE SIO ; ARTICLE AINSI OBTENU
Status: Expired and beyond the Period of Reversal
Bibliographic Data
(51) International Patent Classification (IPC):
  • H01L 21/265 (2006.01)
  • C30B 31/22 (2006.01)
  • H01L 21/76 (2006.01)
(72) Inventors :
  • SHORT, KENNETH THOMAS (United States of America)
  • WHITE, ALICE ELIZABETH (United States of America)
(73) Owners :
  • AMERICAN TELEPHONE AND TELEGRAPH COMPANY
(71) Applicants :
  • AMERICAN TELEPHONE AND TELEGRAPH COMPANY (United States of America)
(74) Agent: KIRBY EADES GALE BAKER
(74) Associate agent:
(45) Issued: 1992-04-21
(22) Filed Date: 1987-10-29
Availability of licence: N/A
Dedicated to the Public: N/A
(25) Language of filing: English

Patent Cooperation Treaty (PCT): No

(30) Application Priority Data:
Application No. Country/Territory Date
933,273 (United States of America) 1986-11-26

Abstracts

English Abstract


-11-
METHOD OF MAKING AN ARTICLE COMPRISING A
BURIED SiO2 LAYER, AND ARTICLE PRODUCED THEREBY
Abstract
We have discovered that high quality subcritical SIMOX silicon-on-
insulator wafers can be produced by a method that comprises a randomizing
implant followed by an appropriate heat treatment. In a preferred embodiment,
the inventive method comprises, in succession, a subcritical oxygen implant
(nominal wafer temperature <350°C) into a (100) Si wafer, a low temperature
(500-700°C) anneal, a high temperature (> 1200°C) anneal, a randomizing implant
(~ 5x1014 Si/cm2, nominal wafer temperature < 100°C), and a low temperature
anneal (nominal wafer temperature between 500 and 700°C). The resulting buried
SiO2 layer typically is relatively thin (e.g., 60 nm), stoichiometric, continuous,
and essentially free of Si inclusions, and the Si overlayer typically is of device
quality and essentially free of twins, with Xmin~ 3%.


Claims

Note: Claims are shown in the official language in which they were submitted.


- 9 -
Claims
1. Method of making an article comprising a layer of SiO2 buried
within a Si body, the method comprising
a) providing a single crystal Si body having a major surface and a
crystal orientation;
b) implanting oxygen ions into the Si body through the major surface
such that a buried oxygen-rich layer is formed in the Si body, with a Si overlayer
thereon;
c) heat treating the oxygen-implanted Si body such that the buried
SiO2 layer is formed from the oxygen-rich layer,
d) completing making the article;
CHARACTERIZED IN THAT
e) the oxygen implant is a subcritical oxygen implant; and the method
further comprises
f) carrying out, subsequent to b), a randomizing implant and a heat
treatment such that the resulting Si overlayer is a device-grade overlayer having a
relatively low defect density near the SiO2/overlayer interface.
2. Method of claim 1, wherein the randomizing implant comprises
implantation of Si ions, and wherein the Si body is maintained at a nominal
temperature less than about 100°C during the randomizing implant.
3. Method of claim 2, wherein from about 2x1014 to about 1x1015
Si/cm2 are implanted during the randomizing implant, and wherein the Si ions
have an energy in the range from about 0.1 MeV to about 2 MeV.
4. Method of claim 1, wherein the Si body is maintained at a nominal
temperature less than about 350°C during the subcritical oxygen implant, and
wherein the randomizing implant is carried out subsequent to step c), with the Si
body being maintained at a nominal temperature less than about 100°C during the
randomizing implant.
5. Method of claim 4, wherein step c) comprises annealing the Si body
at a temperature greater than about 1200°C and wherein the heat treatment of
step f) comprises annealing the Si body at a temperature in the range from about500 to about 700°C subsequent to the randomizing implant.
6. Method of claim 5, wherein step c) further comprises annealing the
Si body at a temperature in the range from about 500 to 700°C.
7. Method of claim 1, wherein the Si body is maintained at a nominal

temperature of at least about 350°C during the substoichiometric oxygen implant, and
wherein a first randomizing implant is carried out prior to step c), with the Si body being
maintained at a nominal temperature less than about 100°C during the first randomizing
implant.
8. Method of claim 7, wherein step c) comprises annealing the Si body at
a temperature greater than about 1200°C.
9. Method of claim 8, wherein the method further comprises a second
randomizing implant, carried out subsequent to step c), the second randomizing implant
being followed by an anneal of the Si body at a temperature in the range from about 500
to about 700°C.
10. Method of claim 8, wherein step c) further comprises annealing the Si
body at a temperature in the range from about 500 to about 700°C.
11. Method of claim 1, wherein step c) comprises contacting the Si body
with an atmosphere adapted for causing the slow growth of a relatively thin SiO2 layer.
12. Method of claim 11, wherein the atmosphere comprises inert gas as a
major component and oxygen as a minor component.

Description

Note: Descriptions are shown in the official language in which they were submitted.


12~90 Ei9
METHOD OF MAKING AN ARTICLE COMPRISING A
BURIED SiO2 LAYER, AND ARTICLE PRODUCED THEREBY
Field of the Invention
This invention pertains to methods for manufacturing semiconductordevices. In particular, it pertains to silicon-on-insulator (SOI) technology, and to
SOI devices.
5 Background of the Invention
SOI devices are known to potentially have advantages (e.g~, reduced
junction capacitance, increased radiation hardness) over convendonal silicon
devices. Several techniques for producing SOI heterostructures and, in particular,
for producing Si/SiO2/Si heterostructures of the type shown schematically in
10 FIG. 1, are known. Among the known techniques for producing such a
heterostructure is ~e oxygen implantation technique, and this application pertains
to this particular technique (sometimes referred to as "Separation by implanted
oxygen" [SIMOXl) for forming such a heterostructure. For a review of the
SIMOX technique see, for instance, P. L. F. Hemment, Materials Research Society
lS Symposia, Proceedings, Vol. 53, pp. 207-22l (1986).
As generally practiced in the art, the SlMOX technique comprises
implanting a sufficiently high dose of oxygen into a silicon body (typically a Si
wafer) such that a stoichiometric oxygen-rich region is fo~ned within the body.
By this we mean that the oxygen distribution within the silicon body reaches a
20 maximum concentration of at least two oxygen atoms per silicon atom. A typical
implantation dose is 2 x 1018 oxygen atoms/cm2. The (energy dependent) critical
dose ~c is the minimum dose at which, for a given implantation energy, a
stoichiometric implant results. For instance, ~c is about 1.4 x 1018cm 2 at
200 keV.
Prior art stoichiornetric implants result in the formation of relatively
thick (typically about 0.3 ~Lm or more) layers of SiO2, with a relatively thin
(exemplarily about 0.1 ~lm) silicon overlayer. For several reasons, it would be
desirable to be able to use lower implant doses, and/or to produce SOI wafers
having a thinner buried oxide layer. Lower doses are desirable because they
30 generally produce less damage in the Si body, and because they make possible
increased throughput. Thinner oxide layers make possible devices requiring lowerback bias isolation vol~age, as compared to devices using a prior art (thicker)
buried oxide layer.

1299069
Attempts have been made to obtain these desired results by merely
reducing the implant dosage below ~c such that a substoichiometAc implant
region, i.e., an implanted region wherein the maximum concentration of oxygen iseverywhere less than two oxygen atoms per silicon atom, is formed. See, for
5 instance, J. Stoemenos et al, Applied Physics Letters, Vol. ~8(21), pp. 1470-1472
(1986). These authors report that implantation of a (only slightly) subcritical dose
(1.3xl018cm~2, 200 keV) of oxygen results in formation of an oxygen-rich layer
with dispersed Si islands therein, and that annealing of such a sample at 1150Cfor two hours results in a coarsening of the dispersed Si and formation of SiO2
10 precipitates in the Si overlayer near the Si/SiO2 interface. Such a wafer in
general would not be acceptable for device ~lanufacture. Stoemenos et al also
report that annealing such a wafer at 1300C for 6 hours produces a Si overlayerfree of SiO2 precipitates but produces a buried SiO2 layer that contains a
significant volume of dispersed Si islands. It is known that such islands may act
15 as overlapping floating gates if MOS devices were iorrned in such SOI wafers.Thus, such prior art SIMOX wafers typically are also not acceptable for device
manufacture.
In general, two different situations can be identified. If the silicon
substrate is at a relatively low nominal temperature (typically less than about
20 350C), during the subcritical ion implant, appropriate heat treatment can result in
formation of a relatively homogeneous thin SiO2 layer and recrystallization of the
silicon overlayer. However, under these conditions the region of the overlayer
that is adjacent to the Si/SiO2 interface is generally heavily twinned, frequently
making the heterostructure unsuitable for device fabrication. On the other hand, if
25 during the subcritical implant the substrate is at a relatively high nominal
temperature (i.e., typically greater than about 350C), subsequent heat treatment
generally results in formation of a nonhomogeneous buried SiO2 layer containing
dispersed Si regions, and the silicon overlayer typically also comprises dispersed
second phase (SiO2) regions. In this instance also the method typically does not30 result in a heterost~ucture that is useffil for device ~abrication.
In view of the potential adYantages associated with low dose
implantation and with SIMOX heterostructures which have a relatively thin buriedSiO2 layer, a substoichiometric (subcritical) implant technique that can be used to
reliably produce a Si/SiO2/Si heterostructure in which the buried SiO2 layer is
35 free of Si islands and in which the Si overlayer has a relatively low defect density

~29~9
and is of device quality would be of considerable significance. This applicationdiscloses such a technique.
Summary of the Invention
We have discovered an implant method that can eliminate the above
S referred to shortcomings of the prior art subcritical implant method. The
inventive method comprises a subcritical implant, and further comprises at leastone randomizing implant and subsequent appropriate heat treatment, and can
produce Si/SiO2/Si heterostructures having a substantially homogeneous relatively
thin buried SiO2 layer and an overlayer of device-grade (typically Xmir~ < 5%) si.
In a broad aspect, the inventive nnethod comprises randomization, by
any appropriate technique, of at least the region of the silicon overlayer that is
adjacent to the buried SiO2 layer, in a Si/SiO2/Si heterostructure formed by anyappropriate oxygen implantation technique, -followed by an appropriate heat
treatment. The details of the inventive method depend, inter alia, on the substrate
15 temperature during the oxygen implant, as will be described below.
In an exemplary preferred embodiment ~e inventive method
comprises providing a single crystal Si body having a predetermined crystal
orientation and a major surface, implanting a subcritical dose of oxygen into the
Si body through the major surface such that an oxygen-rich layer is formed within
20 the Si body, with a silicon overlayer of relatively low oxygen content thereon.
Furthermore, the embodiment comprises heat treating the oxygen-implanted Si
body such that a substantially stoichiometric buried SiO2 layer is formed from the
oxygen-Iich layer, with at least some of the material of the Si overlayer having the
predetermined crystal orientation. The embodiment further comprises implanting
25 Si ions through the major surface, the dose being effective for causing substantial
randomization of at least the overlayer material near the SiO2 layer/overlayer
interface, and heat treating the implanted Si body such that device grade overlayer
material, of substantially the predetermined crystal orientation, with relatively low
defect density near the buried SiO2 layer/overlayer interface, results.
30 Brief Description of the Drawings
FIG. 1 schematically depicts a SOI heterostructure according to the
invention;
F~G. 2 is a flow chart showing schematically major process steps of
two exemplary embodiments of the inventive method;

:~2~9069
- 4 -
FIG. 3 schematically shows an exemplary semiconductor device
formed on a SOI wafer according to the invention; and
FlGS. 4 and 5 show Rutherford Backscattering Spectroscopy (RBS)
spectra of an exemplary SOI heterostructure.
5 Detailed Description of Some Preferred Embodiments
FIG. I schematically depicts a SOI heterostructure 10 of the type that
is of concern herein. The SiO2 layer 11 is bllried within a single crystal Si body.
Desirably, Si oveliayer 12 is of device quality and retains essentially the original
lattice orientation of the Si body.
FIG. 2 is a combined flow chart for two alternative exemplary
embodiments of the inventive process, in which the left and right hand branches
apply for relatively low and high nominal temperature subcritical oxygen implants,
respectively.
As will be appreciated by those skilled in the art, prior to the
15 subcritical implant, the major surface of the substrate (typically a (100) surface)
will be cleaned, and/or otherwise prepared. Such techniques are well known and
will not be discussed herein. It is to be understood that implants are carried out
in an appropriate vacuum.
Exemplarily, we have found that a subcritical implant dose
20 advantageously is in the range from about 3 x 1017 to about 7 x 1017 oxygen
ions/cm . However, this range is not to be considered limiting, since higher
subcritical doses may be advantageously used at times, whereas even lower doses
may result in useful buried SiO2 layers.
In a c~rendy preferred embodiment (corresponding to the left branch
25 of FIG. 2), the nominal substrate temperature during the subcritical oxygen
implant is relatively low, typically < 35QC. By the "nominal" substrate
temperature we mean herein the temperature at which the substrate would be,
absent any beam heating effects. For instance, we typically clamp our Si wafers
to a stainless steel Uock that is maintained at a given temperature. The
30 temperature of the block is considered to be the nominal substrate temperature.
As shown in the left branch of F~G. 2, the (low temperature)
subcritical oxygen irnplant is followed by an appropriate heat treatment such that
substantially stoichiometric SiQ2 is formed from the oxygen-rich implant layer.
Such a heat treatment advantageously comprises a low temperature anneal
35 (exemplarily between 30 minutes and 3 hours at a temperature between 500 and

~z~ 9
800C, preferably not exceeding 700C) which typically recrystalizes amorphous
Si. The heat treatment also comprises a high temperature anneal, typically at a
temperature greater than 1200C, for some appropriate extended period,
exemplarily more than three hours. As will be appreciated by those skilled in the
S art, the annealing time typically is inversely related to the annealing temperature.
A minor amount of experimentation typically will suffice to determine an
appropriate time/temperature combination. Although we currently prefer two-step
heat treatment as discussed above, other annealing programs (e.g., a slow ramping
up of the temperature, with a high temperature soak, or a simple high temperature
10 anneal) may also be useful.
As will be evident to those skilled in the art, the heat treatment is
advantageously carried out under non-oxidizing conditions, e.g., in vacuum, or in
an inert atmosphere. The prior art knows formation of a relatively thick (e.g.,
500 nm) oxide cap layer as a means for protecting the Si overlayer during ~he
15 high temperature anneal. We have devised an advantageous technique for
protecting the Si overlayer during a high temperature anneal. The technique,
which is currently preferred by us, comprises carrying ou~ the anneal in an
atmosphere that comprises at least one inert gas as a major constituent (e.g., 99%
Ar) and oxygen as a minor constituent (e.g., 1%), with the oxygen concentration
20 being effective to result in the slow growth of a thin (e.g., 20 nm) protective SiO2
layer during the heat treatment. The presence of this thin protective layer prevents
both the pitting of the Si overlayer that frequently occurs when the annealing is
carried out in nominally non-oxidizing conditions (vacuum or inert gas
atmosphere), and the growth of a thick oxide layer that occurs if the annealing is
25 carried out in more highly oxidizing conditions.
As shown in the left branch of F~G. 2, after the high tempera~ure
anneal the silicon body is subjected to a randomizing ion implant. We have foundit to be advantageous to carry out the randomizing implant at a nominal substrate
temperature of less than about 100C. Typically the substrate is nominally at
30 room temperature, and we have also achieved good results when the substrate was
cooled to about liquid nitrogen temperature (77K). Although we believe that a
relatively low substrate temperature during the randomizing implant can prevent
healing of implant-produced lattice defects, it may be possible that under some
conditions nominal substrate temperatures above 100C may also be acceptable.

(369
- 6 -
Exemplarily, we have implanted silicon iOllS during the randomizing
implant, with an exemplary dose being 3 x 1014 Si/cm~. We currently believe
that particulaTly useful Si doses typically are in the range from 2X1014 to
lxlO /cm . We used implantation energies for both the subcritical oxygen
5 implant and for the randornizing implant of 200 keV and 400 keV, respectively.However~ a wide range of energies, e.g., 100 keV to about 2 Me~, is expected to
be useful. Furthermore, the randomizing implant need not necessarily be a Si
implant. ~or instance, an Ar or other noble gas implant may under some
circumstances be used.
The function of the randomizing implant is, we currently believe, to
amorphize at least the region of the silicon o~erlayer that is adjacent to the
interface with the buried SiO2 layer. However, typically the region of the bottom
silicon layer that is adjacent to the inter~ace with the buried SiO2 layer is also
amorphized. It is desirable that a portion of the top Si layer, typically the portion
15 that is adjacent to the major surface of the silicon body, remain crystalline so as
to provide a seed region for the oriented single crystal regrowth of the siliconoverlayer.
In the preferred embodiment (left branch of F~G. 2) the required
randomizing implant is followed by an appropriate heat treatment. Exemplarily,
20 the treatment comprises a relatively low temperature (~ 600C, > 1 hr) anneal.
More generally, we consider annealing temperatures in the range 500-800C
~preferably not exceeding 700C) ~o be useful, but under certain conditions
annealing at a temperature outside of this range may also result in the regrowth of
device-quality Si overlayer material. After this annealing treatment the
25 heterostructure is stable with regard to heat treatments as encountered in device
processing.
Another, but currently less prefer~ed, embodiment of the inventive
method (right branch of FIG. 2) comprises carrying out the oxygen implant at a
relatively high nominal temperature (typically at least about 350C), followed by
30 a first randomizing implant of the type described above. Subsequent to
completion of the first randomizing implant the implanted Si body is heat treated,
substantially as discussed in the context of the currently preferred embodiment.This heat treatment advantageously is followed by an optional second randomizingimplant. The conditions of the second randomizing implant typically are similar
35 to those of the first randomizing implant. The optional second randomizing
.

~Z9~069
- 7 -
implant generally will be followed by a low temperature anneal of the type
discussed in the context of the currently preferred embodiment.
After completion of the appropriate heat treatment SOI wafers
according to the invention typically are ready for device fabrication by known
5 methods. For a review of such methods see, for instance, D. H. Elliott, Integrated
Circuit Fabrication Technology, McGraw-Hill (1982).
An exemplary electronic device (an enhancement-type n-channel MOS
transistor) according to the invention is shown in FIG. 3, wherein layer 11 is the
buried SiO2 layer, and 12 refers to a portion of the Si r>verlayer. The portion of
10 the overlayer is doped to be p-type, with two sub-portions being n+. Oxide
regions 31 serve to isolate 12 from other devices, to define contact windows, and
to provide gate insulation, all in a conventional manner. Numerals 32 refer to
source, gate, and drain metal contacts.
Example I: A (100) oriented single crystal Si wafer was cleaned by
15 a conventional procedure and clamped to a stainless steel block in the targetchamber of an ion implanter. With the steel block nominally at 100C, 3X1017
oxygen/cm were implanted at 170 keV, resulting in ~ormation of an oxygen-rich
layer having an approximately Gaussian profile (depth of maximum about 370 nm,
full width at half maximum about 180 nm). The wafer was transferred to a tube
20 furnace, and maintained at 600C for 2 hours and at 1390C for 30 minutes in
argon +1% oxygen. The anneal resulted in formation of an about 60 nm thick
oxide layer from the oxy~en-rich implant layer, with twinned Si at both interfaces
A RBS spectrum of the thus produced wafer was obtained by standard means
[2 MeV He+, (100) and 5 off (100)] and is shown in FIG. 4. As is well known,
25 such spectra, including the well known quantity Xm~ derived from the spectra, are
standard indicators of the quality of thin crystal layers. CuIves 40 and 41 are the
random and channeled yields, respectively, and show that the buried oxide layer is
essentially stoichiometric, the near-surface part of the Si overlayer is single crystal
material, and the Si/SiO2 interface regions are highly defective. Transrnission
30 electron microscopy showed the defective regions to be heavily twinned.
Subsequent to RBS, the wafer was again transferred to the implanter, and 3x10~4
silicon/cm2 (400 keV) were implanted, with the wafer nominally at liquid N2
oemperature. The RBS yields of the randomized wafer are shown in P~G. 5,
wherein curves Sû and 51 are the random and channeled yields. The
35 amorphization of the Si adjacent to the SiO2 layer, with the amorphized region

~2~306g
- 8 -
extending almost to the Si surface, is eYident. Following RBS the wafer was
annealed at 600C for 2 hours in vacuum. The results of subsequent RBS are
also shown in F~G. 5, wherein curve 52 is the channeled yield of the wafer afterthe second low temperature anneal. The improvement in crystal quality,
5 especially of the Si overlayer, is clearly evident. In particular, the SiO2/Sioverlayer interface was essentially free of defects, with the overlayer being ofdevice quality, with Xmin of about 3%. Electron microscopy was also performed
on the wafer, and showed lhat the buried SiO2 layer was essentially continuous,
without Si islands, and with sharp boundaries, and com'irmed the absence of twins
10 in the Si overlayer.
Example II: A second SOI wafer was prepared substantially as
described in Example I, except that the nominal wafer temperature during the
subcritical oxygen implant was 500C, the oxygen implant (4x1017 oxygen/cm2,
200 keV) was followed by a randomizing Si implant (nominal temperature 30C,
15 lxl015/cm2, 460 keV), the subsequent heat treatment was followed by a second
randomizing Si implant (conditions as above), and this was followed by a 600C
anneal. The quality of the thus formed heterostructure was substantially as
described in Example I.
.

Representative Drawing
A single figure which represents the drawing illustrating the invention.
Administrative Status

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Event History

Description Date
Time Limit for Reversal Expired 2003-04-22
Letter Sent 2002-04-22
Grant by Issuance 1992-04-21

Abandonment History

There is no abandonment history.

Fee History

Fee Type Anniversary Year Due Date Paid Date
MF (category 1, 6th anniv.) - standard 1998-04-21 1998-02-27
MF (category 1, 7th anniv.) - standard 1999-04-21 1999-03-19
MF (category 1, 8th anniv.) - standard 2000-04-21 2000-03-20
MF (category 1, 9th anniv.) - standard 2001-04-23 2001-03-19
Owners on Record

Note: Records showing the ownership history in alphabetical order.

Current Owners on Record
AMERICAN TELEPHONE AND TELEGRAPH COMPANY
Past Owners on Record
ALICE ELIZABETH WHITE
KENNETH THOMAS SHORT
Past Owners that do not appear in the "Owners on Record" listing will appear in other documentation within the application.
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Document
Description 
Date
(yyyy-mm-dd) 
Number of pages   Size of Image (KB) 
Claims 1993-10-28 2 68
Abstract 1993-10-28 1 36
Cover Page 1993-10-28 1 14
Drawings 1993-10-28 3 64
Representative Drawing 2003-03-19 1 10
Descriptions 1993-10-28 8 395
Maintenance Fee Notice 2002-05-21 1 179
Fees 1997-02-21 1 66
Fees 1996-02-27 1 62
Fees 1995-03-20 1 71
Fees 1994-02-21 1 44