Note: Descriptions are shown in the official language in which they were submitted.
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IMAGE RECORDING APPARATUS
BACKGROUND OF THE INVENTION
The present invention relates to an image
recording apparatus to be incorporated in a high speed
video-system and more particularly is concerned with an
image recording apparatus provided with an image device
capable of selecting an imaging area and reading out the
area with very fast frame feed speed.
An image device such as CCD or MOS-type image
device for transducing an optical image elements into
electric signals is generally utilized for a high speed
camera or a high speed system for photo- graphing images
and reproducing records. For example, there are provided
Japanese Patent Application National Publication Nos.
56-501704 and 57-501309, showing conventional image devices
in which an imaging surface is formed by a plurality of
two-dimensional arrangments of photoelectric transfer
elements such as photodiodes, the imaging surface is
divided into a plurality of rectangular blocks along the
vertical row direction of the imaging surface for reading
out with high speed the images formed on the imaging
surface, and quick read-out of frame feed speed can be
performed by scanning simultaneously parallelly a plurality
of lines of the photoelectric transfer elements
respectively arranged in the divided rectangular blocks.
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However, the imaging surface of the image device
of such prior art to be incorporated in the high speed
video-system is divided into a plurality of rectangular
blocks along the vertical row direction to thereby
realizing high speed read-out of the image, but the
division of the imaging surface into the rectangular blocks
prodives a problem of limiting objects as shown as imaging
areas.
Furthermore, in the prior art image device, since
the imaging surface is divided along the vertical row
direction, skipping operation in the vertical direction can
be relatively easily performed by a simple circuit
structure without adversely affecting on number of the
frame. However, skipping operation in the horizontal
direction requires a high speed circuit structure because
of a lot of the photoelectric transfer elements and
application of high speed pulses, which results in a
complicated control thereof, and moreover, a degree of
freedom for the selection of the imaging areas is limited
and, for this reason, every one of the imaging areas of the
respective rectangular blocks can only be selected and it
is hence difficult to select other imaging areas.
SUMMARY OF THE INVENTION
An object of the present invention is to
substantially eliminate defects or drawbacks encountered in
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the prior art and to provide an image recording apparatus
capable of improving degree of freedom for selecting image
areas of an imaging surface of an image device of the image
recording apparatus and of reading out a picture image on
the imaging surface with super-high frame feed speed.
This and other objects can be achieved according
to the present invention by providing an image recording
apparatus in which an imaging surface of an image device is
formed so as to store and read out an image by arranging
two-dimensionally a plurality of photoelectric transfer
elements, the imaging surface is divided along lines into a
plurality of blocks, scanning lines are formed in
accordance with the photoelectric transfer elements
arranged in a horizontal direction of the divided bloccks,
respectively, and the plurality of scanning lines of
therespective blocks are parallelly linearly scanned to
output a multichannel video signals, the image recording
apparatus comprising:
a first scanning circuit for setting a plurality
of linear scanning direction start positions along the
scanning line direction of the blocks and selecting a block
to be read out;
a second scanning circuit for selecting the
linear scanning start positions and numbers of picture
elements to be linearly scanned; and
a drive circuit for transmitting drive signals
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to the first and second scanning circuit, wherein the first
and second scanning circuits are controlled by the drive
signals to select image areas having different linear
scanning start positions from each other and then to output
multichannel video signals from the image areas.
In a preferred embodiment, the first scanning
circuit comprises a vertical scanning circuit for carrying
out vertical scanning and thed second scanning circuit
comprises a horizontal scanning circuit for carrying out a
vertical scanning. The image recording apparatus may
further comprise a clock for transmitting a signal for
driving the drive circuit, an amplifier circuit connected
to the image device, an analog-to-digital convertor
connected to the amplifier circuit and a memory connected
to the analog-to-digital convertor, and wherein the drive
circuit is operatively connected to the analog-to-digital
convertor.
According to the image recording apparatus of the
characters described above, the imaging surface of the
image device of two-dimensional arrangement is divided into
a plurality of blocks along line direction of the imaging
surface and a plurality of scanning lines are formed in
accordance with the photoelectric transfer elements
arranged in the longitudinal direction of the respective
blocks. A plurality of line scanning start positions are
set along the scanning direction of the blocks. The first
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scanning circuit selects the block to be read out and the
second scanning circuit selects and controls the linear
scanning start position and the number of linear scanning
picture elements to thereby select predetermined imaging
areas having different linear scanning start positions and
then to output the multichannel video signals from the
selected areas, whereby the selection freedom of the
imaging areas can be improved and the super-high speed
frame feed speed read-out can be realized.
BRIEF DESCRIPTION OF THE DRAWINGS
For a better understanding of the present
invention and to show how the same is carried out,
reference is made to, by way of preferred embodiments, to
the accompanying drawings, in which:
Fig. 1 is a block diagram of an image recording
apparatus of a first embodiment according to the present
invention;
Fig. 2 shows a block of a part of the image
recording apparatus of Fig. 1 representing functional
layout of the first embodiment;
Figs. 3A and 3B are timing charts at a time of
selecting a specific block from divided blocks of an
imaging surface of an image device of the image recording
apparatus;
Figs. 4A, 4B and 4C are views in which image area
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read-out start positions are changed with respect to one
image surface;
Fig. 5 is a block similar to that of Fig. 2 but
related to a second embodiment according to the present
invention;
Fig. 6 is a table showing selection examples of
vertical blocks of an image device of Fig. 5; and
Fig. 7 is a table showing selection examples of
horizontal read-out start positions of the image device of
Fig. 5.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
A first embodiment of the image recording
apparatus according to the present invention will be
described hereunder with reference to Figs. 1 to 4.
Fig. 1 shows a block diagram of an image
recording apparatus 10 to be incorporated in a high speed
video-camera or high speed video-system. The image
recording apparatus 10 is provided with an image device or
sensor 11 such as CCD or MOS-type image device for
transducing optical image elements into electric signal in
two-domensional arrangement capable of storing and reading
out images, and the image device 11 is driven by a drive
signal from a drive circuit 12 to thereby start the
read-out operation. The drive circuit 12 is driven by a
clock pulse of 25MHz, for example, from a clock 13.
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As shown in Fig. 2, the image device 11 is
provided with an imaging surface tlight receiving ssurface)
composed of a plurality of photoelectric transfer
elements, in two-dimensional arrangemnt, such as photodiods
composed of MOS-type semiconductor elements, a vertical
scanning circuit 16 as a first scanning circuit
constituting a block selection shift register, a horizontal
scanning circuit 17 as a second scanning circuit
constituting a line shift register, and an output unit 18
for outputting a multich~nnel analog video signal in
response to the scanning of the imaging surface.
The multich~nnel analog video signals Sl-S16
outputted from the image device 11 are amplified by an
amplifier circuit 20, and thereafter, are inputted into an
AD (analog-to-digital) convertor 21 in which the analog
video signals are converted into digital video-signals. The
digital video signals are then recorded continuously in a
memory 22 having a large capacity as data, and the data
thus stored in the memory 22 is read out in time series by
a read-out memory, not shown, to thereby reproduce the
images at a speed lower than the imaging speed.
As shown in Fig. 2, the image device 11 forms the
imaging surface 15 in the form of format of the
photoelectric transfer elements as imaging elements having
two-dimensional arrangement of, for example, two handreds
and sixty-six (266) horizontal rows Rl, R2, --- R266 and
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two handreds and fifty-six (256) vertical lines C1, C2, ---
C256, and the imaging surface 15 is also divided into
sixteen blocks B1, B2, --- B16 along the vertical rows. The
respective divided blocks forms sixteen photoelectric
transfer element rows along the horizontal direction of the
longitudinal direction of the imaging surface 15 and
sixteen scanning lines are also constituted by the
respective sixteen photoelectric transfer element rows. The
sixteen scanning lines of the respective blocks Bl, B2, ---
Bl6 are parallelly scanned in order by the vertical and
horizontal scanning circuits 16 and 17, and the analog
video signals S1, S2, --- S16 are then outputted through
the output unit 18. The reason, why the number of the
horizontal photoelectric transfer elements is larger than
that of the vertical photoelectric transfer elements by
about 10 numbers, is a countermesure for a margine with
respect to noises.
The imaging surface 15 has a plurality of, five,
for example, linear scanning start positions H1 (first
image element), H2 (sixty-fifth image element), H3 (ninety-
seventh image element), H4 (one handred and twenty-ninth
image element) and H5 (one handred and ninety-third image
element).
In Fig. 2, reference numeral 24 denotes an
optical black BOB for setting a reference point (D point)
of the AD convertor 21.
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Horizontal clock pulses HC1 and HC2 outputted
from the drive circuit 12 and inputted into the horizontal
scanning circuit 17 are utilized as timings for reading out
every one picture element when a certain picture element of
the horizontal photoelectric transfer elements (266
numbers). When the horizontal read-out is started with any
one of the horizontal shift register synchronizing pulses
H1, H2, --- H5, the picture element read-out is performed
from this starting time with these horizontal clock pulses
HC1 and HC2. These horizontal clock pulses HC1 and HC2 have
12.5 MHz, respectively, but have phases different from each
other by 180 and have the horizontal scanning speed of 25
MHz.
The reading-out of the images recorded on the
imaging surface 15 of the image device ll by the image
recording apparatus 10 will be described hereunder.
First, when the imaging surface 15 of the image
device 11 is fully scanned, the drive circuit 12 is driven
by the clock 13 and generates, as drive signals, a vertical
reset pulse VR and a vertical shift register clock pulse
VC, which are transmitted to the vertical scanning circuit
16 as shown in Fig. 3 to thereby enable and drive the
vertical scanning circuit 16. This vertical scanning
circuit 16 is reset by the vertical reset pulse VR and
selects the first block B1 by the vertical shift register
clock pulse VC, enabling the image scanning operation of
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the first block Bl.
Simultaneously, a horizontal reset pulse HR and a
horizontal shift register synchronizing pulse Hl are
transmitted from the drive circuit 12 to the horizontal
scanning circuit 17 to start the scanning of the first
picture element, thus driving the horizontal scanning
circuit 17. The horizontal scanning circuit 17 is reset by
the horizontal reset pulse HR and the scanning is started
sequentially from the first picture element Rl by the
horizontal shift register synchronizing pulse Hl.
According to these operation, the picture image
recorded on the imaging surface 15 of the image device 11
is scanned parallelly simultaneously along the sixteen
scanning lines from the first picture element Rl of the
selected first block Bl. The analog video signals Sl, S2,
--- S16 obtained by this scanning operation are outputted
from the output unit 18.
The drive circuit 12 is provided with a
horizontal counter for the horizontal scanning operation so
that the horizontal scanning has once been completed by
transmitting the horizontal reset pulse HR to the
horizontal scanning circuit 17 at a time of the completion
of the horizontal scanning of all the picture elements (256
numbers), the vertical shift register clock pulse VC is
then transferred to the vertical scanning circuit 16 to
finish the enabling of the operation of the first block Bl,
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and then the scanning is skipped in the vertical direction
to thereby select the second block B2 and to enable the
operation of the second block B2.
Thereafter, the horizontal shift register
synchronizing pulse H1 for the first picture element
read-out start is transferred to the horizontal scanning
circùit 17 from the drive circuit 12 to thereby start the
read-out of the second block B2.
Subsequently, substantially the same operation as
that described above is repeated with respect to the
respective blocks B3 to B16, and the read-out operations of
these blocks can be performed. After the read-out of the
final block B16, the vertical reset pulse VR and the
vertical shift register clock pulse VC are transferred to
the vertical scanning circuit 16 for the treatment of the
next picture image on the imaging surface 15. In the next
operation, the first blcok B1 is again selected and the
operation of this first block Bl is enabled.
The output unit of the image device 11 outputs,
to the AD convertor 21, the analog video signals Sl, S2,
--- S16 corresponding to the sixteen scanning lines
respectively corresponding to the enabled selected blocks
Bl, B2, --- B16. The not-enabled and not-selected blocks
are affected by the image scanning operation, and electric
charges are accumurated in accordance with incident lights.
Image treatment operation for selecting and then
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scanning imaging areas from the imaging surface 15 of the
image device 11 will be then described hereunder.
The description is made with reference to a case
that a central square section of sixty-four numbers (64) of
horizontal picture elements and sixty-four numbers (64) of
vertical picture elements is read out.
The drive circuit 12 is driven by the clock 13
and generates, as a drive signal, the vertical reset pulse
VR to the vertical scanning circuit 16, which is reset by
this vertical reset pulse VR. Next, as shown in Fig. 3B,
the drive circuit 12 generates vertical shift register
clock pulses sequentially by seven (7) clocks to the
vertical scanning circuit 16 to thereby select the seventh
block B7, enabling the opeation of the selected seventh
block B7.
Under the operation enabled condition of the
seventh block B7, the drive circuit 12 generares drive
signals, as adress signals, to the vertical scanning
circuit 17, the horizontal reset pulse HR and the
horizontal shift register synchronizing pulse H3 for start
the scanning of the ninety-seventh (97) picture element.
The horizontal scanning circuit 17 is thus reset by the
horizontal reset pulse HR and the scanning is started from
the ninety-seventh picture element in response to the
horizontal shift register synchronizing pulse H3.
The horizontal scanning operation by means of the
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horizontal scanning circuit 17 is counted by the horizontal
counter for the horizontal scanning in association with the
drive circuit 12, and the drive circuit 12 generates the
horizontal reset pulse HR to the horizontal scanning
circuit 17 to stop and then reset the horizontal scanning
by taking the timing at a time of the completion of the
horizontal scanning by the amount of the sixty-four picture
elements. While, the vertical shift register clock pulse VC
is transferred to the vertical scanning circuit 16 from the
drive circuit 12 to thereby finish the enabling of the
operation of the block B7, and the operation is then
skipped to select the eighth blcok B8, enabling the
operation of the eighth block B8.
Thereafter, the horizontal shift register
synchronizing pulse H3 for starting the scanning of the
ninety-seventh picture element is transferred to the
vertical scanning circuit 17 to read out the selected
eighth block B8. These operations are repeated for the
succeeding operations, and at the time of the completion
of the read-out of the block BlO by a vertical counter for
the vertical scanning provided for the drive circuit 12,
the vertical reset pulse VR and the subsequent vertical
shift register clock pulses VC (by seven clocks) are
transferred to the vertical scanning circuit 17 for the
read-out of the next imaging area A, and the scanning of
the next block is started.
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The imaging areas can be selected in accordance
with the sequential manner for transferring vertical shift
register clock pulses VC from the drive circuit 12 and the
numbers of combination of the horizontal shift register
synchronizing pulses H1, H2, H3, H4 and H5. The imaging
areas can be selected from the various areas other than the
areas A and B shown in Fig. 2, thus improving the selection
freedom of the imaging areas.
As described above, the drive circuit 12 is
provided with the horizontal and vertical counters
respectively for the horizontal and vertical scannings,
whereby the setting of the whole imaging surface, the
starting positions and the numbers of the picture elements
of the horizontal picture element of the imaging area
(divided picture), the starting positions of the vertical
blocks Bl to B16, and the setting of the numbers of the
blocks, can be performed. Further, in the scanning time of
the whole picture surface, the time lag from the picture
image dividing time on the scanning can be neglected by
giving a margine by the time amount corresponding to the
maximum pulse as shown in Fig. 3A to the vertical shift
register clock pulse VC which is transferred from the drive
circuit 12 to the vertical scanning circuit 16.
The read-out data speed of the image recording
apparatus 10 is for example of about 25 MHz, by which frame
feed speed is obtained as shown in the following table 1.
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Table 1
Scanning Horizontal Vertical Frame Feed
Mode Picture * Picture Speed (N/sec)
Elements Elements
Whole Surface 256 *256 4500
Divided Surface (1) 256 * 128 9000
Divided Surface (2) 256 * 64 18000
Divided Surface (3) 128 * 128 13000
Divided Surface (4) 128 * 64 27000
Divided Surface (5) 64 * 64 40500
The imaging area read-out area can be changed in
its read-out stating position by every completion of the
treatment of one image picture. Figs. 4A, 4B and 4C shows
examples of cases in which the read-out starting positions
are changed to one picture image of 64 * 64 picture
elements. In these cases, the frame feed speed becomes high
speed of 1/40500 sec., thus making enable the super-high
speed treatment.
As described above, one portion of the whole
image surface can be read out by changing the read-out
starting positions every completion of the treatment of
each image while following the movement of an object to be
imaged.
Another embodiment of the image recording
apparatus according to the present invention will be
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described hereunder with reference to Figs. 5 to 7.
An image recording apparatus lOA of this
embodiment is basically different from the image recording
apparatus 10 of Fig. 2 with reference to the drive signal
from the drive circuit 12 to the vertical scanning circuit
16 and the horizontal scanning circuit 17, but other
construction is not different from that of the first
embodiment, and accordingly, in Figs. 5 to 7, like
reference numerals are added to elements or portions
corresponding to those of the first embodiment of Figs.
to 4.
In this embodiment of Fig. 5, vertical shift
register signals VCl to VC4, as shown in Fig. 6, are
transferred as drive signals from the drive circuit 12 to
the vertical scanning circuit 16 to thereby select the
blocks Bl to B16. Simultaneously, horizontal shift register
synchronizing signals HCl to HC3, as shown in Fig. 7, are
transferred from the drive circuit 12 to the horizontal
scanning circuit 17 to thereby select the horizontal
read-out start position from Hl (first picture element), H2
(sixty-fifth picture element), H3 (ninety-seventh picture
element), H4 (one handred and twenty-ninth picture element)
and H5 (one handred ninety-third picture element).
In the described embodiments, the imaging surface
of the image device is divided into sixteen blocks and
five horizontal read-out start positions (i.e. linear
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scanning start positions) are set to the horizontal
scanning circuit, but the numbers of the blocks and
start positions are not limited to those numbers and may
be optionally selected as occasion demands.
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