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Patent 2228012 Summary

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Claims and Abstract availability

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(12) Patent Application: (11) CA 2228012
(54) English Title: FLEXIBLE PRINTED CIRCUIT BOARD FOR USE WITH METAL OXIDE VARISTOR, APPLICABLE TO A SURGE PROTECTOR
(54) French Title: CIRCUIT IMPRIME SOUPLE DE MOVISTOR, POUR PROTECTEUR DE SURTENSION
Status: Deemed Abandoned and Beyond the Period of Reinstatement - Pending Response to Notice of Disregarded Communication
Bibliographic Data
(51) International Patent Classification (IPC):
  • H5K 1/18 (2006.01)
  • H2H 1/04 (2006.01)
(72) Inventors :
  • ROMEO, ROBERT (United States of America)
(73) Owners :
  • LEVITON MANUFACTURING CO., INC.
(71) Applicants :
  • LEVITON MANUFACTURING CO., INC. (United States of America)
(74) Agent: SMART & BIGGAR LP
(74) Associate agent:
(45) Issued:
(22) Filed Date: 1998-01-26
(41) Open to Public Inspection: 1998-07-30
Examination requested: 2002-12-17
Availability of licence: N/A
Dedicated to the Public: N/A
(25) Language of filing: English

Patent Cooperation Treaty (PCT): No

(30) Application Priority Data:
Application No. Country/Territory Date
08/791,126 (United States of America) 1997-01-30

Abstracts

English Abstract


A flexible printed circuit board capable of being used in a surge
protector, the printed circuit board is associated with a metal oxide varistor.
A first metalization layer and a second metalization layer are also
associated with the printed circuit board. The first metalization layer
supplies electricity to the metal oxide varistor while the second metalization
layer connects said metal oxide varistor to a ground/neutral plane. A
minimal thickness insulative layer separates said first metalization layer
from said second metalization layer. In one embodiment, the insulative
layer comprises the printed circuit board, and the first and second
metalization layers are on opposed sides of the printed circuit board.


French Abstract

Circuit imprimé souple utilisable dans un protecteur de surtension et associé à un movistor. Une première et une deuxième couches de métallisation sont également associées au circuit imprimé. La première couche de métallisation alimente en électricité le movistor tandis que la deuxième connecte ledit movistor à un plan de masse/neutre. Une couche isolante d'épaisseur minimale sépare la première et la deuxième couches de métallisation. Dans une version, la couche isolante comprend le circuit imprimé; et la première et la deuxième couches de métallisation sont sur les faces opposées du circuit imprimé.

Claims

Note: Claims are shown in the official language in which they were submitted.


CLAIMS
1. A surge protector comprising:
a flexible printed circuit board;
a metal oxide varistor mounted on said printed circuit board;
a first metalization layer and a second metalization layer applied to
said printed circuit board, the first metalization layer arranged to supply
electricity to said metal oxide varistor, said second metalization layer
arranged to connect said metal oxide varistor to a ground/neutral plane; and
a minimal thickness insulative layer separating said first metalization
layer from said second metalization layer.
2. The surge protector of claim 1, wherein said minimal thickness
insulative layer comprises at least a segment of said printed circuit board.
3. The surge protector of claim 2, wherein said first metalization layer
is affixed to a first side of said printed circuit board, and said second
metalization layer is affixed to a second side of said printed circuit board,
said first side being opposed to said second side.
4. The surge protector of claim 3, wherein said first metalization layer
is spread less than .03 inches from said second metalization layer.
5. The surge protector of claim 1, wherein said flexible printed circuit
board has a thickness of approximately 0.01 inches.
6. The surge protector of claim 1, wherein said printed circuit
board comprises a first printed circuit board and a second printed circuit
11

board, said first metalization layer is affixed to a metalized side of said first
printed circuit board, while said second metalization layer is affixed to a
metalized side of said second printed circuit board.
7. The surge protector of claim 6, further comprising an insulative
plastic material positioned between said metalized side of said first printed
circuit board and said metalized side of said second printed circuit board.
8. The surge protector of claim 6, further comprising an insulative
plastic material positioned between said metalized sides of said first printed
circuit board and said second printed circuit board.
9. The surge protector of claim 1, wherein said first metalization layer
further comprises a first electrical path capable of providing a conductive
path from a power source to the metal oxide varistor.
10. The surge protector of claim 9, wherein said conductive path is low
in impedance.
11. The surge protector of claim 10, wherein said conductive path is a
very short distance, but relatively wide.
12. The surge protector of claim 10, wherein said second metalization
layer further comprises a second electrical path capable of providing a
conductive path from the metal oxide varistor to an electrical
ground/neutral.
12

13. The surge protector of claim 12, wherein said second metalization
layer on the second mirrors a path of the first metalization layer as closely
as possible.
14. A method of producing a flexible printed circuit board for use in a
surge protector, comprising:
affixing a first metalization layer to a first side of said flexible
printed circuit board, wherein voltage supplied from a voltage source to an
MOV module passes through said first metalization layer;
affixing a second metalization layer to a second side of said flexible
printed circuit board, the outline of said second metalization layer largely
following the outline of said first metalization layer, the maximum distance
between any point in said first metalization layer and a corresponding point
in said second metalization layer being less than or equal to .03 inches.
15. A method for producing a surge protector, comprising:
affixing a first metalization layer to a first side of a first printed
circuit board;
affixing a second metalization layer to a second side of a second
printed circuit board;
positioning said first side of said first printed circuit board and said
first side of said second printed circuit board on opposed sides of an
insulative plastic layer.
16. The method of claim 15, wherein said insulative layer has a
maximum thickness of .05 inches.
13

17. The method of claim 15, wherein said first metalization layer further
comprises:
a first electrical path capable of providing a conductive path from a
power source to the metal oxide varistor.
18. The method of claim 17, wherein said conductive path is low in
resistance.
19. The method of claim 17, wherein said conductive path is a very short
distance, but relatively wide.
20. The method of claim 19, wherein said second metalization layer
further comprises:
a second electrical path capable of providing a conductive path from
the metal oxide varistor to an electrical ground/neutral.
21. The method of claim 20, wherein said second metalization layer on
the second mirrors a path of the first metalization layer as closely as
possible.
22. The method of claim 15, wherein said positioning step comprises
affixing said first side of said first printed circuit board and said first side of
said second printed circuit board to opposed sides of an insulative plastic
layer.
23. A printed circuit board capable of being associated with a surge
protector, comprising:
14

a metal oxide varistor;
a first metalization layer and a second metalization layer attached to
said printed circuit board, the first metalization layer arranged to supply
electricity to said metal oxide varistor, said second metalization layer
arranged to connect said metal oxide varistor to a ground/neutral plane; and
a minimal thickness insulative layer separating said first metalization
layer from said second metalization layer.
24. The printed circuit board of claim 23, wherein said first metalization
layer is affixed to a first side of said printed circuit board, and said second
metalization layer is affixed to a second side of said printed circuit board,
said first side being opposed to said second side.
25. The printed circuit board of claim 24, wherein said printed circuit
board comprises a first printed circuit board and a second printed circuit
board, said first metalization layer is affixed to a metalized side of said first
printed circuit board, while said second metalization layer is affixed to a
metalized side of said second printed circuit board.
26. The printed circuit board of claim 25, further comprising:
an insulative material positioned between the metalized side of said
first printed circuit board and the metalized side of said second printed
circuit board.
27. The printed circuit board of claim 26, wherein said insulative
material is formed from plastic.

28. The printed circuit board of claim 24, wherein said first metalization
layer further comprises:
a first electrical path capable of providing a conductive path from a
power source to the metal oxide varistor.
29. The printed circuit board of claim 28, wherein said conductive path
is low in impedance.
30. The printed circuit board of claim 29, wherein said conductive path
is a very short distance, but relatively wide.
31. The printed circuit board of claim 30, wherein said second
metalization layer further comprises:
a second electrical path capable of providing a conductive path from
the metal oxide varistor to an electrical ground/neutral.
32. The printed circuit board of claim 31, wherein said second
metalization layer on the second mirrors a path of the first metalization
layer as closely as possible.
33. The printed circuit board of claim 23, wherein said first metalization
layer is affixed to a portion of a first side of said printed circuit board, andsaid second metalization layer is affixed to a second portion of said printed
circuit board, both portions being on the same side of said printed circuit
board.
16

34. A multilayer printed circuit board capable of being associated with a
surge protector, comprising:
a metal oxide varistor;
first, second and third metalization layers attached to said printed
circuit board
said first metalization layer being separated into different portions,
said first portion being arranged to supply electricity to said metal oxide
varistor, said second portion being arranged to connect said metal oxide
varistor to a ground/neutral plane, and said third portion being arranged to
connect said metal oxide varistor to a phase plane; and
a plurality of minimal thickness insulative layers separating said
first, second and third metalization layers from each other.
17

Description

Note: Descriptions are shown in the official language in which they were submitted.


CA 02228012 1998-01-26
PATENT
Attorney Docket No. 0267-001-1 109
Title: FLEXIBLE PRINTEDCIRCUITBOARDFORUSE
WITH METAL OXIDE VARISTOR, APPLICABLE
TO A SURGE PROTECTOR
Inventor: Robert Romeo
CROSS-REFERENCE TO RELATED APPLICATION
Reference is made to U.S. Application Serial No. 08/514,202, filed
August ] 1, 1995, entitled APPARATUS FOR AND METHOD OF
SUPPRE,SSING POWER SURGES UTILIZING ELECTRICAL
STRIPL:[NES, invented by Albert Zaretsky, and assigned to the assignee of
the present invention. Such application is incorporated herein by reference.
BACKGROUND OF THE INVENTION
Currently, most transient voltage suppressor devices (TVSS devices)
use a metal oxide varistor (MOV). The MOV can redirect most of the surge
voltage to ground during voltage spikes. Redirecting surge voltage to
ground can be achieved in different ways. One way is to redirect the
voltage using an MOV from the phase (hot) line to ground. Another way is
using the MOV to redirect the voltage from the phase line to the neutral
line. Typically, the neutral line is connected to the ground line at the
service entrance in buildings. Thus, by redirecting to the neutral line, the
surge will find its way to ground. The MOV functions similarly to (and
may include) a zener diode, and breaks down using avalanche principles at

CA 02228012 1998-01-26
a desired voltage level. When used across an electric transmission line, the
MOV starts conducting at a voltage above the normal operating building
voltage, such as occurs from lightning or switching of power supply
systems. and redirects the surge to ground/neutral.
All MOVs have rated clamping levels according to test
specifications outlined by the Underwriter Laboratories (UL) or the IEEE.
These or~g~ni~tions test the devices by transmitting pulses of known
current waveforms through the MOV, and measuring the resultant current
through the device. A typical UL waveform applied across the MOV
device has characteristics such as 8msec x 20msec, 3000 Amps, 6000 Volts
in combination. The clamping voltage is the measured voltage across the
MOV device under these conditions. It is desirable to have as small of a
clampinjg voltage level as possible.
Surge protection devices that incorporate MOV devices also have
voltage clamping levels. The design of a printed circuit board incorporating
MOV devices affects the voltage clamping levels. A low voltage clamping
level for a surge protector means that with a given surge, less voltage is
applied l;o the equipment being protected by the surge protector. Reducing
the clamping voltage level is therefore an important consideration in the
design of surge protectors. The wiring from the power source to the MOV
affects the clamping voltage level due to electrical impedance in the wires,
specifically wire inductance and capacitance between the wires. This can
be seen in FIG. 1, which shows a prior art wiring diagram for a surge
protector. MOV 10, housed in a module 12, is coupled through wires 14,
16 to a terminal board 18 having pins 20, 22, 24, 26, 27. The pins are
electrically connected to a power source, such as 120 VAC, with lines L 1

CA 02228012 1998-01-26
and neutral N. A load 29 is coupled in parallel with MOV 10. The wires
14, 16 have a self-inductance, shown as phantom coils 28, 32 in FIG. 1.
The wires also have a capacitance between them, shown as phantom
capacitor 30 in FIG. 1. The electrical impedance Z "seen" by MOV 10 in
FIG. 1 is represented by the well-known relationship:
Z = ~ L/C
where L is the inductance of the wires and C is the capacitance between the
wires. Typically, L is relatively high due to the type of wiring required, and
C is relatively very low due to the spacing between the wires. Accordingly,
Z is typically relatively high.
The design of the MOV and the printed circuit board itself is
therefore an important consideration in surge protector design. U.S. Patent
No. 5,303,116, issued April 12, 1994 to Grotz is one prior art attempt at
optimizing surge protector design. The Grotz attempt, however, relies upon
a standard, relatively thick, rigid printed circuit board. (Col. 2, line 20).
Such boards are usually on the order of 0.062 inch thick. Therefore,
electrical conductors on opposed sides of the printed circuit boards are
separated by a considerable distance. This separation distance allows for
the generation of significant magnetic flux encircling each conductor.
Another disadvantage with conventional rigid printed circuit boards
is the dii'ficulty they present with mounting of the MOVs and other
components, and with fitting the entire assembly into cramped locations.
In certain applications, multiple layers of printed circuit boards may be
needed. This increases the wiring length to the MOV devices and further
penalize, transient suppression performance due to the increased
impedance. In conventional wiring implementation, it is often impossible
to place ;311 components in one place, adjacent to the power source terminal
,. . . . .

CA 02228012 1998-01-26
strip, especially when the components are housed in modules. Wiring in
three-phase implementations is even more difficult, given the required low
impedance's between the product entrance terminal board and the
suppression components.
l hese limitations are known to exist in present devices and methods
It would therefore be advantageous to provide an alternate device and
technique to overcome the limitations set forth above. Accordingly, a
suitable alternative includes features more fully disclosed hereinafter.
SUMM:ARY OF THE rNVENTION
l he present invention limits magnetic flux impedance generated by
flexible printed circuit board wiring which is connected to a surge protector
One or more metal oxide varistors are mounted on the printed circuit board
A first ]metalization layer and a second metalization layer are laid down on
the printed circuit board. The first metalization layer supplies electricity to
the metal oxide varistor while the second met~li7~tion làyer connects it to a
ground/neutral plane. A minim~l thickness insulative layer separates the
first mel:alization layer from the second metalization layer.
BRIEF ]DESCRIPTION OF THE DRAWINGS
FIG. 1 illustrates a schematic diagram of a prior art embodiment of a
metal oxide varistor surge protector connected to a power terminal board
using conventional discrete wiring.
FIG. 2 illustrates a perspective view of one embodiment of a flexible
printed circuit board of the present invention.
FIG. 3 illustrates a cross-sectional view of the flexible printed circuit
board oi'FIG. 2.
FIG. 4 illustrates an alternative embodiment of the present invention.

CA 02228012 1998-01-26
F IG. 5 illustrates a further embodiment of the present invention.
DETAILED DESCRIPTION OF THE PRESENT INVENTION
Overall Design
lF IG. 2 illustrates a surge protector 10 of one embodiment of the
present invention. The surge protector is connected to power lines L 1 and N
and in parallel with a load 29. Load 29 may be any electrical device
requiring an eleckic supply where there is a desire to protect against
electrical power spikes. These spikes primarily occur from lightning and
power supply switching. The surge protector 10 protects against any
voltage level above a desired threshold. It is important that the surge
protector respond quickly to any power spike. FIG. 2 shows a printed
circuit bloard 40 on which is mounted a metal oxide varistor (MOV) 10,
housed in module 12. The metal oxide varistor 10 breaks down when a
large voltage level is reached. This break down is accomplished using an
avalanche mechanism, as is well known in the art.
In FIG. 2, there is a f1rst electrical path 42 from a power source 60 to
an MOV 10 along the top surface of printed circuit board 40. There is also
a seconcl electrical path 44 from MOV 10 to a ground/neutral plane 18
along the bottom surface of the printed board 40. In this disclosure, the
term "first metalization layer" is synonymous with the term "electrical
path". T here can be one or more electrical paths associated with each
metalization layer. Each metalization layer is applied to printed circuit
boards using masking or other well known technologies. The present
invention relates to embodiments of the printed circuit board that can
quickly respond to electrical surges by actuating the MOV device. This
quick response is accomplished by limiting the impedance along the first
electrical path 42 and along the second electrical path 44. There are several

CA 02228012 1998-01-26
techniques that can be used to limit the impedance along the first and
second e lectrical paths 42, 44.
The first technique is to ensure that the path material used has a high
electrical conductivity. There has been little recent improvement in this
material. Copper and other conductors are commonly used. Therefore,
chip layout design becomes more important when optimizing surge
suppressor performance.
Flexible Printed Circuit Board Configuration
The FIG. 2 embodiment of the present invention illustrates a
configuration where the printed circuit board 40 is a flexible printed circuit
board. T he flexible printed board has a major advantage in that it is
extreme]y thin. This thinness allows the first electrical path 42 to lie close
to the second electrical path 44. In determining the direction of generated
magnetic flux due to electrical current flow, as shown by dashed line 46 in
FIG. 2, the right hand rule is used. If the electric flow in path 42 is along
the direction shown by the arrow, then the generated magnetic flux extends
in a circumferential magnetic flux path 47. The flow of electricity along
electrical path 44 in the opposite direction as that in path 42 results in a
magnetic flux being generated in circumferential magnetic flux path 46.
To achieve the best results, i.e., lowest impedance, at any given point
on the printed circuit board, the directions of the circumferential magnetic
flux pathls 46, 47 should oppose and cancel each other. Assuming that the
electric paths 42, 44 have a similar configuration, are formed from a similar
material, and have a similar current, then the magnetic flux at points
equidista~nt from each electric path 42, 44 should be substantially equal.
One object of the present invention is to ensure that the electric paths are as

CA 02228012 1998-01-26
close to each other as possible, so that the magnetic flux generated at each
point by the first electric path 42 will be as close to equal and opposed to
the magnetic flux generated by the second electrical path 44 as possible.
This teclmique of matching the electric path 42, 44 material and
configuration is called "strip line technique".
The canceling of the respective magnetic fluxes as described above
results in limiting the impedance in each electric path 42, 44, in accordance
with the relationship:
Z = ~ L/C
where, in this case, the inductance L is very low and the capacitance C is
very high due to the close spacing of the copper tracings on the printed
circuit board. Thus, the impedance Z is much lower than it would be if the
MOV were connected to the terminal board by discrete wiring.
This results in more responsive electrical flow along the electrical
paths 42, 44 to and from the MOV. It is worth noting that each printed
circuit board may have a plurality of MOVs, so that limiting the generated
magnetic flux not only eases the electric flow along the electrical paths 42,
44 generating the magnetic flux, but along any electric paths in the vicinity
that supply electricity to and from other MOVs as well.
T:he FIG. 2 configuration limits the distance between the electrical
paths 42, 44 by using a flexible printed circuit board instead of a rigid
printed circuit board. Rigid printed circuit boards have a common thickness
of about 0.062 inch, while flexible printed circuit boards have a thickness of
about 0.() 10 inch. In one embodiment, the insulative material used for the
board is plastic, such as Mylar. Using the thinner flexible printed circuit
board permits the first electrical path 42 to be placed closer to the second
electrica]l path 44. Placing the electrical paths 42, 44 closer to each other

CA 02228012 1998-01-26
limits the generated magnetic field in the vicinity of the electrical paths 42,
44 by cancellation, as described above. The capacitance between the paths
is increased. Both flexible and rigid printed circuit boards are formed from
electrically insulative material, but the material of the printed circuit boardsdoes not shield magnetic fluxes.
FIG. 3 shows the printed circuit board 40 of FIG. 2 in cross section.
Met:~11i7:~tion layers 42 and 50 are laid down on top of board 40, while
met~lli7:~tion layers 44, 48 are laid down on the bottom of board 40.
Layers 42, 44, 48 and 50 are commonly of copper but may be of any
electrically conductive metal or other material.
Another advantage of the flexible printed circuit board over rigid
printed circuit boards is that the flexible printed circuit board may be bent
or twisted if needed. This bending or twisting permits flexible printed
circuit boards to be packaged in smaller packages than a similarly sized
rigid printed circuit board. Thus, great freedom in mechanical design of the
product iis achieved, without penalizing transient suppression performance
because of long lengths of wiring or multiple levels of PC boards and the
required wiring connections between them. The need for manual wiring is
also redwced or elimin~ted, and use of the printed circuit board facilitates
controlled transient tr~n.smi.~.~ion parameters by facilitating the adjustment
of board thickness and copper trace widths.
F][G. 4 illustrates an alternative embodiment (mating boards) of the
present invention. In this embodiment, there are provided a plurality of
flexible printed circuit boards 60, 62, with their respective electrical paths
78, 80, 74, 76 facing each other. A thin, flexible electrically insulative layer64 is placed between circuit boards 60 and 62. The electrically insulative
layer 64 is preferably formed from plastic, but may be formed from any
other material that permits magnetic flux to pass though, but limits passage
.rdll./llr~ C~

CA 02228012 1998-01-26
of electric voltage across. In the FIG. 4 embodiment, the first circuit board
layer 60 has an electric paths 78, 80 across the inner facing surface 79 of
board 6(); the second circuit board layer 62 has an electric paths 74, 76
across the inner facing surface 81 of board 62. The first inner facing surface
79 of the first circuit board 60 faces the first inner facing surface 81 of the
second circuit board 62. The spacing between the two surfaces 79, 81 is
determined by a thickness of the electrically insulative layer 64. The
thickness of the first circuit board 60 and the second circuit board 62
therefore do not make a difference in the spacing between the electric paths
74, 78 and 76, 80.
B,oth the flexible printed circuit board configuration and the mating
printed circuit board configuration enable the first and second electric paths
to be very close to each other. Therefore, the description under the flexible
printed circuit board segment applies to both configurations. All
embodirnents of the present invention permit very close electric path
spacing, while ensuring proper insulation between the two electric paths. In
addition, the insulator in all embodiments does not effect the cancellation of
magnetic fluxes caused by substantially even electric flow through the two
electric paths.
Another embodiment of the invention is shown in FIG. 5. Here, a
portion 91 of a met~lli7~tion layer consisting, for example, of copper, is laid
down near two other portions 93 and 95. Portion 91 may be connected to
the phase line, portion 93 may be connected to the neutral line and portion
95 may be connected to the ground line. As can be seen, all three portions
are on the same side. Each portion is connected to a separate met~lli7Ation
layer 10 l, 103 through leads (not shown), and the met~lli7~tion layers are
ra~ r~ a~

CA 02228012 1998-01-26
separated by one or more layers 97, 99 of a plastic substrate, to form a
multilayer board.
~ Ihile only a few embodiments of the present invention have been
described in this disclosure, it is understood that many changes and
modifications that would be obvious to one having ordinary skill in the art
upon consideration of the disclosure and the drawings are within the scope
of the present invention.
I ~wor~ r~!lle~

Representative Drawing
A single figure which represents the drawing illustrating the invention.
Administrative Status

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Event History

Description Date
Time Limit for Reversal Expired 2007-01-26
Application Not Reinstated by Deadline 2007-01-26
Inactive: Abandoned - No reply to s.30(2) Rules requisition 2006-05-29
Inactive: Abandoned - No reply to s.29 Rules requisition 2006-05-29
Deemed Abandoned - Failure to Respond to Maintenance Fee Notice 2006-01-26
Inactive: S.30(2) Rules - Examiner requisition 2005-11-29
Inactive: S.29 Rules - Examiner requisition 2005-11-29
Letter Sent 2003-02-03
Request for Examination Requirements Determined Compliant 2002-12-17
Request for Examination Received 2002-12-17
All Requirements for Examination Determined Compliant 2002-12-17
Application Published (Open to Public Inspection) 1998-07-30
Classification Modified 1998-05-07
Inactive: IPC assigned 1998-05-07
Inactive: First IPC assigned 1998-05-07
Inactive: IPC assigned 1998-05-07
Inactive: Filing certificate - No RFE (English) 1998-04-21
Application Received - Regular National 1998-04-20

Abandonment History

Abandonment Date Reason Reinstatement Date
2006-01-26

Maintenance Fee

The last payment was received on 2004-10-29

Note : If the full payment has not been received on or before the date indicated, a further fee may be required which may be one of the following

  • the reinstatement fee;
  • the late payment fee; or
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Patent fees are adjusted on the 1st of January every year. The amounts above are the current amounts if received by December 31 of the current year.
Please refer to the CIPO Patent Fees web page to see all current fee amounts.

Fee History

Fee Type Anniversary Year Due Date Paid Date
Application fee - standard 1998-01-26
Registration of a document 1998-01-26
MF (application, 2nd anniv.) - standard 02 2000-01-26 1999-12-01
MF (application, 3rd anniv.) - standard 03 2001-01-26 2000-11-30
MF (application, 4th anniv.) - standard 04 2002-01-28 2001-10-24
MF (application, 5th anniv.) - standard 05 2003-01-27 2002-12-13
Request for examination - standard 2002-12-17
MF (application, 6th anniv.) - standard 06 2004-01-26 2003-12-08
MF (application, 7th anniv.) - standard 07 2005-01-26 2004-10-29
Owners on Record

Note: Records showing the ownership history in alphabetical order.

Current Owners on Record
LEVITON MANUFACTURING CO., INC.
Past Owners on Record
ROBERT ROMEO
Past Owners that do not appear in the "Owners on Record" listing will appear in other documentation within the application.
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Document
Description 
Date
(yyyy-mm-dd) 
Number of pages   Size of Image (KB) 
Representative drawing 1998-08-03 1 11
Abstract 1998-01-25 1 19
Description 1998-01-25 10 389
Claims 1998-01-25 7 201
Drawings 1998-01-25 3 46
Cover Page 1998-08-03 1 50
Courtesy - Certificate of registration (related document(s)) 1998-04-21 1 116
Filing Certificate (English) 1998-04-20 1 163
Reminder of maintenance fee due 1999-09-27 1 114
Reminder - Request for Examination 2002-09-29 1 116
Acknowledgement of Request for Examination 2003-02-02 1 173
Courtesy - Abandonment Letter (Maintenance Fee) 2006-03-22 1 177
Courtesy - Abandonment Letter (R30(2)) 2006-08-06 1 167
Courtesy - Abandonment Letter (R29) 2006-08-06 1 167
Fees 2002-12-12 1 33
Fees 2003-12-07 1 35
Fees 1999-11-30 1 28
Fees 2000-11-29 1 32
Fees 2001-10-23 1 35
Fees 2004-10-28 1 29