Note: Descriptions are shown in the official language in which they were submitted.
CA 02228183 1999-11-04
SPEECH CODER/DECODER
BACKGROUND OF THE INVENTION
The present invention relates to a speech
coder/decoder for high qu2lity Coding speech signal
with designated parameters.
As a usual controllable bit rate speech
coder/decoder, a CDMA (Code Division Multiple
Access) system is well known in the art. This
system is disclosed in, for instance, "Enhanced
Variable Rate Coded Speech Service Option 3 far Wide
arid Spread Spectrum Digital Systems",
Standardization Recommendation Specifications,
IS-127, TIA TR45,published in January 1997 (Literature 1).
In this system, CELP (Code Excited Linear
Prediction)coding system control parameters are set
from a table, which is produced in advance from
results of bit rate determination on the basis of
input signal features, and the input signal is coded
on the basis of the control. parameters set in this
way. This system also has a function of forcibly
setting a bit rate on the basis of an external
signal.
This type of speech coder/decoder will now be
briefly described with reference to Fig. 11. In the
illustrated speech coder/decoder, the bit rate is
controlled on the basis of an external signal.
The illustrated speech coder/decoder comprises
a speech coder and a speech decoder. The speech
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coder and speech decoder include respective coding
paramEater controllers 51 and 55. In the speech
coder,, a bit rate is given to the coding parameter
controller 51. The coding parameter controller 51
selects control parameters corresponding to the
given bit rate with reference to a table (not shown,
but for instance a ROM (read only memory) with bit
rate ,addresses), in which a plurality of control
parameters for controlling the operation of a CELP
coder 52 are stored, and provides the selected
control parameters to the CELP coder 52. The
control parameters art sub-frame length as a unit of
excitation signal coding in CELP coding, and bit
distribution.
An input signal (i.e., input speech signal) is
supplied to a CELP coder 52_ The CELP coder 52
computes linear prediction coefficients, which
represent a spectral envelope Characteristic of the
input signal, by linear prediction analysis thereof
for each predetermined frame. The CELP coder 52
also generates an excitation signal by driving a
linear prediction synthesis .filter corresponding to
the spectral envelope characteristic, and codes the
excitation signal on the basis of the bit
distribution. The excitation signal is coded for
each of a plurality of sub-frames, into which each
f ramE~ is divided .
The excitation signal noted above is
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constituted by a periodic component representing the
pitch: period of the input signal, a residue signal,
and gains of these components. The periodic
component representing the pitch period of the input
signal, is expressed as an adaptive codevector
stored in a codebook called adaptive codebook. The
residue component is expressed as a multi-pulse
sign2.l, which is disclosed in, for instance, J-P.
Adoul et al, "Fast CELP Coding Based on Algebraic
Coders" , Proc. ICASSP, pp. 1957-1960, 1987
(Lite:rature 2). The excitation signal is generated
by weight imparting the adaptive codevector and the
multi.-pulse signal by gain data stored in a gain
codebook and adding together the results of the
weight imparting. A reproduced signal can be
synthesized by driving the linear prediction
synthesis filter on the basis of the excitation
signal.
The selection of the adaptive codevector,
multi.-pulse signal and gain is controlled such as to
minimize error power as a result of acoustical
weight imparting of an error signal, which
represents an error between the reproduced signal
and ~:he input signal. The CELP coder 52 outputs
inde}:es corresponding to the adaptive codevector,
mult~_-pulse signal and gain, and an index
representing the linear prediction coefficients, to
a mu~_tiplexer 53.
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The multiplexer 53 provides a bit stream which
is obtained by converting the indexes corresponding
to the adaptive codevector, mul.ti-pulse signal, gain
index: and linear prediction coefficients for each
frams~. Data representing the bit rate is stored in
a bit; stream header.
In the speech decoder, a multiplexer 54
receives the bit stream, extracts bit stream header
data representing the bit rate, and provides the
extracted bit rate data to the coding parameter
controller 55. Then, the multiplexer 54 extracts
the indexes corresponding to the adaptive
codevector, mufti-pulse signal, gain and linear
prediction coefficients from the bit stream for each
frame', and provides the exi:racted data to a CELP
decoder 56.
The coding parameter controller 55 executes a
simiJ_ar process to that in the coding parameter
controller 51, then selects the control parameters
2G on the basis of the supplied bit rate data, and
provides the selected control parameters to the CELP
decoder 56.
The CELP decoder 5G executes a decoding process
using the indexes corresponding to the adaptive
Codevector, mufti-pulse signal, gain and linear
prediction coefficients as well as the sub-frame
lengi~h and bit rate data. The excitation signal is
obtained by weight imparting the adaptive codevector
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CA 02228183 1999-11-04
and multi-pulse signal with gain data held in the gain
codebook and adding together the results of the weight
imparting. In the CELP decoder 56, the reproduced
signal is obtained by driving the linear prediction
synthesis filter on the basis of the excitation signal.
As shown above, in the CELP coding system the
bit rate is controlled by controlling the sub-frame
length as a unit of excitation signal coding and the
bit distribution.
In the prior art speech coder/decoder, however,
the frame length as a unit of coding is fixed.
Therefore, it is impossible to control coding delay,
which is defined as time from the instant when a first
input signal sample is supplied till the instant of
start of the coding.
In addition, in the prior art coder/decoder it
is necessary to provide in advance parameters which are
necessary for generating the multi-pulse signal.
Therefore, the system can serve its function only when
a predetermined bit rate is given.
An object of the present invention therefore is
to provide a speech coder/decoder capable of
controlling not only the coding delay but also the
coding delay and computed effort.
According to an aspect of the present
invention, there is provided a speech coder comprising
a speech coding means for determining an excitation
signal expressed in the form of a plurality of pulses
such as to minimize the distortion, with respect to the
input speech signal,
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of a reproduced speech signal obtained by exciting a
linear prediction synthesis filter, which is prescribed
by linear prediction coefficients of the input speech
signal, on the basis of the excitation signal, and a
control circuit, supplied with designated bit rates and
a coding delay as control data, for generating control
parameters on the basis of the control data, the speech
coding means serving to code the input speech signal on
the basis of the control parameters.
According to another aspect of the present
invention, there is provided a speech coder comprising
a speech coding means for determining an excitation
signal expressed in the form of a plurality of pulses
such as to minimize the distortion, with respect to the
input speech signal, of a reproduced speech signal
obtained by exciting a linear prediction synthesis
filter, which is prescribed by linear prediction
coefficients of the input speech signal, on the basis
of the excitation signal, and a control circuit for
receiving a designated bit rate and a coding delay as
control data and generating control parameters on the
basis of the control data, the speech coding means
serving to code the input speech signal on the basis of
the control parameters.
According to another aspect of the present
invention, there is provided a speech coder comprising
a speech coding means for determining an
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excitation signal expressed in the form of a multi-
pulse signal constituted by a plurality of pulses such
as to minimize the distortion, with respect to the
input speech signal, of a reproduced speech signal
obtained by exciting a linear prediction synthesis
filter, which is prescribed by linear prediction
coefficients of such input speech signal, on the basis
of the excitation signal, a control circuit, supplied
with the designated bit rate and coding delay as
control data, for generating control parameters on the
basis of the control data, the speech coding means
serving to code the input speech signal on the basis of
the control parameters, and a parameter setting circuit
for setting parameters necessary for coding the multi-
pulse signal on the basis of predetermined ones of the
control parameters, the predetermined control
parameters being supplied to the parameter setting
circuits, the speech coding means serving to code the
input speech signal on the basis of the control
parameters and the setting parameters.
According to an aspect of the present invention
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there is provided a speech coder comprising a speech
coding means for determining an excitation signal
expressed in the form of a plurality of pulses such as
to minimize the distortion, with respect to the input
speech signal, of a reproduced speech signal obtained
by exciting a linear prediction synthesis filter, which
is prescribed by linear prediction coefficients of the
input speech signal, on the basis of the excitation
signal, and a control circuit for receiving a
designated bit rate, a coding delay and a computational
effort extent as control data and generating control
parameters on the basis of the control data, the speech
coding means serving to code the input speech signal on
the basis of the control parameters.
According to another aspect of the present
invention, there is provided a speech coder comprising
a speech coding means for determining an excitation
signal expressed in the form of a mufti-pulse signal
constituted by a plurality of pulses such as to
minimize the distortion, with respect to the input
speech signal, of a reproduced speech signal obtained
by exciting a linear prediction synthesis filter, which
is prescribed by linear prediction coefficients of such
input speech signal, on the basis of the excitation
signal, a control circuit, supplied with the
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designated bit rate, coding delay and computation
amounts as control data, for generating control
parameters on the basis of the control data, the speech
coding means serving to code the input speech signal on
the basis of the control parameters, and a parameter
setting circuit for setting parameters necessary for
coding the multi-pulse signal on the basis of
predetermined ones of the control parameters, the
predetermined control parameters being supplied to the
parameter setting circuits, the speech coding means
serving to code the input speech signal on the basis of
the control parameters and the setting parameters.
According to another aspect of the present
invention, there is provided a speech decoder for
restoring a reproduced speech signal from received
coded speech data, the coded speech data including an
excitation signal, linear prediction synthesis filter
coefficients and control data, the speech decoder
comprising a control circuit, supplied with designated
bit rates and a coding delay as control data, for
generating control parameters on the basis of the
control data, and speech decoding means for restoring a
reproduced
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speech signal by restoring the excitation signal and
the linear prediction synthesis filter coefficient by
decoding from the coded speech data on the basis of the
control parameters and exciting a linear prediction
synthesis filter, which is prescribed by the linear
prediction synthesis filter coefficient, on the basis
of the excitation signal.
According to a further aspect of the present
invention, there is provided a speech decoder for
restoring a reproduced speech signal from received
coded speech data, the coded speech data including an
excitation signal, linear prediction synthesis filter
coefficients, bit rate arid coding delay, the speech
decoder comprising a control circuit for generating
control parameters on the basis of the bit rate and
coding delay, and speech decoding means for restoring a
reproduced speech signal by restoring the excitation
signal and the linear prediction synthesis filter
coefficient by decoding from the coded speech data on
the basis of the control parameters and exciting a
linear prediction synthesis filter, which is prescribed
by the linear prediction synthesis filter coefficient,
on the basis of the excitation signal.
According to still a further aspect of the
present invention, there is provided a speech decoder
for restoring a reproduced speech signal from received
coded speech data, the coded speech data including an
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excitation signal, linear prediction synthesis filter
coefficients, a bit rate and a coding delay, the
excitation signal being expressed in the form of a
multi-pulse constituted by a plurality of pulses, the
speech decoder comprising a control circuit for
generating control parameters on the basis of the bit
rate and the coding delay, a parameter setting circuit
for setting parameters necessary for decoding the
multi-pulse signal on the basis of predetermined ones
of the control parameters, and speech decoding means
for restoring a reproduced speech signal by restoring
the excitation signal and the linear prediction
synthesis filter coefficient by decoding from the coded
speech data on the basis of the control parameters and
the setting parameters and exciting a linear prediction
synthesis filter, which is prescribed by the linear
prediction synthesis filter coefficient, on the basis
of the excitation signal.
According to the present invention, there is
provided a speech coding method comprising of computing
frame length from bit rate and coding delay, selecting
control parameters from a table in which a plurality of
control parameters for controlling an operation of CELP
coding on the basis of the bit rate, computing pulse
number of multi-pulse excitation signal, pulse position
candidate number of each pulse and position candidates
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thereof from the sub-frame length and bit number of
mufti,-pulse signal.
According to other aspect of the present
invention, there is provided a speech coding method
comprising dividing an input speech signal into
framea on the basis of a given frame length,
generating control parameters of frame length,
sub-l:rame length and bit distribution that are
nece:>sary for coding, from given bit rate and coding
delay data, and setting parameters necessary for
generating a mufti-pulse signal from the given bit
rate and coding delay.
In the present invention, 'the speech coder
comprises a coding parameter control circuit for
generating control parameters, i.e., frame length,
sub-:Frame length and bit distribution that are
nece:;sary for the coding, from given bit rate and
coding delay data. The input speech signal is
divided into frames on the basis of the given frame
length. A mufti-pulse signal coding parameter
setting circuit sets parameters, which are necessary
for generating a mufti-pulse signal from the given
bit rate and coding delay.
Since the coding parameter control circuits
generates the frame length, sub-frame length and bit
distribution data, and the input speech signal is
divided into frames on the basis of the generated
frame length, it is possible to vary the frame
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length which is a unit of processing for the coding.
It is thus possible to control the coding delay in
addition to the bit rate.
Since the multi-pulse signal coding parameter
setting circuit sets parameters necessary for the
multi-pulse signal generation, it is possible to
increase the bit rate range. That is, it is not
necessary to set a bit rate in advance.
Other objects and features will be clarified
from the following description with reference to
attached drawings.
BRIEF' DESCRIPTION OT THE DRAWINGS
Fig. 1 is a block diagram of a speech
coder/decoder according to a first embodiment of the
present invention;
Fig. 2 is a block diagram for explaining the
CELP coding circuit shown in Fig. 1;
Fig. 3 is a block diagram for explaining the
CELP decoding circuit shown in Fig. l:
Fig. 4 is a block diagram of a speech
coder/decoder according to a second embodiment of
the present invention;
Fig. 5 is a block diagram for explaining the
CELP coding circuit shown in Fig. 4;
Fig. 6 is a block diagram for explaining the
CELP decoding circuit shown in Fig. 4;
Fig. 7 is a block diagram of a speech
coder/decoder according to a third embodiment of the
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present invention;
Fig. 8 is a block diagram for explaining the
CELP coding circuit shown in Fig. 7;
Fig. 9 is a block diagram of a speech
coder/decoder according to a fourth embodiment of
the present invention;
Fig. 10 is a block diagram for explaining the
CELP coding circuit shown in Fig. 9; and
Fig. 11 is a block diagram of a prior art
speech coder/decoder.
PREF~:RRED EMBODIMENTS OF THE INVENTION
Referring to Fig. 1, a speech coder/decoder is
shown, which comprises a speech coder and a speech
decoder. The speech coder includes a coding
pararneter control circuit 11, a CELP coding circuit
12 and a multiplexer 13. The speech decoder
includes a demultiplexer 14, a coding parameter
control circuit 15 and a CELP decoding circuit 16.
In the speech coder, bit rate and coding delay
are given as control data to the coding parameter
control circuit 11. The coding parameter control
circuit 11 calculates a frame length by subtracting
an advance read length, which i.s necessary for an
analytic processing in CELP coding, from the given
bit rate and coding delay. For example, in a case
where the coding delay is 25 ms and the advance read
lena~th of the linear prediction analysis is 5 ms,
the frame length is 20 ms.
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'rhe coding parameter Control circuit 11
selects, on the basis of the given bit rate, control
param~2ters from a table, in which a plurality of
control parameters for controlling the operation of
the CELP coding circuit 12 are set on the basis of
calculated frame length, and provides the selected
control parameters to the CELP Coding circuit 12.
The selected control parameters are frame length,
sub-frame length (of 5 ms, for instance) and bit
distribution. The CELP coding circuit 12 codes the
input: signal (input speech signal) on the basis of
frames length, sub-frame length and bit distribution
that have been Set.
The operation of the CELP coding circuit 12
will now be described by having reference also to
Fig. 2.
The frame length r' that has been set in the
coding parameter control circuit 11, is supplied
through an input terminal 213 to a frame dividing
circuit 201 and a linear prediction coefficient
quantizing circu it 204_
The sub-frame length S that has also been set
in the coding parameter control circuit 11, is
supplied through an input terminal 214 to a
sub-frame dividing circuit 202, a linear prediction
analysis circuit 203, the linear prediction
coefficient quantizing circuit 204, an acoustical
weight imparting signal generating circuit 205, an
CA 02228183 1998-O1-27
acoustical weight imparted reproduced signal
generating circuit 206, a target signal generating
eircui.t 208, an adaptive codebook retrieving circuit
2pg, a mufti-pulse retrieving circuit 210 and a gain
retrieving circuit 211.
The bit distribution to the parameters having
been :>et in the coding parameter control circuit 11,
is supplied through an input terminal 215 to the
linear prediction coefficient quantizing circuit
204, adaptive codebook retrieving circuit 209,
mufti-pulse :retrieving circuit 210 and gain
retrieving circuit 211.
The frame dividing circuit 201 divides the
input signal on the basis of the frame length F
having been set, and provides each frame of input
signal to the sub-frame dividing circuit 202.
The sub-frame div~_ding circuit 202 divides each
frame on the basis of the sub-frame length S having
been set, and provides each sub-frame of input
signal to the linear prediction analysis circuit 203
and acoustical weight imparting signal providing
circuit 205.
The linear prediction analysis circuit 203
executes linear prediction analysis of signal
2~ (sub-frame signal) provided from the sub-frame
dividing circuit 202 on the basis of the sub-frame
length S having been set for each sub-frame, and
provides linear prediction coefficients a(i) (i = 1,
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CA 02228183 1999-11-04
_.., Np) to the linear prediction coefficient
quantizing circuit 204, acoustical weight imparting
signal providing circuit 205, acoustical weight
imparted reproduced signal generating circuit 206,
adaptive codebook retrieving circuit 209 and
multi-pulse retrieving circuit 210. Np is the
degree number of the linear prediction analysis, for
instance 10. The linear prediction analysis may be
a self-correlation process or a covariance process,
and is detailed in Furui, "Digital Speech Processing,
Synthesis and Recognition", published in 1989, Tokai
University Publishing Association (Literature 3)
The linear prediction coefficient quantizing
circuit 204 executes collective quantization of the
linear prediction coefficients obtained for the
individual sub-frames on the basis of the frame
length F and sub-frame length S having been set for
each frame. In order to reduce the bit rate, this
quantization is executed for only the last sub-frame
in the frame and using interpolated values of the
quantized values of the pertinent and immediately
preceding frames as the quantized values of the
other sub-frames. This quantization and
interpolation are erecuted after conversion of the
linear prediction coefficient into corresponding
line spectrum pair (LSP). The conversion of the
linear prediction coefficient into LSP is described
in, for instance, Sugamura et al, "speech Data
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Compression in Linear Spectrum Pair (LSP) Speech
Analysis Synthesis Systems", The Transactions of
Instii~ute of Electronics and Communication Engineers
of Japan, J64-A, pp. 599-606, 1981 (Literature 4).
The L:3P quantization may be executed in a well-known
manner; fox instance, it is disclosed in Japanese
Laid-Open Patent Publication No. 4-171500
(Literature 5), and it is not described here. The
linear prediction coefficient quantizirig circuit 204
converts the quantized LSP into corresponding linear
prediction coefficients, and provides the result as
quantized linear prediction coefficient a'(i) (i =
1, ..., Np) to the acoustical weight imparting
signed providing circuit 205, acoustical weight
imparted reproduced signal generating circuit 206,
an adaptive codebook retrieving circuit 209 and
mult~_-pulse retrieving circuit 210.
An index representing the quantized LSP is
supp-died through an output terminal 216 to the
mult:iplexer 13. Linear prediction synthesis filter.
Hs(z) is expressed by formula (1).
- (1)
Ns(z) = N;
1- a,(i)z_;
In the acoustical weight imparting signal
generating circuit 205, an acoustical weight
imparting filter Hw(~) expressed by formula (2) is
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CA 02228183 1998-O1-27
formed using the linear prediction coefficients, and
is driven by sub-frame input signal. ~;o generate an
acoustical weight imparted signal. This acoustical
weight imparted signal is provided to the target
signal generating circuit 208.
N
~ - ~a(i)R2' z~'
llw(z) = -N -~ (2)
1 _ ~ a(j)Rlr z-c
where R1 and R2 are weight imparting coefficients to
Control the extent O.f the acoustical weight
imparting and, for instance, R1 = 0.6 and R2 = 0.9_
The acoustical weight imparted reproduced
signaJ_ generating circuit 206 drives the linear
predicaion synthesis filter and the acoustical
weight imparting synthesis filter of the preceding
frame with the excitation signal of the preceding
sub-frame which is obtained 'through a sub-frame
buffer 207, and provides data representing the
states of the two filters after the driving to the
targewt signal generating cp.rcuit 208.
The target signal generating circuit 208
receives the data representing the states of the
linear prediction synthesis filter. and acoustical
weight imparting filter from the acoustical weight
imparting reproduced signal generating circuit 206,
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generates a zero input response of a filter which is
constituted by the two filters connected in cascade,
subtracts the zero input response thus generated
from t:he acoustical weight imparted signal, and
provides the resultant difference as the target
signa:L to the adaptive codebook retrieving circuit
209 and multi-pulse retrieving circuit 210 as well
as to a gain retrieving circuit 211.
The adaptive codebook retrieving circuit 209
updates a codebook, called adaptive codebook and
holding past excitation signals, on the basis of the
excitation signal of the immediately preceding
sub-frame that is obtained through the sub-frame
buffer 207, and then selects an adaptive codevector
corresponding to pitch d from the adaptive codebook.
When the pitch d is shorter than the sub-frame
length, an adaptive codevector is formed by
repeatedly connecting excitation signal segments
each corresponding to delay d, separated one after
another from past excitation signal stored in the
adapl~ive codebook, until reaching of the sub-frame
lengl~h. The reproduced signal SAd(n) is formed by
driving the linear predict~.on synthesis filter and
acou:atical weight imparting f~.lter in zero states
~ther~aof with the adaptive codevector Ad(n) thus
formed, and selects pitch d which minimizes the
error Ed between the target signal X(n) and the
reproduced signal SAd(n), given by formula (3).
CA 02228183 1998-O1-27
(~ X (n),SAd (n))z
Ed = ~ X z(n) - ~~~~' (3)
ra-, SAd 2(n)
wherEa L is the sub-frame length set by the coding
parameter control circuit 11. The adaptive codebook
retrieving circuit 209 further provides the selected
pitch d through the output tern;inal 216 to the
mult.iple~cer 13, and also provides the selected
adaptive codevector Ad(n) and the reproduced signal
SAd(n) thereof to the gain retrieving circuit 211.
The adaptive codebook retrieving circuit 209
provides the reproduced signal SAd(n) to the gain
retrieving circuit 211 and provides the reproduced
signal SAd(n) to the rnulti-pulse retrieving Circuit
210.
The multi-pulse retrieving circuit 210 forms a
mult:i-pulse signal consti~~uted by a plurality of
non--zero pulses. The position of each pulse is
2.0 selE~cted from a plurality of pulse position
canc~idatcs predetermined for each pulse. Each pulse
is a polarity pulse. For example, in 8-kHz sampling
with a sub-frame length of 5 ms (i.e., with a sample
number N of X10), the muli:i-pulse excitation signal
2=~ is constituted by P (for instance 5) pulses. The
position of each of the P pulses is selected from
M(p,) (p = l~ ..., p-l, Lor instance 8) pulse
position candidates. The mufti-pulse retrieving
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CA 02228183 1998-O1-27
circuit 210 is holding a plurality of combinations
of pulse number P and M(p) pulse position
candidates, and selects a combination of pulse
number P and M(p) pulse Position candidates on the
basis of a bit distribution designated by a coding
_ _L_~, ..: Y~"; ~r ~ 1 _ The multi-pulse
retrieving circuit 210 also forms mul.ti-pulse signal
Cj(n) 'by using the selected pulse number P (equal to
the number of channels) and M pu7.se position
candidates of each channel., and selects a
multi-pulse signal Cj(n) which minimizes formula
(4).
(~X~ (n)SC~(n))Z
i. ( )
~J~~X,Z( ) "_, - - 4
'~-~~, n ~ ~ ,SCj (n )
where X'(n) is a subtracted signal of the reproduced
signal 5A(n) of the adaptive codevector from the
2C~ target signal X(n) and given by formula (5).
c
X (it)S~ld (n) (5)
(n) - ~--'., Slld (n)
SArl1 (n)
2 '. i
Formula (4) can be m:W imi7ed with reducing the
computational effort extewt, for instance by using
method as described in 7apanese Patent Application
No. 7-318071 (Literature 6). The multi-pulse
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CA 02228183 1998-O1-27
retrie~ling circuit 210 provides the selected
mufti-pulse signal Cj(n) and reproduced signal
SCj(n) thereof to the gain retrieving circuit 211,
and provides corresponding index j through the
output terminal 216 to the multiplexer 13.
The gain retrieving circuit 211 quantizes the
gains GA and GC by using the reproduced signal
SAd(n) of the adaptive codevector, reproduced signal
SCj(n) of the mufti-pu7sc: signal and target signal
X(n) such as to minimize formula (6).
Ik = ~(X(n)-Gk(1)'~'~(")-Gk(2).SCj(n)z
'The gain retrieving circuit 211 further forms
an excitation signal by using the quantized gain,
adaptive codevector and mufti-pulse signal, provides
the excitation signal thus formed through the
sub-frame buffer 207 to the acoustical Freight
impax,ted reproduced signal generating circuit 206
and adaptive codebook retrieving Circui..t 209, and an
inde:~c corresponding to the gain through the output
terminal 216 to the multiplexer 13.
Referring now back to Fig. 1, the multiplerer
13 provides a bit si:ream obtained by conversion from
the indexes representing the quantized LSP, pitch,
mult:i-pulse signal and quantized gains for each
signal. The bit rate and Coding delay data are
provided in a header of the bit stream.
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In the speech decoder, the bit stream is
supplied to the demultiplexer 14_ The demultiplexer
14 provides the bit rate and coding delay data
present in the bit stream header to the coding
parameter control circuit 15, and then it extracts
the indexes of the quantized LSP, pitch, multi-pulse
signal and quantized gains from the bit stream for
each frame, and provides them to the CELP decoding
circuit 16.
The coding parameter control circuit 15
executes an operation similar to that in the coder
side coding parameter control circuit 11; i.e., it
selects control parameters on the basis of the input
bit rate and coding delay data, and provides the
selected control parameters 'to the CELP decoding
circuit 16.
The operation of the CELP decoding circuit will
now be described by having reference also to Fig. 3.
The indexes representing the quantized LSP,
2(1 pitch, multi-pulse signal and quantized gains, are
supplied through an input terminal 227 to a linear
prediction coefficient decoding circuit 221, an
adaptive codebook decoding circuit 222, a
multi-pulse signal decoding circuit 223 and a gain
decoding circuit 224.
The frame length data set by the coding
parameter control circuit 15 is supplied through an
input terminal 228 to the linear prediction
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coefficient decoding circuit 221 and a frame
unifying circuit 226.
The sub-frame length data set by the coding
parameter control circuit 15 is supplied through an
input terminal 229 to the linear prediction
coefficient decoding circuit 221, adaptive codebook
decoding circuit 222, mufti-pulse signal decoding
circuit 223 and gain decoding circuit 224 and also
to a reproduced signal synthesizing circuit 225 and
the i:rame unifying circuit 226.
The bit distribution data set by the coding
parameter control circuit 15 is supplied through an
input terminal 230 to the linear prediction
coefficient decoding circuit 221, adaptive codebook
decoding circuit 222, mufti-pulse signal decoding
circuit 223 and gain decoding circuit 224.
The linear prediction coefficient decoding
circuit 221 receives the index representing the
quantized LSP for each frame, and provides quantized
2C linear prediction coefficient a'(i) ~i = 1. ~~-. NP)
restored by decoding for each sub-frame to the
reproduced signal synthesizing circuit 225.
The adaptive codebook decoding circuit 222
resi:ores the adaptive codevector by decoding from
2', the pitch data supplied for each sub-frame. The
mufti-pulse decoding circuit 223 provides the
mufti-pulse signal restored by decoding from the
indexes supplied for each sub-frame to the gain
CA 02228183 1998-O1-27
decoder 224.
The gain decoding circuit 224 restores the
gain: by decoding from the indexes supplied for each
Sub-i:rame, forms an excitation signal by using the
adap~t:ive codevector, nulti-pulse signal and gains,
and provides the excitation signal thus formed to
the reproduced signal synthesizing circuit 225.
The reproduced signal synthesizing circuit 225
forms a reproduced signal by driving the linear
prediction synthesis filter Hs(z) with the
excitation signal for each sub-frame, and provides
the reproduced signal thus formed to the frame
unifying circuit 226. The linear prediction
synthesis filter Hs(z) is expressed by formula (1)
noted above. The frame unifying circuit 226
Connects together successively supplied sub-frame
reproduced signals for the frame length, and
provides the resultant reproduced signal for each
frame.
A different embodiment of the speech
coder/decoder according to the present invention
will now be described with reference to Fig. 4_
The illustrated coder/decoder comprises a
speech coder and a speech decoder. The speech coder
includes a coding parameter control circuit 31, a
CELF coding circuit 32, a multi-pulse signal coding
parameter se~laing circuit 33 and a multiplexer 13.
The speech decoder includes a demultiplexer 14, a
26
CA 02228183 1998-O1-27
Coding parameter setting circuit 34, a CELP decoding
circuit 35 and a mufti-pulse signal coding parameter
setting circuit 16.
In the speech coder, the coding parameter
control circuit 31 receives the bit rate and coding
delay as control data, and calculates the frame
length by subtracting advance read length, which is
necessary for an analysis process in CELP coding,
from the given bit rate and coding delay. On the
basis of the calculated frame length, the coding
parameter control circuit 31 selects control
parameters from a table, in which a plurality of
control parameters for controlling the operation of
the CELP coding circuit 32 are stored, on the basis
of the supplied bit rate, and provides the selected
control parameters to the CELP coding circuit 32.
The coding parameter control circuit 31 further
provides the bit number distributed to the sub-frame
length and mufti-pulse signal to the mufti-pulse
signal coding parameter. setting circuit 33.
The mufti-pulse signal coding parameter setting
circuit 33 computes pulse number P, pulse position
candidate number M(p) of each pulse and position
candidates thereof, necessary for the mufti-pulse
excitation signal coding, fron supplied sub-frame
length N and bit number Y of the mufti-pulse signal.
The pulse position candidates of each pulse are set
such that a sequence of 0, 2, 3, ..., N-1 is
27
CA 02228183 1998-O1-27
interleaved with the pulse number P, as disclosed in
Literature 2 noted above. For example, in a case
where the sub-frame length is set to 40 (i.e., a
sample. number N of 40) and the bit number Y of the
multi-pulse signal is set to 20, the pulse number P
is 5 and the pulse position candidate number M(p) is
8. An example of pulse position candidates in this
case is shown in Table 1 below.
Y = ~(1+loge MW)
r,-~
N = ~WP) f
,'>'a'~,
TAB LE 1
PULSE No. PULSE POSITION CANDIDATES
0
0, 5, 10, 15, 20, 25, 30,
35
1 1, 6, 11. 16, 21, 26, 31,
36
2 2, 7, 12, 17, 22, 27, 32,
37
3 3, 8, 13, 18, 23, 28, 33,
38
4. 9, 14, 19, 24, 29, 34,
39
The GELP coding circuit 32 Codes the input
signal on the basis of the frame length, sub-frame
lengith and bit distribution that: are set by the
coding parameter control circuit 31, and also the
puls~= number P, pulse position candidatE number M(p)
of each pulse and position candidates thereof that
are set by the multi-pulse signal coding parameter
setting circuit 33.
The operation of 'Che CELP coding circuit 32
will. now be described with reference to Fig. 5.
28
CA 02228183 1998-O1-27
Tine CELP coding circuit 32 is the same as the
CELP coding circuit described before in connection
with Fig- 2 except for the operation of the
mufti-pulse retrieving circuit. For this reason,
only t:he operation of the mufti-pulse retrieving
circuit 401 will be described_
7: he mufti-pulse retrieving circuit, designated
at 40:L in Fig. 5, generates the mufti-pulse signal
Cj(n) on the basis of the pulse number P and M(p)
pulse position candidates of each pulse, set by the
mufti-pulse generation parameter setting circuit 33
and supplied through an input terminal 217, and
selects a mufti-pulse signal Cj(n) that minimizes
formula (4) noted above- As described before, in
the minimization of formula (4) the computational
effort extent can be reduced by using the manner
described in Literature 6.
The mufti-pulse retrieving circuit 401 provides
'the selected rnulti-pulse signal Cj(n) and reproduced
2~~ signal SCj(n) thereof to the gain retrieving circuit
211 and also provides corresponding index j through
the output terminal 216 to the multiplexes 13- As
described before in connection with Fig. 1, 'the
mull=iplexer 13 provides a bit stream.
Referring back to Fig. 4, in the speech decoder
the bit stream is received by the demultiplexer 14.
As described before in connection with Fig. 1, the
demultiplexer 14 providES the bit rate and coding
29
CA 02228183 1998-O1-27
delay data present in the bit stream header to the
coding parameter control circuit 34, then extracts
the indexes representing the quantized LSP, pitch
and m.ulti-pulse signal from the bit stream for each
frame., and provides the extracted indexes to the
CELP decoding circuit 35.
The coding parameter setting circuit 34
executes an operation similar to that in the coding
parameter control circuit 31, thus selecting the
Control parameters and providing the same to the
CELP decoding circuit 35.
The mufti-pulse coding parameter setting
circuit 36 executes an operation similar to that in
the coding side mufti-pulse generation parameter
setting circuit 33, thus computing the pulse number
reprE~senting the mufti-pulse excitation signal,
pulse: position candidate number of each pulse and
position candidates thereof, and providing the
computed data to the CELP decoding circuit 35.
The operation of the CELP decoding circuit 35
will now be described with reference also to Fig. G.
The CELP decoding circuit 35 is the same as the
CELP decoding circuit described before in connection
with Fig. 3 except for the operation of the
mult:i-pulse decoding circuit. For this reason, only
the operation of the mufti-pulse decoding circuit
402 will be described.
The mufti-pulse decoding circuit, designated at
CA 02228183 1998-O1-27
402 in Fig. 6, receives the sub-frame length set by
the coding parameter control circuit 34 through the
input terminal 229, receives the pulse number, pulse
posit:Lon candidate number of each pulse and position
candidates thereof set by the mufti-pulse coding
paramf~ter setting circuit 36 through an input
terminal 232, and restores 'the mufti-pulse signal by
decoding from the indexes supplied for each
sub-frame.
A further embodiment of the speech coder
according to the present invention will now be
described with reference to Fig. 7.
The illustrated speech coder includes a coding
parameter control circuit 61, a CELP coding circuit
62 and a multiplexer 13. The coding parameter
control circuit 61 executes an operation similar to
that in the coding parameter control circuit 11
described before in connection with Fig. 1, thus
setting the frame length, sub-frame length and bit
distribution from the supplied bit rate and coding
delay data. The coding parameter control circuit 61
computes permissible mufti-pulse signal coding
computational effort extent, to which computational
effort can be paid for the mufti-pulse signal
coding, from the supplied computational effort
extent data. This computation can be executed by
stor:i.ng in advance data of computational effort
extents necessary for the coding of other parameters
31
CA 02228183 1998-O1-27
and subtracting these stored computational effort
extents from the supplied computational effort
extent. The coding parameter control circuit 61
provides frame length, sub-frame length, bit
distribution and permissible multi-pulse coding
computational effort extent as control parameters to
the C:ELP coding circuit 62.
'The CDLP coding circuit 62 codes the input
signal on the basis of the supplied frame length,
sub-frame length, bit distribution and permissible
multi-pulse signal coding computational effort
extent data.
The operation of the CELP coding circuit 62
will now be described by having reference also to
Fig. 8.
The CELP coding circuit 62 is 'the same as the
CELP coding circuit described before in connection
with Fig. 2 except for the operation of the
multi.-pulse retrieving circuit. For this reason,
only the multi-pulse retrieving circuit will be
described.
The mufti-pulse retrieving circuit, designated
at 301 in Fig. 8, executes an operation similar to
that in 'the mufti-pulse retrieving circuit 210
described before in connection with Fig. 2, thus
selecaing a mufti-pulse signal Cj(n) that minimises
formula (4) noted above. In this case, the
computational effort paid for the coding of the
32
CA 02228183 1998-O1-27
rnulti-pulSC si.gr,a l, is; prc~l.imi nami l.y snl.c~ctPd such
that. .i l: does rmt; c:rC~~.md i:hc: pcrmi.,Cible ncul l.i-pulse'
coding computational effort; extent data supplied
t:hr~ugh an input tc:zoninal 21f3. 'This preliminary
rc~l.ecti~n corn be realized by ,c~l~ction oi~ a high
value' oL E1 given :~y Lormula (9).
l:l = (~ X(n)SC'J(r'))~ ( g )
Jp The' mul Li.-pulse rc~l.rievi.ng circuit 301. pz'ovid~,
the sclecl,ed ,nulti-pulse' ;:ignaJ. Cj(n) and rcpz~odnced
signal SC:j ( n ) tl,ereoi t.o tl,e gain retri evi ng circuit
211, and also yrovidc~s; cUr.~r~sponding index j through
the output i:crmi.nal 216 to the multiplexer_ 13.
1~ A stall further. embc,ciimcnt of ttu~ ~;r~Ce:c:h codes
aCrording to the: present i.nve:ntson wi 11. nUw t;e
~ic~ac:ribed with reference t.o Fi d. 9 .
Thc~ i.llusi:ra Lc:d sp~c~c.:h c~cJez~ inc:l udC:~ a coding
paramnt:er control ci.rcuil. 71 , a mu.l.ti.-pul:~e
20 generati ~n loaoametr:r s:ettir:g n.i r~:uit: 33, .~ CFI3P
epding c:irc:v.ii~: 'I1 and n m~ulti~.rl.~xer 13.
'Ihc~ coding par~rn:c~tr~r c:ontr.oJ. c:izo:uit 77.
raxer,:ut.<.,:; ~n c,p::r.ati.on r:i,ri lar. ~-o that in the coding
paramel~r cont.col c:ircui L 31 dPsc:ribed before in
2~ connec:tic~m wil:h J~';g. Q, i.ha, setting f.rc~me length,
suk~-frame 1 earth and bit di.strihutiorr from the
supplied bit rote and c:odi r,cJ delay data. The coding
parameter c;nnl:rol c:irc:uit 71 c:omp,rt:c~s pe~rmisss.bl_~
33
CA 02228183 1998-O1-27
multi-pulse signal coding computational effort
extent:, which is paid for the coding of mufti-pulse
signaJ_, from the supplied computational effort
extent data. The coding parameter control circuit
71 provides the frame length, sub-frame length, bit
distribution and permissible mufti-pulse signal
coding computational effort extent to the CELP
coding circuit 72. The coding parameter control
circuit 71 provides sub-frame length and bit number
distributed to the mufti-pulse signal to the
mufti-pulse generation parameter setting circuit 33.
The CELP coding circuit 72 Codes the input
signal on the basis of the frame length, sub-frame
length, bit distribution and permissible mufti-pulse
signal coding computational effort extent set by the
coding parameter setting circuit 71 and the pulse
number P, pulse position candidate number M(p) of
each pulse and position candidates thereof set by
the rnulti-pulse signal generation parameter setting
2C circuit 33.
The operation of the CELP coding circuit 72
will now be described by having reference also to
Fig. 10.
The CELP coding circuit 72 is the same as the
2~i CELP coding circuit described before in connection
with Fig- 5 except for the operation of the
mult:i-pulse retrieving circuit. For this reason,
only the operation for the mufti-pulse retrieving
34
CA 02228183 1998-O1-27
circuit 501 will be described.
fhe multi-pulse retrieving circuit, designated
at 507_ in Fig. 10, executes an operation similar to
that a n the multi-pulse retrieving Circuit 401
described before in connection with Fig. 5, thus
selecting a mufti-pulse signal Cj(n) that minimizes
Formula (4) noted above. In this case, the
computational effort paid for the coding of
mufti-pulse signal, is preliminarily set such that
it does not exceed permissible mufti-pulse signal
coding computational effort extent supplied through
an input terminal 218. The mufti-pulse retrieving
circuit 501 also provides the selected mufti-pulse
signal Cj(n) and reproduced signal SCj(n) thereof to
the gain retrievirig circuit 211, and also provide
corrEasponding index j through the output terminal
216 i~o the multiplexes 13.
As has been described in the foregoing,
acco:cding to the present invention the frame length
2( as a unit of processing Los. coding is made variable,
permitting generation of parameters necessary for
the coding of mufti-pulse signal from given bit rate
and coding delay data_ Thus, it is possible to
control not only the bit rate but also the coding
delay and computational effort. According to the
pre.>ent invention, iv is thus possible to use the
same coder/decoder when it is desired to make the
coding delay to be as short as possible for a
CA 02228183 1998-O1-27
television conference system or the like or when it
is desired to make 'the bit rate to be as low as
possible rather than the coding delay for speech
mail or like purposes. This permits scale reduction
of the: coder/decoder.
Changes in construction will occur to those
skilled in 'the art and various apparently different
modif~:cations and embodiments may be made without
departing from the scope of the present invention.
The matter set forth in the foregoing description
and accompanying drawings is offered by way of
illustration only. It is therefore intended that
the foregoing description be regarded as
illustrative rather than limiting.
36
