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Patent 2247794 Summary

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Claims and Abstract availability

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(12) Patent Application: (11) CA 2247794
(54) English Title: GRAY-SCALE DRIVER FOR FIXED-INTENSITY ELECTRONIC DISPLAY
(54) French Title: CIRCUIT D'ATTAQUE D'ECHELLE DES GRIS POUR AFFICHAGE ELECTRONIQUE A INTENSITE LUMINEUSE FIXE
Status: Deemed Abandoned and Beyond the Period of Reinstatement - Pending Response to Notice of Disregarded Communication
Bibliographic Data
(51) International Patent Classification (IPC):
  • G09G 5/30 (2006.01)
  • G09G 3/06 (2006.01)
  • G09G 5/10 (2006.01)
  • G09G 5/28 (2006.01)
(72) Inventors :
  • VINCENT, MARC (Canada)
(73) Owners :
  • TETRA TECHNOLOGIES INC.
(71) Applicants :
  • TETRA TECHNOLOGIES INC. (Canada)
(74) Agent: PRIMAK & CO.
(74) Associate agent:
(45) Issued:
(22) Filed Date: 1998-09-25
(41) Open to Public Inspection: 2000-03-25
Availability of licence: N/A
Dedicated to the Public: N/A
(25) Language of filing: English

Patent Cooperation Treaty (PCT): No

(30) Application Priority Data: None

Abstracts

English Abstract


A method and a driver are provided for enabling a
fixed-intensity electronic display, such as a BDVFD, to
produce multiple levels of intensity or gray-scale on a
pre-pixel basis. This is achieved by sequencing several
fields at a rate that is at least double and preferably
several times the normal minimum refresh rate set for the
display.


Claims

Note: Claims are shown in the official language in which they were submitted.


CLAIMS
1. In a fixed-intensity electronic display, a
gray-scale driver which comprises a refresh circuitry that
produces sequencing of several fields at a rate which is
at least double the normal minimum refresh rate set for
said display, thereby producing multiple intermediate
levels of intensity in said display.
2. A gray-scale driver according to claim 1, used with
a built-in driver vacuum fluorescent display (BDVFD), and
having a circuitry that produces sequencing of up to
seven fields at a refresh rate of up to 420 fields per
second for an overall refresh rate of at least 60 screens
per second.
3. A gray-scale driver according to claims 1 or 2,
wherein the sequenced fields have pixels with different
ON-OFF states, which alternate, for each pixel, at a rate
such as to achieve the desired intermediate intensity
level.
4. A method of producing multiple levels of intensity
or gray-scale on a per-pixel basis in a fixed-intensity
electronic display, which comprises, sequencing several
fields in which the pixels may have different ON-OFF
states, at a refresh rate at least double the normal
minimum refresh rate set for said display.
5. A method according to claim 4, in which sequencing
of up to seven fields is performed at a refresh rate of
up to 420 fields per second for an overall refresh rate
of at least 60 screens per second.
-8-

6. A method according to claims 4 or 5, in which the
ON-OFF states of each pixel are made to alternate at a
rate such as to achieve the desired level of intensity.
-9-

Description

Note: Descriptions are shown in the official language in which they were submitted.


CA 02247794 1998-09-25
GRAY-SCALE DRIVER FOR FIXED-INTENSITY ELECTRONIC DISPLAY
1. Field of the Invention:
This invention relates to a method and driver for
driving fixed-intensity electronic displays in such a way
as to produce multiple levels of intensity (gray-scale)
on a per-pixel basis. It applies in particular, but not
exclusively, to built-in driver vacuum fluorescent
display (BDVFD) products.
2. Description of the Prior Art:
Some electronic displays are only available with
fixed-intensity electronic drive circuitry, i.e. the
pixels can only be driven in one of two states (bi-
stable). A good analogy for the pixels of these displays
would be a lamp that only has a simple on-off switch,
while a lamp controlled by a dimmer would not fill that
category since it can directly provide intermediate
brightness levels. It should be noted that the word
"pixel" refers to a picture element which is the smallest
addressable component of the display.
This is the case, for example, of the BDVFD products
manufactured by the Japanese company Noritake, which
constitute an improvement on the previous generation of
vacuum fluorescent display (VFD) devices by integrating
within the glass display package the electronic driver
circuits. VFDs act as a classic triode vacuum tube, with
a cathode filament emitting electrons when heated, an
anode at a relatively high voltage (around 55 volts) and
a grid between the anode and cathode. In Noritake~s VFDs,
-1-

CA 02247794 1998-09-25
the triode is used only in two discrete states, fully ON
or fully OFF, because logic circuits are used to control
them. In the OFF state, the grid is driven at a voltage
below that of the cathode to stop the electron flow from
cathode to anode. In the ON state, the grid switches to a
higher voltage than the cathode: the electrons are drawn
toward the anode, hit the phosphor coating which emits
the light. The phosphor used by Noritake emits a
blue-green light when excited. Since the built-in driver
circuit either switches the grid fully ON or fully OFF,
it has no provision for varying the intensity of light on
a per-pixel basis.
The standard circuit recommended by Noritake for
controlling their BDVFD devices includes sections for
power supply and logic waveform generation. The power
supply must provide different voltages for the anodes
(approximately 55 volts, Direct Current) and cathodes
(approximately 4 volt RMS of Alternating Current,
centered around the 6 volt DC level, to heat the
filaments). The built-in driver inside the Noritake
display receives logic data from the control inputs as a
stream of serially shifted 0's and 1's, for two columns
of pixels on the screen, then switches ON the grids for
these columns while the data for the next two columns is
shifted in. Eventually, all the pixels get addressed this
way, to be turned on briefly if their corresponding data
was a 1. The required refresh rate for the display (the
addressing of all of its pixels) should be at a minimum
-2-

CA 02247794 1998-09-25
of one hundred times per second to prevent flicker.
OBJECTS AND SUMMARY OF THE INVENTION
It is an object of the present invention to improve
upon present fixed-intensity electronic displays by
providing multiple levels of intensity or gray-scale
therefor, thus allowing for display of shades in such
devices.
Another object is to achieve intermediate intensity
levels in BDVFD products.
Other objects and advantages of the present
invention will be apparent from the following description
thereof .
The invention basically relies on inertia inherent
to either the human vision neurosystem (referred simply
as the eye hereafter) or the display technology used. The
inertia of the eye is defined as the maximum speed at
which changes in light intensity can be perceived. The
peripheral vision is more sensitive to fast, small
changes in light intensity and is used to measure the
maximum rate of detectable changes in light intensity. If
a point in the field of view changes states faster than
this limit, the eye perceives a light intensity that is
an intermediate value between the two states. The inertia
of the display relates to some property, either
mechanical, chemical or physical, that causes the pixels
to resist abrupt changes in their state. Fluorescent
lamps have negligible inertia compared to that of the
human eye because luminosity ceases as soon as the
-3-

CA 02247794 1998-09-25
excitation is removed, while phosphorescent materials
(such as those used in the cathode ray tube of a TV or
computer monitor) exhibit a decaying light output, called
persistence, after the excitation stops.
The perceived light value from a point is the sum of
all contributing emitted, reflected or refracted light
sources. If two light sources vary their intensities at
rates A and B, both above the rate detectable by the
human eye, they could still exhibit a beating effect at a
rate ~A - B~ that could be below the detectable rate, and
therefore be observable; this is the principle behind
stroboscope tachometers. This beating effect can be
observed with computer monitors that have a refresh rate
below 85 Hz in offices lit by fluorescent lamps (which
have a frequency of 60 Hz in North America); this
undesirable effect is called screen flicker and is most
perceptible with a large white screen background.
The essence of the present invention is to have a
much faster screen refresh rate and alternate between the
ON and OFF states for each pixel according to the
intermediate intensity level desired. The persistence of
both the phosphor and human eye have an integrating (or
averaging) effect on the intensity of the light emitted
by the pixel and perceived by the observer. The perceived
light intensity is directly controlled by the proportion
of the time that the pixel is ON.
By sequencing several fields in which the pixels may
have different states, at a rate that is at least double
-4-

CA 02247794 1998-09-25
and preferably several times the normal minimum refresh
rate, there is obtained the desired averaging effect and
the perception of different intensities (or shades of
blue-green) for each pixels. The number of fields defines
the number of intensities perceived (plus one for the
all-off, or black, intensity). Also, by spreading the ON
states as much as possible over time, the chances of
perceptible flicker are minimized.
BRIEF DESCRIPTION OF THE DRAWINGS
A non-limitative embodiment of the present invention
will now be described with reference to the appended
drawings, in which:
Fig. 1 shows a timing diagram that illustrates pixel
state to field for each of 8 equally spaced brightness
levels; and
Fig. 2 shows a block diagram of a BDVFD module
provided with the improved features of the present
invention.
DETAILED DESCRIPTION OF THE INVENTION
The timing diagram of Fig. 1 illustrates one
embodiment of the method of relating pixel state to
field, for each of 8 equally spaced brightness levels
from 0% (black) to 100% (full intensity). The ON states
are deliberately spread over the repetitive period (the
full sequence of fields) to minimize flicker. There could
be some flicker remaining for the 14% intensity since it
has only one ON state per repetitive period. The effect
-5-

CA 02247794 1998-09-25
of this artifact is minimized since it occurs for the
lowest intensity above the black level.
The block diagram of Fig. 2 illustrates one
embodiment of the circuit that the applicant has
implemented to validate the above described concept. It
works off a single regulated 5V DC power supply. The
included power circuitry uses a push-pull transformer
drive whose duty cycle (and thus output levels) can be
varied under software control for overall intensity
control of the display.
The implementation described herein uses 4 bits of
memory for each pixel. The controlling processor writes
and reads the display memory while the display refresh
circuitry only reads it. The logic allows synchronized
accesses to the memory by both the processor and refresh
circuitry.
For each pixel, one bit of memory is used to control
blinking (turning the pixel ON and OFF at a slow rate)
while the other three define which of the 8 possible
shades is displayed (OOOb for black, lllb for maximum
intensity).
In the diagram of Fig. 2, the various acronyms have
the following meanings:
BDVFD - built-in driver vacuum fluorescent display
CMOS - complimentary metal oxide semiconductor
SRAM - static random access memory
MOSFET - metal-oxide-semiconductor field effect
transistor
CPLD - complex programmable logic device
FPGA - field programmable gate array.
-6-

CA 02247794 1998-09-25
The above terms are generally known in the art.
The circuit illustrated in Fig. 2 has a refresh
circuitry (consisting of SRAM, programmable logic and
CMOS drivers) that enables much faster refresh rate and
alternating between ON and OFF states than was previously
proposed for fixed intensity electronic displays. Thus,
the rate can be at least 200 times per second for 3
intensities, at least 300 times per second for 4
intensities and at least 400 times per second for 8
intensities with minimal flicker as illustrated in Fig.
1. It has been found, however, that for the BDVFD display
arrangement shown in Fig. 2, the maximum field refresh
rate is 420 times per second (Hz) which for seven fields
(eight intensities) produces 60 full image refresh
(screens) per second.
It should be noted that the invention is not limited
to the specific embodiments described above, but that
various obvious modifications can be made by those
skilled in the art without departing from the invention
and the scope of the following claims.

Representative Drawing
A single figure which represents the drawing illustrating the invention.
Administrative Status

2024-08-01:As part of the Next Generation Patents (NGP) transition, the Canadian Patents Database (CPD) now contains a more detailed Event History, which replicates the Event Log of our new back-office solution.

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Event History

Description Date
Inactive: IPC from MCD 2006-03-12
Application Not Reinstated by Deadline 2003-09-25
Time Limit for Reversal Expired 2003-09-25
Deemed Abandoned - Failure to Respond to Maintenance Fee Notice 2002-09-25
Application Published (Open to Public Inspection) 2000-03-25
Inactive: Cover page published 2000-03-24
Classification Modified 1998-11-19
Inactive: IPC assigned 1998-11-19
Inactive: First IPC assigned 1998-11-19
Inactive: IPC assigned 1998-11-19
Inactive: IPC assigned 1998-11-19
Filing Requirements Determined Compliant 1998-11-02
Inactive: Filing certificate - No RFE (English) 1998-11-02
Application Received - Regular National 1998-10-30

Abandonment History

Abandonment Date Reason Reinstatement Date
2002-09-25

Maintenance Fee

The last payment was received on 2001-09-17

Note : If the full payment has not been received on or before the date indicated, a further fee may be required which may be one of the following

  • the reinstatement fee;
  • the late payment fee; or
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Fee History

Fee Type Anniversary Year Due Date Paid Date
Application fee - small 1998-09-25
Registration of a document 1998-09-25
MF (application, 2nd anniv.) - small 02 2000-09-25 2000-09-11
MF (application, 3rd anniv.) - small 03 2001-09-25 2001-09-17
Owners on Record

Note: Records showing the ownership history in alphabetical order.

Current Owners on Record
TETRA TECHNOLOGIES INC.
Past Owners on Record
MARC VINCENT
Past Owners that do not appear in the "Owners on Record" listing will appear in other documentation within the application.
Documents

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Document
Description 
Date
(yyyy-mm-dd) 
Number of pages   Size of Image (KB) 
Representative drawing 2000-03-06 1 7
Description 1998-09-25 7 274
Abstract 1998-09-25 1 13
Drawings 1998-09-25 2 78
Claims 1998-09-25 2 45
Cover Page 2000-03-06 1 28
Courtesy - Certificate of registration (related document(s)) 1998-11-03 1 114
Filing Certificate (English) 1998-11-02 1 163
Reminder of maintenance fee due 2000-05-29 1 109
Courtesy - Abandonment Letter (Maintenance Fee) 2002-10-23 1 179
Reminder - Request for Examination 2003-05-27 1 113
Fees 2001-09-17 1 37
Fees 2000-09-11 1 40