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Patent 2272949 Summary

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Claims and Abstract availability

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(12) Patent Application: (11) CA 2272949
(54) English Title: SEGMENT SWITCHING APPARATUS
(54) French Title: APPAREIL DE COMMUTATION DE SEGMENTS
Status: Deemed Abandoned and Beyond the Period of Reinstatement - Pending Response to Notice of Disregarded Communication
Bibliographic Data
(51) International Patent Classification (IPC):
  • H04L 12/28 (2006.01)
  • H04Q 03/00 (2006.01)
(72) Inventors :
  • SHIMADA, NAOHIRO (Japan)
(73) Owners :
  • NEC CORPORATION
(71) Applicants :
  • NEC CORPORATION (Japan)
(74) Agent: SMART & BIGGAR LP
(74) Associate agent:
(45) Issued:
(22) Filed Date: 1999-05-20
(41) Open to Public Inspection: 1999-11-22
Examination requested: 1999-05-20
Availability of licence: N/A
Dedicated to the Public: N/A
(25) Language of filing: English

Patent Cooperation Treaty (PCT): No

(30) Application Priority Data:
Application No. Country/Territory Date
156834/98 (Japan) 1998-05-22

Abstracts

English Abstract


A segment switching apparatus for repairing a fault
occurring in a segment configuring a path in the same segment
independently of other segments.
A segment switching apparatus is provided nearby the
proximal end and distal end of each segment. When one of the
switching apparatuses detects a fault occurring in a path,
it repairs the fault and prevents fault repair from being
repeatedly performed by switching apparatuses downstream
than the former switching apparatus.


Claims

Note: Claims are shown in the official language in which they were submitted.


-11-
WHAT IS CLAIMED IS:
1. A segment switching apparatus to be set nearby the
proximal end and the distal end of each of a plurality of
segment configuring a path, comprising:
a fault detecting function for detecting a fault
occurring in said path by monitoring an input signal;
an operation control function for controlling the
relation between detection of a fault by said fault detecting
function and operation corresponding to the detection; and
a repair circuit for repairing a fault detected by said
fault detecting function in accordance with the control by
said operation control function.
2. The segment switching apparatus according to claim 1,
wherein said operation control function is provided with
guard time setting means to set a guard time to a timer when
said fault detecting function detects a fault and to control
said repair circuit so as to operate when said fault detecting
function still detects a fault after the set guard time
elapses.
3. The segment switching apparatus according to claim 2,
wherein a guard time to be set to the timer of said guard
time setting means is set longer as the set position of said
segment switching apparatus becomes more downstream than
said path.

-12-
4. The segment switching apparatus according to claim 1,
wherein said operation control function is provided with
signal correction means to transmit a signal capable of
preventing a fault from being detected by a segment switching
apparatus downstream than the former segment switching
apparatus until said former segment switching apparatus
fails in repair operation after said fault detecting function
detects a fault.
5. The segment switching apparatus according to claim 1,
further comprises:
a fault detecting node for detecting a fault occurring
in the path by monitoring an input signal; and
a switching node present at a position downstream than
said fault detecting node to repair a fault in accordance
with a switching notification signal supplied from said fault
detecting node are included.
6. The segment switching apparatus according to claim 5,
wherein said fault detecting node is provided with guard time
setting means to set a guard time to a timer when said fault
detecting function detects a fault and transmit a switching
notification signal to a corresponding switching node when
said fault detecting function still detects a fault after
the set guard time elapses.
7. The segment switching apparatus according to claim 6,
wherein a guard time to be set to said guard time setting

-13-
means of said fault detecting node is set longer as the
position of the node becomes more downstream than said path.
8. The segment switching apparatus according to claim 5,
wherein said fault-detecting node is provided with signal
correction means to transmit a switching notification signal
to said switching node and moreover transmit a signal capable
of preventing a fault from being detected by a fault-detecting
node downstream than the former fault-detecting
node.
9. The segment switching apparatus according to claim 1,
wherein said repair circuit switches a segment in which a
fault is detected to its standby segment.
10. The segment switching apparatus according to claim 1,
wherein said input signal is configured by a message signal
of a user and a dummy signal inserted into a time zone where
said message signal is not present and said fault detecting
function detects a fault when at least either of said message
signal or said dummy signal is stopped.
11. The segment switching apparatus according to claim 4,
wherein said fault detecting function operates said repair
circuit immediately after detecting the fault.
12. The segment switching apparatus according to claim 1,
wherein said fault detecting function and said repair circuit

-14-
are provided in the same node.
13. The segment switching apparatus according to claim 1,
wherein said path is configured by a virtual path.
14. The segment switching apparatus according to claim 1,
wherein said repair circuit switches the portion between a
node and the other node which are in the adjacent segments
respectively to said segment in which a fault is detected
to a standby path.

Description

Note: Descriptions are shown in the official language in which they were submitted.


CA 02272949 1999-OS-20
- 1 -
SEGMENT SWITCHING APPARATUS
BACKGROUND OF THE INVENTION
Field of the Invention
A VP (Virtual Path) between a transmitting end and a
receiving end is usually configured by a plurality of
segments . If a fault occurs in a certain segment , the segment
is recovered from the faulty state by switching the segment
to a standby segment serving as a spare of the above segment .
The present invention relates to a segment switching
apparatus for switching segments in the above case.
Description of the Related Art
FIG. 3 is a schematic diagram showing an end-end VP to
which the present invention is applied. The VP a.s configured
by a segment 1, a segment 2, and a segment 3, in which the
segment 1 controls a carrier A, the segment 2 controls a
carrier B, and the segment 3 controls a carrier C. The
segment 1 includes nodes 1 and 2 , the segment 2 includes nodes
3 and 4, and the segment 3 includes nodes 5 and 6.
It is assumed that the segment 2 causes a trouble between
the nodes 3 and 4.
Setting one of two nodes in the segment nearby the
proximal end of the segment and the other nearby the distal
end of the segment is preferable to switch the segments.
In ATM (Asynchronous Transfer Mode) , OAM (Operation and
Maintenance ) function has been executed by using a segment

CA 02272949 1999-OS-20
- 2 -
OAM (Operation and Maintenance) cell. The segment OAM cell
is a cell for terminating in the segment concerned by setting
3 as a VCI { identifier of VC ( Virtual Channel ) } and 4 is set
as the OAM cell for executing the OAM function of the end-end
VP as the VCI.
As for the conventional method using the OAM cell, it
is necessary to insert a new OAM cell in order to perform
a switching message between segments when a trouble occurs .
Therefore, a circuit for inserting/detecting the OAM cell
is required.
Moreover, there is not any assurance that the band of
a transmission line is assigned to transmit an OAM cell and
thus, it is apprehensive that transfer of a message may be
delayed.
Resultantly, there were problems that more processing
circuits were necessary for switching, and a lot of
processing time was required, and switching was delayed.
SUMMARY OF THE INVENTION
The present invention is made to solve the above problems
and its object is to provide an apparatus capable of repairing
a fault detected in a segment in the same segment.
It is another object of the present invention to provide
an apparatus for starting a repair operation in the
most-upstream segment among segments in which a fault is
detected, but for preventing a segment at the downstream side
of the most-upstream segment from starting the repair
operation.

CA 02272949 1999-OS-20
- 3 -
To attain the above objects, an apparatus of the present
invention has a fault detecting function for detecting a
fault every segment, an operation control function for
controlling the time until staring a fault repair operation
after detecting a fault, and a repair circuit for repairing
a fault after controlling operations by the operation control
function and performs the fault repair operation every
segment.
In FIG. 3, if a fault occurs in the path between the
nodes 3 and 4 of the segment 2 , the fault is similarly detected
in accordance with the fault detecting function of the nodes
4, 5, or 6.
However, because the set time of a timer for starting
the operation of the operation control function of the node
4, 5, or 6 is set to a value to be decreased toward
more-upstream node, the fault repair operation is first
performed in the most-upstream node 4 but the operation is
not repeated in the node 5 or 6.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a block diagram showing a basic embodiment
of the present invention;
FIG. 2 is a block diagram showing an embodiment more
specific than the embodiment of FIG. 1;
FIG. 3 is a schematic diagram showing a path to which
the present invention is applied;
FIG. 4 is a schematic diagram showing a result when the
present invention is applied to repair a fault of the path

CA 02272949 1999-OS-20
- 4 -
shown in FIG. 3;
FIG. 5 is a block diagram showing another embodiment
of the present invention; and
FIG. 6 is a block diagram showing still another
embodiment of the present invention.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
Embodiments of the present invention will be described
below by referring to the accompanying drawings.
FIG. 1 is a block diagram showing an embodiment of the
present invention.
In FIG. 1, symbol 1-1 denotes a segment switching
apparatus of the present invention, 1-2 denotes an external
signal to be inputted, 1-3 denotes a fault detecting
function, 1-4 denotes an operation control function, 1-5
denotes an operation control signal, 1-6 denotes a repair
circuit, and 1-7 denotes an output signal.
The fault detecting function 1-3 detects a fault by
monitoring the input external signal 1-2.
For example, by deciding so as to transmit a dummy cell
to be transmitted between ends of the path in the time zone
when a user' s message is not present between the ends of the
path, the cell is detected as a fault when the external signal
1-2 is stopped.
When an external signal is stopped and a fault is
detected by the node 4 of FIG. 3, the same fault is detected
by nodes ( in this case, nodes 5 and 6 ) more downstream than
the node 4.

CA 02272949 1999-OS-20
- 5 -
However, it is necessary to perform the fault repair
operation by the repair circuit 1-6 of the node 4 and to
prevent the operation from being repeated in the node 5 or
6.
The operation control function 1-4 is used to avoid a
repetitive operation. Because of the existence of this
function, the repair circuit 1-6 of the node 4 first operates.
It is possible to most simply realize the operation
control function 1-4 of FIG. 1 by the guard time setting means
of a timer.
FIG. 2 is a block diagram showing the embodiment of FIG.
1 by further embodying it. Symbols 2-1, 2-2, 2-3, 2-5, 2-6,
and 2-7 in FIG. 2 denote portions same as denoted shown by
symbols 1-1, 1-2, 1-3, 1-5, 1-6, and 1-7 of FIG. 1, and the
guard time setting means 2-4 of FIG. 2 corresponds to the
operation control function 1-4 of FIG. 1.
When the fault detecting function 2-3 of the segment
switching apparatus 2-1 detects a fault, it sets a timer (not
illustrated) in the guard time setting means 2-4. When the
fault detecting function 2-3 still detects a fault after the
set time of the timer elapses, the control signal 2-5 is
outputted to operate the repair circuit 2-6.
By setting the guard time to be set to the timer of the
guard time setting means 2-4 so that it increases toward a
more downstream node, the repair operation has been completed
in an upstream node when the set time of the timer elapses
in a downstream node and a fault is not detected in accordance
with a downstream fault detecting function. Therefore, any

CA 02272949 1999-OS-20
- 6 -
repair operation is not repeated.
When the repair operation is not completed in an upstream
node within a predetermined time, a fault is detected in
accordance with the fault detecting function of a downstream
node also when the set time of the timer elapses in the
downstream node and the operation of the repair circuit of
the downstream node is started.
FIG. 5 is a block diagram showing another embodiment
of the present invention. In FIG. 5, symbols 5-l, 5-2, 5-3,
5-5, 5-6, and 5-7 denote portions same as those denoted by
symbols 2-1, 2-2, 2-3, 2-5, 2-6, and 2-7 in FIG. 2 and a signal
correction means 5-4 transmits, for example, a dummy cell
as an output signal 5-7 to prevent the fault detecting
function of a downstream node from detecting a fault.
That is, while a fault is not detected in accordance
with the fault detecting function 5-3, the input signal 5-2
passes through the repair circuit 5-6 and signal correction
means 5-4 without stopping and serves as the output signal
5-7. When the fault detecting function 5-3 detects a fault
(for example, when the function 5-3 detects that input
signals are stopped), it immediately operates the repair
circuit 5-6 and simultaneously transmits a signal (dummy
signal designated with end-end transmission) generated by
the signal correction means 5-4 as the output signal 5-7.
Because the above dummy signal is inputted as the input
signal of a downstream node, it is detected by a downstream
node as if no fault occurs .
When an upstream node does not succeed in fault repair,

CA 02272949 1999-OS-20
the operation of the signal correction means 5-4 of the node
is stopped. Because an input signal disappears in the
downstream node, a fault is detected in accordance with the
fault detecting function of the node.
As for the embodiments shown in FIGS . 1, 2 , and 5 , the
fault detecting functions ( 1-3 , 2-3 , and 5-3 ) and the repair
circuit s ( 1- 6 , 2 - 6 , and 5 - 6 ) are provided in the same node .
This is an example that the fault-detecting node and
switching node shown in FIG. 6A are the same node.
However, as shown in FIG. 6B, it is also possible to
provide a switching node to a node immediately downstream
than a fault detecting node. In this case, to prevent a
duplicate operation from being performed due to a fault
detected by a fault detecting node downstream than the above
fault detecting node, it is possible to use the guard time
setting means 2-4 of FIG. 2 and moreover, it is possible to
prevent a fault from being detected by a downstream node by
using the signal correction means 5-4 of FIG. 5. Moreover,
a switching notification signal corresponding to the
operation control signal 2-5 or 5-5 of FIG. 2 or 5 is
transmitted to a switching node.
Because this switching notification signal is a
notification addressed to a node immediately downstream than
a fault detecting node, it does not reach a switching node
downstream than the addressed node. When repair is not
completed in the switching node, a switching notification
signal is transmitted from the switching node to a switching
node immediately downstream than the former switching node.

CA 02272949 1999-OS-20
_ g _
It is possible to properly generate a dummy signal to
be transmitted from the signal correction means 5-4 or a
switching notification signal to be transmitted from the
fault detecting node of FIG. 6B to a switching node in
accordance with the specification of an ATM cell.
Moreover, a method of superimposing switching
information on a user cell is proposed ( Japanese Unexamined
Patent Publication No. 10-173679). Furthermore, it is
possible to form a cell configuration in which switching
information is superimposed on a dummy signal, the
destination node of a switching notification signal detects
the switching information as a switching signal, and other
nodes recognize the switching information as a mere dummy
cell.
The repair operation performed by the repair circuit
1-6, 2-6, or 5-6 or the repair operation in a switching node
is a repair operation for mainly performing switching to a
standby segment. A standby path and a standby segment are
previously assigned to each VP (virtual path) and each
segment. Therefore, if a fault occurs in a current path or
current segment, it is possible to switch the current path
or segment to a standby path or segment.
As previously described for FIG. 3, if a fault occurs
between the nodes 3 and 4 in the segment 2, the fault is
detected in accordance with the fault detecting function of
the node 4. When the repair circuit of the node 4 operates
and the fault is repaired, the portion between the nodes 3
and 4 is switched to a standby segment.

CA 02272949 1999-OS-20
- 9 -
FIG. 4 is a schematic diagram showing the switching
result of repairing the fault shown in FIG. 3. In FIG. 4,
a symbol same as that in FIG. 3 denotes the same portion.
FIG. 4 shows a state in which the portion between the nodes
3 and 4 is switched to a standby segment.
As shown in FIG. 4, it is also possible to switch the
portion between the nodes 6 and 1 to a standby path. However,
switching to a standby segment is a preferred method in order
to effectively use resources.
As for the above embodiments, a segment switching
apparatus is described which is set nearby the proximal end
and distal end of each of a plurality of segments mainly
configuring a virtual path. However, it is needless to say
that the present invention can use a segment switching
apparatus to be set nearby the proximal end and the distal
end of each of a plurality of segments configuring a path.
As described above, according to the present invention,
a fault is detected in a segment configuring a path and the
segment is switched to a standby segment to perform repair
operation, but segments downstream than the segment causing
the fault do not relate to the fault. Therefore, it is
possible to quickly execute the repair operation when a fault
occurs and moreover, repair the fault by making most use of
network resources.
Moreover, it is unnecessary to newly prepare any special
band for transmitting OAM cells like the conventional case
of using OAM cells.
Furthermore , because the circuits shown in FIGS . 1 , 2 ,

CA 02272949 1999-OS-20
- 10 -
and 5 are easily changed to an LSI, there is an advantage
that an apparatus of the present invention can be downsized.

Representative Drawing
A single figure which represents the drawing illustrating the invention.
Administrative Status

2024-08-01:As part of the Next Generation Patents (NGP) transition, the Canadian Patents Database (CPD) now contains a more detailed Event History, which replicates the Event Log of our new back-office solution.

Please note that "Inactive:" events refers to events no longer in use in our new back-office solution.

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Event History

Description Date
Inactive: IPC expired 2022-01-01
Inactive: IPC expired 2022-01-01
Inactive: IPC expired 2013-01-01
Inactive: IPC from MCD 2006-03-12
Inactive: IPC from MCD 2006-03-12
Inactive: IPC from MCD 2006-03-12
Inactive: Dead - No reply to s.30(2) Rules requisition 2003-11-17
Application Not Reinstated by Deadline 2003-11-17
Deemed Abandoned - Failure to Respond to Maintenance Fee Notice 2003-05-20
Inactive: Abandoned - No reply to s.30(2) Rules requisition 2002-11-15
Inactive: S.30(2) Rules - Examiner requisition 2002-05-15
Application Published (Open to Public Inspection) 1999-11-22
Inactive: Cover page published 1999-11-21
Inactive: First IPC assigned 1999-07-26
Inactive: IPC assigned 1999-07-26
Inactive: Filing certificate - RFE (English) 1999-06-30
Letter Sent 1999-06-30
Application Received - Regular National 1999-06-28
Request for Examination Requirements Determined Compliant 1999-05-20
All Requirements for Examination Determined Compliant 1999-05-20

Abandonment History

Abandonment Date Reason Reinstatement Date
2003-05-20

Maintenance Fee

The last payment was received on 2002-04-16

Note : If the full payment has not been received on or before the date indicated, a further fee may be required which may be one of the following

  • the reinstatement fee;
  • the late payment fee; or
  • additional fee to reverse deemed expiry.

Patent fees are adjusted on the 1st of January every year. The amounts above are the current amounts if received by December 31 of the current year.
Please refer to the CIPO Patent Fees web page to see all current fee amounts.

Fee History

Fee Type Anniversary Year Due Date Paid Date
Registration of a document 1999-05-20
Request for examination - standard 1999-05-20
Application fee - standard 1999-05-20
MF (application, 2nd anniv.) - standard 02 2001-05-21 2001-04-18
MF (application, 3rd anniv.) - standard 03 2002-05-20 2002-04-16
Owners on Record

Note: Records showing the ownership history in alphabetical order.

Current Owners on Record
NEC CORPORATION
Past Owners on Record
NAOHIRO SHIMADA
Past Owners that do not appear in the "Owners on Record" listing will appear in other documentation within the application.
Documents

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Document
Description 
Date
(yyyy-mm-dd) 
Number of pages   Size of Image (KB) 
Representative drawing 1999-11-04 1 5
Abstract 1999-05-19 1 15
Description 1999-05-19 10 334
Claims 1999-05-19 4 112
Drawings 1999-05-19 5 52
Courtesy - Certificate of registration (related document(s)) 1999-06-29 1 116
Filing Certificate (English) 1999-06-29 1 165
Reminder of maintenance fee due 2001-01-22 1 112
Courtesy - Abandonment Letter (R30(2)) 2003-01-26 1 167
Courtesy - Abandonment Letter (Maintenance Fee) 2003-06-16 1 174