Note: Descriptions are shown in the official language in which they were submitted.
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P8906/STN (23728/1999)
AUTOMATIC DATA TRANSMISSION RATE-CONTROLLING
DEVICE AND METHOD FOR PREVENTION OF GENERATION OF AN
OVERFLOW IN ETHERNET SWITCH
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to Ethernet switches, and more particularly to a
device and method of automatically controlling a data transmission rate for
preventing
a generation of an overflow in Ethernet switches.
2. Description of the Related Art
Fig. 1 is a schematic block diagram illustrating the construction of a
conventional Ethernet network system. In the Ethernet network system, Ethernet
switches 102 and 104 may be one of 100Base-T of IEEE 802.3u and 1000Base-T of
IEEE 802.3ab, respectively. The Ethernet switches 102 and 104 support a line
the
identical port of which has various transmission rates. Thus, an Ethernet
switch
1 S device may include ports having a data transmission rate of up to 10 Mbps,
100 Mbps,
1000Mbps or 1 Gbps. Generally, the Ethernet switch 102 is provided with a line
of a
lower transmission rate coupled to an external terminal such as a personal
computer
(PC) 100, and a line of a higher transmission rate coupled to a server (not
shown) or
the other Ethernet switch 104.
At this time, communication between ports having the same transmission rate,
i.e., communication between a port of 10 Mbps and a port of 10 Mbps, and
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communication between a port of 100 Mbps and a port of 100 Mbps do not permit
data
congestion to be generated except for a special case, like a case in which
data is
transmitted from several input ports to one output port, such as a port
aggregation, etc.
However, there has been a problem, in that, when data is transmitted from the
port of 100 Mbps to the port of 10 Mbps, or from the port of 1000 Mbps to the
port of
100 Mbps, a generation of an overflow due to the data congestion causes
inevitable
accumulation of data in the Ethernet switch.
That is, for example, if a transmission rate in a connection line between
ports
of the external terminal, i.e., PC 100 and the Ethernet switch 102 is 100
Mbps, and that
in a connection line between ports of the Ethernet switches 102 and 104 is 10
Mbps,
data continuously transmitted, at the transmission rate of 100 Mbps from the
PC 100 to
the Ethernet switch 102 always are accumulated in the Ethernet switch 102. At
this
time, in the case that the Ethernet switch 102 employs a shared buffer, this
affects
directly other ports of the Ethernet switch 102, thereby steeply reducing data
throughput in an entire communication network.
SUMMARY OF THE INVENTION
Therefore, an object of the invention is to provide a device and method of
automatically controlling a data transmission rate for preventing a generation
of an
overflow in Ethernet switches.
In accordance with one embodiment of the present invention, this object is
accomplished by providing a device of automatically controlling a data
transmission
rate for preventing a generation of an overflow in an Ethernet switch having a
pair of
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ports each supporting a variety of transmission rates, comprising:
P8906/STN (23728/1999)
at least one line interface logic circuit coupled to an external terminal
unit,
through one of the pair of ports, adapted to automatically set a transmission
rate of the
external terminal unit coupled to one of the pair of ports to a predetermined
one of the
S transmission rates supported by the Ethernet switch, and adapted to
interface data
transmitted between the external terminal unit and the Ethernet switch;
a line transmission rate controller coupled to the at least one line interface
logic circuit, adapted to generate a control signal for reducing the
transmission rate of
data inputted to the Ethernet switch from the external terminal unit for
application to
the line interface logic circuit upon generation of an overflow within the
Ethernet
switch due to congestion of the inputted data, the transmission rate of the
inputted data
being reduced in such a fashion that it corresponds to a transmission rate at
which the
data are outputted from the Ethernet switch; and
a buffer memory coupled to the line transmission rate controller, adapted to
temporarily store data transmitted through the line interface therein
depending on the
control of the line transmission rate controller.
BRIEF DESCRIPTION OF THE DRAWINGS
The foregoing and other objects, features and advantages of the present
invention will become more apparent from the following detailed description
when
taken in conjunction with the accompanying drawings in which:
Fig. 1 is a schematic block diagram illustrating the construction of an
Ethernet
network system according to a prior art;
Fig. 2 is a block diagram illustrating the construction of an automatic
transmission rate-controlling device according to a preferred embodiment of
the
present invention; and
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P8906/STN (23728/1999)
Fig. 3 is a flowchart illustrating the process of implementing an automatic
transmission rate controlling operation according to a preferred embodiment of
the
present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
S Reference will now be made in greater detail to the preferred embodiments of
the present invention. In the following description of the present invention,
numerous specific details, such as concrete process routines, are set forth to
provide a
more thorough understanding of the present invention. It will be apparent,
however,
to those skilled in the art that the invention may be practiced otherwise than
according
to the previously mentioned specific details. The detailed description of
known
functions and configurations incorporated herein will be omitted when it may
make the
subject matter of the present invention rather unclear.
Fig. 2 is a block diagram illustrating the inner construction of an automatic
transmission rate-controlling device of an Ethernet switch according to a
preferred
embodiment of the present invention.
Refernng to Fig. 2, the automatic transmission rate-controlling device is
illustrated, which includes a plurality of line interface logic circuits 200
to 202, a line
transmission rate controller 204, and a buffer 206.
The line interface logic circuit 202 is a physical layer section, which is
adapted
to connect an external terminal unit such as PC 100 and an Ethernet switch
102. The
Ethernet switch 102 has a pair of ports "A" and "B" each supporting a variety
of
transmission rates. The line interface logic circuit 202 is also coupled to
each of the
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pair of ports "A" and "B", and performs communication together with the
external
terminal unit 100 coupled to each of the ports "A" and "B". During the
communication between the line interface logic circuit 202 and the external
terminal
unit 100, the line interface logic circuit 202 regulates automatically a
transmission rate
of data inputted from the external terminal unit 100 to the Ethernet switch
102, and
writes the set transmission rate in a register therein. That is, because the
Ethernet
switch 102 is designed in such a fashion that each of the ports supports all
the
transmission rates of lOMbps/100Mbps, the transmission rate of the external
terminal
unit coupled to each of the ports should be automatically controlled to
correspond to a
predetermined one of the transmission rates supported by the Ethernet switch
102.
The line interface logic circuit 202 controls automatically a transmission
rate of data
inputted from the external terminal unit 100 to the Ethernet switch 102 in
such a
fashion that the transmission rate of the external terminal unit 100
corresponds to the
transmission rate supported by the Ethernet switch 102 by using an automatic
transmission rate-setting function.
The line transmission rate controller 204 receives packet data inputted from
the external terminal unit 100 to the line interface logic circuit through
each of the
ports, stores temporarily the packet data in the buffer 206 through a
predetermined
data processing operation, and transmits the packet data read-out from the
buffer 206
to an associated port. Also, the line transmission rate controller 204
evaluates a
transmission rate of data inputted/outputted to/from the buffer 206. If a
transmission
rate of data inputted to the buffer 206 is higher than that of data outputted
from the
buffer 206 so that congestion of data causes an overflow within the Ethernet
switch,
the line transmission rate controller 204 controls the line interface logic
circuit 200 to
reduce the transmission rate of data inputted from the external terminal unit
100 to the
line interface logic circuit 200 in such a fashion that the transmission rate
of the
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inputted data corresponds to a transmission rate at which the data are
outputted from
the Ethernet switch.
Figs. 3 is a flowchart illustrating the process of implementing an automatic
transmission rate-controlling operation upon generation of an overflow within
the
Ethernet switch due to congestion of data inputted to a line interface logic
circuit
according to a preferred embodiment of the present invention.
The automatic transmission rate-controlling operation according to a preferred
embodiment of the present invention will be described in detail hereinafter
with
reference to Fig. 2 and 3.
In the description of a preferred embodiment of the present invention, for the
purpose of its convenience, suppose that a transmission rate of data inputted
from the
external terminal unit 100 to the line interface logic circuit 202 through an
input port A
is 100Mbps and that of data outputted to other Ethernet switch 104 from the
line
interface logic circuit 204 through an output port B is l OMbps.
First, at step 300, if the external terminal unit such as PC 100 is connected
to
the Ethernet switch 102 through the input port "A", the line transmission rate
controller 204 allows an activated bit of an automatic transmission rate-
setting
function of a PHY control register included in the line interface logic
circuit 202 to be
set to a logic "high", i.e., a logic value of "1 ", and sets an optimum
transmission rate
for transmitting data between the external terminal unit 100 and the Ethernet
switch
102 by using the automatic transmission rate-setting function of the line
interface logic
circuit 202. That is, as described in an embodiment of the present invention,
if the
port "A" is a port of a combined lOMbps/100Mbps and the external terminal unit
100
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is also a port of a combined lOMbps/100Mbps, the line interface logic circuit
200 sets
the transmission rate to 100Mbps depending on the automatic transmission rate-
setting
function. Accordingly, data is transmitted from the external terminal unit 100
to the
Ethernet switch 102 through the port "A" at the set transmission rate. And
then, the
S program proceeds to subsequent step 302 at which the line transmission rate
controller
204 determines whether or not the line interface logic circuit 200 receives
the data
transmitted from the external terminal unit 100 through the port "A". If it is
determined at step 302 that the data is received from the external terminal
unit 200, the
program proceeds to step 304 where the line transmission rate controller 204
stores
temporarily the received data in the buffer 206. At subsequent step 306, the
line
transmission rate controller 204 allows the data stored in the buffer 206 to
be read-out
and transmitted to an associated destination node through the port "B". And
then, at
next step 308, the line transmission rate controller 204 determines whether or
not there
is generated an overflow due to data congestion. As described above, in the
case that
the Ethernet switch is a switch employing a shared buffer, the overflow is an
undesirable phenomenon which affects directly other ports of the Ethernet
switch 102
so that data throughput is reduced steeply in an entire communication network.
In
other words, if the transmission rate of data inputted to the Ethernet switch
102 from
the external terminal 100 is higher than that of data outputted from the
Ethernet switch
102, the just inputted data is not outputted to the associated destination
node, but is
accumulated in the buffer 206 of the Ethernet switch 102. As a result, the
line
transmission rate controller 204 monitors data stream over a data transmission
path
and compares the transmission rate of the inputted data with the transmission
rate of
the outputted data to determine if there is generated an overflow owing to
data
congestion.
If it is determined at the step 308 that there is not generated the overflow,
the
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program returns to the previous step 302 where the line transmission rate
controller
204 performs the following steps 302 through 308 again. If, on the other hand,
it is
determined at step 308 that there is generated an overflow, the program
proceeds to
step 310 at which the line transmission rate controller 204 generates a
control signal
for reducing the transmission rate of data inputted to the Ethernet switch 102
from the
external terminal unit 100 for application to the line interface logic circuit
200. The
transmission rate of the inputted data is reduced in such a fashion that it
corresponds to
a transmission rate at which the data is outputted from the Ethernet switch
102. That
is, the line interface logic circuit 200 allows a bit value of a transmission
rate of the
PHY control register therein to be set to a logic "low", i.e., a logic value
of "0"
according to the control signal, and an activated bit of the automatic
transmission rate-
setting function is also set to a logic value of "0" so that the transmission
rate of the
inputted data is reduced to lOMbps. As a result, the program proceeds to step
312 at
which the line interface logic circuit 200 executes the transmission rate-
reducing
operation according to the control signal so that the transmission rate of the
input port
"A" set between the external terminal unit 100 and the Ethernet switch 102 is
controlled to correspond to that of the output port "B".
As described above, the Ethernet switch supporting a variety of transmission
rates of the present invention provides advantages that the transmission rate
of the
input port is automatically controlled to correspond to that of the output
port, thereby
preventing loss of data due to generation of an overflow over a data
transmission path,
and reduction of data throughput in an entire communication network.
While this invention has been described in connection with what is presently
considered to be the most practical and preferred embodiment, it is to be
understood
that the invention is not limited to the disclosed embodiment, but, on the
contrary, it is
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intended to cover various modifications within the spirit and scope of the
appended
claims.
