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5
The present invention relates to communications systems and in
particular to computer assisted digital communications including data, fax,
10 digitized voice and caller identification information.
A wide variety of communications alternatives are ctuxently
available to telecommunications users. For example, facsimile transmission of
printed master is available through what is commonly referred to as a stand-
15 alone fax machine. Alternatively, fax-modem communication systems are
currently available for personal computer users which combine the operation
of a facsimile machine with the word processor of a computer to transmit
documents held on computer disk, Modem communication over telephone
lines in combination with a personal computer is also known in the art where
20 file transfers can be accomplished from one computer to another. Also,
simultaneous voice and modem data transmitted over the same telephone line
has been accomplished in several ways.
The increased accessibility provided by telephone services and
modems raises problems for controlling access to corriputer systems.
25 Computer security systems have been developed which incorporate password
programs to control access. These programs often monitor the number of
times a particular user has logged onto a system. Systems which restrict
access by limiting the number of attempted accesses in a given time period or
by limiting the number of attempted accesses for a given password enable
30 unauthorized users to "tie up" the system while they attempt to gain
unauthorized access. When the system is tied up, authorized users may be
prohibited from accessing the system due to repeated unsuccessful attempts by
unauthorized users. In addition, such systems fail to guarantee that the
unauthorized user will not gain access by guessing a correct password.
35 Another personal communications system access problem is
gracefully restricting access to the personal communications system depending
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on the date or time of day. For example, the system operator of a BBS might
want to restrict modem communications with the BBS betvveen the hours of
8:00 a.m and 6:00 p.m to leave time for system maintenance duties.
Therefore, there is a need in the art for an access control
system for a persona( communications system which quickly rejects
unauthorized users, and, preferably denies access before the unauthorized user
has an opportunity to illegally enter the system There is a firrther need for
an
access control system which screens callers without the use of a password
system Finally, there is a need in the art for a personal communications
access system which screens calls based on date and time.
S~r~of the Inventi~
The present invention solves the aforementioned problems and
shortcomings of the existing art and solves other problems not listed above
which will become apparent to those skilled in the art upon wading and
understanding the present specification and claims.
The present disclosure describes a complex computer assisted
communications system which contains multiple inventions. The subject of
the present multiple inventions is a personal communications system which
includes components of software and hardware operating in conjunction with a
personal computer. The user interface control software operates on a personal
computer, preferably within the Microsoft Windows~ environment. The
software control system communicates with hardware components linked to
the software through the personal computer serial communications port. The
hardware components include telephone communication equipment, digital
signal pr~oessors, and hardvvare to enable both fax and data communication
with a hardware components at a remote site connected through a standard
telephone line. The functions of the hardware components are controlled by
control software operating within the hardware component and from the
software components operating within the personal computer.
The major fimctions of the present system are a telephone
fimction, a voice mail fimction, a fax manager function, a mufti-media mail
function, a show and tell fimction, a terminal fimction and an address book
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fimcxion. These fimctions are described in fimher detail in U.S. Patent
Application Serial Number 08/002,467 filed January 8, 1993 entitled
"COMPUTER BASED MULTIFUNCTION PERSONAL
COMMUNICATIONS SYSTEM".
5 The hardware componatts of the present system include
circuitry to enable digital data communication and facsimile communication
over standard telephone lines.
The present disclosure also describes a system for personal
communications system access control using a caller ID interface ("CID
10 interface"). Many standard telephone carriers are encoding caller )D
information which may be received before answering the telephone. One
embodiment of the present invention decodes the incoming caller )D
information and compares the present caller's ide<ttification infon~nation
with a
preprogtarnmed access matrix to determine if access to the modem is
15 appropriate. The callers' identification information can be recorded and
statistically tracked regardless of whether the callers are authorized and
regardless of whether each call is answered.
In one embodiment of the present invention, the caller ID
interface incorporates a ring detector, off hook circuit, do holding circuit,
20 caller )D decoder, relay switching circuit, memory, and processor. The ring
detector cit~cuit is used to enable the caller ID decoder after the first ring
since most caller B7 carriers encode the caller ID inforn~ation using
fi~equency
shin keying t<ansmission after the first telephone ring and before the second
telephone ring. 'Ihe caller ID decode is connected to the telephone line
25 (without answering the call) using the relay switching circuit between the
first
and second telephone ring to receive the incoming caller ID information. The
off hook circuit is used to hang up on an unwanted caller before actually
answering the telephone.
In one embodiment of the present invention the caller 1D
30 interface acquires information about incoming calls by decoding the
incoming
caller ID information and storing it in memory. Statistical tracking of
callers
is performed on the stored caller ID information if desired by the personal
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camrtmnications system owner. Another embodiment of the present invention
screens access by comparing a preprogrammed access matrix to details of the
call such as the caller's name, caller's phone number, the time and date the
call is made, and the numbs of previous accesses by that caller in a
predefined time frame. A variety of preprogtarnmed criteria are utilized to
control access to the personal communications system. For example, in one
embodiment, saeetming by name and telephone number is performed on an
inclusive (or exclusive) basis by preprogcamining the caller ID interface with
the names or telephone numbers of the callers with (or without) ass
privileges. The incoming call details obtained from the caller 1D information
are then compared to the inclusive (or exclusive) calls list to determine if
the
callers are authorized to access the personal communications system. In an
alternate embodiment of the present invention the caller ID interface hangs up
on an unauthorized caller, preventing the unauthorized caller even brief
access.
therefore, the present invention solves the deficiencies of the
prior art by providing an apparari~s and method for rapid database creation of
incoming calls using caller ID information. One embodiment of the present
invention also quickly rejects unauthorized callers, and may hang up on them
instantly, rather than allow access to the modem. The screening process of
the present invention need not use a password for caller authorization, since
the caller 1D information can be used to screen out unwanted callers. Yet
another embodimelmt of the present invention saeelms incoming calls based on
date and time.
j~ ' tion of t~
In the drawings, where like numerals describe like components
throughout the several views,
Figure 1 shows the telecommunications environment within
which the present may operate in several of the possible modes of
communication;
Figure 2 is the main menu icon for the software components
operating on the personal computer;
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Figure 3 is a block diagram of the hardware components of the
P
Figure 4 is a key for viewing the detailed elearical schematic
diagrams of Figures SA-lOC to facilitate understanding of the interconnect
5 between the drawings;
Figures SA-SC, 6A-6C, 7A-7C, 8A-8B, 9A-9C and l0A lOC
are detailed electrical schematic diagrams of the circuitry of the hardware
corr~ponents of the present system;
Figure 11 is a signal flow diagram of the speech compression
10 algorithm;
Figure 12 is a detailed function flow diagram of the speech
compression algorithm;
Figure 13 is a detailed function flow diagram of the speech
decompression algorithm;
15 Figure 14 is a detailed function flow diagram of the echo
cancellation algorithm;
Figure 15 is a detailed fimction flow diagram of the voiceldata
multiplexing function;
Figure 16 is a general block diagram showing one embodiment
20 of a caller ID interface for a personal communications system;
Figure 17A is a schematic diagram of one embodiment of a
caller m interface for a personal communications system;
Figure 17B is a schematic diagram of an alternate embodim~t
of a caller ll'~ interface for a personal communications system;
25 Figure 18 is a block diagram showing the multiple data
message format and single data message fom~at used in standard caller 1D
encoded transmissions;
Figure 19 is a flowchart showing one embodiment of a caller
ID message fom~at recognition scheme;
30 Figure 20 is a flowchart of the general operation of one
embodiment of the present invention; and
Figure 21 is a flowchart showing one possible implementation
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of a scaeening mode algorithm.
In the following detailed description, references made to the
accompanying drawings which form a part hereof and in which is shown by
S way of illustration specific embodicr~t in which the invention may be
practiced. These embodiments are described in sufficient detail to enable
those skilled in the art to practice and use the ~irnention, and it is to be
understood that other embodiments may be utilized in that electrical, logical,
and stnlchual changes may be made without departing firm the spirit and
10 scope of the present invention. The following detailed description is,
therefore, not to be taken in a limiting sense in scope of the present
invention
as defined by the appended claims
Figure 1 shows a typical arrangement for the use ~of the present
system Personal computer 10 is pinning the software components of the
15 present system while the hardware components 20 include the data
communication equipment and telephone headset. Hardware compon~ts 20
communicate over a standard telephone line 30 to one of a variety of remote
sites. One of the remote sites may be equipped with the present system
including hardware components 20a and software components pinning on
20 personal computer l0a In one alternative use, the local hardware components
20 may be communicating over standard telephone line 30 to facsimile
machine 60. In another alten~ative use, the present system may be
communicating over a standard telephone line 30 to another personal
computer 80 through a remote modem 70. In another alternative use, the
25 present system may be communicating over a standard telephone line 30 to a
standard telephone 90. Those skilled in the art will readily recognize the
wide
variety of communication interconnections possible with the present system by
reading and understanding the following detailed description.
The ornamental features of the hardware components 20 of
30 Figure 1 are claimed as part of Design Patent Application Number 29/001368,
filed November 12, 1992 entitled "Telephone/Modem case for a Computer-
Based Multifunction Personal Communications System" assigned to the same
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assignee of the present inventions.
The present inventions are embodied in a commercial product
by the assignee, MultiTech Systems, Inc. The soRwace component operating
5 on a personal corrrputer is sold under the commercial trademark of
MultiFsPCSTM personal communications software while the hardware
component of the present systerrr is sold ands the commercial name of
MultiModemPCS'TM, Intelligent Personal Communications System Modem In
the preferred embodiment, the software component nrns under Mrcrosoft~
10 Wrndows~ however those skilled in the art will readily recognize that the
present system is easily adaptable to run under any single or multi-user,
single .
or mufti-window operating system.
The present system is a multifimction communication system
which includes hardware and software components. The system allows the
15 user to connect to remote locations equipped with a similar system or with
modems, facsimile machines or standard telephones over a single analog
telephone line. The software component of the present system includes a
number of modules which are described in more detail below.
Figure 2 is an example of the Wrndows~ based main menu
20 icon of the present system operating on a personal computer. The fimctions
listed with the icons used to invoke those functions are shown in the
preferred
embodiment. Those skilled in the art will readily recognize that a wide
variety of selection techniques may be used to invoke the various firnctions
of
the present system. The icon of Figure 2 is part of Design Patent Application
25 Number 29/001397, filed November 12, 1992 entitled "Icons for a Computer
Based Multifimction Personal Communications System" assigned to the same
assignee of the present inventions.
The telephone module allows the system to operate as a
conventional or sophisticated telephone system. The system converts voice
30 into a digital signal so that it can be transmitted or stored with other
digital
data, like computer information. The telephone function supports PBX and
Centrex features such a call waiting, call forwarding, caller )D and three-way
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calling. This module also allows the user to mute, hold or record a
conversation. The telephone module enables the handset, headset or hands-
fi~ae speaker telephone operation of the hardvvare component. It includes on-
screetr push button dialing, speed-dial of stored numbers and digital
recording
5 of two-way c~vecsations.
The voice mail portion of the present system allows this system
to operate as a telephone ansvv~eering machine by storing voice messages as
digitized voice files along with a time/date voice stamp. The digitized voice
files can be saved and sent to one or more destinations immediately or at a
10 later time using a queue scheduler. The user can also listen to, forward or
edit the voice messages which have been received with a powerful digital
voice editing component of the present system This module also creates
queues for outgoing messages to be sent at preselected times and allows the
users to create outgoing messages with the voice editor.
15 The fax manager portion of the present system is a queue for
incoming and outgoing facsimile pages. In the preferred embodiment of the
present system, this fimction is tied into the Windows "print" command once
the present system has been installed This feature allows the user to create
faxes from any Windows~ based document that uses the "print" command.
20 The fax manager function of the present system allows the user to view
queued faxes which are to be sent or which have been received. This module
creates queues for outgoing faxes to be sent at preselected times and logs
incoming faxes with time/date stamps.
The multi-media mail fimction of the present system is a utility
25 which allows the user to compose documents that include text, graphics and
voice messages using the message composer function of the present system,
described more filly below. The multi-media mail utility of the present
system allows the user to schedule messages for transmittal and queues up the
messages that have been received so that can be viewed at a later time.
30 The show and tell function of the present system allows the
user to establish a data over voice (DOS communications session. When the
user is transmitting data to a remote location similarly equipped, the user is
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able to tally to the person over the telephone line while concrarecrtly
transferring the data 'Ibis voice over data function is accomplished in the
hardware components of the present system. It digitizr~s the voice and
transmits it in a dynamically changing allocation of voice data and digital
data
5 multiplexed in the same transmission. The allocation at a given moment is
selected depending on the amount of voice digital information required to be
transferred. Quiet voice intervals allocate greater space to the digital data
transmission.
The terminal function of the present system allows the user to
10 establish a data communications session with another computer which is
equipped with a modem but which is not equipped with the present system.
This feature of the present system is a Windows~ based data communications
prograrrr that reduces the need for issuing "AT" commands by providing menu
driven and "pop-up" window alternatives.
15 The address book function of the present system is a database
that is accessible from all the other functions of the present system. This
database is created by the user inputting destination add~ses and telephone
numbers for data communication, voice mail, facsimile transmission, modem
communication and the like. The address book function of the present system
20 may be utilized to broadcast communications to a wide variety of
recipients.
Multiple linked databases have separate address books for different groups
and different destinations may be created by the users. The address book
fiulction includes a textual search capability which allows fast and efficient
location of specific addresses as described more fully below.
25
Figure 3 is a block diagram of the hardware components of the
present system corresponding to reference number 20 of Figure 1. These
components form the link between the user, the personal computer nmning the
softvvare component of the present system and the telephone line interface.
30 As will be more fully described below, the interface to the hardware
components of the present system is via a serial communications port
connected to the personal computer. The interface protocol is well ordered
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and defined such that other software systems or programs running on the
personal computer may be designed and implemented which would be capable
of controlling the hardware components shown in Figure 3 by using the
control and communications protocol defined below.
5 In the preferred embodiment of the present system three
alternate telephone interfaces are available: the telephone handset 301, a
telephone headset 302, and a hands-free microphone 303 and speaker 304.
Regardless of the telephone interface, the three alternative interfaces
connect
to the digital telephone coder-decode (CODEC) circuit 305.
10 The digital telephone CODEC circuit 305 interfaces with the
voice control digital signal processor (DSP) circuit 306 which includes a
voice
control DSP and CODEC. This circuit does digital to analog (D/A)
conversion, analog to digital (A/D) conversion, coding/decoding, gain control
and is the interface between the voice control DSP circuit 306 and the
15 telephone interface. The CODEC of the voice control circuit 306 transfers
digitized voice information in a compressed format to multiplexor circuit 310
to analog telephone line interface 309.
The CODEC of the voice control circuit 306 is actually an
integral component of a voice control digital signal processor integrated
20 circuit, as described more fully below. The voice control DSP of circuit
306
controls the digital telephone CODEC circuit 305, performs voice compression
and echo cancellation.
Multiplexor (MIJX) circuit 310 selects between the voice
control DSP circuit 306 and the data pump DSP circuit 311 for transmission
25 of information on the telephone line through telephone line interface
circuit
309.
The data pump circuit 311 also includes a digital signal
processor (DSP) and a CODEC for communicating over the telephone line
interface 309 through MCJX circuit 310. The data pump DSP and CODEC of
30 circuit 311 performs functions such as modulation, demodulation and echo
cancellation to communicate over the telephone line interface 309 using a
plurality of telecommunications standards including FAX and modem
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protocols.
The main controller circuit 313 controls the DSP data pump
circuit 311 and the voice control DSP circuit 306 through serial input/output
and clock timer control (SIO/C'TC) circuits 312 and dual port RAM circuit
5 308 respectively. The main controller circuit 313 communicates with the
voice control DSP 306 through dual port RAM circuit 308. In this fashion
digital voice data can be read and written simultaneously to the memory
portions of circuit 308 for high speed communication be<we~ the user
(through interfaces 301, 302 or 303/304) and the personal computer connected
10 to serial interface circuit 315 and the remote telephone connection
connected
through the telephone line attached to line interface circuit 309.
As described more fully below, the main controller circuit 313
includes, in the preferred embodiment, a microprocessor which controls the
functions and operation of all of the hardvvare components shown in Figure 3.
15 The main controller is connected to RAM circuit 316 and an prograrnn~able
and electrically erasable read only memory (PEROM) circuit 317. The
PEROM circuit 317 includes non-volatile memory in which the executable
control programs for the voice control DSP circuits 306 and the main
controller circuits 313 operate.
20 The RS232 serial interface circuit 315 communicates to the
serial port of the personal computer which is running the software components
of the present system. The RS232 serial interface circuit 315 is connected to
a serial input/output circuit 314 with main controller circuit 313. SIO
circuit
314 is in the preferred embodiment, a part of SIO/CTC cinvit 312.
25
Referring once again to Figure 3, the multiple and selectable
functions described in conjunction with Figure 2 are all implemented in the
hardware components of Figure 3. Each of these functions will be discussed
in rum.
30 The telephone fimction 115 is implemented by the user either
selecting a telephone number to be dialed from the address book 127 or
manually selecting the number through the telephone menu on the personal
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compute. The telephone number to be dialed is downloaded from the
personal cotrqnrter over the serial interface and received by main controller
313. Main cornrolla 313 causes the data pump DSP circuit 311 to seize the
telephone line and transmit the DTMF tones to dial a number. Main
5 controller 313 configures digital telephone CODEC circuit 305 to enable
either the handset 301 operation, the microphone 303 and speaks 304
operation or the headset 302 operation. A telephone connection is established
through the telephone line interface circuit 309 and communication is enabled
The users analog voice is transmitted in an analog fashion to the digital
10 telephone CODEC 305 where it is digitized. The digitized voice patters are
passed to the voice control circuit 306 where echo cancellation is
accomplished, the digital voice signals are reconstructed into analog signals
and passed through multiplexor circuit 310 to the telephone line interface
ci~uit 309 for analog transmission over the telephone line. The incoming
15 analog voice from the telephone connection through telephone connection
circuit 309 is passed to the integral CODEC of the voice control circuit 306
where it is digitized. The digitized incoming voice is then passed to digital
telephone CODEC circuit 305 where it is reconverted to an analog signal for
transmission to the selected telephone interface (either the handset 301, the
20 microphone/speaker 303/304 or the headset 302). Voice Control DSP circuit
306 is programmed to perform echo cancellation to avoid feedback and echoes
between transmitted and received signals, as is more fully described below.
In the voice mail function mode of the present system, voice
messages may be stored for later transmission or the present system may
25 operate as an answering machine receiving incoming messages. For storing
digitized voice, the telephone interface is used to send the analog speech
patterns to the digital telephone CODEC circuit 305. Circuit 305 digitizes the
voice patterns and passes them to voice control circuit 306 where the
digitized
voice patterns are digitally corr~pressed. The digitized and compressed voice
30 patterns are passed through dual port ram circuit 308 to the main
controller
circuit 313 where they are transferred through the serial interface to the
persona( computer using a packet protocol defined below. The voice patterns
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are then stored on the disk of the personal computer for latrs use in mufti-
media mail, f~ voice mail, as a pre-recorded ansvv~ering machine message or
for later predetermined transmission to other sites.
For the present system to operate as an answering machine, the
hardware components of Figure 3 are placed in answer mode. An incoming
telephone ring is detected through the telephone line interface circuit 309
and
the main controller circuit 313 is alerted which passes the infonwation off to
the personal computer through the RS232 serial interface cin:uit 31 S. The
_ telephone line interface circuit 309 seizes the telephone line to make the
telephone carinecxion. A pre-recorded message may be sent by the personal
computer as corrrpressed and digitized speech through the RS232 interface to
the main controller circuit 313. The corr>pressed and digitized speech from
the personal computer is passed from main controller circuit 313 through dual
port ram circuit 308 to the voice control DSP circuit 306 where it is
unco~ and converted to analog voice patterns. These analog voice
patterns are passed through multiplexor circuit 310 to the telephone line
interface 309 for transmission to the caller. Such a message may invite the
caller to leave a voice message at the sound of a tone. The incoming voice
messages are received through telephone line interface 309 and passed to
voice control circuit 306. The analog voice patterns are digitized by the
integral CODEC of voice control circuit 306 and the digitized voice patterns
are compressed by the voice control DSP of the voice control circuit 306.
The digitized and compressed speech patterns are passed through dual port
ram circuit 308 to the main controller circuit 313 where they are transferred
using packet protocol described below through the RS232 serial interface 31 S
to the personal computer for storage and later retrieval. In this fashion the
hardware components of Figure 3 operate as a transmit and receive voice mail
system for implementing the voice mail function 117 of the present system.
The hardware components of Figure 3 may also operate to
facilitate the fax manager function 119 of Figure 2. In fax receive mode, an
incoming telephone call will be detected by a ring detect circuit of the
telephone line interface 309 which will alert the main controller circuit 313
to
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the incoming call. Main controller circuit 313 will cause line interface
circuit
309 to seize the telephone line to receive the call. Main controller circuit
313
will also concutrently alert the operating programs on the personal compute
through the RS232 interface using the packet protocol described below. Once
5 the telephone line interface seizes the telephone line, a fax carrier tone
is
transmitted and a return tone and handshake is received from the telephone
line and detected by the data pump circuit 311. The reciprocal transmit and
receipt of the fax tones indicates the imminent receipt of a facsimile
transmission and the main controller circuit 313 configures the hardware
10 compon~ts of Figure 3 for the receipt of that information. The ner~ssaiy
handshaking with the remote facsimile machine is accomplished through the
data pump 311 under control of the main controller circuit 313. The
incoming data packets of digital facsimile data are received over the
telephone
line interface and passed through data pump circuit 311 to main controller
15 circuit 313 which forwards the information on a packet basis (using the
packet
protocol described more fully below) through the serial interface circuit 315
to
the personal computer for storage on disk. Those skilled in the art will
readily recognize that the FAX data could be transferred from the telephone
line to the personal computer using the same path as the packet transfer
20 except using the normal AT stream mode. Thus the incoming facsimile is
automatically received and stored on the personal computer through the
hardware components of Figure 3.
A facsimile transmission is also facilitated by the hardware
components of Figure 3. The transmission of a facsimile may be immediate
25 or queued for later transmission at a predetermined or preselected time.
Control packet information to configure the hardware comp<ments to send a
facsimile are sent over the RS232 serial interface between the personal
computer and the hardware components of Figure 3 and are received by main
controller circuit 313. The data pump circuit 311 then dials the recipient's
30 telephone number using DTMF tones or pulse dialing over the telephone line
interface circuit 309. Once an appropriate connection is established with the
remote facsimile machine, standard facsimile handshaking is accomplished by
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the data pump circuit 311. Once the facsimile connection is established, the
digital facsimile picture information is received through the data packet
protocol transfer over serial line interface circuit 315, passed through main
controller circuit 313 and data pump circuit 311 onto the telephone line
5 through telephone line interface circuit 309 for receipt by the remote
facsimile
machine.
The operation of the multi-media mail function 121 of Figure 2
is also facilitated by the hardware components of Figure 3. A multimedia
transmission consists of a combination of picture infomration, digital data
and
10 digitized voice information. For example, the type of multimedia
information
transferred to a remote site using the hardvvare components of Figure 3 could
be the multimedia format of the MicroSoft~ Multimedia Wave~ format with
the aid of an Intelligent Serial Interface (ISI) card added to the personal
computer. The multimedia may also be the type of multimedia information
15 assembled by the software component of the present system which is
described more fully below.
The multimedia package of information including text, graphics
and voice messages (collectively called the multimedia document) may be
transmitted or received through the hardware components shown in Figure 3.
20 For example, the transmission of a multimedia document through the
hardvvare components of Figure 3 is accomplished by transferring the
multimedia digital information using the packet protocol described below over
the RS232 serial interface betwe~ the personal corrrputer and the serial line
interface circuit 315. The packets are then transferred through main
controller
25 circuit 313 through the data pump circuit 311 on to the telephone line for
receipt at a remote site through telephone line interface circuit 309. In a
similar fashion, the multimedia documents received over the telephone line
from the remote site are received at the telephone line interface circuit 309,
passed through the data pump circuit 31 I for receipt and forwarding by the
30 main controller circuit 313 over the serial line interface circuit 315.
The show and tell function 123 of the present system allows the
user to establish a data over voice communication session. In this mode of
CA 02315745 2000-07-20
16
operation, full duplex data transmission may be accomplished simultaneously
with the voice communication berweerr both sites. This mode of operation
assumes a like configured remote site. The hardware components of the
present system also include a means for sending voice/data over cellular
links.
5 The protocol used for transmitting multiplexed voice and data include a
supervisory packet described more fully below to keep the link established
through the cellular link This s~ervisory packet is an acknowledgement that
the link is still up. The sr~pervisory packet may also contain link
information
to be used for adjusting various link parameters when needed. This
10 supervisory packet is sent every second when data is not being sent and if
the
packet is not acknowledged after a specified number of attempts, the protocol
would then give an indication that the cellular link is down and then allow
the
modem to take action. The action could be for example; change speeds,
retrain, or hang up. The use of supervisory packets is a novel method of
15 maintaining inherently intermittent cellular links when transmitting
multiplexed voice and data.
The voice portion of the voice over data transmission of the
show and tell function is accomplished by receiving the user's voice through
the telephone interface 301, 302 or 303 and the voice information is digitized
20 by the digital telephone circuit 305. The digitized voice information is
passed
to the voice control circuit 306 where the digitized voice information is
compressed using a voice compression algorithm.described more fully below.
The digitized and compressed voice inforzration is passed through dual port
RAM circuit 308 to the main controller circuit 313. Dwing quiet periods of
25 the speech, a quiet flag is passed from voice control circuit 306 to the
main
controller 313 through a packet trursfer protocol described below by a dual
port RAM circuit 308.
Simultaneous with the digitizing compression and packetizing
of the voice information is the receipt of the packetizsd digital information
30 from the personal computer over interface line circuit 315 by main
controller
circuit 313. Main controller circuit 313 in the show and tell function of the
present system must eil<iciently and ei~'ectively combine the digitized voice
CA 02315745 2000-07-20
17
information with the digital information for transmission over the telephone
line via telephone line interface circuit 309. As described above and as
described more fully below, main controller circuit 313 dynamically changes
the amount of voice information and digital infom~ation transmitted at any
5 given period of time depending upon the quiet times during the voice
transmissions. For example, during a quiet momern where there is no speech
infon~nation being transmitted, main controller circuit 313 ensures that a
higher volume of digital data infon~nation be transmitted over the telephone
line interface in lieu of digitized voice infom~ation.
10 Also, as described more fully below, the packets of digital data
transmitted over the telephone line interface with the transmission packet
protocol described below, requires 100 percent accuracy in the transmission of
the digital data, but a lesser standard of acc~uacy for the transmission and
receipt of the digitized voice infoctt>ation. Since digital information must
be
15 transmitted with 100 percent acc;~aacy, a corrupted packet of digital
information received at the remote site must be re-transmitted. A
retransmission signal is communicated back to the local site and the packet of
digital information which was corrupted during transmission is retransmitted
If the packet transmitted contained voice data, however, the remote site uses
20 the packets whether they were comtpted ar not as long as the packet header
was intact. If the header is comtpted, the packet is discarded. Thus, the
voice information may be corrupted without requesting retransmission since it
is understood that the voice information must be transmitted on a real time
basis and the corruption of any digital information of the voice signal is not
25 critical. In contrast to this the transmission of digital data is critical
and
retransmission of com>pted data packets is requested by the remote site.
The transmission of the digital data follows the CCITT V.42
standard, as is well known in the industry and as described in the CCITT Blue
Book, volume VIII entitled Data Communication over the Telephone Network,
30 1989. The voice data packet information also follows the CCITT V.42
standard, but uses a different header fom~at so the receiving site recognizes
the difference between a data packet and a voice packet. The voice packet is
CA 02315745 2000-07-20
18
distinguished from a data packet by using undefined bits in the header (80
hex) of the V.42 standard. The packet protocol for voice over data
transmission during the show and tell function of the present system is
described more fully below.
5 Since the voice over data communication with the remote site is
full-duplex, incoming data packets and incoming voice packets are received
by the hardware components of Figure 3. The incoming data packets and
voice packets are received through the telephone line interface circuit 309
and
passed to the main controller circuit 313 via data pump DSP circuit 311. The
10 incoming data packets are passed by the main controller circuit 313 to the
serial interface circuit 315 to be passed to the personal computer. The
incoming voice packets are passed by the main controller circuit 313 to the
dual port RAM circuit 308 for receipt by the voice control DSP circuit 306.
The voice packets are decoded and the compressed digital inforn~ation therein
15 is uncompressed by the voice control DSP of circuit 306. The unco~
digital voice inforn~ation is passed to digital telephone CODEC circuit 305
where it is reconverted to an analog signal and retransmitted through the
telephone line interface circuits. In this fashion full-duplex voice and data
transmission and reception is accomplished through the hardware components
20 of Figure 3 doting the show and tell functional operation of the present
system
Terminal operation 125 of the present system is also supported
by the hardware components of Figure 3. Terminal operation means that the
local personal computer simply operates as a "dumb" terminal including file
25 transfer capabilities. Thus no local processing takes place other than the
handshaking protocol required for the operation of a dumb terntinal. In
terminal mode operation, the remote site is assumed to be a modem connected
to a personal computer but the remote site is not necessarily a site which is
configured according to the present system In terminal mode of operation,
30 the command and data information from personal computer is transferred over
the RS232 serial interface circuit 31 S, forwarded by main controller cit~cuit
313 to the data pump circuit 311 where the data is placed on the telephone
CA 02315745 2000-07-20
19
line via telephone line interface circuit 309.
In a reciprocal fashion, data is received from the telephone line
over telephone line interface circuit 309 and simply forwarded by the data
pump circuit 311, the main controller circuit 313 over the serial line
interface
5 circuit 315 to the personal computer.
As described above, and more fully below, the address book
function of the present system is primarily a support function for providing
telephone numbers and addresses for the other various functions of the present
system
10 T>erailed Electrical ~c~j~
The detailed electrical schematic diagrams comprise Figures
SA-C, 6A-C, 7A-C, 8A-B, 9A-C and l0A-C. Figure 4 shows a key on how
the schematic diagrams may be conveniently arranged to view the passing of
signals on the electrical lines between the diagrams. The electrical
15 connections between the electrical schematic diagrams are through the
designators listed next to each wire. For example, on the right side of Figure
SA, address lines AO-A19 are attached to an address bus for which the
individual electrical lines may appear on other pages as AO-A19 or may
collectively be connected to other schematic diagrams through the designator
20 "A" in the circle connected to the collective bus. In a like fashion, other
elecorical lines designated with symbols such as RNGL on the lower left-hand
side of Figure SA may connect to other schematic diagrams using the same
signal designator RNGL.
Beginning with the electrical schematic diagram of Figure 7C,
25 the telephone line connection in the preferred embodiment is through
connector J2 which is a standard six-pin modular RJ-11 jack In the
schematic diagram of Figure 7C, only the tip and ring connections of the first
telephone circuit of the R,1-11 modular connector are used Fen-ite beads FB3
and FB4 are placed on the tip and ring wires of the telephone line connections
30 to remove any high frequency or RF noise on the incoming telephone line.
The incoming telephone line is also overvoltage protected through
SII7ACTbR R4. The incoming telephone line may be full wave rectified by
CA 02315745 2000-07-20
20
the full wave bridge comprised of diodes CR27, CR28, CR29 and CR31.
Swig S4 switches betvv~ direct connerxion and fill wave rectified
connection depending upon whether the line is a non-powered leased line or a
standard telephone line. Since a leased line is a "dead" line with no voltage,
5 the fill-wave rectification is not needed.
Also connected across the incoming telephone line is a ring
detect circuit. Optical isolator U32 (part model numbs CNYI ~ senses the
ring voltage threshold when it exceeds the breakdown voltages on zener
diodes CRl and CR2. A filtering circuit shown in the upper right comer of
10 Figure 7C creates a long RC delay to sense the constant presence of an AC
ring voltage and buffers that signal to be a binary signal out of operational
amplifier U25 (part model number TT.082). Thus, the RNGL and J1RING
signals are binary signals for use in the remaining portions of the electrical
schematic diagrams to indicate a presence of a ring voltage on the telephone
15 line.
The present system is also capable of sensing the caller >D
information which is transmitted on the telephone line between rings.
Between the rings, optically isolated relays U30, U31 on Figure 7C and
optically isolated relay U33 on Figure 7B all operate in the period between
20 the rings so that the FSK modulated caller ID information is connected to
the
CODEC and data pump DSP in Figures 8A and 8B, as described more fully
below.
Referring now to Figure 7B, more of the telephone line filtering
circuitry is shown. Some of the telephone line buffering circuitry such as
25 inductor Ll and resistor Rl are optional and are connected for various
telephone line standards used around the word to meet local requirements.
For example, Switzerland requires a 22 millihenry inductor and 1K resistor in
series the line. For all other countries, the 1 K resistor is replaced with a
0
ohm resistor.
30 Relay U29 shown in Figure 7B is used to accomplish pulse
dialing by opening and shorting the tip and ring wires. Optical relay X2 is
engaged during pulse dialing so that the tip and ring are shorted directly.
CA 02315745 2000-07-20
21
Transistors Q2 and Q3 along with the associated discrete resistors cor>prise a
holding circuit to provide a current path or ciutent loop on the telephone
line
to grab the line.
Figure 7A shows the telephone interface connections between
the hardware components of the present system and the handset, headset and
microphone.
The connecti~rs Tl and T2 for the telephone line firm Figure
7B ace connecxed to transformer TRl shown in the electrical schematic
diagram of Figure 8B. Only the AC components of the signal pass through
transformer TRl. The connection of signals attached to the secondary of TRI
is shown for both transmitting and_ receiving information over the telephone
line.
Incoming signals are buffered by operational amplifiers U27A
and U27B. The first stage of buffering using operational amplifier U27B is
used for echo sr>ppression so that the transmitted information being placed on
the telephone line is not fed back into the receive portion of the present
system The second stage of the input buffering through operational amplifier
U27A is configured for a moderate amount of gain before driving the signal
into CODEC U35.
CODEC chip U35 on Figure 8B, interface chip U34 on Figure
8A and digital signal processor (DSP) chip U37 on Figure 8A comprise a data
pump chip set manufactured and sold by AT&T Mrcuoelectronics. A detailed
description of the operation of these three chips in direct conrerxion and
ion with one another is described in the publication entitled "AT&T
V.32bisN.32/FAX I~'rgh-Speed Data Pump Chip Set Data Book" published by
AT&T Microelectronics, December 1991. This AT&T data pump chip set
comprises the core of an integrated, two-wire firll duplex modem which is
capable of operation over standard telephone lines or leased lines. The data
pump chip set conforms to the telecommunications specifications in CCTIT
recommendations V.32bis, V.32, V.22bis, V.22, V.23, V.21 and is compatible
with the Bell 212A and 103 modems. Speeds of 14,400, 9600, 4800, 2400,
1200, 600 and 300 bits per second are supported. This data pump chip set
CA 02315745 2000-07-20
22
consists of a ROM-coded DSP16A digital siginal processor U37, and interface
chip U34 and an AT&T T7525 linear CODEC U35. The AT&T V.32 data
pump chip set is available from AT&T Microelectronics.
The chip set U34, U35 and U37 on Figures 8A and 8B perform
5 all A/D, D/A, modulation, demodulation and echo cancellation of all signals
placed on or taken from the telephone line. The CODEC U35 performs
DTMF tone generation and detection, signal analysis of call progress tones,
etc. The transmission of information on the telephone line from CODEC U35
is through buffer U28A, through CMOS switch U36 and through line buffer
10 U25. The CMOS switch U36 is used to switch between the data pump chip
set CODEC of circuit 310 (shown in Figure 3) and the voice control CODEC
of circuit 306 (also shown in Figure 3). The signal lines AOUTN and
AOUTP conrspond to signals received from the voice control CODEC of
circuit 306. CODEC U35 is part of circuit 31 I of Figure 3.
15 The main controller of controller circuit 313 and the support
circuits 312, 314, 316, 317 and 308 are shown in Figures 5A-5C. In the
preferred embodiment of the present system, the main controller is a 280180
eight-bit microprocessor chip. In the preferred implementation,
microcontroller chip U17 is a 280180 microprocessor, part number Z84C01
20 by Zilog Inc. of Campbell, California (also available from Hitachi
Semiconductor as part number HD64180Z). The Zilog 280180 eight-bit
microprocessor operates at 12 MHz internal clock speed by means of an
external crystal XTAL,, which in the preferred embodiment, is a 24.576 MHz
crystal. The crystal circuit includes capacitors C4 and C5 which are 20 pf
25 capacitors and resistor R28 which is a 33 ohm resistor. The crystal and
support circuitry is connected according to manufacfia~er's specifications
found
in the Zilog Intelligent Peripheral Controllers Data Book published by Zilog
Inc. The product description for the Z84C01 280180 CPU from the Z84C01
280 CPU Product Specification pgs. 43-73 of the Zilog 1991 Intelligent
30 Peripheral Controllers databook.
The 280180 microprocessor in microcontroller chip UI7 is
intimately connected to a serial/parallel I/O counter timer chip U15 which is,
CA 02315745 2000-07-20
23
in the preferred embodiment, a Zilog 84090 CMOS 280 KIO
seriaUparallel/counter/timer integcateci circuit available from Zilog, Inc.
This
multi-function I/O chip U15 combines the functions of a parallel input/output
port, a serial input/output port, bus control circuitry, and a clock timer
circuit
5 in one chip. The Zilog 284090 product specification describes the detailed
internal operations of this circuit in the Zilog Intelligent Peripheral
Controllers
1991 Handbook available from Zilog, Inc. 284090 CMOS Z80KI0 Product
specification pgs. 205-224 of the Zilog 1991 Intelligent Peripheral
Controllers
databook.
10 Data and address buses A and B shown in Figure SA connect
the 280180 mianprocessor in microcontroller U17 with the 280 KIO circuit
U15 and a gate array circuit UI9, and to other portions of the electrical
schematic diagrams. The gate array U19 includes miscellaneous latch and
buffer circuits for the present system which norn~ally would be found in
15 discr~e SSI or MSI integrated cit~cuits. By combining a wide variety of
miscellaneous support circuits into a single gate array, a much reduced design
complexity and manufacturing cost is achieved A detailed description of the
internal operations of gate array U19 is described more fully below in
conjunction with schematic diagrams of Figures l0A IOC.
20 The memory chips which operate in conjunction with the 280
microprocessor in microcontroller chip UI7 are shown in Figure 5C. The
connections A, B correspond to the connections to the address and data buses,
respectively, found on Figure 5A. Memory chips U16 and UI3 are read-only
melrrory (ROM) chips which are electrically alterable in place. These
25 prograrr>ir>able ROMs, typically referred to as flash PROMS or
Progracnrr~able
Erasable Read Only Memories (PEROMs) hold the program code and
operating parameters for the present system in a non-volatile memory. Upon
power-up, the programs and operating parameters are transferred to the voice
control DSP RAM UI2, shown in Figure 9B.
30 In the preferred embodiment, RAM chip UI4 is a pseudostatic
RAM which is essentially a dynamic RAM with a built-in refi~esh. Those
skilled in the art will readily recognize that a wide variety memory chips may
CA 02315745 2000-07-20
24
be usod and substituted for pseudo-static RAM U14 and flash PROMS U16
and U13.
Referring once again to Figure 3, the main controller circuit
313 communicates with the voice control DSP of circuit 306 through dual port
5 RAM circuit 308. The digital telephone CODEC circuit 305, the voice
control DSP and CODEC circuit 306, the DSP RAM 307 and the dual port
RAM 308 are all shown in detailed electrical schematic diagrams of Figures
9A-9C.
Refezting to Figure 9A, the DSP RAM chips U6 and U7 are
10 shown with associated support chips. Support chips Ul and U2 are in the
preferred embodim~t part 74HCT244 which are TIL-level latches used to
capnu~e data from the data bus and hold it for the DSP RAM chips U6 and
U7. Circuits U3 and U4 are also latch circuits for also latching address
information to control DSP RAM chips U6 and U7. Once again, the address
15 bus A and data bus B shown in Figure 9A are mufti-wire connections which,
for the clarity of the drawing, are shown as a thick bus wire representing a
grouping of individual wires.
Also in Figure 9A, the DSP RAMS U6 and U7 are connected to
the voice control DSP and CODEC chip U8 as shown split between Figures
20 9A and 9B. DSP/CODEC chip U8 is, in the preferred embodiment, part
number l~E~ DSP16C, digital signal processor and CODEC chip
manufacriaed and sold by AT&T Nficroelectronics. This is a 16-bit
progracnrnable DSP with a voice band sigma-delta CODEC on one chip.
Although the CODEC portion of this chip is capable of analog-to-digital and
25 digital-to-analog signal acquisition and conversion system, the actual D/A
and
A/D functions for the telephone interface occur in digital telephone CODEC
chip U12 (corresponding to digital telephone CODEC circuit 305 of Figure 3).
Chip U8 includes circuitry for sampling, data conversion, anti-aliasing
filtering and anti-imaging filtering. The progtamnsable control of
30 DSP/CODEC chip U8 allows it to receive digitized voice from the telephone
interface (through digital telephone CODEC chip U12) and store it in a
digitized form in the dual port RAM chip Ul 1. The digitized voice can then
CA 02315745 2000-07-20
be passed to the main controller circuit 313 where the digitized voice may be
transmitted to the personal .computer over the RS232 circuit 315. In a similar
fashion, digitized voice stored by the main controller circuit 313 in the dual
port RAM Ul l may be transferred through voice control DSP chip U8,
5 comrerted to analog signals by telephone CODEC U12 and passed to the user.
Digital telephone CODEC chip U12 includes a direct telephone handset
interface on the chip.
The connections to DSP/CODEC chip U8 are shown split
across Figures 9A and 9B. Address/data decode chips U9 and U10 on Figure
10 9A serve to decode address and data information from the combined
address/data bus for the dual port RAM chip Ul l of Figure 9B. The
interconnection of the DSP/CODEC chip U8 shown on Figures 9A and 9B is
described more fully in the WEB DSP16C Digital Signal Processor/CODEC
Data Sheet published May, 1991 by AT&T Ivficroelectronics.
15 The Digital Telephone CODEC chip U12 is also shown in
Figure 9B which, in the preferred embodiment, is part number T7540 Digital
Telephone CODEC manufactured and sold by AT&T Ivhaoelearonics. A
more detailed description of this telephone CODEC chip U12 is described in
the T7540 Digital Telephone CODEC Data Sheet and Addendum published
20 July, 1991 by AT&T Nficroelectronics.
Support circuits shown on Figure 9C are used to facilitate
communication betvv~ CODEC chip U12, DSP/CODEC chip U8 and dual
port RAM U11. For ale, an 8 kHz clock is used to synchronizre the
operation of CODEC U12 and DSP/CODEC U8.
25 The operation of the dual port RAM Ul l is controlled both by
DSP U8 and main controller chip U17. The dual port operation allows
writing into one address while reading from another address in the same chip.
Both processors can access the exact same memory locations with the use of a
contention protocol such that why one is reading the other cannot be writing.
In the preferred embodiment, dual port RAM chip Ul I is part number
CYZC131 available from Cyprus Semiconductor. This chip includes built in
contention control so that if two processors try to access the same memory
CA 02315745 2000-07-20
26
location at the sarr~ time, the first one making the request gets control of
the
address location and the other processor must wait. In the preferred
embodiment, a circular buffer is arranged in dual port RAM chip Ul l
comprising 24 bytes. By using a circular buffs configuration with pointers
into the buffer area, both processors will not have a contartion problem
The DSP RAM chips U6 and U7 are connected to the DSP
chip U8 and also connected through the data and address buses to the Zilog
miaocontroller U17. In this configuration, the main controller can download
the control programs for DSP U8 into DSP RAMS U6 and U7. In this
fashion, DSP control can be changed by the main controller or the operating
programs on the personal computer, described more firlly below. The control
programs stored in DSP chips U6 and U7 originate in the flash PEROM chips
U16 and U17. The power-up control routine operating on controller chip U17
downloads the DSP control routines into DSP RAM chips U6 and U7.
The interface between the main controller circuit 313 and the
personal computer is through SIO circuit 314 and RS232 serial interface 315.
These interfaces are described more firlly in conjunction with the detailed
electrical schematic diagrams of Figure 6A-C. RS232 connection J1 is shown
on Figure 6A with the associated control circuit and interface circuitry used
to
generate and receive the appropriate RS232 standard signals for a serial
communications interface with a personal corr>puter. Figure 6B is a detailed
elearical schematic diagram showing the generation of various voltages for
powering the hardware components of the electrical schematic diagrams of
hardware components 20. The power for the present hardware compcments is
received on connector JS and controlled by power switch S34. From this
circuitry of Figure 6B, plus and minus 12 volts, plus five volts and minus
five
volts are derived for operating the various RAM chips, controller chips and
support circuitry of the present system. Figure C shows the interconnection of
the status LED's found on the front display of the box 20.
Finally, the "glue logic" used to support various fimctions in
the hardware components 20 are described in conjunction with the detailed
electrical schematic diagrams of Figures l0A-lOC. The connections between
CA 02315745 2000-07-20
27
Figures l0A and lOC and the previous schematic diagrams is made via the
labels for each of the lines. For example, the LED status lights are
controlled
and held active by direct addressing and data cortttol of latches GAl and
GA2. For a more detailed description of the connection of the glue logic of
5 Figures l0A lOC, the gate array U19 is shov~~n connected in Figures SA and
5B.
~t_h_e arrj~rr_ .~mt~onern
A special packet protocol is used for communication between
10 the hardware components 20 and the personal computer (PC) 10. The
protocol is used for transferring different types of information between the
two devices such as the transfer of DATA, VOICE, and QUALIFIED
information. The protocol also uses the BREAK as defined in CCITT X28 as
a means to maintain protocol synct~roniz~ion. A description of this BREAK
I S sequence is also described in the Statutory Invention Registration
entitled
"ESCAPE METHODS FOR MODEM COMMUNICATIONS", to Timothy D.
Gunn filed January 8, 1993.
The protocol has two modes of operation. One mode is packet
mode and the other is stream mode. The protocol allows mixing of different
20 types of information into the data stream without having to physically
switch
modes of operation. The hardware component 20 will identify the packet
received from the computer 10 and perform the appropriate action according
to the specifications of the protocol. If it is a data packet, then the
controller
313 of hardware component 20 would send it to the data pump circuit 311. If
25 the packet is a voice packet, then the controller 313 of hardware component
20 would distribute that infon~nation to the Voice DSP 306. This packet
transfer mechanism also works in the reverse, where the controller 313 of
hardvvare component 20 would give different infom~ation to the computer 10
without having to switch into different modes. The packet protocol also
30 allows commands to be sent to either the main controller 313 directly or to
the Voice DSP 306 for controlling different options without having to enter a
command state.
CA 02315745 2000-07-20
28
Packet mode is made up of 8 bit asynchronous data and is
identified by a beginning synchronization character (O1 hex) followed by an
ID/IrI ct~tac~r and that followed by the information to be sent. In addition
to the ID/LI character codes defined below, those skilled in the art will
readily
5 recognize that other ID/LI character codes could be defined to allow for
additional types of packets such as video data, or alternate voice compression
algorithm packets such as Codebook Excited Linear Ptrdictive Coding (CELP)
algorithm, GS1V>; RPE, VSELP, etc.
Stream mode is used when large amounts of one type of packet
10 (VOICE, DATA, or QUALIF>EID) is being sent. The transmitter tells the
receiver to eater stream mode by a unique command. Thetrafter, the
transmitter tells the receiver to terminate stream mode by using the BREAK
command followed by an "AT' type command The command used to
terminate the stream mode can be a command to enter another type of stream
15 mode or it can be a command to enter back into packet mode.
Currently there are 3 types of packets used: DATA, VOICE,
and QUALIFIED. Table 1 shows the common packet parameters used for all
three packet types. Table 2 shows the three basic types of packets with the
subtypes listed.
20
TABIE 1: Pgcket Pgrametets
25 1. Async~u~onous transfer
2. 8 bits, no parity
3. Maximum packet length of 128 bytes
- iDentifier byte = 1
- InFotmation = 127
30 4. SPEED
- variable from 9600 to 57600
- default to 19200
35
CA 02315745 2000-07-20
29
TABLE 2: Packet Types
5 1. Data
2. Voice
3. Qualified:
a COMMAND
b. RESPONSE
10 c. STATUS
d FLOW CONTROL
e. BREAK
f. ACK
g. NAK
15 h. STREAM
A Data Packet is shown in Table 1 and is used for normal data
20 transfer between the controller 313 of hardvvare component 20 and the
computer 10 for such things as text, file transfers, binary data and any other
type of information presently being sent through modems. All packet
transfers begin with a synch character O1 hex (synchronization byte). The
Data Packet begins with an ID byte which specifies the packet type and
25 packet length. Table 3 describes the Data Packet byte structure and Table 4
describes the bit strut of the )D byte of the Data Packet. Table 5 is an
example of a Data Packet with a byte length of 6. The value of the LI field
is the actual length of the data field to follow, not counting the ID byte.
30
TABLE 3: Data P~dcet Byte Strucdue
byte 1 - O I h (sync byte)
35 byte 2 - 1D/LI (ID byte/length indicator)
bytes 3-127 - data (depending on LI)
O1 m ; '' p ; __ _
i.
40 SYNC ' IS data I~ data : data ~ data ~,~ data ,
CA 02315745 2000-07-20
TABLE 4: m Byte of Data Packet
5 Bit 7 identifies the type of packet
Bits 6 - 0 contain the LI or length indicator
portion of the ID byte
7 6 5 4 3 2 1 0
10 ---
i
'~ 0 LI (Length Indicator) = 1 to 127
20 TABLE 5: Dad Packet Example
L,I (lalgth indicator) = 6
0l 06 Ii li i: ',
SYNC , ID data L' data i, data ' data ' data data j
The Voice Packet is used to transfer compressed VOICE
messages between the controller 313 of hardware component 20 and the
computer 10. The Voice Packet is similar to the Data Packet except for its
length which is, in the prefen~ed embodiment, currently fixed at 23 bytes of
data. Once again, all packets begin with a synchronization character chosen
in the prefen~ed embodiment to be Ol hex (OlI-~. The ID byte of the Voice
Packet is completely a zero byte: all bits are set to zero. Table 6 shows the
m byte of the Voice Packet and Table 7 shows the Voice Packet byte
structure.
TABLE 6: m Byte of Voice Paclaet
7 6 5 4 3 2 1 0
, -
i 0 I LI (Length Indicator) = 0
CA 02315745 2000-07-20
31
TABLE 7: Voice Packet Byte Stnicdne
LI (length indicator) = 0
23 bytes of data
O1 i 00 ',
' SYNC '. ID data ~ data ~ data data data
-_ _ _. L
The Qualified Packet is used to transfer commands and other
non-data/voice related infom~ation between the controller 313 of hardware
component 20 and the computer 10. The various species or types of the
Qualified Packets are described below and are listed above in Table 2. Once
again, all packets start with a synchronization character chosen in the
preferred embodiment to be OI hex (OlI-~. A Qualified Packet starts with two
bytes where the first byte is the ID byte and the second byte is the
QUAL>FTP~t type identifier. Table 8 shows the ID byte for the Qualified
Packet, Table 9 shows the byte structure of the Qualified Packet and Tables
10-12 list the Qualifier Type byte bit maps for the three types of Qualified
Packets.
TABLE 8: )(D Byte of Qualified Packet
7 6 5 4 3 2 1 0
I I
i 1 j LI ~L~gth Indicator) = 1 to 127
The Length Identifier of the ID byte equals the amount of data
which follows including the QUAhIFIER byte (QUAL byte + DATA). If LI
= 1, then the Qualifier Packet contains the Q byte only.
CA 02315745 2000-07-20
32
TABIE 9: Qual~er Pgcket Byte Stnrcdue
of '' s5 !~ Stmt,
SYNC ~ ID i': BYTE '' data ; data data ' data I:
_ _
The bit maps of the Qualifier Byte (QUAL BYTE) of the
Qualified Packet are shown in Tables 10-12. The bit map follows the pattern
_ whereby if the QUAL byte = 0, then the command is a break. Also, bit 1 of
the QUAL byte designates ack/nak, bit 2 designates flow control and bit 6
designates stream mode command. Table 10 describes the Qualifier Byte of
Qualified Packet,.Group 1 which are immediate commands. Table 11
describes the Qualifier Byte of Qualified Packet, Group 2 which are stream
mode commands in that the command is to stay in the designated mode until
a BREAK + INIT comrr~and string is sent. Table 12 describes the Qualifier
Byte of Qualified Packet, ~.~oup 3 which are infon~naiion or status commands.
TABLE 10: Qualifier Byte of Qualified Picket: Group 1
7 6 5 4 3 2 1 0
x x x x x x x x
0 0 0 0 0 0 0 0 = break
0 0 0 0 0 0 1 0 = ACK
0 0 0 0 0 0 1 1 =NAK
0 0 0 0 0 1 0 0 = xoff or stop sending data
0 0 0 0 0 1 0 1 = xon or res~une sending data
0 0 0 0 1 0 0 0 = cancel fax
CA 02315745 2000-07-20
33
5
TABLE 11: Qualifier Byte of Qualified Packet: (soap 2
7 6 5 4 3 2 1 0
x x x x x x x x
0 1 0 0 0 0 0 1 = stream command mode
10 0 1 0 00 0 = stream data
0 1
0 1 0 00 1 = stream voice
0 1
0 1 0 01 0 = stream video
0 0
0 1 0 01 1 = stream A
0 0
0 1 0 01 0 = stream B
0 1
15 0 1 0 01 1 = stream C
0 1
The Qualifier Packet indicating stream mode and BREAK
20 attention is used when a large of amount of infom~ation is sent (voice,
data...)
to allow the highest throughput possible. This command is mainly intended
for use in DATA made but can be used in any one of the possible modes. To
change from one mode to another, a break-init s~ce would be given. A
break "AT...<cr>" type command would cause a change in state and set the
25 serial rate from the "AT' command.
TABLE 12: Qualifier Byte of Qualified Packet: (soup 3
30
7 6 54 32 1 0
x x xx xx x x
1 0 00 00 0 0 = corntnmlds
35 1 0 00 00 0 1 = responses
1 0 00 00 1 0 = status
40 ('.eilttlar
~nr~rvicnnr
Park
In order to determine the status of the cellular link, a
supervisory packet shown in Table 13 is used Both sides of the cellular link
will send the cellular supervisory packet every 3 seconds. Upon receiving the
cellular supervisory packet, the receiving side will acknowledge it using the
45 ACK field of the cellular supervisory packet. If the sender does not
receive
CA 02315745 2000-07-20
34
an aclmowledgement within one second, it will repeat sending the cellular
supervisory packet up to 12 times. After 12 attempts of sending the cellular
supervisory packet without an aclmowledgement, the sender will disconnect
the line. Upon receiving an acknowledgement, the sender will restart its 3
second timer. Those skilled in the art will readily recognize that the timer
values and wait times selected here may be varied without departing from the
spirit or scope of the present invention.
TABIE 13: Cellular Supervisory Packet Byte Strucdae
SF ID ~, LI ~ - I- Vita data _ - , data
The Speech Compression algorithm described above for use in
transmitting voice over data accomplished via the voice control circuit 306.
Referring once again to Figure 3, the user is talking either through the
handset, the headset or the microphonelspeaker telephone interface. The
analog voice signals are received and digitized by the telephone CODEC
circuit 305. The digitized voice information is passed from the digital
telephone CODEC circuit 305 to the voice control circuits 306. The digital
signal processor (DSP) of the voice control circuit 306 is programmed to do
the voice compression algorithm. The DSP of the voice control circuit 306
compresses the speech and places the cod digital representations of
the speech into special packets described more fully below. As a result of the
voice compression algorithm, the compressed voice information is passed to
the dual port ram circuit 308 for either forwarding and storage on the disk of
the personal computer via the RS232 serial interface or for multiplexing with
conventional modem data to be transmitted over the telephone line via the
telephone line interface circuit 309 in the voice-over-data mode of operation
Show and Tell function 123.
CA 02315745 2000-07-20
35
l~ritt~m
To multiplex high-fidelity speech with digital data and transmit
both ova the over the telephone line, a high available bandwidth would
normally be required. In the present invention, the analog voice infom~ation
5 is digitized into 8-bit PCM data at an 8 kHz sampling rate producing a
serial
bit stream of 64,000 bps serial data rate. This rate cannot be transmitted
over
the telephone line. With the Speech Compression algorithm described below,
the 64 kbs digital voice data is compressed into a 9500 bps encoding bit
stream using a fixed-point (non-floating point) DSP such that the compressed
10 speech can be transmitted over the telephone line multiplexed with
asynchronous data. This is accomplished in an efficient manner such that
enough machine cycles remain during real time speech compression to allow
to allow for echo cancellation in the same fixed-point DSP.
A silence detection function is used to detect quiet intervals in
15 the speech signal which allows the data processor to substitute
asynchronous
data in lieu of voice data packets over the telephone line to efficiently time
multiplex the voice and asynchronous data transmission. The allocation of
time for asynchronous data transmission is constantly changing depending on
how much silence is on the voice channel.
20 The voice compression algorithm of the present system relies
on a model of human speech which shows that human speech contains
rediuidancy inherent in the voice patterns. Only the incremental innovations
(changes) need to be transmitted The algorithm operates on 128 digitized
speech samples (20 milliseconds at 6400 Hz), divides the speech samples into
25 time segments of 32 samples (5 milliseconds) each, and uses predicted
coding
on each segment. Thus, the input to the algorithm could be either PCM data
sampled at 6400 Hz or 8000 Hz If the sampling is at 8000 H~ or any other
selected sampling rate, the input sample data stream must be decimated fiom
8000 Hz to 6400 Hz before procxssing the speech data. At the output, the
30 6400 Hz PCM signal is interpolated back to 8000 Hz and passed to the
CODEC.
With this algorithm, the cturent segment is predicted as best as
CA 02315745 2000-07-20
36
possible based on the past recreated segmertu and a difference signal is
determined The difference values are compared to the stored difference
values in a lookup table or code book, and the address of the closest value is
sent to the remote site along with the predicted gain and pitch values for
each
5 segment. In this fashion, the entire 20 milliseconds of speech can be
represented by 190 biu, thus achieving an effective data rate of 9500 bps.
To produce this compression, the present system includes a
unique Vector Quarttization (VQ) speech compression algorithm designed to
provide maximum fidelity with minimum compute power and bandwidth. The
10 VQ algorithm has two major componenu. The first section reduces the
dynamic range of the input speech signal by removing short term and long
term redundancies. This reduction is done in the waveform domain, with the
synthesized part used as the reference for determining the incremental "new"
content. The second section maps the residual signal into a code book
15 optimized for preserving the general spectral shape of the speech signal.
Figure 11 is a high level signal flow block diagram of the
speech compression algorithm used in the present system to compress the
digitized voice for transmission over the telephone line in the voice over
data
mode of operation or for storage and use on the personal computer. The
20 transmitter and receiver componenu are implemented using the programmable
voice control DSP/CODEC circuit 306 shown in Figtae 3.
The DC removal stage I 101 t~oceives the digitized speech signal
and removes the D.C. bias by calculating the long-term average and
subtracting it from each sample. This ensut~es that the digital samples of the
25 speech are centered about a zero mean value. The pre-emphasis stage 1103
whitens the spectral contest of the speech signal by balancing the extra
energy
in the low band with the reduced energy in the high band.
The system finds the innovation in the current speech segment
by subtracting 1109 the prediction from reconstructed past samples
30 synthesized from synthesis stage 1107. This process requires the synthesis
of
the past speech samples locally (analysis by synthesis). The synthesis block
1107 at the transmitter performs the same function as the synthesis block
CA 02315745 2000-07-20
37
1113 at the receiver. When the reconstructed previous segm~t of speech is
sr.ibttacxed from the present segment (before prediction), a difference term
is
produced in the form of an error signal. This residual error is used to find
the
best match in the code book 1105. The code book 1105 quantizes the error
5 signal using a code book generated from a representative set of speakers and
environments. A minimum mean squared error match is determined in
segments. In addition, the code book is designed to provide a quantization
error with spearal rolloff (higher quantization error for low fiuquerrcies and
lower quantization error for higher fimquencies). Thus, the quantization noise
10 spectrum in the reconstructed signal will always tend to be smaller than
the
underlying speech signal.
The channel corresponds to the telephone line in which the
compressed speech bits are multiplexed with data bits using a packet format
described below. The voice bits are sent in packets of 5 frames each, each
15 frame corresponding to 20ms of speech in 128 samples. The size of the
packets depends upon the ype of compression used Three compression
algorithms are described which will be called 8K, 9.6K and 16K The 8K and
9.6K algorithms results in a 24 byte packet while the 16K algorithm produces
a packet of 48 bytes for each 20 ms speech segment.
20 Each flame of 20ms is divided into 4 sub-blocks or segments of
Sms each. In each sub-block of the data consists of a plurality of bits for
the
long term predictor, a plurality of bits for the long term predictor gain, a
plurality of bits for the sub-block gain, and a plurality of bits for each
code
book entry for each Sms. The bits for the code book entries consists of four
25 or five table entries in a 256 long code book of 1.25 ms duration. In the
code
book block, each 1.25ms of speech is looked up in a 256 word code book for
the best match. The table entry is transmitted rather than the actual samples.
The code book entries are pre-computed from representative speech segments,
as described more fully below.
30 On the receiving end 1200, the synthesis block 1113 at the
receiver performs the same fwrction as the synthesis block 1107 at the
transmitter. The synthesis block 1113 reconstructs the original signal from
the
CA 02315745 2000-07-20
38
voice data packets by using the gain and pitch values and code book address
corresponding to the error signal most closely matched in the code book The
code book at the receiver is similar to the code book 1105 in the transmitter.
Thus the synthesis block recreates the original pre-ernphasizad signal. The
5 de-emphasis stage 1115 inverts the pre~errrphasis operation by restoring the
balance of original speech signal.
The complete speech compression algorithm is summarized as
follows:
a) Digitally sample the voice to produce a PCM sample bit
10 stream sampled at 16,000 samples per second, 9600 samples
per second or 8,000 samples per second
b) Decimate the sampled data to produce a common
sampling rate of 8,000 samples per second from all of the
15 actual sample rates.
c) Remove any D.C. bias in the speech signal.
d) Pre-emphasize the signal.
20
e) Find the innovation in the current speech segment by
subtracting the prediction from reconstructed past samples.
This step requires the synthesis of the past speech samples
locally (analysis by synthesis) such that the residual error is fed
25 back into the system.
f) Quantize the error signal using a code book generated
from a representative set of speakers and environments. A
minimum mean squared error match is determined in Sms
30 segments. In addition, the code book is designed to provide a
quantization error with spectral rollo$' (higher quantization
error for low frequencies and lower quantization error for
higher fi~equencies). Thus, the quantization noise specwm in
the reconst<ucted signal will always tend to be smaller than the
35 underlying speech signal.
g) At the transmitter and the receiver, reconstruct the
speech from the quantized error signal fed into the inverse of
the fimdion in step (e) above. Use this signal for analysis by
40 synthesis and for the output to the reconstruction stage below.
h) Use a de-emphasis filter to reconstruct the output.
CA 02315745 2000-07-20
39
The major advantages of this approach over other low-bit-rate
algorithms are that there is no need for any complicated calculation of
reflection coefficients (no matrix inverse or lattice filter computations).
Also,
the quantization noise in the output speech is hidden ands the speech signal
5 and there are no pitch tracking artifacts: the speech sounds "natural", with
only minor increases of background hiss at lower bit-rates. The computational
load is reduced significantly cored to a VSELP algorithm and variations
of the present algorithm thus provides bit rates of 8, 9.6 and 16 Kbids, and
can also provide bit rates of 9.2kbits/s, 9.Skbits/s and many other rates. The
10 total delay through the analysis section is less than 20 milliseconds in
the
preferred embodiment. The present algorithm is accomplished completely in
the waveform domain and there is no spectral information being computed
and there is no filter computations needed.
15 The speech compression algorithm is described in greater detail
with reference to Figures 12 through 15, and with reference to the block
diagram of the hardware components of the present system shown at Figure 3.
The voice compression algorithm operates within the programmed control of
the voice control DSP circuit 306. In operation, the speech or analog voice
20 signal is received through the telephone interface 301, 302 or 303 and is
digitized by the digital telephone CODEC circuit 305. The CODEC for
circuit 305 is a companding p-law CODEC. The analog voice signal finm the
telephone interface is band-limited to about 3,000 Hz and sampled at a
selected sampling rate by digital telephone CODEC 305. The sample rates in
25 the preferred embodiment of the present invention are 8kbJs, 9.6kbJs and
l6kb/s. Each sample is encoded into 8-bit PCM data producing a serial
64kb/s, 76.8kb/s or 128kb/s signal, respectively. The digitized samples are
passed to the voice control DSP/CODEC of circuit 306. There, the 8-bit p-
law PCM data is converted to 13-bit linear PCM data. The 13-bit
30 representation is necessary to accurately represent the linear version of
the
logarithmic 8-bit p-law PCM data. With linear PCM data, simpler
mathematics may be performed on the PCM data.
CA 02315745 2000-07-20
40
The voice control DSP/CODEC of circuit 306 correspond to the
single integrated circuit U8 shown in Figures 9A and 9B as a WEB DSP16C
Digital Signal Prooessot/CODEC from AT&T lVficroelect<onics which is a
combined digital signal processor and a linear CODEC in a single chip as
5 described above. The digital telephone CODEC of circuit 305 corresponds to
integrated circuit U12 shown in Figure 9(b) as a T7540 companding P-law
CODEC.
The sampled and digitized PCM voice signals from the
telephone p-law CODEC 305 shown in Figure 3 are passed to the voice
10 control DSP/CODEC circuit 308 via direct data lines clocked and
synchronized to a clocking &~equency. The sample rates in CODEC 305 in the
preferred embodiment of the present invention are 8kb/s, 9.6kb/s and l6kb/s.
The digital samples are loaded into the voice control DSP/CODEC one at a
time through the serial input and stored into an internal queue held in RAM,
15 converted to linear PCM data and decimated to a sample rate of 6.4bb/s. As
the samples are loaded into the end of the queue in the RAM of the voice
control DSP, the samples at the head of the queue are operated upon by the
voice compression algorithm The voice compression algorithm then produces
a greatly compressed representation of the speech signals in a digital packet
20 form. The corripressed speech signal packets are then passed to the dual
port
RAM circuit 308 shown in Figure 3 for use by the main controller circuit 313
for either transferring in the voice-over-data mode of operation or for
transfer
to the personal computer for storage as corrrpressed voice for functions such
as telephone answering machine message data, for use in the mufti-media
25 documents and the like.
In the voice-over-data mode of operation, voice control
DSP/CODEC circuit 306 of Figtue 3 will be receiving digital voice PCM data
from the digital telephone CODEC circuit 305, compressing it and transferring
it to dual port RAM circuit 308 for multiplexing and transfer over the
30 telephone line. This is the transmit mode of operation of the voice control
DSP/CODEC circuit 306 corresponding to transmitter block 1100 of Figure 11
and corresponding to the compression algorithm of Figure 12.
CA 02315745 2000-07-20
41
Concrnretit with this transmit operation, the voice control
DSP/CODEC circuit 306 is receiving cod voice data packets from
dual port RAM circuit 308, uncompressing the voice data and transferring the
uncornptessed and reconstructed digital PCM voice data to the digital
5 telephone CODEC 305 for digital to analog conversion and eventual transfer
to the user through the telephone interface 301, 302, 304. This is the receive
mode of operation of the voice control DSP/CODEC circuit 306
corresponding to t~aceiv~ block 1200 of Figure 11 and corresponding to the
decompression algorithm of Figure 13. Thus, the voice-control DSP/CODEC
10 circuit 306 is processing the voice data in both directions in a full-
duplex
fashion.
The voice control DSP/CODEC circuit 306 operates at a clock
frequency of approximately 24.576MHz while processing data at sampling
rates of approximately BKHz in both directions. The voice
15 compression/decompression algorithms and packetiration of the voice data is
accomplished in a quick and efficient fashion to ensure that all procxssing is
done in real-time without loss of voice infornration. This is accomplished in
an efficient manner such that arough machine cycles remain in the voice
control DSP circuit 306 druing real time speech compression to allow real
20 time acoustic and line echo cancellation in the same fixed-point DSP.
In pcogcatrnried operation, the availability of an eight-bit sample
of PCM voice data from the lt-law digital telephone CODEC circuit 305
causes an intemtpt in the voice control DSP/CODEC circuit 306 where the
sample is loaded into intecrrat registers for processing. Once loaded into an
25 internal register it is transferred to a RAM address which holds a queue of
samples. The queued PCM digital voice samples are converted from 8-bit lt-
law data to a 13-bit linear data fornrat using table lookup for the
conversion.
Those skilled in the art will readily recognize that the digital telephone
CODEC circuit 305 could also be a linear CODEC.
30 ~p~?~jlT~j~
The sampled and digitized PCM voice signals from the
telephone lt-law CODEC 305 shown in Figure 3 are passed to the voice
CA 02315745 2000-07-20
42
control DSP/CODEC circuit 308 via direct data lines clocked and
synctunnized to a clocking frequency. The sample rates in the preferred
embodiment of the present invaltion are 8kb/s, 9.6kb/s and l6kb/s. The
digital samples for the 9.6K and 8K algorithms are decimated using a digital
5 decimation process to produces a 6.4K and 6K sample rate, respectively. At
the 16K sampling rate for the 16K algorithm, no decimation is needed for the
voice compression algorithm
Referring to Figure 11, the decimated digital samples are shown
as speech entering the transmitter block 1100. The transmitter block, of
10 course, is the mode of operation of the voice-control DSP/CODEC circuit 306
operating to receive local digitized voice infomlation, compress it and
packetize it for transfer to the main controller circuit 313 for transmission
on
the telephone line. The telephone line connected to telephone line interface
309 of Figure 3 cArresponds to the channel 1111 of Figure 11.
15 A frame rate for the voice compression algorithm is 20
milliseconds of speech for each compression. 'Ibis correlates to 128 samples
to process per frame for the 6.4K decimated sampling rate. When 128
samples are accumulated in the queue of the internal DSP RAM, the
compression of that sample frame is begun.
20
The voice-control DSP/CODEC circuit 306 is programmed to
first remove the DC component 1101 of the incoming speech. The DC
removal is an adaptive function to establish a center base line on the voice
signal by digitally adjusting the values of the PCM data. This corresponds to
25 the DC removal stage 1203 of the software flow chart of Figure 12. The
formula for removal of the DC bias or drift is as follows:
32735
a(n) = s(n) - s(n-1) + oc * x (n-1) where a =
30 32768
and where n = sample number,
s(n) is the current sample, and
x(n) is the sample with the DC bias removed
35
CA 02315745 2000-07-20
43
The removal of the DC is for the 20 millisecond frame of voice
which amounts to 128 samples at the 6.4K decimated sampling rate which
corresponds to the 9.6K ALGORITHM The selection of a is based on
empirical observation to provide the best result.
S Referring again to Figure 12, the voice compc~ession algorithm
in a control flow diagram is shown which will assist in the understanding of
the block diagram of Figure 11. Figure 14 is a simplified data flow
description of the flow chart of Figure 12 showing the sample rate decimator
1241 and the sample rate incrementor 1242. The analysis and compression
begin at block 1201 where the 13-bit linear PCM speech samples are
accumulated until 128 samples (for the 6.4K decimated sampling rate)
representing 20 milliseconds of voice or one frame of voice is passed to the
DC removal portion of code operating within the programmed voice control
DSP/CODEC circuit 306. The DC removal portion of the code described
above approximates the base line of the frame of voice by using an adaptive
DC removal technique.
A silence detection algorithm 1205 is also included in the
programmed code of the DSP/CODEC 306. The silence detection function is
a sunvnation of the square of each sample of the voice signal over the frame.
If the power of the voice frame falls below a preselected threshold, this
would
indicate a silent frame. The detection of a silence frame of speech is
important for later multiplexing of the V-data (voice data) and C-data
(asynchronous computer data) described below. Dining silent portions of the
speech, the main controller circuit 313 will transfer conventional digital
data
(C-data) over the telephone line in lieu of voice data (V-data). The formula
for computing the power is
128-1
PWR = ~ x (a) * x (n)
n=0
where n is the sample number, and
x (a) is the sample value
CA 02315745 2000-07-20
44
If the power PWR is lower than a preselected threshold, then
the present voice frame is flagged as containing silence. The 128-sample
silent frame is still processed by the voice compression algorithm; however,
5 the silent flame packets are discarded by the main controller circuit 313 so
that asynchronous digital data may be transferred in lieu of voice data The
rest of the voice compression is operated upon in segments where there are
four segments per frame amounting to 32 samples of data per segment. It is
only the DC removal and silence detection which is accomplished over an
10 entire 20 millisecond frame.
The pre-emphasis 1207 of the voice compression algorithm
shown in Figure 12 is the next step. The sub-blocks are first passed through a
pre-emphasis stage which whitens the spectral content of the speech signal by
balancing the extra energy in the low band with the reduced energy in the
15 high band. The pre-emphasis essentially flattens the signal by reducing the
dynamic range of the signal. By using pre-emphasis to flatted the dynamic
range of the signal, less of a sip~al range is required for compression making
the compression algorithm operate more efficiently. The formula for the pre-
emphasis is
20
x(n)=x(~-p*x(n-1) wherep=0.5
and where n is the sample munber,
x (r~ is tt>e saicgtle
25 Each segment thus amounts to five milliseconds of voice which
is equal to 32 samples. Pre-emphasis then is done on each segment. The
selection of p is based on empirical observation to provide the best result.
The next step is the long-term prediction (LTP). The long-term
prediction is a method to detect the innovation in the voice signal. Since the
30 voice signal contains many redundant voice segments, we can detect these
redundancies and only send infonriation about the changes in the signal from
one segment to the next. This is accomplished by comparing the speech
samples of the current segment on a sample by sample basis to the
CA 02315745 2000-07-20
reconst<ucted speech samples from the previous segments to obtain the
innovation inforntation and an indicator of the error in the prediction.
The long-term predictor gives the pitch and the LTP-Gain of
the sub-block which are encoded in the transmitted bit stream In order to
5 predict the pitch in the ctarent segment, we need at least 3 past sub-blocks
of
reconstructed speech. This gives a pitch value in the range of IvIIN_PITCH
(32) to MAX PITCH (95). This value is coded with Orbits. But, in order to
accotnrrmdate the cotr>pressed data rate within a 9600 bps link, the pitch for
segments 0 and 3 is encoded with 6 bits, while the pitch for segments 1 and 2
10 is encoded with 5 bits. When performing the prediction of the Pitch for
segments 1 and 2, the correlation lag is adjusted around the predicted pitch
value of the previous segment. This gives us a good chance of predicting the
correct pitch for the current segment even though the entire range for
prediction is not used The computations for the long-term correlation lag
15 PITCH and associated LTP gain factor ~i j (where j = 0, 1, 2, 3
corresponding
to each of the four segments of the frame) are done as follows:
For j = ruin pitch .... mao~ibch, first perform the following
computations between the current speech samples x(n) and the past
20 reconstructed speech samples xYr~
31
S=. (~) _ ~ x (i) * x' (i + MAX PITCH-, j)
30
31
5,~. ~) _ ~ x' (i + ~~~,qX PITCH j) * x' (i+tl~lqX PITCH; j)
r-o
The Pitch j is chosen as that which maximizes
S~
g~.
CA 02315745 2000-07-20
Since (3 j is positive, only j with positive S,~ is considered
Since the Pifch is encoded with different number of bits for
each sub-segment, the value of min~itch and m~~itch (range of the
synthesized speech for pitch prediction of the current segment) is computed as
follows:
if (seg-number = 0 or 3)
{
min~itch = IvBN PITCH
max_pitch = MAX PITCH
if (seg_number = 1 or 2)
{
min~itch = prev~itch - 15
if (prev~itch < NNIINN PITCH + 15)
min~itch = MIN PITCH
if (prev~itch > MAX PITCH + 15)
min~itch = MAX PITCH - 30
max~itch = min~itch + 30
The piev_pibch parameter in the above equation, is the of the
pitch of the previous sub-segment. The pitch j is the encoded in 6 bits or 5
bits as:
encoded bits = j - min pitch
The LTP-Gain is given by
CA 02315745 2000-07-20
47
sa- G7
(3 = for Sx,~~)~0
S=x~ G)
The vale of the ~i is a normalized quantity between zero and
unity for this segment where (3 is an indicator of the correlation between the
segments. For example, a perfect sine wave would produce a ~i which would
be close to unity since the correlation between the current segments and the
previous reconstructed segments should be almost a perfect match so (3 is one.
The LTP gain factor is quantized from a LTP Gain Encode Table. This table
is characterized in Table 14. The resulting index (bcode) is transmitted to
the
far end. At the receiver, the LTP Gain Factor is retrieved from Table 15, as
follows:
~iq = dlb tc>b[bcode]
TABLE 14: LTP Ga~ia F.hcode Table
0.1 0.3 0.5 0.7 0.9
bcode= 0 1 2 3 4 5
TABLS 15: LTP C3ain Decode Table
(i= 0.0 0.2 0.4 0.5 0.8 1.0
>
lxode=0 1 . 2 3 4 5
After the Long-Term Prediction, we pass the signal through a
pitch filter to whiten the signal so that all the pitch effects are removed
The
pitch filter is given by:
a (n) = x (n) - ~ ' x' (n-~~
where j is the Lag; and
(3q is the associated Gain.
Next, the error signal is normalized with respect to the
maximum amplitude in the sub-segment for vector-quantization of the error
CA 02315745 2000-07-20
48
signal. The maximum amplitude in the segment is obtained as follows:
G=MAX(Ie(n)~}
The maximum amplitude (G'~ is encoded using the Gain Encode
Table. This table is characterized in Table 16. The encoded amplitude
(gcode) is transmitted to the far end At the recxiver, the maximum amplitude
is rehieved from Table 17, as follows:
Gq = dlg tc~~gcodeJ
The error signal e(n) is then normalized by
r
e(n)
e(n) _
Gq
TABLE 16: Gain F~ode Table
G=16 32 64 128 256 512 1024 2048 4096 8192
->
0 1 2 3 4 5 6 7 8 9
(gcode)
TABLE 17: Gain Decode Table
G=16 32 64 128 256 512 1024 2048 4096 8192
0 1 2 3 4 5 6 7 8 9
(gcode)
From the Gain and LTP Gain Encode tables, we can see that
we would require 4 bits far gcode and 3 bits for bcode. This results in total
of 7 bits for both parameters. In order to reduce the bandwidth of the
corr~pressed bit stream, the gcode and bcode parameters are encoded together
in 6 bits, as follows:
CA 02315745 2000-07-20
49
BGCODE = 6 * gcode + bcod,e
The encoded bits for the G and LTP-Gain (~ at the receiver
can be obtained as follows:
5 gcode = BGCODE / 6
bcode = BGCODE - 6 * gcode
Each segrnetrt of 32 samples is divided into 4 vectors of 8
samples each. Each vector is compared to the vectors stored in the CodeBook
and the Index of the Code Vector that is closest to the signal vector is
10 selected. The CodeBook consists of 512 entries (S 12 addresses). The index
chosen has the least difference according to the following minimalization
formula:
~ ~~ (x ~ - Y;~
;
is
where x; = the input vector of 8 samples, and
y; = the code book vector of 8 samples
The minimization computation, to find the best match between
20 the subsegment and the code book entries is computationally intensive. A
brute force corr~parison may exceed the available machine cycles if real time
processing is to be accomplished. Thus, some shorthand processing
approaches are taken to reduce the computations required to find the best fit.
The above formula can be computed in a shorthand fashion as follows.
25 By expanding out the above formula, some of the unnecessary
temps may be removed and some fixed terms may be pre-computed:
(~-Y~~_(~-Y.)*(~-Y.)
- (~z - x;Y~ - xJ'~ + Y z)
=(~z_~''+Yz)
30 where x ? is a constant so it may be dropped from the formula,
and the value of -'/~ ~y? may be precomputed and stored as the 9th value in
the code book so that the only real-time computation involved is the following
CA 02315745 2000-07-20
formula:
5 Min {~ (x; Y; )~
Thus, for a segm~t of 32 samples, we will transmit 4
CodeBook Indexes (9 bits each) corresponding to 4 subsegments of 8 samples
10 each. This means, for each segment, we have 36 bits to transmit.
After the appropriate index into the code book is chosen, the
input speech samples are replaced by the con~sponding vectors in the chosen
indexes. These values are then multiplied by the Gq to denom~alize the
synthesized error signal, e'(n). This signal is then passed through the
Inverse
15 Pitch Filter to reintroduce the Pitch effects that was taken out by the
Pitch
filter. ~ The Inverse Pitch Filter is performed as follows:
Y~n~ = eYnJ + ~a * x~ ~n 'J~
20 where ~3 q is the decoded LTP-Gain from Table 16, and j is the Lag.
The Inverse Pitch Filter output is used to update the synthesized
speech buffer which is used for the analysis of the next sub-segment. The
update of the state buffer is as follows:
25 x' (k) =x' (k +~V pl'1'CI~
where k = 0, ... , (MAX PITCH - MIN PITCH) - 1
x'~~ =Y~n~
where 1 = MAX PITCH - MIN PITCH, ..., MAX PITCH - 1
The signal is then passed through the deemphasis filter since
preemphasis was performed at the beginning of the processing. In the
CA 02315745 2000-07-20
51
analysis, only the preerrrphasis state is updated so that we properly satisfy
the
Analysis-by-Synthesis method of performing the compression. In the
Synthesis, the output of the deemphasis filter, s' (n), is passed on to the
D/A
to generate analog speech. The deernphasis filter is implemented as follows:
s'(n) =Y (n) + P * s' (n -1) where p = 0.5
The voice is reconstnicted at the receiving end of the voice-
over data link according to the reverse of the compression algorithm as shown
as the decompression algorithm in Figure 13.
If a silence frame is received, the decompression algorithm
simply discards the received flame and initialize the output with zeros. If a
speech frame is received, the pitch, LTP-Gain and GAIN are decoded as
explained above. The error signal is reconsrtucted from the codebook
indexes, which is then denormalized with respect to the GAIN value. This
signal is the passed through the Inverse filter to generate the neconstrucxed
signal. The Pitch and the LTP-Gain are the decoded values, same as those
used in the Analysis. The filtered signal is passed through the Daerrrphasis
filter whose output is passed on to the D/A to put out analog speech.
The cod frame contains 23 8-bit words and one Orbit
word. Thus a total of 24 words. Total number of bits transferred is 190,
which corresponds to 9500 bps as shown in Table 18.
CA 02315745 2000-07-20
52
7 6 S 4 3 2 1 0 Bit Niunber
S S ~s ~4 ~3-. ~z ~i ~ Comp Frame[0]
Vz8 VIg Vo8 P14 P13 Ptz PII PI Comp Frame[I]
Vsg V4a V38 Pz4 Pz3 Pzz Pzl pi Comp Ftame[2]
10 V7g V68 pas p34 p33 p;z p31 p3 Comp Frame[3]
V98 Vg$ B~5 ~4 BG3 ~2 TZl:1B(j Comp_Frame[4]
~' ~' ''
''0 ''0 ~'
0
W W ~1' W ~ W Comp_Frame[5]
s 4 z I
I
V138Vlze BGzsB('h4BCrz3BGzzBGzI BG2 Comp Frame[6]
VI48 ~35 ~34 ~33 ~32 ~31 ~3 ~~ F[~
15 VQ' VQ VQs VQ VQ' VQz VQI VQ Comp Frame[g]
6 LS 8 bits
VQ[O]
VQI7VQI6 VQISVQI4VQ13 VQI2VQII VQl CormFrame[9]
-
LS 8 bits
VQ[ I ]
VQ14VQI4 VQ14VQ14VQI4 VQi4VQ14 VQI4~~ F~le[22]
6 5 4 3 Z 1 ~ g bltS
VQ[ 14]
20 VQISVQu VQISVQISVQIS VQISVQIS VQIS~mP_F~[23]
7 6 s 4 3 z I ~ g bits
VQ[ I S]
where BG = Befa/Gain, P = Pitch, VQ = CodeBook Index and S = Spare
Bits
CA 02315745 2000-07-20
53
Table 19 describes the format of the code book for the 9.6K algorithm
The code book values in the appendices are stored in a signed floating point
format which is converted to a Q22 value fixed point digital format why
5 stored in the lookup tables of the present invention. There are 256 entries
in
each code book corresponding to 256 different speech segments which can be
used to encode and reconstruct the speech
10
Code Book Entries - '/z Sum2 Constant-
8 entries 1 entry
15
For the 9.6K algorithm, the code book comprises a table of
nine columns and 256 rows of floating point data. The first 8 rows
20 correspond to the 8 samples of speech and the ninth entry is the
precomputed
constant described above as -'/z E y Z. An example of the code book data is
shown in Table 20.
25
i ao~ e r~ ~~pm ~e
lu: Book for the
Ln 9 6K Al
i m
0.786438 1.1328751.2083751206750gor 3.93769
1.114250
0.937688
0.772062
0.583250
0.609667 1.0191670.9091670.9577500.999833 1.005667 3.36278
0.854333 0.911250
0.614750 1.1507501.4777501.5487501.434750 1.349750 6.95291
1.304250 1.428250
30 0.657000 1.2799091.2047271.335636 1.162000 5.24933
1.132909 1.280818 0.958818
0.592429 0.8975711.1017141.3372861.323571 1.304857 5.6239
1.349000 1.347143
0.325909 0.7741821.0357271.2636361.456455 1.076273 4.628
1.356273 0.872818
35 The code books are converted into Q22 format and stored in
PROM memory accessible by the Voice DSP as a lookup table. The table
data is loaded into local DSP memory upon the selection of the appropriate
algorithm to increase access speed. The code books comprise a table of data
CA 02315745 2000-07-20
54
in which each entry is a sequential address from 000 to 511. For the 9.6K
algorithm, a 9 X 512 code book is used For the 16K algorithm, a 9 X 512
code book is used and for the 8K algorithm, a 9 X 512 code book is used
Depending upon which voice compression quality and compression rate is
selected, the corresponding code book is used to encode/decode the speech
samples.
C~neration of th_e Code Books
The code books are generated statistically by encoding a wide
variety of speech patterns. The code books are generated in a learning mode
for the above-described algorithm in which each speech segment which the
compression algorithm is first exposed to is placed in the code book until 512
entries are recorded. Then the algorithm is continually fed a variety of
speech
patterns upon which the code book is adjusted As new speech segments are
encountered, the code book is searched to find the best match. If the error
between the observed speech segment and the code book values exceed a
predetermined threshold, then the closest speech segment in the code book
and the new speech segment is averaged and the new average is placed in the
code book in place of the closest match. In this learning mode, the code book
is continually adjusted to have the lowest difference ratio between observed
speech segment values and code book values. The learning mode of operation
may take hours or days of exposure to different speech patterns to adjust the
code books to the best fit.
The code books may be exposed to a single person's speech
which will result in a code book being tailored to that particular persons
method of speaking. For a mass market sale of this prvoduct, the speech
patterns of a wide variety of speakers of both genders are exposed to the code
book learning algorithm for the average fit for a given language. For other
languages, it is best to expose the algorithm to speech patterns of only one
language such as English or Japanese.
Voice Over Data Packet Protocol
As described above, the present system can transmit voice data
and conventional data concurrartly by using time multiplex technology. The
CA 02315745 2000-07-20
55
digitized voice data, called V-data caries the speech information. The
conventional data is referred to as C-data. The V-data and C-data multiplex
transmission is achieved in two modes at two levels: the transmit and receive
rrrodes and data service level and multiplex control level. This operation is
5 shown di~cally in Figure 15.
In transmit mode, the main controller circuit 313 of Figure 3
operates in the data service level 1 SOS to collect and buffer data from both
the
personal computer 10 (through the RS232 port interface 315) and the voice
control DSP 306. In multiplex corrt<ol level 1515, the main controller circuit
10 313 multiplexes the data and transmits that data out over the phone line
1523.
In the receive mode, the main controller circuit 313 operates in the multiplex
control level 1515 to de-multiplex the V-data packets and the C-data packets
and then operates in the data service level 1505 to deliver the appropriate
data
packets to the correct destination: the personal computer 10 for the C-data
15 packets or the voice control DSP circuit 306 for V-data
In transmit mode, there are two data buffers, the V-data buffer
1511 and the C-data buffer 1513, implemented in the main controller RAM
316 and maintained by main controller 313. When the voice control DSP
20 circuit 306 engages voice operation, it will send a block of V-data every
20
ms to the main controller circuit 313 through dual port RAM circuit 308.
Fach V-data block has one sign byte as a header and 23 bytes of V-data
The sign byte header of the voice packet is transferred every
frame from the voice control DSP to the controller 313. The sign byte header
25 contains the sign byte which identifies the contents of the voice packet.
The
sign byte is defined as follows:
00 hex = the following V-data contains silent sound
Ol hex = the following V-data contains speech inforn~ation
If the main controller 313 is in uansmit mode for V-data/C-data
30 multiplexing, the main controller circuit 313 operates at the data service
level
to perform the following tests. When the voice control DSP circuit 306 starts
to send the 23-byte V-data packet through the dual port RAM to the main
CA 02315745 2000-07-20
56
corrtroDa circuit 313, the main controller will check the V-data buffer to see
if the buffer has room for 23 bytes. If these is su~cient room in the V-data
buffer, the main controller will check the sign byte in the header preceding
the V-data packet, If the sign byte is equal to one (indicating voice
information in the packet), the main controller circuit 313 will put the
following 23 bytes of V-data into the V-data buffer and clear the silence
counter to zero. Then the main controller 313 sets a flag to request that the
V-data be sent by the main controller at the multiplex control level.
If the sign byte is equal to zero (indicating silence in the V
data packet), the main controller circuit 313 will ina~ease the silence
counter
by 1 and check if the silence counter has reached 5. When the silence
counter reaches 5, the main controller circuit 313 will not put the following
23 bytes of V-data into the V-data buffer and will stop increasing the silence
counter. By this method, the main controller circuit 313 operating at the
service level will only provide non-silence V-data to the multiplex control
level, while discarding silence V-data packets and preventing the V-data
buffer from being ov~vvcitten.
The operation of the main controller circuit 313 in the
multiplex control level is to multiplex the V-data and C-data packets and
transmit them through the same channel. At this control level, both types of
data packets are transmitted by the HDLC protocol in which data is
transmitted in synchronous node and checked by CRC error checking. If a
V-data packet is received at the remote end with a bad CRC, it is discarded
since 100% acc~uacy of the voice channel is not ensw~d. If the V-data
packets were re-sent in the event of com~ption, the real-time quality of the
voice transmission would be lost. In addition, the C-data is transmitted
following a modem data communication protocol such as CCITT V.42.
In order to identify the V-data block to assist the main
controller circuit 313 to multiplex the packets for transmission at his level,
and to assist the remote site in recognizing and de-multiplexing the data
packets, a V-data block is defined which includes a maximum of five V-data
packets. 'Ihe V-data block size and the maximum number of blocks are
CA 02315745 2000-07-20
57
defined as follows:
The V-data block header = 80h;
The V-data block size = 23;
The maximum V-data block size = 5;
5 The V-data block has higher priority to be transmitted than C-
data to the integrity of the real-time voice transmission. Therefore, the
main co~oller circuit 313 will check the V-data buffer first to determine
whether it will transmit V-data or C-data blocks. If V-data buffer has V-data
of more than 69 bytes, a transmit block counter is set to 5 and the main
10 controller circuit 313 starts to transmit V-data from the V-data buffer
through
the. data pump circuit 311 onto the telephone line. Since the transmit block
counter indicates 5 blocks of V-data will be transmitted in a continuous
stream, the transmission will stop either at finish the 115 bytes of V-data or
if
the V-data buffer is empty. If V-data buffer has V-data with number more
15 than 23 bytes, the transmit block counter is set 1 and starts transmit V-
data.
This means that the main controller circuit will only transmit one block of V-
data If the V-data buffer has V-data with less than 23 bytes, the main
controller circuit services the transmission of C-data
During the transmission of a C-data block, the V-data buffer
20 condition is checked before transmitting the first C-data byte. If the V-
data
buffer contains more than one V-data packet, the c~ux~ent transmission of the
C-data block will be terminated in order to handle the V-data
B~iY~
On the receiving end of the telephone line, the main controller
25 circuit 313 operates at the multiplex control level to de-multiplex
received
data to V-data and C-data. The type of block can be identified by checking
the first byte of the incoming data blocks. Before receiving a block of V
data, the main cor~nller circuit 313 will initialize a receive V-data byte
counter, a backup pointer and a temporary V-data buffer pointer. The value
30 of the receiver V-data byte counts is 23, the value of the receive block
counter is 0 and the backup pointer is set to the same value as the V-data
receive buffer pointer. If the received byte is not equal to 80 hex (80h
CA 02315745 2000-07-20
58
indicating a V-data packet), the receive operation will follow the current
modem protocol since the data block must contain C-data. If the received
byte is equal to 80h, the main controller circuit 313 operating in receive
mode
will process the V~ara.
S For a V-data block received, when a byte of V-data is received,
the byte of V-data is put into the V-data receive buffer, the terr~pora~y
buffer
pointer is in~ased by 1 and the receive V-data counter is dec~sed by 1. If
the V-data counter is down to zero, the value of the temporary V-data buffer
pointer is copied into the backup pointer buffer. The value of the total V-
data
counter is added with 23 and the receive V-data counter is reset to 23. The
value of the receive block counter is increased by 1. A flag to request
service
of V-data is then set. If the receive block counter has reached 5, the main
controller circuit 313 will not put the incoming V-data into the V-data
receive
buffer but throw it away. If the total V-data counter has reached its
maximum value, the receiver will not put the incoming V-data into the V-data
receive buffer but throw it away.
At the end of the block which is indicated by receipt of the
CRC check bytes, the main controller circuit 313 operating in the multiplex
control level will not check the result of the CRC but instead will check the
value of the receive V-data counter. If the value is zero, the check is
finished, otherwise the value of the backup pointer is copied back into the
current V-data buffer pointer. By this method, the receiver is insured to de-
multiplex the V-data from the receiving channel 23 bytes at a time. The main
controller circuit 313 operating at the service level in the receive mode will
monitor the flag of request service of V-data. If the flag is set, the main
controller circuit 313 will get the V-data from the V-data buffer and transmit
it to the voice control DSP circuit 306 at a rate of 23 bytes at a time. After
sending a block of V-data, it decreases 23 from the value in the total V-data
counter.
Negotiation of Voice Compression Ra_rP
The modem hardware component 20 incorporates a modified
packet protocol for negotiation of the speech compression rate. A modified
CA 02315745 2000-07-20
59
supervisory packet is forn~atted using the same open flag, address, CRC, and
closing flag fonnatxing bytes which are found in the CCITT V.42 standard
data supervisory packet, as is well known in the industry and as is described
in the CCITT Blue Book, volume VIII entitled Data Comm~mication over,
5 T~l~ph~le Network 1989 referenced above. In the modified packet protocol
embodiment, the set of CCITT standard header bytes (control words) has been
extended to include nonstandard control words used to signal transmission of
a nonstandard communication command The use of a nonstandard corrrrol
word should cause no problems with other data communication terminals, f~
10 example, when communicating with a non-PCS modem system, since the
nonstandard packet will be ignored by a non-PCS system
Table 21 offers one embodiment of the present invention
showing a modified supervisory packet sttucriu~e. It should be noted that
Table 21 does not depict the CCITT standard formatting bytes: open flag
15 address, CRC, and closing flag, but such bytes are inherent to using the
CCITT standard. The modified supervisory packet is distinguished from a
V.42 standard packet by using a nonstandard control word, such as 80 hex, as
the header.
CA 02315745 2000-07-20
60
TA>3~~ 21: Modified
5 Supervisory Packet Structure
~; 80h~i ID ! LI ;'' ACK ~ data ~ data -_ - data ,
10
The modified supervisory packet is transmitted by the HI7LC
protocol in which data is transmitted in synchronous mode and checked by
CRC error checking. The use of a modified supervisory packet eliminates the
need for an escape cornrnand. sent over the telephone line to intearupt data
15 communications, providing an independent channel for negotiation of the
compression rate.. The channel may also be used as an alternative means for
prograrrzrning standard communications parameters.
The modified supervisory packet is encoded with different
function codes to provide an independent communications channel between
20 hardware components. 'Ibis provides a means for real time negotiation and
programming of the voice compression rate throughout the transmission of
voice data and conventional data without the need for conventional escape
routines. The modified supervisory packet is encoded with a function code
using several methods. For example, in one embodiment, the function code is
25 embedded in the packet as one of the data words and is located in a
predetermined position. In an alternate embodiment, the supervisory packet
header itself serves to indicate not only that the packet is a nonstandard
supervisory packet but also the compmssion rate to be used between the sites.
In such an embodiment, for example, a different nonreserved header is
30 assigned to each function code. These embodiments are not limiting and
other methods known to those skilled in the art may be employed to encode
the function code into the modified supervisory packet.
Referring once again to Figure 1, a system consisting of PCS
modem 20 and data terminal 10 are connected via phone line 30 to a second
35 PCS system comprised of PCS modem 20A and data terminal l0A
Therefore, calling modem 20 initializes communication with receiving modem
20A In one embodiment of the present invention, a speech compression
CA 02315745 2000-07-20
61
corrurrend is sent via a modified supervisory data packet as the request for
speech compression algorithm and ratio negotiation. Encoded in the speech
compression comrnand is the particular speech compression algorithm and the
speech compression ratio desired by the calling PCM modem 20. Several
methods for encoding the speech compression algorithm and compression
ratio exist. For example, in embodiments where the fimction is embedded in
the header byte, the first data byte of the modified supervisory packet could
be used to identify the speech compression algorithm using a binary coding
. scheme (e.g., OOh for Vector Quantization, Olh for CELP+, 02h for VCELP,
and 03h for TrueSpaech, etc.). A second data byte could be used to encode
the speech compression ratio (e.g., OOh for 9.5 ICHz, Olh for 16 KHz, 02h for
8KI-1~ etc.). This embodiment of the speech compression comrnand
supervisory packet is shown in Table 22.
TABLE 22:
Speech Compression Command Supervisory Packet
80h;,' ID LI AQC ~,Algthmn CRatio~ - .- data
Alternatively, as stated above, the fimction code could be stored
in a pc~edetem~ined position of one of the packet data bytes. It should be
apparent that other fimction code encoding methods could be used. Again,
these methods are given only for illustrative purposes and not limiting.
In either case, the receiving PCS modem 20A will recognize
the speech compression command and will respond with an acknowledge
packet using, for instance, a header byte such as hex 81. The acknowledge
packet will alert the calling modem 20 that the speech comp~sion algorithm
and speech compression ratio selected are available by use of the ACK field
of the supervisory packet shown in Table 22. Receipt of the acknowledge
supervisory packet will cause the calling modem 20 to transmit all voice over
data information according to the selected speech compression algorithm and
compression ratio.
The fiequency of which the speech compression command
CA 02315745 2000-07-20
62
supervisory packet is transrnitted will vary with the application. For
moderate
quality voice over data applications, the speech compression algorithm nerd
only be negotiated at the initialization of the phone call. For appliartions
requiring more fidelity, the speech compc~sion command supervisory packet
5 may be renegotiated during the call to accommodate new patties to the
communication which have different speech compression algorithm limitations
or to actively tune the speech compression ratio as the quality of the
communications link fluctuates.
Therefore, those skilled in the art will recognize that other
10 applications of the speech compression command supervisory packet may be
employed which allow for varying transmission rates of the speech
compression command supervisory packet and different and more elegant
methods of speech compression algorithm and compression ratio negotiation,
depending on the available hardware and particular application. Additionally,
15 a number of encoding m~hods can be used to encode the supervisory packet
speech compression algorithm and the speech compression ratio, and this
m~hod was demonstrated solely for illustrative purposes and is not limiting.
Of course a new supervisory packet may be allocated for use as
a means for negotiating multiplexing scheme for the various types of
20 information sent over the communications link. For example, if voice over
data mode is employed, there exist several methods for multiplexing the voice
and digital data The multiplexing scheme may be selecxed by using a
modified supervisory packet, called a multiplex supervisory packet, to
negotiate the selection of multiplexing scheme.
25 Similarly, another supervisory packet could be designated for
remote control of another hardware device. For example, to control the baud
rate or data forn>at of a remote modem, a remote control supervisory packet
could be encoded with the necessary selection parameters needed to program
the remote device.
30 Those skilled in the art will readily appreciate that there exist
numerous other unidirectional and bidinxaional communication and con~ol
applications in which the supervisory packet may be used The examples
CA 02315745 2000-07-20
63
given are not limiting, but are specific embodiments of the present invention
offered for illustrative purposes.
Ca_Iler ID Lnterfar$ LL~m
Figure 16 shows one embodiment of the present invention in
5 which a personal communications system (PCS) 1600 is the interface between
a standard telephone line service 1610 and a computer system 1620 using
telephone lines 1630. Caller 1D interface ("CID interface") 1650 provides
caller lD fimctionality to personal communications system 1600.
Figure 17A shows one embodiment of the peisonat
10 communications system 1600 with caller ID interface 1650 as shown in Figure
16. Caller ID interface 1650 includes ring detector 1710, off hook circuit
1720, DC holding circuit 1730, caller 1D relays 1740, caller ID decoder 1750,
processor 1770, and memory 1780. In this embodiment processor 1770 is the
personal communications system processor and memory 1780 is a portion of
15 memory in the personal commimicatians system Alternate embodiments may
employ separate processors and memory for the interface without departing
from the scope and spirit of the present inverrtion.
Ring detector 1710 si8nals processor 1770 on signal line 1772
when an incoming call is received on telephone lines 1702 and 1704.
20 Processor 1770 signals caller ID relays 1740 on signal line 1774 to decode
the
caller ID information as transmitters by the telephone company betvveen the
first and second telephone rings. Caller 1D relays 1740 route signals on
telephone lines 1702 and 1704 to caller ID decoder 1750 via isolation device
1782 when signal 1774 is pulled to a logic "0" state. When signal 1774 is
25 logic low, transistor 1745 conducts and normally op~ optoisolated relays
1742 and 1743 close briefly while normally closed optoisolated relay 1744
opens. 'Ihe switching period only needs to be long enough to receive the
frequency shift keying caller ID transmissions between the first and serorxl
telephone rings. Rectifier 1794 ensures that the telephone line polarity to
the
30 do holding circuit 1730 is consistent regardless of the polarity of the
telephone
service connections to lines 1702 and 1704.
An access matrix is preprogrammed into the interface memory
CA 02315745 2000-07-20
64
17$0 which specifies the parame~s associated with an authorized caller
(Further details on the access matrix and screening modes are discussed
below.) If the incoming caller ID information and the access matrix
pararnetas indicate that the caller is authorized, then processor 1770 answers
5 the telephone call by asserting a logic "0" on iine 1776 and engaging the
telephone caarent loop using signal 1 T77 to activate DC holding circuit 1730.
When these circuits are activated caller ID relays 1740 are programmed to
pass telephone signals 1732 and 1734 through caller ID decoder 1750 to
personal commrurications system electronics 1760 for demodulation and data
10 processing.
If the caller is not authorized access, the caller ID interface
1650 can hang up on the caller by momentarily taking the personal
communications system off hook and returning to on-hook by toggling signal
line 1776. In this way, the caller ID interface can hang up on an unwanted
15 caller without providing access to the caller.
Referring now to Figures 3, 7B, and 7C, in this embodiment of
the present invention telephone line interface 309 includes the caller ID
interface 1650 hardware as shown in Figure 17. Therefore, personal
communications system electronics 1760, processor 1770 and memory 1780 of
20 Figure 17 is amount to the hwdvvare shown in Figure 3 excluding telephone
line interface 309. In this embodiment:
ring detector 1710 is optical isolator U32 (CNY17) and zener diodes
CRl and CR2 of Figure 7C;
caller 117 relays 1742, 1743, and 1744 are relays U30, U31, (of Figure
25 7C) and U33 (of Figure 7B), respectively;
caller ID decoder 1750 is chip set U34, U35, and U37 of Figures 8A
and 8B (U34 is the interface chip 315, U35 is the Code~c 311, and U37 is the
DSP/Data Pump 311 as shown in Figure 3);
do holding circuit 1730 is CR19, R73, C71, CR20, CR26, R74, R75,
30 R76, and transistors Q2 and Q3;
off hook circuit 1720 is optoisolated relay U29, transistor Q4, resistor
R15, and resistor R69 of Figure 7B;
CA 02315745 2000-07-20
65
processor 1770 is main c~noller 313, which is a Zilog 280180
microprocessor, part number Z84C01 by Zilog, Inc. of Campbell, California;
and
memory 1780 is the combination of RAM 316 and PEPROM 317.
5 Isolation device 1782 electrically isolates the caller ID interface from the
PCS
elecr<onics 1760. Isolati~ device 1782 is typically a transformer, however,
alternate embodiments employ and optocoupler device. The detailed operation
of this circuitry is discussed above in the section entitled: "Detailed
Electrical
Schematic Diagrams".
10 An alternative embodiment of the calls ID interface 1652 is
described in Figure 17B. The operation of caller ID interface 1652, shown in
Figure 17B, is similar to the caller 117 interface 1650 of Figure 17A,
however,
the caller ID interface 1652 incorporates a single relay 1790 to activate do
holding circuit 1730 for pLUposes of answering the telephone call. The on-
15 hook condition of caller 1D interface 1652 is characterized by off hook
relay
1720 (normally open) being open and relay 1790 being op~. The caller >D
information from telephone lines 1702 and 1704 is decoded after the first ring
by closing off hook relay 1720 to pass the ficy shift keying caller ID
signals through capacitor 1792 to caller 1D decoder 1750. Therefore capacitor
20 1792 serves as a do blocking element to create an ac path to caller ID
decoder
1750. Closing off hook relay 1720 connects the ac loop for frequency shift
keying demodulation and decoding and the call is not ansvvered as long as
relay 1790 remains open. If the caller ID information indicates an authorized
caller, then closing relay 1790 creates the off hook condition for connecting
25 the caller to the peaonal communications system 1600. If the caller ID
information in conjunction with the access matrix indicates that the caller is
unauthorized a quick hang up can be accomplished by briefly toggling relay
1790 and off hook relay 1720 to answer the call and then hang up.
In yet another embodiment, caller )D decoder 1750 is the Nfitel
30 MT8841 Calling Number Identification Circuit as specified in the Nfitel
Ivhcroelectronics Digital/Analog Communications Handbook, Doc. No. 9161-
952-007-NA, issue 9 (1993). Processor 1770 is the Zilog 2182
CA 02315745 2000-07-20
66
Nficropcncessor as specified in the 2180 Family Ivfiaoprocessors and
Peripherals Databook, Doc No. Q2/94 DC 8322-00.
Those skilled in the art will readily recognize that other caller
ID decoders and processors may be used without departing from the scope
5 and spirit of the present invention. Alternate embodiments use
sophisticated,
multifiuxtion decoding devices and data pumps to perform the functions of
caller ID decoder 1750. Additionally, processor 1770 may be replaced with
combinational logic to control the operation of the caller ID interface.
Finally, alternate relay switching embodiments may be constructed which do
10 not depart from the scope and spirit of the present invention.
Caller ID Encoded 'Transit
In standard telephone caller ID systems the caller ID
infbm~aiion is transmitted between the first and second telephone ring. The
caller )D information includes a message-type byte, a length byte, and data
15 bytes consisting of date, time, telephone number with area code, telephone
owner's name, and check sum byte and is sent using frequency shift keying
between the first and second ring. Several industry protocols for caller ID
are
being developed by telecommunications vendors, including.
1. Bellcore's single data message frame format and multiple data
20 message frame format as described in Bellcore Technical Reference
TR-NWT-000030, Issue 2, October 1992;
2. Rockwell's Calling Number Delivery (CND) as described in
Rockwell Application Note, Docmnent No. 29800N73, Order No. 873,
October 1991; and
25 3. AT&Ts Caller m as described in the AT&T Ivficroelectronics
Modem Designer's Guide, June 3, 1993, Doc. MN92-026DMOS.
Figure 18 summarizes the three caller ID protocols described above. The
Bellcore multiple data message frame format 1810 is distinguished from the
AT&T or Rockwell single data message frame format 1820 by examining the
30 leading bytes 1811 {OII~ and 1821 (04I-~.
Figure 19 shows an algorithm which distinguishes between the
different protocols for proper decoding of the incoming caller ID information
CA 02315745 2000-07-20
67
in one embodiment of the present invention. The caller ID information is
mxrieved from the caller ID decoding hardware 1902 and the first byte is
decoded to determine the message type 1904. If the first byte is O1H (1906),
then the calls ID protocol is the multiple data message format 1810 of Figure
S 18 ( 1910) and the message data is read after skipping the delimiters (
1912,
1914). If the first byte is 04H (1908) then the caller ID information is in
the
single data message fon~nat 1820 of Figure 18 (1920) and the message data
can be read directly (1922). If the first byte is neither O1H or 04I-1; then
the
caller ID information is being transmitted by another protocol or an error has
10 been made in the decoding or transmission 1930. Since the above mentioned
protocols are the most widely used, the present algorithm provides for
automatic switching between formats to ensure that both formats are properly
read.
Those skilled in the art would readily recognize that this
15 method could be modified for accommodating furtu~e caller ID message
protocols without departing from the scope and spirit of the present
invention,
and that the protocols presented were not intended in an exclusive or limiting
20 In one embodiment of the present invention the quick hang
feature allows the personal communications system to hang up immediately
on an unwanted caller by placing the personal communications system off
hook for a duration of one second (using off hook cit~cuit 1720), and them
place the personal communications system back "on hook" again. The
25 personal communications system is then ready to accept another call. This
feature minimizes the amount of time an invalid user can tie up a phone line.
Other dutations are possible without departing finm the spirit and scope of
the
present invention.
CA 02315745 2000-07-20
68
T'irrte of Dav,~~chm iration c'ng alley 1D
In one embodiment of the present invention time
synchronization cart be accomplished by using the decoded caller ID
information which identifies the time of day to synchronize an on-board time-
5 of-day clock
The information available from decoding caller ID information
allows the caller B7 interface to screen users by a variety of parameters as
specified in a preproaccess matrix. The flowchart shown in Figm~e
10 20 describes the overall operation of the screening function. The program
access matrix is programmed by specifying the screening mode and specifying
the operative parameters to perform the screening, such as caller name, caller
telephone number, time and day frames for receiving calls, and number of
accesses (2002). In one embodiment of the present invention the receiving
15 personal communications system opetates in the following modes or
combination of modes which will be described further in the "Screening
Modes Using Caller 1D" section below:
1. Number Only Mode;
2. Blacklist Mode;
20 3. Day Only Mode;
4. Time Only Mode;
5. Name Only Mode;
6. S Register 50 Mode; and
7. Hybrid Modes
25 The caller )D interface then detects a ring 2004, derndes the
caller ID information 2006, and compares the caller ID information with the
access matrix (a function of the screening mode, as described below) 2008,
and determines whether the caller is authorized to access the persor>al
communications system 2010. If the caller is not authorized an exit routine is
30 performed 2020 which may be a number of operations including, but not
limited to, a friendly error message and a quick hang up 2022. If the personal
communications system is compiling a database of callers, the database can be
CA 02315745 2000-07-20
69
with the received caller ID information 2024 before waiting for
another call 2004. If the caller is authorized, access is enabled 2014 and
allowed until the call is terminated 2016. The hang up proced~me 2022 is
followed by an database update 2024 before rerinning to the wait state for
5 another call 2004. The step of determining whether access is authorized 2010
is discussed in detail in the below section on Screening Mades.
Screening Modes c'ng Iler 1D
The following modes are used in one embodiment of the
present invention to control access to a personal communications system
10 connected to the caller ID interface. The paran~ete~s of each mode become
part of the preprogcarnmed access matrix. A number of examples will be
offered following a brief description of the various modes of this embodiment:
Number W_n_ly Mode
In the number only mode, the personal communications system
15 compares an incoming caller ID number to phone numbers on a "number
only" list. Only incoming calls with numbers matching the phone numbers on
the list will be ansvrered. The number list is part of the access matrix which
is preprogrammed into the caller ID interface merr~ory.
~l~kli~~
20 In the blacklist mode, the personal communications system
compares an incoming caller 1D number to a list of caller on a "blacklist."
Any call which matches a phone number on the "blacklist" will be denied
access to the device and the incoming call will be terminated immediately
using a preprogrammed exit routine, such as the "quick-hang" feature
25 described above. The blacklist and desired exit routine can be tailored
depending on the particular blacklisted caller. For example, a BBS might
want to quick hang up on a blacklisted abuser of the bulletin board, but only
give a "late dues" message to a blacklisted user who is merely late in paying
dues. The access matrix contains all of the blacklist parameter.
30 I2av~,
In the day only mode, the access matrix is programmed to
authorize calls only on specific days.
CA 02315745 2000-07-20
In the time only mode, the personal communications system
only answers calls during a certain preprogrammed times of the day and
ignores calls outside of those specified times. For example, this feature
5 eni~ances the secva~ity to a computer network provided by the pn~ent
invartion
during non-business hours.
jyame On ,
The name only mode authorizes access only to callers whose
names are preprogratnn~d in a name table in the access matrix. This is a
. 10 means for inclusively authorizing access to the personal communications
system ('Ihe blacklist mode is an exclusive means for authorizing access to
the personal communications system.)
S Register 50 Mode
The S Register 50 mode provides a limited number of accesses
15 by a particular user. The scars matrix is preprowith a
predetermined number of calls allowed to a user before that user is black
listed This feature is especially useful for electronic bulletin board service
operators because it allows them to screen out unwanted users as soon as the
S Register number is reached The S Register mode also allows for limiting
20 the number of accesses made by a crew user of the bulletin board, since in
one
embodiment of the present invention a new user can be assigned a position in
the access matrix and subject to a maximum numbs of accesses, similar to
the known users. 'Ibis is known as a Temporary Blacklist mode, since after
the predetermined number of the user is temporarily blacklisted until
25 the access counter for that user is resex by the system administrator.
Any combination of the above modes provides a specialized
access matrix based on each listed user. For example, access authority can be
given to Mr. X at only 6:00 to 7:00 p.m. by programming Mr. xs name and
30 the access times as illustrated in the examples below.
Several access matrix examples for a BBS and their associated
CA 02315745 2000-07-20
71
interpretations are described below for each entry in the table, according to
one embodirrtent of the present invention.
TABLE 23 BLACKLIST MODE
~.I~E$ I~' AI~ DAY/ TIME ~5Q
(b) 333-3333
quick hang
(b) Mr. J "Illegal Access"
Table 23 shows two examples of the blacklist mode. Any
calls from 333-3333 will receive a quick hang immediately on attempt to
access the BBS personal communications systemG Additionally, any time Mr.
J attempts to call (from any of his phones), the message "Illegal Access" will
be displayed prior to hang up by the BBS.
TABLE 24 NAME ONLY MODE
~ DAY/ ~ $~
Mr. Z
Ms. B
Table 24 shows that only Mr. and Ms. B can access the BBS
personal communications system, regardless of telephone number or day.
TABLE 25 NUMBER ONLY MODE
».~EB l~ I?AYL~~ ~.~Q EXL'L~?.l~
1231567
676-8888
Table 25 shows that only callers from 123-4567 and 676-8888
can access the BBS personal communications system, regardless of name or
time of day.
TABLE 26 TIME ONLY MODE
~Ev $ ~ DAY/ TIME ~ E
/9-17
Table 26 shows that any caller between 9:00 a.m and 5:00 p.m
can access the BBS personal communications system (24 hour time format
CA 02315745 2000-07-20
72
used in this example).
TABLE 27 HYBRID MODES
I?AYI~ ~ E
333-3333 Mr. A M-W/Crl3, 14-15 5 quick hang
444-4444 Ms. B ALL 9-17
555-5555 M-F/9-17 10 "PAY DLJE,S"
Mr. C M W/ 3
Table 27 provides four examples of access matrix entries. In
the first line, Mr A. can access the BBS personal communications system
fibm Monday to Wednesday and at the times of 6:00 a.m to 1:00 p.m and
2:00 p.m. to 3:00 p.m Mr. A can only access the BBS personal
communications system five (5) times before access is denied and the system
administrator is notified. Mr. A will get a quick hang up on his sixth attempt
to access the BBS personal communications system, and attempts thereafter,
until his access register is reset by the system administrator.
Ms. B can access the BBS personal communications system all
days of the week, but only between the hours of 9:00 am to 5:00 p.m Ms.
B can access the BBS personal communications system an unlimited number
of times.
Any caller finm phone number 555-5555 can access the BBS
personal communications system from Monday to Friday betwe~ the hours of
9:00 a.m to 5:00 p.m A "Pay Dues" message will be displayed to the user
before a hang up on the eleventh attempt to aaess the BBS personal
communications system, and subsequent attempted accesses. The system
administrator must reset the access counter for firture access authorization.
Mr. C can access the BBS personal communications systan
finm any of his phone numbers, and can access at any time on Monday
through Wednesday. After three accesses, Mr. C's exit routine will be
whatever the default exit routine for the BBS happens to be.
The described screening modes are not limiting and not
exclusive. One skilled in the art would readily recognize that other modes
and variations of these modes are possible without departing from the scope
CA 02315745 2000-07-20
73
and spirit of the present invention.
The previously described screening modes are not exclusive or
limiting to the present invention. Neither is the particular interaction of
the
screening modes. The following is only one embodiment of a screening
algorithm offered to demonstrate the interaction between screening modes in
one embodiment of the present invention.
Figure 21 illustrates one embodiment of the authorization
process using the above described screwing modes. The caller ID interface
waits for a call 2102, and gets the caller ~ID information upon detecting an
incoming call 2104, 2106. The caller ID information is verified against the
access matrix, in this example the caller's telephone number is verified 2110,
2112. If the number is on the list, then the time of day is verified 2114 and
the date is verified 2116 before the personal communications system is
allowed to answer the call 2118. The personal communications system is
engaged in the call as long as it is connected 2120 and the call is complete
after the connection is lost 2122. The personal communications system then
quick hangs up 2140 and disconnects 2142 before waiting for the next call
2102. If the time of day or date is invalid the quick hang procedure is
automatically initiated. If the telephone number is not on the number list
2110 the user's number of accesses is checked to ensure that the maximum is
not 2130 and if the number is not on the ternrporary blacklist 2132 it
is added 2136 prior to answering the call 2118. If the number is on the
blacklist 2132, a separate S Register 50 for the blacklist is checked 2134 and
quick hang is initiated 2140, 2142 if the maximum number of accesses is
exceeded, else the register for this caller is incremented 2138 and the call
answet~d 2118, 2120, and 2122. The quick hang proced<u~e, 2140 and 2142,
is again followed by waiting for the next call 2102.
CONCLUSION
The preset invention was described in terms of a personal
communications system interface, however, the methods and apparahis are
applicable to a number of data exchange devices. For example, the present
CA 02315745 2000-07-20
74
imrenxion could be adapted to any system with caller identification
infom~atian, including but not limited to applications in the fiber
superhighway and similar applications.
Although specific embodiments have been illustrated and
5 described herein, it will be appreciated by those of ordinary skill in the
art
that any arrangement which is calculated to achieve the same purpose may be
substituted for the specific embodiment shown. This application is intended
to cover any adaptations or variations of the present inv~tion. Therefore, it
is manifestly intended that this invention be limited only by the claims and
10 equivalents thenoof.
