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Patent 2377963 Summary

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Claims and Abstract availability

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(12) Patent Application: (11) CA 2377963
(54) English Title: BALANCED TO UNBALANCED CIRCUIT
(54) French Title: CIRCUIT BALUN
Status: Dead
Bibliographic Data
(51) International Patent Classification (IPC):
  • H01P 5/10 (2006.01)
(72) Inventors :
  • WESTBERG, DAVID (Sweden)
(73) Owners :
  • INFINEON TECHNOLOGIES AG (Not Available)
(71) Applicants :
  • TELEFONAKTIEBOLAGET LM ERICSSON (Sweden)
(74) Agent: MARKS & CLERK
(74) Associate agent:
(45) Issued:
(86) PCT Filing Date: 2000-06-26
(87) Open to Public Inspection: 2001-01-04
Examination requested: 2003-12-18
Availability of licence: N/A
(25) Language of filing: English

Patent Cooperation Treaty (PCT): Yes
(86) PCT Filing Number: PCT/SE2000/001350
(87) International Publication Number: WO2001/001514
(85) National Entry: 2001-12-28

(30) Application Priority Data:
Application No. Country/Territory Date
9902497-8 Sweden 1999-06-30

Abstracts

English Abstract




The present invention relates to a balun circuit (1B) comprising a first sub-
circuit (10) and a second sub-circuit (20) which each correspond to, or
essentially to, a .lambda./4-wave guide. The first sub-circuit (10) includes a
first conductor (10U), a second conductor (10L) and a dielectric layer
disposed between said first and second conductors, said conductors being
connected together capacitively and inductively. The second sub-circuit (20)
includes a first conductor (20U), a second conductor (20L) and a dielectric
layer disposed between said first and second conductors, said conductors being
connected together capacitively and inductively. A first side on the first
conductor (10U) in the first sub-circuit (10) is connected to an input port
(P1). A second side on the first conductor (10U) in the first sub-circuit (10)
is connected to a first side on the first conductor (20U) in the second sub-
circuit (20) via a connecting conductor (15). A second side on the second
conductor (10L) in the first sub-circuit (10) is connected to a first output
port (P2). A first side on the second conductor (20L) in the second sub-
circuit (20) is connected to a second output port (P3). A first open
terminating .lambda./4-wave guide (30) is connected to a second side on the
second conductor (10L) in the first sub-circuit (10), and a second open
terminating .lambda./4-wave guide (40) is connected to a second side of the
second conductor (20L) in the second sub-circuit (20).


French Abstract

La présente invention concerne un circuit balun (1B) comportant un premier sous-circuit (10) et un second sous-circuit (20) chacun correspondant au moins sensiblement à un guide d'onde .lambda./4. Le premier sous-circuit (10) comprend un premier conducteur (10U), un second conducteur (10L) et une couche diélectrique disposée entre les premier et second conducteurs, ces conducteurs étant connectés l'un à l'autre de manière capacitive et inductive. Le second sous-circuit (20) comprend un premier conducteur (20U), un second conducteur (20L) et une couche diélectrique disposée entre les premier et second conducteurs, ces conducteurs étant connectés l'un à l'autre de manière capacitive et inductive. Un premier côté du premier conducteur (10U) situé dans le premier sous-circuit (10) est connecté à un port d'entrée (P1). Un second côté du premier conducteur (10U) situé dans le premier sous-circuit (10) est connecté à un premier côté du premier conducteur (20U) situé dans le second sous-circuit (20) au moyen d'un conducteur de connexion (15). Un second côté du second conducteur (10L) situé dans le premier sous-circuit (10) est connecté à un premier port de sortie (P2). Un premier côté du second conducteur (20L) situé dans le second sous-circuit (20) est connecté à un second port de sortie (P3). Une premier raccordement de guide d'onde .lambda./4 ouvert (30) est connecté à un second côté du second conducteur (10L) situé dans le premier sous-circuit (10), et un second raccordement de guide d'onde .lambda./4 (40) ouvert est connecté à un second côté du second conducteur (20L) situé dans le second sous-circuit (20).

Claims

Note: Claims are shown in the official language in which they were submitted.



7

CLAIMS

1. A balun circuit (1B) comprising a first sub-circuit (10) and
a second sub-circuit (20) each of which corresponds to, or
essentially to, a .lambda./4-wave guide, wherein the first sub-circuit
(10) includes a first conductor (10U), a second conductor (10L)
and a dielectric layer disposed between said first and second
conductors, wherein said conductors are connected together
capacitively and inductively, wherein the second sub-circuit
(20) includes a first conductor (20U), a second conductor (20L)
and a dielectric layer disposed between said first and said
second conductors, said conductors being connected together
capacitively and inductively, wherein a first side on the first
conductor (10U) in the first sub-circuit (10) is connected to
an input port (P1), a second side on the first conductor (10U)
in the first sub-circuit (10) is connected to a first side on
the first conductor (20U) in the second sub-circuit (20) via a
connecting conductor (15), a second side on the second
conductor (10L) in the first sub-circuit (10) is connected to a
first output port (P2) and a first side on the second conductor
(10L) in the second sub-circuit (20) is connected to a second
output port (P3), characterized in that a first open,
terminating .lambda./4-wave guide (30) is connected to a second side
on the second conductor (10L) in the first sub-circuit (10),
and in that a second, open terminating .lambda./4-wave guide (40) is
connected to a second side of said second conductor (20L) in
the second sub-circuit (20).

2. A balun circuit according to Claim 1, characterized in that
the balun circuit is of the stripline kind.

3. A balun circuit according to Claim 1, characterized in that
the balun circuit is of the microstrip kind.


Description

Note: Descriptions are shown in the official language in which they were submitted.



CA 02377963 2001-12-28
WO 01/01514 PCT/SE00/01350
BALANCED TO UNBALANCED CIRCUIT
TECHNICAL FIELD
The present invention relates to a balanced to unbalanced
circuit (BALUN) according to the preamble of Claim 1.
High frequency electric signals can be transmitted in two often
occurring ways, namely either balanced or unbalanced. In the
case of balanced transmission there is used two conductors in
which electric currents are constantly in antiphase. Unbalanced
transmission, on the other hand, uses only one signal conductor
and the signal (the current) is returned via earth. The
balanced transmission is differential in nature and therewith
less sensitive to disturbances and interference than the
unbalanced transmission.
Balanced and unbalanced transmissions are often mixed in radio
systems. It is therefore necessary to be able to convert a
balanced signal to an unbalanced signal and vice versa with the
smallest possible losses. Balun circuits are used to this end.
The properties of the balun circuit depend on impedance
difference and phase difference for odd and even modes in the
high frequency electric signal.
A typical balun is the Marchand-balun which includes four 7~/4
waveguides connected in pairs. In many cases, a balanced port
shall be connected to an input or to an output of a
differential .amplifier. Normally, it is necessary to DC-bias
the amplifiers and consequently a DC-wise short circuit of the
balanced port to earth cannot be accepted.
This has earlier been solved by including two capacitors
between the actual balanced circuit and the balanced load. The
capacitors are discrete capacitors which are chosen so that
their resonance frequency coincides with the signal frequency.


CA 02377963 2001-12-28
WO 01/01514 2 PCT/SE00/01350
The capacitance is then balanced by the own parasite inductance
of the capacitor and ideally behaves transparent at the
frequency concerned.
A problem with discrete capacitors is that they are relatively
bulky and cannot be implemented readily when integrated in
multilayer printed circuit boards or ceramic substrates.
When biasing the differential amplifiers it is normally
necessary to connect present day balun circuits to a current
source or voltage source via additional discrete components.
This applies particularly to the Marchand balun and also
constitutes a problem.
SUMMARY OF THE INVENTION
An object of the present invention is to at least reduce the
aforesaid problem.
This object is achieved in accordance with a first aspect of
the invention by means of a device according to Claim 1.
One advantage afforded by the present invention is that
performance is improved with regard to loss reductions and
better phase characteristics of the balanced signal.
Another advantage is that it can be simulated more readily than
in the case of existing solutions, since it is not necessary to
rely on discrete component models.
The invention will now be described in more detail with
reference to preferred embodiments thereof and also with
reference to the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS


CA 02377963 2001-12-28
WO 01/01514 3 PCT/SE00/01350
Figure 1 is a principle diagram of a classic Marchand-balun.
Figure 2 is a principle diagram of one embodiment of a
Marchand-balun constructed in accordance with the present
standpoint of techniques so as to avoid DC-wise short
circuiting to earth of the balanced output signal.
Figure 3 is a principle diagram of one embodiment of an
inventive Marchand-balun.
DESCRIPTION OF PREFERRED EMBODIMENTS
In order to provide a better understanding of the particular
features of the inventive device, reference is made first to
Figures 1 and 2.
Figure 1 illustrates an embodiment of a classic Marchand-balun
1, which includes a first and a second sub-circuit 10 and 20
respectively. The first sub-circuit 10 includes an upper
conductor 10U, a lower conductor 10L and a discrete layer
disposed between said conductors. The upper conductor 10U and
the lower conductor 10L in the first sub-circuit 10 are
connected together capacitively and inductively, with a given
coupling constant. The first sub-circuit 10 corresponds to, or
essentially to, a first 7~/4-wave guide. Similarly, the second
sub-circuit 20 includes an upper conductor 20U and a lower
conductor 20L and a dielectric layer disposed between said
conductors. The upper conductor 20U and the lower conductor 20L
are connected to one another in said second sub-circuit 20
capacitively and inductively, with a given coupling constant.
The second sub-circuit corresponds to, or essentially to, a
second ~,/4-wave guide.
An input P1 is connected to a first side on the upper conductor
10U in the first sub-circuit 10. A second side on the upper
conductor 10U in the first sub-circuit 10 is connected to a


CA 02377963 2001-12-28
WO 01/01514 PCT/SE00/01350
4
first side on the upper conductor 20U in the second sub-circuit
20 via a connecting conductor 15. A second side on the upper
conductor 20U in the second sub-circuit 20 is open. A first
side on the lower conductor 10L in the first sub-circuit 10 is
connected to earth. A second side of the lower conductor 10L in
the first sub-circuit 10 is connected to a first output port
P2. A first side on the lower conductor 20L in the second sub
circuit 20 is connected to a second output port P3. A second
side of the lower conductor 20L in the second sub-circuit 20 is
connected to earth.
Figure 2 illustrates a Marchand-balun circuit 1A. The sole
difference between the Marchand-balun circuit 1A and the
classic Marchand-balun 1 shown in Figure 1 is that the Figure 2
circuit includes two capacitors 50 and 60 which prevent the
balanced output signal from being short circuited DC-wise to
earth. A first capacitor 50 is arranged between the output port
P2 and the second side of the lower conductor 10L in the first
sub-circuit 10. A second capacitor 60 is arranged between the
output port P3 and the first side of the second conductor 20L
in the second sub-circuit 20.
Figure 3 illustrates an embodiment of an inventive balun
circuit 1B. The illustrated embodiment of the inventive balun
circuit is shown in stripline form, in other words the mutually
connected conductors lie in different planes. The inventive
balun circuit 1B includes a first and a second sub-circuit 10
and 20 respectively. The first sub-circuit 10 includes an upper
conductor 10U, a lower conductor 10L and a dielectric layer
disposed between the said conductors. The upper conductor 10U
and the lower conductor 10L in the first sub-circuit 10 are
connected together capacitively and inductively with a given
coupling constant. The first sub-circuit 10 corresponds to, or
essentially to, a first ~,/4-wave guide. Similarly, the second
sub-circuit 20 includes an upper conductor 20U and a lower
conductor 20L and a dielectric layer disposed between said


CA 02377963 2001-12-28
WO 01/01514 5 PCT/SE00/01350
conductors. The upper conductor 20U and the lower conductor 20L
in the second sub-circuit 20 are connected together
capacitively and inductively with a given coupling constant.
The second sub-circuit corresponds to, or essentially to, a
second 7~/4-wave guide.
An input P1 is connected to a first side of the upper conductor
10U iri the first sub-circuit 10. A second side on the upper
conductor 10U in the first sub-circuit 10 is connected to a
first side on the upper conductor 20U in the second sub-circuit
via a connecting conductor 15. A second side on the upper
conductor 20U in the second sub-circuit 20 is open. A first
side on the second conductor 10L in the first sub-circuit 10 is
connected to a first side of a first open terminating 7~/4-wave
15 guide 30. A second side on the lower conductor lOL in the first
sub-circuit 10 is connected to a first output port P2. A first
side on the lower conductor 20L in the second sub-circuit 20 is
connected to a second output port P3. A second side on the
lower conductor 20L in the second sub-circuit 20 is connected
20 to a first side on a second open, terminating ~,/4-wave guide
40.
The dielectric material disposed between the upper conductors
10U and 20U and the lower conductors 10L and 20L in the first
and the second sub-circuits is disposed in a layer structure, a
stripline structure. It will be understood, however, that the
dielectric layer can be disposed in the same plane as the upper
and the lower conductor, microstructure. The electric
conductors may be linear in accordance with Figure 1, or of the
spiral type.
A point 70 between the third ~,/4-wave guide 30 and the lower
conductor 10L in the first sub-circuit 10 functions as an RF-
wise earth point. A point 80 between the fourth ~,/4-wave guide


CA 02377963 2001-12-28
WO 01/01514 6 PCT/SE00/01350
40 and the lower conductor 20L in the second sub-circuit 20
functions as an RF-wise earth point.
The ~./4-wave guides in the illustrated embodiment of the balun
circuit 1B may be made of metal, for instance from a silver
alloy, copper, tungsten or aluminium. The dielectric material
may comprise a ceramic material, polymeric material, an
electrically non-conductive organic material, silicon dioxide
or silicon nitride.
Although the inventive balun circuit will function for all wave
lengths, the length of each ~,/4-wave guide must be manageable
for purely practical reasons.
The balun circuit 1B may be of the microstrip or stripline
kind.
It will be understood that the invention is not restricted to
the aforedescribed and illustrated embodiments thereof, and
that modifications can be made within the scope of the
following claims.

Representative Drawing
A single figure which represents the drawing illustrating the invention.
Administrative Status

For a clearer understanding of the status of the application/patent presented on this page, the site Disclaimer , as well as the definitions for Patent , Administrative Status , Maintenance Fee  and Payment History  should be consulted.

Administrative Status

Title Date
Forecasted Issue Date Unavailable
(86) PCT Filing Date 2000-06-26
(87) PCT Publication Date 2001-01-04
(85) National Entry 2001-12-28
Examination Requested 2003-12-18
Dead Application 2009-06-26

Abandonment History

Abandonment Date Reason Reinstatement Date
2008-06-26 FAILURE TO PAY APPLICATION MAINTENANCE FEE
2008-11-06 R30(2) - Failure to Respond
2008-11-06 R29 - Failure to Respond

Payment History

Fee Type Anniversary Year Due Date Amount Paid Paid Date
Application Fee $300.00 2001-12-28
Maintenance Fee - Application - New Act 2 2002-06-26 $100.00 2001-12-28
Registration of a document - section 124 $100.00 2002-10-09
Maintenance Fee - Application - New Act 3 2003-06-26 $100.00 2003-06-17
Request for Examination $400.00 2003-12-18
Registration of a document - section 124 $100.00 2004-05-19
Maintenance Fee - Application - New Act 4 2004-06-28 $100.00 2004-06-08
Maintenance Fee - Application - New Act 5 2005-06-27 $200.00 2005-06-14
Maintenance Fee - Application - New Act 6 2006-06-26 $200.00 2006-06-05
Maintenance Fee - Application - New Act 7 2007-06-26 $200.00 2007-05-24
Owners on Record

Note: Records showing the ownership history in alphabetical order.

Current Owners on Record
INFINEON TECHNOLOGIES AG
Past Owners on Record
TELEFONAKTIEBOLAGET LM ERICSSON
WESTBERG, DAVID
Past Owners that do not appear in the "Owners on Record" listing will appear in other documentation within the application.
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Document
Description 
Date
(yyyy-mm-dd) 
Number of pages   Size of Image (KB) 
Drawings 2001-12-28 1 15
Description 2001-12-28 6 235
Representative Drawing 2002-06-25 1 6
Claims 2001-12-28 1 42
Abstract 2001-12-28 1 68
Cover Page 2002-06-26 1 48
PCT 2001-12-28 6 255
Assignment 2001-12-28 2 104
Correspondence 2002-06-19 1 24
Assignment 2002-10-09 2 56
Prosecution-Amendment 2003-12-18 1 31
Prosecution-Amendment 2004-03-12 1 28
Assignment 2004-05-19 4 127
Prosecution-Amendment 2008-05-06 2 57