Note: Descriptions are shown in the official language in which they were submitted.
CA 02431689 2003-06-16
FIELD OF THE INVENTION adjustable width whose average
value was the required
DC output voltage. Such system
is known as pulse width
The present invention relates modulation (FWM) switching
to DC/DC converters, in converter. A typical PWM
general, and to a full-bridge buck converter circuit is shown
isolated zero-current resonant in Fig 2. The critical
switching converter in particular.evavefonns of the buck converter
The new converter are shown in Fig 3.
overcome the off line isolation,There, a single-pole single-throw
low-loss at the switching switch in the form of a
semiconductor devices and allowstransistor Q,, is in series
operating at high with the DC input Vd~. It
is
frequency. It also minimizes closed for a time To" out of
the voltage and current stress the switching period T. When
on
the semiconductor devices and it is on, the voltage at V,
hence allows the use of low is V~o (assuming for the
cost components. moment the "on" drop across
Q, is zero). When it is
open, the voltage at V, falls
very rapidly to ground and
BACKGROUND OF THE INVENTION would have gone dangerously
negative had it not been
caught and held at ground by
the so-called free-wheeling
Isolated Linear R~utator or clamp diode D,. Assume for
the moment that the "on"
For many years, DC power supply drop of diode D, is zero also.
systems are based on linear Then the voltage at V,
technique to regulate output (Fig. 3B) is rectangular, ranging
voltage. The basic isolated between Vdo and ground
linear
regulator circuit is shown in with a "high" time of To".
Fig. 1. It consists of an isolationThe average or DC value of
transformer Ti, a rectifying this voltage is Vd~*TodlT.
filter C,, an electrically variableThe LC filter is added in
series
resistance in the form of a transistorbetween V, and V and yields
Q, (operating in the a clean, ripple-free DC
linear mode) in series with the voltage V whose magnitude is
output load. An error amplifier Vd~*T"/T. Now V is
senses the DC output voltage sensed by sampling resistors
V via a sampling resistor R,, RZ and compared to a
network R,, R~ and compares it reference voltage V,of in the
with a reference voltage V,,~- error amplifier (EA). The
The error amplifier output voltageamplified DC error voltage
Vin drives the base of the Vre is fed to a pulse-width-
series-pass power transistor modulator (PWM) which is essentially
via a current amplifier. The a voltage
phasing is such that if the DC comparator. Another input to
output voltage Vo goes up (as the PWM is a saw-tooth
a
result of either an increase voltage of period T and usually
in input voltage or a decrease 3V in amplitude (Vt_ in
in
output load current), the gate Fig- 3A). The PWM voltage comparator
of the series-pass transistor generates a
Q,
(assuming an LIMOS transistor) rectangular wavefotm (Vw",)
goes down. This increases the which goes high at the start
resistance of the series-pass of the triangle and low at
element and hence brings the the instant the triangle crosses
output voltage back down so thatthe DC voll;age level of the
sampled output equals the error-amplifier output V~a.
reference voltage Vf. This negative-feedbackThe PWM output pulse width
loop works in a To is thus proportional to
similar fashion for decreasing the EA amplifier output DC
in output voltage due to a drop voltage level, The PWM
in input voltage or an increase output pulse is fed to a current
in output load current. In that amplifer and used to
case, the error output voltage control the "on" time of switch
moves the series-pass gate transistor Q, in a
slightly more positive, decreasesnegative-feedback loop. The
its drain-source resistance, phasing is such that if Vd
and raises the DC output voltagegoes slightly high, the EA
V so that the sampled DC level goes closer to the
output again equals the reference.bottom of the PWM triangle,
The feedback loop is the triangle crosses the EA
entirely DC-coupled. There are output level earlier in time
no elements switching on and and the Q, on time decreases,
off within the loop; all DC voltagebringing V (=V~~*To"/T) back
levels are predictable and down. Similarly, if Vd
calculable. There are no transformersgoes low by a certain percentage,
within the loop. There is the on time increases
no fast-rise-time voltage or by the same percentage to maintain
current spike to cause radio Vo constant. The Q,
frequency interference (RFI) on time is controlled so as
noise output. With no transistorsto make the sampled output
switching on and off, there are Vo*RZ/(R,+R,) always equal
no AC switching losses due to to the reference voltage
momentary overlap of falling Vr~,~. During the To" period,
current and rising voltage acrosscurrent passes from the DC
the transistors. All power lossesinput through Q, to charge
are due to DC currents in and the inductor L. The passed
DC voltages across the various current increases linearly
elements and these are easily from I, to h (Fig 3D). When
calculable. However, as all the the transistor shuts off at
load current must pass through the end of To", current ceases
to
the pass transistor Q,, its dissipationpass through Q,. In order to
is (Vd~ - V)*I. The maintain the current
operating efficiency is usually continuity in L, diode D, switches
in the range of 50 -- 60%. For on instantaneously.
application such as isolated The current passes through
off line power adaptor, an D, decreases linearly from
Iz
electrical isolation is required.to Ic as shown in Fig. 3E-
The isolation is usually The output current I is the
provided by a conventional 50/60summation of Iq, and Id, and
Hz power transformer T,, is shown in Fig. 3F. PWM
which is large, heavy and contributesconverter not only reduces
additional power loss. the size and weight over the
linear systenn; it also improves
the efficiency to the range
Pulse Width Modulation Switchingof 80%, Further reduction of
Converter the size and weight of the
Alternatives to linear regulatorsswitching power supply can
started being widely used in be achieved by increasing
the early 1960. Switching regulatorsthe switching frequency. However,
used a fast-operating such increase in
transistor to switch a DC input frequency also increases the
voltage to the output at an switching losses in the
adjustable duty cycle. By varyingswitching devices and hence
the duty cycle, the average jeopardizes the efficiency.
DC voltage delivered to the outputIn the isolated off line application,
could be controlled. Such the stringent
average voltage consisted of international separation requirements
rectangular voltage pulses of and heavily
CA 02431689 2003-06-16
shielded isolation windings stillseries resonant dc-do converter
cause a significant size in the has the following
isolated switching transformer. characteristics:
Switch has to be current-bidirectional
in order
Switching losses can be divided to maintain the sinusoidal
into two categories: turn-off resonant current.
and turn-on losses. The turn-off During the DCM operation, switches
losses are caused by always
simultaneous non-zero-voltage operate at zero-current switching.
and non-zero-current applied
to the switching device during ~ Peak instantaneous output
turn-off. Tunron losses are current is very high
caused by dissipation of the energycomparing to traditional pulse
stored in the parasitic width
capacitance which exists in parallelmodulation (PWM) converter.
with the switching device. This design
This energy is completely dissipatedre<luires high current rated
in the switching diodes and thick
transistor during turn-on. Resonantwires for L. If a transformer
converters are designed to is used, this
reduce these switching losses. design also demands thick wire
at the windings
of the transformer.
Series Resonant DC-DC Converter Transformer is usually required
to scale for
Fig.4 shows a typical series resonantsuitable load condition.
dc-do converter. It
includes a do source, a switch ~ The input voltage of the
network, a LC resonant tank rectifier bridge
network, a rectifier network, changes rapidly when the diode
a low-pass filter network and is off. This
a
do load. Detailed waveforms of causes a significant switching
operating the converter at loss at the
discontinuous conduction mode rectifier diodes.
(DCM) are shown in Fig. 5.
Switches (S, - S4) are connected
to the DC input V~,~. They
are periodically open and closed.The zero-current switching
Power is then delivered to characteristics allows series
the resonant tank network at V3. resonant converter to operate
Waveform in Fig. 5a is the at a much higher frequency
voltage at V3; assuming the switchesWM converter. A practical series
are of zero ohm resonant
P than
impedance, V3 is a square wave converter can switch to 2MHz.
with amplitude 2*Vd~. During However, resonant
the high half cycle of V3, currentconverters usually increase
hZ flows into the LC tank both the voltage and current
network. hz is positive and D, stresses on the components
is on. Initially current charges such as transistors,
the inductor L in a sinusoidal transformers and diodes. It
waveform as indicated in Fig. also increases the complexity
Sc at region A. This current flows(when comparing with PWM converter)
through DI to the toad R,. of the control
Owing to the resonant nature of circuitry.
the LC tank network, current
I~~ is will then become negative
and start discharging the
inductor L. At the moment when There is always a need for
I~2 changes polarity, VS a smaller size., lighter weight
changes rapidly and also reversesand higher power efficient
its polarity. Current then dc-do converter capable of
flows to the load R, via DZ as operating at high frequency.
indicated at region B. When all There is also a need for
the energy stored in L has been reduction of voltage and current
discharged, current ceases to stress t:o the switching
flow to the load at region C. devices such as transistors,
Fig. Sb is the voltage waveform transformer and diode; and
at V5. Fig. Sd and Se are the for simplicity in control circuitry.
current waveforms via D~ and The present invention
DZ
respectively. In the subsequent is directed towards these needs.
low half cycle of V3, current
will flow to the LC again, but
in an opposite direction. This
time, current Iu2 starts as a SU14INIAItY OF TIiF INVENTION
negative sinusoidal pulse and
charges up L at region D. Then
current changes phase to
positive and discharge L at regionThe present invention, that
E. When al( the stored flux I name it as Canus' converter,
in L has been discharged and currentrelates to the use of a novel
stops at region F. Note switching concept that
that at each high and low cycle intelligently positions the
of V;, current through CZ rectifier bridge in between
the
starts with a big half cycle of LC tank network of an otherwise
a sine waveform and then a series resonant
small reverse half cycle sine converter. Such arrangement
waveform. This implies the will maintain the zero-
requirement of current bidirectionalcurrent switching characteristic.
switches at all locations, In addition, it eliminates
S~ to S4. An alternative configurationthe requirements for
current=bidirectional
of series resonant dc-do switches. It
converter is shown in Fig.6. Theredramatically reduces the peak
a transformer, T, is added output current stress at the
for isolation and load matching. output devices. It also eliminates
the use of an isolation
Unlike the PWM converter which transformer for off line isolation
uses fixed period of application. It can even
switching cycles and variable eliminate the; rapid voltage
turn on time to regulate the changes across the rectifying
output voltage, DCM series resonantdiodes when the diodes turn
converter uses variable off which reduces switching
frequency to regulate the output loss.
voltage. For each DCM
switching cycle, a fixed amount It is thus a primary object
of current, which depends of this invention to provide
an
only on Vd~, is switched to the off line dc-do resonant converter,
output load. If the load employing concept of
increases or the input DC voltageCanus' converter, with their
decreases, a feedback switches turn on and off at
control circuit will increase zero-current switching conditions.
the switching frequency to bring
back output voltage back to the It is also an object of this
requirement. If the load invention to provide a full-
decreases or the input DC voltagebridge or half=bridge resonant
increases, the feedback converter with the use of
control circuit will decrease current unidirectional switches.
the switching frequency and
again bring the output voltage It is also another object of
back to the requirement. A this invention to provide
simplicity in resonant control circuit; and the flexibility
CA 02431689 2003-06-16
to adapt to a wide variation of Fig. 8f is the waveform of
input voltage range and wide current passing through D,
in
load variation. Canus' converter described
in Fig. 7.
It is still another object of Fig. 8g is thf: waveform of
this invention to allow the use current passing through DZ
of in
slow speed rectifiers, instead Canus' converter described
of expensive Schottky diodes, in Fig. 7.
in
the rectifier bridge network. Fig. 8h is the waveform of
cuwent passing through L,
in
It is still another object of Canus' converter described
this invention to provide an in Fig. 7.
isolated
resonant converter without the Fig. 9a is the enlarged waveform
use of isolation transformer. of voltage across D, in
It is still another object of Canus' converter described
this invention to provide a full-in Fig. 7.
bridge or half bridge resonant Fig. 9b is the enlarged waveform
converter which reduces of current passing
switching stress and losses in through D, i:n Canus' converter
critical components and hence described in Fig. 7.
improves the overall reliability.Fig. 10 is first alternative
design of Canus' converter.
These and other objects and advantagesFig. 11 is 2nd alternative
will become apparent design of Canus' converter.
when the following drawings are Fig. 12 is 3rd alternative
viewed in connection with design of Canus' converter.
the detailed explanation to follow.Fig. 13 is 4th alternative
design of Canus' converter.
Fig. 14 is 5th alternative
design of Canus' converter.
BRIEF DESCRIPTION OF 'THE DRAWINGSFig. 15 is 6th alternative
design of Canus' converter.
Fig. 16 is 7th alternative
design of Canus' converter.
Fig. 1 is a schematic of a prior Fig. 17 is a non-isolated half
art isolated linear regulator. bridge Canus' converter.
Fig. 2 is a schematic of a prior
art pulse width modulation
converter. DETAILD DESCRIPTION OF THE
PREFERRED
Fig. 3a is a critical waveform EMBODIMENT
showing the relations between
V, and V~a in a buck PWM converter
described in Fig. 2.
Fig. 3b is the waveform at V, The present invention relates
in a buck PWM converter to the use of a novel
described in Fig. 2. switching concept that intelligently
positions the rectifier
Fig. 3c is the waveform at V,~.",bridge in between the LC tank.
in a buck PWM converter network of an otherwise
described in Fig. 2. series resonant converter.
The invention includes a do
Fig. 3d is the waveform of currentsource, a switch network, a
passing through the resonant capacitor pair, a
switching transistor Q,. It showsrectifier network, a resonance
that when the transistor inductor pair, a low-pass
conducts, the current increases filter network, a do load and
from I, to IZ linearly. a switch control feedback
Fig. 3e is the waveform of currentnetwork. Fig;.7 shows the schematics
passing through D,. It which I named it as
shows that when the diode conducts,Canus' converter. S,, S2, S3
the current decreases and S4 are operating in a
from IZ to I, linearly. push-pull manner. instead of
connecting like the series
Fig. 3f is the waveform showing resonant dc-do converter (shown
the relations between the in Fig. 4), the resonant
output current Io and the currenttank of Canus' converter is
passing through the inductor divided by the rectifier
h, bridge. Hence the resonant
capacitor pair Cl and CZ,
is at
Fig. 4 is a schematic of a prior one side while the resonant
art series resonant dc-do inductor pair, L, and L2,
is
converter. on the other side of the bridge.
The critical waveforrns of
Fig. Sa is the waveform of V3 Canus' converter are shown
in a series resonant converter in Fig. 8a to Fig. 8h. In
described in Fig. 4. particular, :For clarity of
explanation, one complete
Fig. Sb is the waveform of VS switching cycle is divided
in a series resonant converter into 6 regions from A to F
as
described in Fig. 4. Where regionsmarked in Fig. 8c. Below descriptions
A, B and C correspond to are based on these
the high half cycle of V3 and 6 regions. Caring the push
regions D, E and F correspond half cycle (i.e. S, and S4
are
to the low half cycle of V3, on and SZ and S3 are off),
V3 is switched to Vas. This
Fig. Sc is the waveform of the push half cycle covers region
current passing through the A, B and C. Current I~,
resonant capacitor CZ. t7ows throul;h C,, then to
D, and charges up inductor
L,
Fig. Sd is the waveform of the and Lz, it then flows back
current passing through diode to the switches via D3 and
CZ.
D,. The total charge time, To"
is '/< of the normal LC tank
Fig. Se is the waveform of the resonance cycle ( 2~c * LC
current passing through diode ). This charge period is
indicated in Fig. 8c in region
A. Where
Fig. 6 is a schematic of a prior
art series resonant converter ~ = Tc l 2 * LC -- (I )
T
having a transformer for isolation.o
Fig. 7 is a schematic of a Canus'L = L, m LZ -- (2)
converter.
Fig. 8a is the input waveform C = (C, *CZ)l(C,+CZ) -- (3)
of V3 in Canus' converter
described in Fig. 7. The peak current passes through
Ci is:
Fig. 8b is the waveform of voltageI~,(peak) = V/Ro -- (4)
on VS in Canus' converter
described in Fig. 7. Where
Fig. 8c is the waveform of voltageV = 2*(Va~ V~ Va) -- (5)
on V~ in Canus' converter
described in Fig. 7. V,i~ = DC supply voltage
Fig. 8d is the waveform of voltageVo = Output voltage
on Vo in Canus' converter
described in Fig. 7. Va= Diode drop voltage
Fig. 8e is the waveform of currentR" = L / C' -- (6)
passing through Cl in
Canus' converter described in
Fig. 7.
CA 02431689 2003-06-16
The charge current (I~,) increasesl~Vhen Vd~ Vo and Vd; the output
in sinusoidal shape as power is linearly
shown in Fig. 8e. During this proportional to the frequency
charge period, voltage at VS throughout the switching
is
decreasing in a cosine shape as frequency (which is approximate
shown in Fig. 8b. When I~, from 0 to resonant
increases to maximum (I/4 normal frequency). Such characteristic
LC tank resonance cycle), allows a simple design in
voltage across V; will drop to the regulation feedback control
zero and stay there. No more loop. Fig. 9a shows the
current Icl is allowed to flow voltage across D, and Fig.
and the charge period ends. In 9b shows the current passes
order to maintain the continuity through D,. :ft is noticed
of current in L, and LZ, a that, unlike most of the PWM
or
discharge period starts as shown resonant converter, there is
in Fig. 8c at region B. The no rapid voltage changes
period of time for the dischargingduring the turn on and turn
has nothing to do with the off time of the diode. Hence
resonant capacitor pairs. The there is negliigible power
rate of change of the dischargingloss during the recovery time
of
current at L, equals to V~/L. diode. And hence there is no
As the output voltage is about need to use expensive
constant due to the filter effectSchottky diode for the rectifier
of C3, the discharge current bridge. By using
is
linearly drop to zero as indicatedinternational approved high
in 8h. Owing to the voltage capacitors in C, and
symmetry of D, and D2, they shareC2, isolation can be maintained
the discharge current as and there is no need to
indicated in Fig. 8f and 8g duringuse transformer for isolation.
the discharge period at As seen in Fig. 8h, the
region B. When all the magnetic output current across L, is
flux energy stored in L, and in a triangular shape. This
LZ is drained, the discharge periodmakes the peak current approximately
(region B) ends. And there equal to 2 times
exists a pause period (region the rated output current. This
C) before the start of the pull is significantly less than
the
half cycle. This is known as the peak current in a traditional
discontinuous conduction series resonant converter.
mode (DCM) operation. In reality,It is by no means that Canus'
owing to the existence of converter is limited to
voltage diode drop in the rectifyingwork in discontinuous conduction
bridge, tiny stray energy mode (DCM)
remains in the inductors L, and operation. If the sum of the
L~ and hence there is small charging time in region A
oscillation in V~ as shown in and discharging time in region
Fig. 3c at region c. This B is larger than the
oscillation can be further reducedswitching half cycle, the converter
in the other implementation will get into
of Canus' converter as shown in continuous conduction mode
Fig. 10. After the pause (CCM) operation. At that
period, the converter gets into time, the switches are not
its pull half cycle, region D, operating at zero-current
E
and F. A negative current I~, switching anal the switching
flows through C2 via D~ and tosses will be increased.
charges up inductor L, and L2, Alternative designs of Canus'
and then it flows back to the converter are shown in
switches via D4 and C,. If C; Fig. 10 to fig. 17. In Fig.
equals to C~, the charging time 10 (alternative design 1),
an
is exactly the same as in the additional diode D5 is added
push half cycle. The waveform to the basic Canus'
of
the negative charge current is converter described above.
shown in Fig. 8e at region D. This diode conducts when the
Similar to the push half cycle, inductors L, and Lz are discharging.
there is also a discharge period It reduces the load
at region E and a pause period from D, to D4. Besides, it
at region F. If C, equals to also reduces the original
CZ, two
these 2 periods are exactly the diode drop to one diode drop
same as in the push half cycle. and hence improves the
Regions A to F form a complete overall efficiency. As most
switching cycle. Like the of the output current comes
DCM series resonant converter, from the discharging of the
Canus' converter also uses inductors Ll arid L~, it is
variable frequency to regulate more cost effective to use
the output voltage. For each one high current rated diode
switching cycle, a fixed amount DS and keep D, to DQ at low
of current, which depends current rating. fig. 11 is
only on Vd~, is switched to the another alternative design
output load. If the load (alternative design 2) that
increases or the input DC voltagecombines L, and LZ to a single
decreases, the regulation inductor L,. This design
feedback control network will is OK when the longitudinal
increase the switching balance is not required. Fig.
frequency to bring back output 12 (alternative design 3) adds
voltage back to the the additional DS for
requirement. If the load decreaseshigher efficiency while combining
or the input DC voltage L, and LZ to lower the
increases, the regulation feedbackcomponent count. It has the
control network will characteristics as described
decrease the switching frequency above in alternative design
and again bring the output 1 and 2. Fig. 13 is a half
voltage back to the requirement. bridge implementation of Canus'
converter (alternative
During the DCM operation of Canus'sdesign 4). Its principles work
converter, all the exactly the same as the
switches (S,-S4) are always operatingbasic Canus' converter except
at zero-current that the equation 5 has to
switching. It can be verified be rewritten as:
in Fig. 8e at the beginning of
region. A and region D. This providesV=Vd~-2*(V~+V~) -- (Sa)
a significant reduction
of the power loss at the switchesOf course., the output power
(it can be implemented by will be reduced
any active components such as substantially. Fig. 14 (alternative
bipolar junction transistors design 5) is another
(BJT), metal oxide semiconductor half-bridge implementation
field effect transistor by adding a diode DS to
(MOSFET), etc.). Also in Fig. increase the overall efficiency.
8e, I~, is positive during the Fig. 15 (alternative
push half cycle and negative duringdesign 6) is another half bridge
the pull half cycle. Hence implementation by
the switches only pass current combining L, and LZ to a single
in one direction. This L,. It has the
characteristic saves the cost characteristics as described
of current bi-directional switches.in alternative design 2 and
The switching frequency can be alternative design 4. Fig.
anything below the resonant 16 (alternative design 7)
is
frequency. This makes the converteranother halfbridge implementation,
very flexible to adapt to which adds DS for
different load variation and inputbetter efficiency and combines
voltage variation. And at L, and L2 for less
each push or pull half cycle, component count. When the isolation
there is a fixed amount of is not required, C1
energy, precisely 2*C*Vd~*(Vd~
V~; Vd) passes to the load.
CA 02431689 2003-06-16
and C2 can be combined. Fig. 17 9) A resonant converter according
shows a non-isolated half to claim I; wherein
bridge design of Canus' converter.said resonant inductor pair
comprises two coupled
Although the present invention inductors, which the two windings
has been described and of the inductors
illustrated in detail, it is clearlyare phased such that they provide
understood that the same is by maximum
way of illustration and example inductance for series-mode
only and is not to be taken by current but cancel for
way of limitation, the spirit common-mode current.
and scope of the present invention
being limited only by the terms 10) A resonant converter according
of the appended claims. to claim 1, wherein
What the claims are: said resonant inductor pair
comprises only one
1) A resonant converter for providinginductor and the two ends of
controlled power the other original
output comprising: inductor are shorted.
a) a do voltage source; 1 1) A resonant converter according
to claim 1, wherein
b) a switch network, with its said low pass filter comprises
inputs connect to the two LC low-pass networks
connections of the said do voltagein between the inductor pair
source, comprises and the load.
switches mean to be periodically 12) A resonant converter according
actuated and to claim 1, wherein
deactuated, said switches being said low pass filter comprises
actuated to a first state LRC low-pass
to permit a current flow in a networks in between the inductor
first direction to the two pair arid the load.
output connections, and being
actuated to a second
state to permit a current flow
in a second direction,
opposite to the said first direction,
to the two output
connections;
c) a resonant capacitor pair,
with one end of the two
capacitors connect to the two
output connections of
the said switch network, the other
end of the two
capacitors connect to the two
inputs of the rectifier
network;
d) a rectifier network comprising
four diodes, with its
inputs connect to the resonant
capacitor pair and its
output connects to the resonant
inductor pair;
e) a resonant inductor pair, comprising
two inductors
that connects the rectifier network
to the load;
f) a low pass filter, comprising
of a single capacitor in
parallelto the load;
g) a load;
h) a regulation feedback control
network, comprising
electronic circuitry that provide
feedback to control
the said switches.
2) A resonant converter according
to claim l, further
comprising a diode with its cathode
connects to the
cathode of the output of the rectifier
network, and the
anode connects to the anode of
the output of the rectifier
network.
3) A resonant converter according
to claim 1, wherein said
do voltage source comprises a
supply source with its do
voltage superimposed with an ac
ripple.
4) A resonant converter according
to claim l, wherein said
switch network comprises semiconductor
switching
device means to be periodically
actuated and deactuated,
to permit a current flow in a
first and second directions to
the two output connections.
5) A resonant converter according
to claim 3, wherein said
semiconductor switching device
comprises a bipolar
transistor.
6) A resonant converter according
to claim 3, wherein said
semiconductor switching device
comprises a field etfect
transistor.
7) A resonant converter according
to claim 1, wherein said
resonant capacitor pair is means
for isolating between the
do voltage source and the load.
8) A resonant converter according
to claim 1, wherein said
resonant capacitor pair comprises
only ane capacitor and
the two ends of the other original
capacitor are shorted for
non-isolation application.
