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Patent 2552742 Summary

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Claims and Abstract availability

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(12) Patent: (11) CA 2552742
(54) English Title: APPARATUS AND METHOD TO MINIMIZE ARCING BETWEEN ELECTRICAL CONNECTORS
(54) French Title: APPAREIL ET PROCEDE DE MINIMISATION DE PRODUCTION D'ARC ELECTRIQUE ENTRE DES CONNECTEURS ELECTRIQUES
Status: Expired and beyond the Period of Reversal
Bibliographic Data
(51) International Patent Classification (IPC):
  • H02J 7/00 (2006.01)
(72) Inventors :
  • BRYAN, LYLE STANLEY (United States of America)
  • PATTERSON, JEREMY CHRISTIN (United States of America)
  • COX, EDWIN GROVER (United States of America)
(73) Owners :
  • TYCO ELECTRONICS CORPORATION
(71) Applicants :
  • TYCO ELECTRONICS CORPORATION (United States of America)
(74) Agent: SMART & BIGGAR LP
(74) Associate agent:
(45) Issued: 2009-05-12
(86) PCT Filing Date: 2005-01-18
(87) Open to Public Inspection: 2005-08-11
Examination requested: 2006-07-06
Availability of licence: N/A
Dedicated to the Public: N/A
(25) Language of filing: English

Patent Cooperation Treaty (PCT): Yes
(86) PCT Filing Number: PCT/US2005/001801
(87) International Publication Number: WO 2005074094
(85) National Entry: 2006-07-06

(30) Application Priority Data:
Application No. Country/Territory Date
10/760,764 (United States of America) 2004-01-20

Abstracts

English Abstract


An electrical connection device (100) and methods for minimizing arcing when
the connection device is connected or disconnected under load are disclosed.
The invention provides an arc reduction circuit with one or more regulators
(114, 116), such as transistors, integrated into the connection device housing
that sense movement of the connection device and shunt the current to an
impedance circuit when a potential arc condition is sensed.


French Abstract

L'invention concerne un dispositif de connexion électrique (100) et des procédés permettant de minimiser la production d'arc électrique, lorsque le dispositif de connexion est connecté ou déconnecté sous charge. Ladite invention a aussi trait à un circuit de diminution de l'arc au moyen d'au moins un régulateur (114, 116), tel qu'un transistor, intégré dans le boîtier du dispositif de connexion qui permet de détecter le mouvement du dispositif de connexion et de mettre en dérivation le courant vers un circuit d'impédance, lorsqu'une condition d'arc potentielle est détectée.

Claims

Note: Claims are shown in the official language in which they were submitted.


CLAIMS:
1. A method of suppressing an arc in a connector
having a housing and at least one current conducting element
comprising the steps of: moving said current conducting
element relative to a connection position while under load;
sensing movement of said current conducting element using
arc suppression circuitry connected in parallel with said
connector between a current source and a load comprising:
monitoring voltage across the contacts; using an active
switching circuit to divert power to a Field Effect
Transistor, hereinafter FET, when voltage across said
contacts reaches a predetermined level; and dissipating
power said load, whereby arcing are suppressed when the
connector is engaged or disengaged.
2. The method of claim 1, wherein said step of moving
said current conducting element comprises connecting said
connector.
3. The method of claim 1, wherein said step of moving
said current conducting element comprises disconnecting the
connector.
4. The method of claim 1, wherein said connector
comprises at least two current conducting elements and at
least one sense pin, and wherein said step of moving said
current conducting element comprises sliding said sense pin
along said current conducting elements as said connector is
engaged and disengaged from a connected condition.
5. The method of claim 1, wherein said connector
comprises at least two current conducting elements and at
least one sense pin, and wherein said step of sensing
movement of said current conducting element comprises
sliding said sense pin along the current conducting elements
9

as the connector is engaged and disengaged from a connected
condition.
6. An arc suppressing connector, comprising: a
housing: current conducting elements held in the housing
and configured to removably engage and disengage mating
contacts; a transistor connected across the current
conducting elements in parallel with a voltage source; and
an active switching circuit connected to the transistor, the
active switching circuit detecting a voltage transition at
the current conducting elements and, based thereon, switches
a state of the transistor to pass current through the
transistor to a load when the current conducting elements
are engaged and disengaged with mating contacts.
7. The arc suppressing connector of claim 6, wherein
said transistor and said active switching circuit are
disposed within said housing.
8. The arc suppressing connector of claim 6, wherein
said current conducting element is one of a connector socket
and a connector pin.
9. The arc suppressing connector of claim 6, wherein
said active switching circuit is connected to a source of
power via a disengagable connector.
10. The arc suppressing connector of claim 6, wherein
said active switching circuit is connected to a ground
connection via a disengagable connector.
11. The arc suppressing connector of claim 6, wherein
said connector is coupled to a source of direct current.
12. The arc suppressing connector of claim 6, further
comprising a sense pin disposed within a said housing and
joined to the active switching circuit, said sense pin being

positioned to engage a corresponding one of the current
conducting elements.
13. The arc suppressing connector of claim 12, further
comprising a pair of sense pins joined to the active
switching circuit, each of the sensing pins being aligned to
slide along a corresponding one of a pair of the current
conducting elements as the connector is engaged and
disengaged from a connected condition.
14. The arc suppressing connector of claim 6, wherein
said at least one transistor comprises one or more Field
Effect Transistors, hereinafter FETs.
15. The arc suppressing connector of claim 6, wherein
said transistor is a p-channel Metal-Oxide Semiconductor
Field-Effect Transistor, hereinafter MOSFET.
16. The arc suppressing connector of claim 6, wherein
the active switching circuit further comprises a monostable
multivibrator circuit for controlling the flow of current
through said transistor.
17. The arc suppressing connector of claim 6, further
comprising a clamping circuit for preventing a voltage
transition of said transistor from prematurely re-triggering
said active switching circuit.
18. The arc suppression connector of claim 6, wherein
the active switching circuit further comprises a
multivibrator circuit connected to the transistor to detect
a voltage transition at the transistor, the multivibrator
circuit changing state based on the voltage transition.
19. The arc suppression connector of claim 6, wherein
the active switching circuit detects a voltage transition at
11

the transistor and, in response thereto, changes state and
turns on the transistor for a predetermined time out period.
20. The arc suppression connector of claim 6, wherein
the active switching circuit includes a multivibrator
circuit that detects a negative voltage transition at a
drain of the transistor, the multivibrator circuit changing
state and turning on the transistor for a predetermined time
out period when the negative voltage transition is detected.
12

Description

Note: Descriptions are shown in the official language in which they were submitted.


CA 02552742 2006-07-06
WO 2005/074094 PCT/US2005/001801
APPARATUS AND METHOD TO MINIMIZE ARCING BETWEEN ELECTRICAL CONNECTORS
[001] The invention relates generally to electrical connector assemblies, and
more
particularly, the invention relates to an electrical connector that includes
components to
prevent or at least minimize the occurrence of arcing.
[002] Electrical connectors provide an electrical pathway or junction to
provide a
mechanical connection between wires, circuit leads, components or other
current carrying
devices. Typically, electrical connectors are connected or disconnected during
periods when
there is no current passing through the device. Although not generally
recommended,
electrical connectors may be connected or disconnected under load, depending
on the voltage
and current levels. This can, in turn, lead to an arcing condition where
current jumps across
an air gap between contacts. Depending upon the design and construction of the
system,
arcing can cause serious damage to the components, such as pitting, or may
lead to the
coimector being welded or fused in place when the coimector pins are melted by
the arc. In
addition, in many systems, the voltage and current levels are high enough to
also cause bodily
harm to an operator attempting to connect or disconnect the line under load.
[003] U.S. Patent No. 3,588,605 to Casson discloses an electromechanical
switch with
are suppression that has a gate circuit for use in alternating current devices
comprised of
reactive passive elements that sense the level of voltage across the switch
contacts. The
disclosed switch is designed to limit current when the switch breaks the
circuit to minimize
damage to the contacts and prolong the life of the equipment.
[004] U.S. Patent No. 4,438,472 to Woodworth discloses a direct current device
for
suppressing arcs in mechanical switches or circuit breakers. The disclosed
design uses a
1

CA 02552742 2008-04-14
67789-545
bipolar transistor to actively shunt current around the
switch when the contacts are opened during opening or during
any "bounce" upon closing.
[005] The problem to be solved is to provide a connector
that reduces or minimizes arcing without requiring a
separate arc control system, so that the improvement may be
integrated into existing systems without extensive re-
design.
[006] The solution is provided by an arc suppressing
apparatus of the present invention, having a connector,
relay, or other connection device between a current source
and a load, wherein the device comprises a housing and at
least one current conducting element, and an arc suppression
circuit connected in parallel with the contacts of the
current conducting element. The arc suppression circuitry
detects an arc by monitoring voltage across the contacts,
and when the voltage reaches a predetermined level, diverts
power through a Field Effect Transistor, (hereinafter "FET")
to a load, whereby arcing is suppressed when the device is
engaged or disengaged. Typically, the current conducting
elements will either be a connector pin, a connector socket,
or relay contacts. In a preferred embodiment, the arc
suppression circuitry is disposed within a connector
housing.
[006A] According to one aspect of the present invention,
there is provided a method of suppressing an arc in a
connector having a housing and at least one current
conducting element comprising the steps of: moving said
current conducting element relative to a connection position
while under load; sensing movement of said current
conducting element using arc suppression circuitry connected
in parallel with said connector between a current source and
2

CA 02552742 2008-04-14
67789-545
a load comprising: monitoring voltage across the contacts;
using an active switching circuit to divert power to a FET,
when voltage across said contacts reaches a predetermined
level; and dissipating power said load, whereby arcing are
suppressed when the connector is engaged or disengaged.
[006B] According to another aspect of the present
invention, there is provided an arc suppressing connector,
comprising: a housing: current conducting elements held in
the housing and configured to removably engage and disengage
mating contacts; a transistor connected across the current
conducting elements in parallel with a voltage source; and
an active switching circuit connected to the transistor, the
active switching circuit detecting a voltage transition at
the current conducting elements and, based thereon, switches
a state of the transistor to pass current through the
transistor to a load when the current conducting elements
are engaged and disengaged with mating contacts.
[007] The invention will now be described by way of
example with reference to the accompanying drawings in
which:
[008] Fig. 1 is a perspective view of a connector in
accordance with an embodiment of the invention.
[009] Fig. 2 is another perspective view of the
connector shown in Fig. 1, with a cover removed to reveal
the arc suppression circuit.
[0010] Fig. 3 is a perspective view of the connector
shown in Fig. 1, with the connector body shown in phantom
and illustrating the connector pins and the arc suppression
circuitry.
2a

CA 02552742 2008-04-14
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[0011] Fig. 4 is a schematic diagram of an electrical
circuit in accordance with an embodiment of the invention.
2b

CA 02552742 2006-07-06
WO 2005/074094 PCT/US2005/001801
[0012] Fig. 5 is a schematic diagram of an electrical circuit in accordance
with another
embodiment of the invention.
[0013] Fig. 6 is a graph of voltage and current over time as a connector is
moved from a
connected to a disconnected state.
[0014] Fig. 7 is a graph illustrating the minimization of a voltage rise in
accordance with
aspects of the invention.
[0015] Referring now to the drawings in detail, wlierein like reference
numerals indicate
like elements throughout the several views, there is shown in FIG. 1 an
electrical connector
100 in accordance with an embodiment of the invention that may comprise two
mating halves
102, 104. As illustrated, one half 102 may comprise a housing 106 and a pair
of connector
pins 124. The illustrated embodiment is an example of a connector intended for
use in
automotive or similar applications where connectors carrying sufficiently high
current may be
found. However, as should be understood, the invention is not limited to
connectors, but may
be used with any device capable of being engaged/disengaged in a similar
manner, such as a
relay and the like. The connector illustrated in FIG. 1 may further include a
second mating
half 104 that is active and further comprises a housing 108 containing arc
suppression
circuitry in accordance an embodiment of the invention therein, which is
discussed in detail
below. For purposes of illustration, the present embodiment is a 42V connector
for a direct
current system, but the invention is not limited thereto. For example, the
invention may be
used witli system employing a standard 12v battery, such as in an automobile.
[0016] Referring now to FIG. 2, further details of the connector 100 shown in
FIG. 1 are
disclosed. As seen in FIG. 2, the second mating half 104 of the connector 100
may include a
circuit board 110, which may include a control circuit 112 and at least one,
and possibly two
regulating components 114, 116 connected to the control circuit 112, for
regulating one or
more loads. In this embodiment, the components 114, 116 are each transistors
and more
3

CA 02552742 2006-07-06
WO 2005/074094 PCT/US2005/001801
specifically FET devices. In one embodiment, the control circuit 112 may be
connected to a
source of power (e.g., 42v DC, as noted above) and ground via disengagable
connection 118,
although the invention is not limited thereto.
[0017] The operation and construction of a connector made in accordance with
this
embodiment may be better understood with reference to FIG. 3, in which the
housings 106,
108 of the connector illustrated in FIGS. 1-2 are shown in phantom to further
illustrate the
electrical and electronic components discussed above. In FIG. 3, it can be
seen that the
contact pins 124 illustrated in FIG. 1 may be connected to corresponding
contacts 120 that are
in turn connected to the control circuit 112. As illustrated, in the
embodiment shown, a pair
of sense pins 122 may divert power to the FETs 114, 116. Arcing is at least
minimized, and
preferably prevented, both when the connector 100 is brought into connection
with the current
source under load, and when the connector 100 is disconnected under load. As
will be
understood by those of ordinary skill in the art, the ability to connect and
disconnect a
connector while under load without an arc is advantageous, since arcing may
damage the
components of the connector and also presents a safety hazard.
[0018] An exemplary circuit that may be used in certain embodiments of the
invention is
illustrated in FIGS. 4 and 5. FIG. 4 illustrates a use of the circuit with a
connector, while
FIG. 5 illustrates the use of the circuit with a relay. As noted above, in the
exeinplary
embodiment illustrated and discussed in detail herein, the electrical source
200 comprises a
42V direct current source. As should be understood, the values of capacitance
and impedance
illustrated in this embodiment are merely examples for such a circuit, and the
invention is not
limited to these values.
[0019] A connector 100 may be provided between the source 200 and load 50,
which
corresponds to the connector 100 described above with reference to FIGS. 1-3.
When the
connector 100 is closed, current will flow in the normal manner, and when the
connector 100
4

CA 02552742 2008-04-14
67789-545
is open, current is interrupted. However, as discussed
above, when the connector 100 is disconnected under load
without the arc suppression circuitry of the invention,
arcing may generally occur.
5[0020] In these embodiments, a p-channel Metal-Oxide
Semiconductor Field Effect Transistor (MOSFET) Ml may be
placed in parallel across the contacts of connector 100.
MOSFET Ml may be connected to the positive terminal of
source 200 so a relatively negative gate drive may be used
to enhance the p-channel of MOSFET Ml, causing low RDSon and
conduction.
[0021] While the contacts are opening, MOSFET Ml is
turned on and provides a path through which load current may
flow. Thus, the voltage across the contacts is prohibited
from rising to a value sufficient to initiate an arc until
the contacts have separated by such a distance that an arc
will not be ignited by the largest voltage drop that is to
be presented to the contacts.
[0022] This negative drive may be provided by using a
monostable multivibrator incorporating npn bipolar
transistors Ql and Q2, as shown. Zener diode Dl provides a
supply voltage from which the multivibrator circuit may
operate. In its rest state, transistor Ql is held on with
bias current supplied by resistor Rl. The multivibrator
circuit may be triggered by detecting a negative going
voltage transition at the drain D of MOSFET Ml. Once this
drain voltage has dropped by an amount sufficient to forward
bias diode D4, the hold current for transistor Ql is
momentarily diverted from its base, causing transistor Ql to
turn off. The multivibrator thus proceeds to swap states,
turning on transistor Q2 and forcing the base of transistor
Ql into a reverse biased state. Turning on transistor Q2 in
5

CA 02552742 2008-04-14
67789-545
this manner causes the voltage across source S and drain D
of MOSFET Ml to increase to and beyond its threshold value
and the channel resistance reduces to its very low RDSon
value. As this happens, the voltage at drain D rises until
it settles at a voltage close to the voltage of source 200
(e.g., 42v) that is established by the RDSon resistance and
the load current of relay 300.
5a

CA 02552742 2006-07-06
WO 2005/074094 PCT/US2005/001801
The voltage at drain D is held at this level until the multivibrator circuit
times out, which
turns MOSFET Ml off, and allows the load voltage to drop to zero.
[0023] When transistor Q2 turns on, a pnp transistor Q3 is also turned on.
This acts to
clamp the trigger voltage back to the voltage of source 200. This voltage
clamp helps prevent
the negative excursion of the voltage of drain D of MOSFET M1 from causing the
multivibrator to be inadvertently re-triggered at the end of the timeout
period.
[0024] The multivibrator circuit will remain in its ON state until the base
voltage of
transistor Q 1 recovers sufficiently to become forward biased. The time
interval for this to
occur is controlled in most part by the RC time constant established by
resistor Rl and
capacitor Cl. When the base of transistor Q 1 is again forward biased,
transistor Q 1 is
switched on and transistor Q2 is switched off.
[0025] The rise rate of the voltage of gate G of MOSFET Ml is primarily
controlled by the
RC time constant of resistor R2 and capacitor Cl. As this voltage rises toward
the voltage of
source 200, the tlireshold between gate G and source S for the MOSFET M1 is
reached and
MOSFET Ml is turned off. During this turn off transition, pnp transistor Q3
remains on,
preventing the negative voltage transition of drain D from re-triggering the
multivibrator and
falsely starting another delay interval.
[0026] FIG. 6 exemplifies an arcing event as two contacts separate under load
with no arc
protection. The purpose of showing this graph is to illustrate the voltage
level required to
cause an arc to begin. This is called the minimum arc voltage and it is
slightly different for
each contact material. Typically the values for minimum arc voltage for common
contact
materials are between 12 and 15V. This means that with sufficient current
levels a stable or
free burning arc can exist within these voltage levels. Preferably, a stable
or free burning arc
is prevented, since the arc will continue to burn in a DC environment until
the contacts are
either destroyed or the contact gap is increased to a level where the power
supply can no
6

CA 02552742 2006-07-06
WO 2005/074094 PCT/US2005/001801
longer sustain the increasing arc voltage. Since, in this example, the FET is
activated when
the voltage drop across the contacts reaches about 7V, then no arcing should
occur. The
circuit tlius monitors the voltage rise across the contacts and suppresses the
arc before it can
develop.
[0027] The performance of certain embodiments of the invention is illustrated
in FIG. 7,
which is a graph illustrating the aspect of minimizing and preventing a
voltage rise sufficient
to create an arc. The upper half of the graph illustrates the current across
the contacts as the
connector is disconnected, and the lower half illustrates the voltage across
the contacts. In an
interconnection such as described above with reference to an exemplary
embodiment, in
which a 42V system is implemented, detecting a voltage across the contacts of
about 7V will
prevent an arc. It can be seen in FIG. 7 that when this condition occurs, both
the voltage and
the current drop to zero as the control circuit takes over and diverts the
current to the FETs,
which acts to control a load, which dissipates the current.
[0028] Active arc suppression circuits in accordance with embodiments of the
invention
permits connectors to be disconnected under load by eliminating arcing through
the gradual
reduction of the current when the connector is disconnected. This avoids
interruption of the
full load, which would produce a significant arc across the contacts. Those of
ordinary skill
in the art will appreciate that various combinations of resistors,
transistors, capacitors and
diodes may be used to create circuitry that both detects and shunts the
current from the
connector contacts as they are being opened (or closed as the case may be). In
general, a
combination of semiconductor elements may be provided in certain embodiments
that
transfers the interrupted current away from the connector. These variations
will depend upon
numerous design requirements and design constraints.
[0029] Upon review of the foregoing, numerous adaptations, modifications, and
alterations will occur to the reviewer. For example, other suitable types of
devices may be
7

CA 02552742 2006-07-06
WO 2005/074094 PCT/US2005/001801
utilized in place of FETs, such as other types of transistors or any other
components suitable
for providing regulation of current or voltage. These will all be, however,
within the spirit of
the invention. Accordingly, reference should be made to the appended claims in
order to
ascertain the true scope of the invention.
8

Representative Drawing
A single figure which represents the drawing illustrating the invention.
Administrative Status

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Event History

Description Date
Time Limit for Reversal Expired 2016-01-18
Letter Sent 2015-01-19
Grant by Issuance 2009-05-12
Inactive: Cover page published 2009-05-11
Inactive: Final fee received 2009-02-18
Pre-grant 2009-02-18
Notice of Allowance is Issued 2009-01-15
Letter Sent 2009-01-15
Notice of Allowance is Issued 2009-01-15
Inactive: Approved for allowance (AFA) 2008-10-01
Amendment Received - Voluntary Amendment 2008-04-14
Inactive: S.30(2) Rules - Examiner requisition 2007-10-12
Inactive: Cover page published 2006-09-14
Letter Sent 2006-09-08
Letter Sent 2006-09-08
Inactive: Acknowledgment of national entry - RFE 2006-09-08
Application Received - PCT 2006-08-17
National Entry Requirements Determined Compliant 2006-07-06
Request for Examination Requirements Determined Compliant 2006-07-06
All Requirements for Examination Determined Compliant 2006-07-06
Application Published (Open to Public Inspection) 2005-08-11

Abandonment History

There is no abandonment history.

Maintenance Fee

The last payment was received on 2009-01-02

Note : If the full payment has not been received on or before the date indicated, a further fee may be required which may be one of the following

  • the reinstatement fee;
  • the late payment fee; or
  • additional fee to reverse deemed expiry.

Please refer to the CIPO Patent Fees web page to see all current fee amounts.

Owners on Record

Note: Records showing the ownership history in alphabetical order.

Current Owners on Record
TYCO ELECTRONICS CORPORATION
Past Owners on Record
EDWIN GROVER COX
JEREMY CHRISTIN PATTERSON
LYLE STANLEY BRYAN
Past Owners that do not appear in the "Owners on Record" listing will appear in other documentation within the application.
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Document
Description 
Date
(yyyy-mm-dd) 
Number of pages   Size of Image (KB) 
Description 2006-07-06 8 369
Drawings 2006-07-06 5 126
Abstract 2006-07-06 2 75
Claims 2006-07-06 2 80
Representative drawing 2006-09-13 1 20
Cover Page 2006-09-14 1 50
Description 2008-04-14 11 418
Claims 2008-04-14 4 137
Representative drawing 2009-04-22 1 22
Cover Page 2009-04-22 1 51
Acknowledgement of Request for Examination 2006-09-08 1 177
Notice of National Entry 2006-09-08 1 202
Courtesy - Certificate of registration (related document(s)) 2006-09-08 1 105
Reminder of maintenance fee due 2006-09-19 1 110
Commissioner's Notice - Application Found Allowable 2009-01-15 1 163
Maintenance Fee Notice 2015-03-02 1 171
PCT 2006-07-06 2 67
Correspondence 2009-02-18 1 37