Note: Descriptions are shown in the official language in which they were submitted.
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. ARRAYED ULTRASONIC TRANSDUCER
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application is a continuation-in-part application of U.S. Patent
Application
No. 11/109,986, filed on April 4, 2005, wliich claims the benefit of U.S.
Provisional
Application No. 60/563,784, filed on April 20, 2004, and also claims the
benefit of U.S.
Provisional Application No. 60/733,091, filed on November 2, 2005, which
applications are
herein incorporated by reference in their entirety.
BACKGROUND OF THE INVENTION
[0002] High-Frequency ultrasonic transducers, made from piezoelectric
materials, are
used in medicine to resolve small tissue features in the skin and eye and in
intravascular
imaging applications. High-frequency ultrasonic transducers are also used for
imaging
structures and fluid flow in small or laboratory animals. The simplest
ultrasound imaging
system employs a fixed-focused single-element transducer that is mechanically
scanned to
capture a 2D-depth image. Linear-array transducers are more attractive,
however, and offer
features such as variable focus, variable beam steering, and permit more
advanced image
construction algorithms and increased frame rates.
[0003] Although linear array transducers have many advantages, conventional
linear-
array transducer fabrication requires complex procedures. Moreover, at high-
frequency, i.e.,
at or about 20 MHz or above, the piezoelectric structures of an array must be
smaller,
thinner and more delicate than those of low frequency array piezoelectrics.
For at least these
reasons, conventional dice and fill methods of array production using a dicing
saw, and
more recent dicing saw methods such as interdigital pair bonding, have many
disadvantages
and have been unsatisfactory in the production of high-frequency linear array
transducers.
SUMMARY OF THE INVENTION
[0004] In one aspect, an ultrasonic transducer of the present invention
comprises a stack
having a first face, an opposed second face and a longitudinal axis extending
therebetween.
The stack comprises a plurality of layers, each layer having a top surface and
an opposed
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bottom surface. In one aspect, the plurality of layers of the stack comprises
a piezoelectric
layer that is connected to a dielectric layer. A plurality of kerf slots are
defined therein the
stack, each kerf slot extending a predetermined depth therein the stack and a
first
predetermined length in a direction substantially parallel to the axis. In
another aspect, the
dielectric layer defines an opening extending a second predetermined length in
a direction
that is substantially parallel to the axis of the stack. In an exemplified
aspect, the first
predetermined length of each kerf slot is at least as long as the second
predetermined length
of the opening defined by the dielectric layer. Additionally, the first
predetermined length is
shorter than the longitudinal distance between the first face and the opposed
second face of
the stack in a lengthwise direction substantially parallel to the longitudinal
axis.
BRIEF DESCRIPTION OF THE DRAWINGS
[0005] The accompanying drawings, which are incorporated in and constitute a
part of
this specification, illustrate several aspects described below and together
with the
description, serve to explain the principles of the invention. Like numbers
represent the
same elements throughout the figures.
[0006] Figure 1 is a perspective view of an embodiment of an arrayed
ultrasonic
transducer of the invention showing a plurality of array elements, i.e., 1,
2,, 3, 4... N array
elements.
[0007] Figure 2 is a perspective view of an array element of the plurality of
array
elements of the arrayed ultrasonic transducer of Figure 1.
[0008] Figure 3 is a perspective view showing a lens mounted thereon the array
element
of Figure 2.
[0009] Figure 4 is a cross-sectional view of one embodiment of an arrayed
ultrasonic
transducer of the present invention.
[0010] Figure 5 is an exploded cross-sectional view of the embodiment shown in
Figure
4.
[0011] Figure 6 is an exemplary partial cross-sectional view of the arrayed
ultrasonic
transducer of Figure 1 taken transverse to the longitudinal axis Ls of the
arrayed ultrasonic
transducer, showing a plurality of first and second kerf slots extending
through a first
matching layer, a piezoelectric layer, a dielectric layer and into a backing
layer.
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[0012] Figure 7 is an exemplary partial cross-sectional view of the arrayed
ultrasonic
transducer of Figure 1 taken transverse to the longitudinal axis Ls of the
arrayed ultrasonic
transducer, showing a plurality of first and second kerf slots extending
through a first and
second matching layer, a piezoelectric layer, a dielectric layer and into a
backing layer.
[0013] Figure 8 is an exemplary partial cross-sectional view of the arrayed
ultrasonic
transducer oÃFigure 1 taken transverse to the longitudinal axis Ls of the
arrayed ultrasonic
transducer, showing a plurality of first and second kerf slots extending
through a first and
second matching layer, a piezoelectric layer, a dielectric layer, and into a
lens and a backing
layer.
[0014] Figure 9 is 'an,exemplary partial cross-sectional view of the arrayed
ultrasonic
transducer of Figure 1 taken transverse to the longitudinal axis Ls of the
arrayed ultrasonic
transducer, showing a plurality of first and second kerf slots extending
through a first and
second matching layer, a piezoelectric layer, a dielectric layer and into a
lens, and a backing
layer, wherein, in this example, the plurality of second kerf slots are
narrower than the
plurality of first kerf slots.
[0015] Figure 10 is an exemplary partial cross-sectional view of the arrayed
ultrasonic
transducer of Figure 1 taken transverse to the longitudinal axis Ls of the
arrayed ultrasonic
transducer, showing a plurality of first kerf slots extending through a first
and second
matching layer, a piezoelectric layer, a dielectric layer, and into a lens and
a backing layer,
and further showing a plurality of second kerf slots extending through a first
and second
matching layer, and into a lens, and a piezoelectric layer.
[0016] Figure 11 is an exemplary partial cross-sectional view of the arrayed
ultrasonic
transducer of Figure 1 taken transverse to the longitudinal axis Ls of the
arrayed ultrasonic
transducer, showing a plurality of first kerf slots extending through a first
and second
matching layer, a piezoelectric layer, a dielectric layer and into a lens and
a backing layer,
and further showing a plurality of second kerf slots extending through a
dielectric layer and
into a piezoelectric layer.
[0017] Figures 12A-G shows an exemplary method for making an embodiment of an
arrayed ultrasonic transducer of the present invention.
[0018] Figure 13 shows a graphical illustration of the frequency response of
the
transducer.
[0019] Figure 14 shows a graphical illustration of the time response of the
transducer.
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[0020] Figure 15 is a graphical analysis of the exemplified PZT staclc of Fig.
12G,
showing the optimum area for the design in the red coloring. This analysis is
for the
exemplified PZT stack illustrated in Fig. 12G and represents a baseline for
comparison of
alternative stack designs.
[0021] Figure 16 is an elevational cross-sectional view of an alternative
embodiment of
a PZT staclc having a bonding layer interposed therebetween an upper unpoled
PZT and a
lower poled PZT layer, in which the PZT layers have substantially similar
acoustic
impedance. The pitch of the array is defined as 2x(We)+ wkl + wk2 where we
(also labeled as
welement) is the width of a sub-diced element and wkl and wk2 are the widths
of the first and
second kerf slots respectively.
[0022] Figure 17 is a graphical analysis of the exemplified PZT stack of Fig.
16 having_
a first kerf width wki of 8 m and a second kerf width wk2 of 8 m and showing
a preferred
area for the design in red.
[0023] Figure 18. is a graphical analysis of the exemplified PZT stack of Fig.
16 having
a first kerf width wkl of 8 m and a second kerf width wu of 5 m and showing
a preferred
area for the design in red.
[0024] Figure 1-9 is a graphical analysis of the exemplified PZT stack of Fig.
19 having
a first kerf width wkl of 8 m and a second kerf width wk2 of 5 m and showing
how
bandwidth can be affected by the width of the element and the thickness of the
upper
unpoled PZT layer.
[0025] Figure 20 is a graphical analysis of the exemplified PZT stack of Fig.
16 having
a first kerf width wkl of 8 m and a second kerf width wk2 of 5 m and showing
how pulse
width can be affected by the width of the element and the thickness of the
upper unpoled
PZT layer for a pulse response at the -6dB threshold level.
[0026] Figure 21 is a graphical analysis of the exemplified PZT stack of Fig.
16 having
a first kerf width wkl of 8 m and a second kerf width wk2 of 5 m and showing
how pulse
width can be affected by the width of the element and the thickness of the
upper unpoled
PZT layer for a pulse response at the 20dB threshold level.
[0027] Figure 22 is a graphical analysis of the exemplified PZT stack of Fig.
16 having
a first kerf width wkl of 8 m and a second kerf width wk2 of 5 m and showing
how center
frequency can be affected by the width of the element and the thickness of the
upper
unpoled PZT layer.
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[0028] Figure 23 is a graphical analysis of the exemplified PZT stack of Fig.
16 having
a first kerf width wkl of 8 .m and a second kerf width wk2 of 5 m and
showing how the
ripple in the passband can be affected by the width of the element and the
thickness of the
upper unpoled PZT layer.
[0029] Figure 24 is a graphical analysis of the exempl-ified PZT stack of Fig.
16 having
a first kerf width wkl of 8 m and a second kerf width wk2 of 5 m and showing
how the
pulse sidelobe suppression can be affected by the width of the element and the
thickness of
the upper unpoled PZT layer.
[0030] Figure 25A-C, are exemplary top, bottom and cross-sectional views of an
exemplary schematic PZT stack of the present invention, the top view showing,
at the top
and bottom of the PZT stack, portions of the ground electric layer extending
outwardly from
the overlying lens; the bottom view showing, at the longitudinally extending
edges, exposed
portions of the dielectric layer between individual signal electrode elements
(as one will
appreciate, not show in the center portion of the PZT stack are the lines
showing the
individualized signal electrode elements - one signal electrode per element of
the PZT
stack).
[0031] Figure 26A is a top plan view of an interposer for use with the PZT
stack of Fig.
25A-C, showing electrical traces extending outwardly from adjacent the central
opening of
the transducer and ground electrical traces located at the top and bottom
portions of the
interposer, showing a dielectric layer disposed thereon a portion of the
surface of the
interposer, the dielectric layer defining an array of staggered wells
positioned along an axis
parallel to the longitudinal axis of the interposer, each well communicating
with an
electrical trace of the interposer, and further showing a solder paste ball
bump mounted
therein each well in the dielectric layer such that, when a PZT stack is
mounted thereon the
dielectric layer and heat is applied, the solder melts to form the desired
electrical continuity
between the individual element signal electrodes and the individual trances on
the interposer
- the well helping to retain the solder within the confines of the well.
[0032] Figure 26B is a partial enlarged view of the staggered wells of the
dielectric layer
and the electrical traces of the underlying interposer of Fig. 26A, the well
being configured
to accept the solder paste ball bumps.
[0033] Figure 27A is a top plan view of the PZT stack of Fig. 25A mounted
thereon the
dielectric layer and the interposer of Fig. 26A.
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[0034] Figure 27B is a top plan view of the PZT stack of Fig. 25A mounted
thereon the
dielectric layer and interposer of Fig. 26A, showing the PZT stack as a
transparent layer to
illustrate the mounting relationship between the PZT stack and the underlying
interposer,
the solder paste ball bumps mounted therebetween fonning an electrical
connection between
the respective element signal electrodes and the electrical traces on the
interposer.
[0035] Figure 28A is a schematic top plan view of an exemplary circuit board
for
mounting the transducer of the present invention thereto, the circuit board
having a plurality
of board electrical traces formed thereon, each board electrical trace having
a proximal end
adapted to couple to an electrical trace of the transducer and a distal end
adapted to couple
to a connector, such as, for example, a cable for communication of signals
therethrough.
[0036] Figure 28B is a top plan view of an exemplary circuit board for
mounting, of an
exemplary 256-element array having a 75 micron pitch.
[0037] Figure 28C is a top plan view of the vias of the circuit board of Fig.
28B that are
in communication with an underlying ground layer of the circuit board.
[0038] Figure 29 is a top plan view of a portion of the exemplified circuit
board
showing, in Region A, the ground electrode layer of the transducer wire bonded
to an
electrical trace on the interposer, which is, in turn, wire bonded to ground
pads of the circuit
board, and further showing, in Region B, the individual electrical traces of
the transducer
wire bonded to individual board electrical traces of the circuit board.
[0039] Figure 30A is a partial enlarged cross-sectional view of Region A of
Fig. 29,
showing the dielectric layer positioned about the solder paste ball bumps and
between the
PZT stack and the interposer.
[0040] Figure 30B is a partial enlarged cross-sectional view of Region B of
Fig. 29,
showing the dielectric layer between the PZT stack and the interposer.
[0041] Figures 31A and 31B are partial cross-sectional views of an exemplified
transducer mounted to a portion of the circuit board.
[0042] Figure 32 is an enlarged partial view Region B of an exemplified
transducer
mounted to a portion of the circuit board.
[0043] Figure 33 is a partial enlarged cross-sectional view of a transducer
that does not
include an interposer, showing a solder paste ball bump mounted thereon the
underlying
circuit board, each ball bump being mounted onto one board electrical trace of
the circuit
board, and showing the PZT stack being mounted thereon so that the respective
element
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signal electrodes of the PZT stack are in electrical continuity, via the
respective ball bumps,
to their respective board electrical trace of the circuit board.
[0044] Figure 34A is a partial enlarged cross-sectional view of Fig. 33,
showing the
ground electrode layer of the transducer without an interposer wire bonded to
ground pads
of the circuit board.
[0045] Figure 34B is a partial enlarged cross-sectional view of Fig. 33,
showing the ball
bump disposed therebetween and in electrical communication with the electrical
trace of the
circuit board and the element signal electrode of the PZT stack.
[0046] Figure 35 is a top elevational schematic view of an exemplary
interposer
defining a plurality, of opening. therein and showing alignment means on
portions of the
peripheral edges of the interposer.
[00471. Figure 36 is a top elevational schematic view of a PZT stack showing a
plurality
of troughs that extend through the ground electrode layer and into the
underlying PZT stack
a predetermined distance and are filed with a conductive material.
[0048] Figure 37 is a top elevational schematic view of the PZT stack of
Figure 36,
showing at least one matching layer mounted thereon a portion of the top
surface af the PZT
stack.
[0049] Figure 38 is a bottom elevation schematic view of the PZT stack of
Figure 37
connected to and underlying the interposer of Figure 35, showing the at least
one matching
layer connected to the interposer and showing the bottom surface of the PZT
stack of Figure
37 after it has been lapped to the desired thickness, which exposes the distal
ends of the
ground bus lines that are in electrical communication with the ground
electrode layer.
[0050] Figure 39 is a bottom elevational schematic view of the PZT stack of
Figure 38
after a dielectric layer is patterned on portions of the bottom surface of the
PZT stack of
Figure 38, wherein the dielectric layer is not in contact with the exposed
distal ends of the
ground bus lines.
[0051] Figure 40 is a bottom elevational schematic view of the PZT stack of
Figure 39
after a signal electrode layer is patterned on portions of the dielectric
layer and the bottom
surface of the PZT stack.
[0052] Figure 41 is a top elevational schematic view of the PZT stack of
Figure 40 after
a shield electrode is patterned on portions of the interposer surrounding the
openings in the
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interposer, the shield electrode in this example connected to the matching
layer that is
exposed in the opening of the interposer.
[0053] Figure 42 is a bottom elevational schematic view of the PZT stack of
Figure 41
after the stack has been diced into individual ultrasonic transducer arrays,
and showing the
exposed ends of the ground bus lines and the electrical traces of the signal
electrode layer on
the bottom surface of the PZT stack.
[0054] Figure 43 is a bottom elevational schematic view of the PZT stack of
Figure 42,
showings exemplary wire bond leads connecting the ground bus lines to a ground
of a
circuit and connecting the bond pads of the electrical traces of the signal
electrode layer to
signal lines of the circuit, and showing a backing covering the portions of
the electrical
traces that are connected to and underlie the array elements defined therein
the PZT stack.
[0055] Figure 44 is a schematic perspective cross-sectional view of an array
element of
the plurality of array elements therein of the PZT stack of Figure 43 with the
interposer and
shield electrode removed and after the first and second kerf slots are formed
in the PZT
stack of Figure 43.
[0056] Figure 45 is a schematic perspective cross-sectional view of an array,
element of
the plurality of array, elements therein of the PZT stack of Figure 43 with
the shield
electrode removed and after the first and second kerf slots are formed in the
PZT stack of
Figure 43.
[0057] Figure 46 is a schematic perspective cross-sectional view of an array
element of
the plurality of array elements therein of the PZT stack of Figure 43 after
the first and
second kerf slots are formed in the PZT stack of Figure 43.
[0058] Figure 47 is a schematic perspective view of an array element of the
plurality of
array elements therein of the PZT stack of Figure 46 with a lens mounted
therein the
opening of the interposer and in contact with the shield electrode.
[0059] Figure 48 is a schematic perspective view of an array element of the
plurality of
array elements therein of the PZT stack of Figure 47 with an additional
backing layer
attached to the PZT stack.
[0060] Figure 49 is a schematic cross-sectional view of the transducer mounted
with
respect to and in electrical communication with a flex circuit
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DETAILED DESCRIPTION OF THE INVENTION
[0061] As used throughout, ranges can be expressed herein as from "about" one
particular value, and/or to "about" another particular value. When such a
range is expressed,
another embodiment includes from the one particular value and/or to the other
particular
value. Similarly, when values are expressed as approximations, by use of the
antecedent
"about," it will be understood that the particular value forms another
embodiment. It will be
further understood that the endpoints of each of the ranges are significant
both in relation to
the other endpoint, and independently of the other endpoint. It is also
understood that there
are a number of values disclosed herein, and that each value is also herein
disclosed as
"about" that particular value in addition to the value itself. For example, if
the value "30" is
disclosed, then "about 30" is also disclosed. It is also understood that when
a value is
disclosed that "less than or equal to" the value, "greater than or equal to
the value" and
possible ranges between values are also disclosed, as appropriately understood
by the skilled
artisan. For example, if the value "30" is disclosed the "less than or equal
to 30"as well as
"greater than or equal to 30" is also disclosed.
[0062] It is also understood that throughout the application, data is provided
in a number
of different formats, and that this data, represents endpoints and starting
points, and ranges
for any combination of the data points. For example, if a particular data
point "30" and a
particular data point "100" are disclosed, it is understood that greater than,
greater than or
equal to, less than, less than or equal to, and equal to "30" and "100" are
considered
disclosed as well as between "30" and "100."
[0063] "Optional" or "optionally" means that the subsequently described event
or
circumstance can or cannot occur, and that the description includes instances
where the
event or circumstance occurs and instances where it does not.
[0064] The present invention is more particularly described in the following
exemplary
embodiments that are intended as illustrative only since numerous
modifications and
variations therein will be apparent to those skilled in the art. As used
herein, "a," "an," or
"the" can mean one or more, depending upon the context in which it is used.
[0065] Referring to Figures 1-11, in one aspect of the present invention, an
ultrasonic
transducer comprises a stack 100 having a first face 102, an opposed second
face 104, and a
longitudinal axis Ls, extending therebetween. The stack comprises a plurality
of layers, each
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layer having a top surface 128 and an opposed bottom surface 130. In one
aspect, the
plurality of layers of the stack comprises a piezoelectric layer 106 and a
dielectric layer 108.
In one aspect, the dielectric layer is connected to and underlies the
piezoelectric layer.
[0066] The plurality of layers of the stack can further comprise a ground
electrode layer
110, a signal electrode layer 112, a backing layer 114, and at least one
matching layer.
Additional layers cut can include, but are not limited to, temporary
protective layers (not
shown), an acoustic lens 302, photoresist layers (not shown), conductive
epoxies (not
shown), adhesive layers (not shown), polymer layers (not shown), metal layers
(not shown),
and the like.
[0067] The piezoelectric layer 106 can be made of a variety of materials. For
example
and not meant to be limiting, materials that form the piezoelectric layer can
be selected from
a group comprising ceramic, single crystal, polymer and co-polymer materials,
ceramic-
polymer and ceramic-ceramic composites with 0-3, 2-2 and/or 3-1 connectivity,
and the like.
In one example, the piezoelectric layer comprises lead zirconate titanate
(PZT) ceramic.
[0068] The dielectric layer 108 can define the active area of the
piezoelectric layer. At
least a portion of the dielectric layer can be deposited directly onto at
least a portion of the
piezoelectric layer by conventional thin film techniques, including but not
limited to spin
coating or dip coating. Alternatively, the dielectric layer can be patterned
by means of
photolithography to expose an area of the piezoelectric layer.
[0069] As exemplarily shown, the dielectric layer can be applied to the bottom
surface
of the piezoelectric layer. In one aspect, the dielectric layer does not cover
the entire bottom
surface of the piezoelectric layer. In one aspect, the dielectric layer
defines, an opening or
gap that extends a second predetermined length L2 in a direction substantially
parallel to the
longitudinal axis of the stack. The opening in the dielectric layer is
preferably aligned with
a central region of the bottom surface of the piezoelectric layer. The opening
defines the
elevation dimension of the array. In one aspect, each element 120 of the array
has the same
elevation dimension and the width of the opening is constant within the area
of the
piezoelectric layer reserved for the active area of the device that has formed
kerf slots. In
one aspect, the length of the opening in the dielectric layer can vary in a
predetermined
manner in an axis substantially perpendicular to the longitudinal axis of the
stack resulting
in a variation in the elevation dimension of the array elements.
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[0070] The relative thickness of the dielectric layer and the piezoelectric
layer and the
relative dielectric constants of the dielectric layer and the piezoelectric
layer define the
extent to which the applied voltage is divided across the two layers. In one
example, the
voltage can be split at 90% across the dielectric layer and 10% across the
piezoelectric layer.
It is contemplated that the ratio of the voltage divider across the dielectric
layer and the
piezoelectric layer can be varied. In the portion of the piezoelectric layer
where there is no
underlying dielectric layer, then the full magnitude of the applied voltage
appears across the
piezoelectric layer. This portion defines the active area of the array.
[0071] In this aspect, the dielectric layer allows for the use of a
piezoelectric layer that is
wider than the active area and allows for kerf slots (described below) to be
made in the
active area and extend beyond this area in such a way that array elements
(described below)
and array sub-elements (described below) are defined in the active area, but a
common
ground is maintained on the top surface.
[0072] A plurality, of first kerf slots 118 are defined therein the stack.
Each first kerf
slot extends a predetermined depth therein the stack and a first predetermined
length Ll in a
direction substantially parallel to the longitudinal axis of the stack. One
will appreciate that
the "predetermined depth" of the first kerf slot can comprise a predetermined
depth profile
that is a function of position along the respective length of the first kerf
slot. The first
predetermined length of each first kerf slot is at least as long as the second
predetermined
length of the opening defined by the dielectric layer and is shorter than the
longitudinal
distance between the first face and the opposed second face of the stack in a
lengthwise
direction substantially parallel to the longitudinal axis of the stack. In one
aspect, the
plurality of first kerf slots define a plurality of ultrasonic array elements
120, i.e., array
elements 1, 2, 3, 4... N.
[0073] The ultrasonic transducer can also comprise a plurality of second kerf
slots 122.
In this aspect, each second kerf slot extends a predetermined depth therein
the stack and a
third predetermined length L3 in a direction substantially parallel to the
longitudinal axis of
the stack. As noted above, the "predetermined depth" of the second kerf slot
can comprise a
predetermined depth profile that is a function of position along the
respective length of the
second kerf slot. The length of each second kerf slot is at least as long as
the second
predetermined length of the opening defined by the dielectric layer and is
shorter than the
longitudinal distance between the first face and the opposed second face of
the stack in a
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lengthwise direction substantially parallel to the longitudinal axis of the
staclc. In one
aspect, each second kerf slot is positioned adjacent to at least one first
kerf slot. In one
aspect, the plurality of first kerf slots define a plurality of ultrasonic
array elements and the
plurality of second kerf slots define a plurality of ultrasonic array sub-
elements 124. For
example, an array of the present invention without any second kerf slots has
one array sub-
element per array element and an array of the present invention with one
second kerf slot
between two respective first kerf slots has two array sub-elements per array
element.
[0074] One skilled in the art will appreciate that because neither the first
or second kerf
slots extend to either of the respective first and second faces of the stack,
i.e., the kerf slots
have an intermediate length, the formed array elements are supported by the
contiguous
portion of the stack near the respective first and second faces'of the stack.
[0075] The piezoelectric layer of the stack of the present invention can
resonate at
frequencies that are considered high relative to current clinical imaging
frequency, standards.
In one aspect, the piezoelectric layer resonates at a center frequency of
about 30 MHz. In
other aspects, the piezoelectric layer resonates at a center frequency of
about and between
10-200 MHz, preferably about and between, 20-150 MHz, and more preferably
about and
between 25-100 MHz:
[0076] In one aspect, each of the plurality of ultrasonic array sub-elements
has an aspect
ratio of width to height of about and between 0.2 - 1.0, preferably about and
between 0.3 -
0.8, and more preferably about and between 0.4 - 0.7. In one aspect, an aspect
ratio of
width to height of less than about 0.6 for the cross-section of the
piezoelectric elements is
used. This aspect ratio, and the geometry resulting therefrom, separates
lateral resonance
modes of an array element from the thickness resonant mode used to create the
acoustic
energy. Similar cross-sectional designs can be considered for arrays of other
types as
understood by one skilled in the art.
[0077] As described above, a plurality of first kerf slots are made to define
a plurality of
array elements. In one non-limiting example for a 64-element array with two
sub-diced
elements per array element, 129 respective first and second kerf slots are
made to produce
128 piezoelectric sub-elements that make up the 64 elements of the array. It
is contemplated
that this number can be increased for a larger array. For an array without sub-
dicing, 65 and
257 first kerf slots can be used for array structures with 64 and 256 array
elements
respectively. In one aspect, the first and/or second kerf slots can be filled
with air. In an
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alternative aspect, the first and/or second kerf slots can also be filled with
a liquid or a solid,
such as, for example, a polymer.
[0078] The formation of sub-elements by "sub-dicing," using a plurality of
first and
second kerf slots is a technique in which two adjacent sub-elements are
electrically shorted
together, such that the pair of shorted sub-elements act as one element af the
array. For a
given element pitch, which is the center to center spacing of the array
elements resulting
from the first kerf slots, sub-dicing allows for an improved element width to
height aspect
ratio such that unwanted lateral resonances within the element are shifted to
frequencies
outside of the desired bandwidth oÃthe operation of the device.
[0079] At low frequencies, fine dicing blades can be used to sub-dice array
elements.
At high frequencies, sub-dicing becomes more difficult due to the reduced
dimension of the
array element. For high frequency array design at greater than about 20 MHz,
the idea of
sub-dicing can, at the expense of a larger element pitch, lower the electrical
impedance of a
typical array element, and increase the signal strength and sensitivity of an
array element.
The pitch of an array, can be described with respect to the wavelength of
sound in water at
the center frequency of the device. For example, a wavelength of 50 microns is
a useful
wavelength to use when referring to a transducer with a center frequency of 30
MHz. With
this in mind, a linear array with an element pitch of about and between 0.5X -
2.OA is
acceptable for most applications.
[0080] In one aspect, the piezoelectric layer of the stack of the present
invention has a
pitch of about and between 7.5-300 microns, preferably about and between 10-
150 microns,
and more preferably about and between 15-100 microns. In one example and not
meant to
be limiting, for a 30 MHz array design, the resulting pitch for a 1.5x is
about 74 microns.
[0081] In another aspect, and not meant to be limiting, for a stack with a
piezoelectric
layer of about 60 microns thick having a first kerf slot about 8 microns wide
and spaced 74
microns apart and with a second kerf slot positioned adjacent to at least one
first kerf slot
that also has a kerf width of about 8 microns, results in array sub-elements
with a desirabte
width to height aspect ratio and a 64 element array with a pitch of about
1.5A. If sub-dicing
is not used and all of the respective kerf slots are first kerf slots, then
the array structure can
be constructed and arranged to form a 128 element 0.75Apitch array.
[0082] At high frequencies, when the width of the array elements and of the
kerf slots
scale down to the order of 1-10's of microns, it is desirable in array
fabrication to make
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narrow kerf slots. One skilled in the art will appreciate that narrowing the
kerf slots can
minimize the pitch of the array such that the effects of grating lobes of
energy can be
minimized during normal operation of the array device. Further, by narrowing
the kerf
slots, the element strength and sensitivity are maximized for a given array
pitch by removing
as little of the piezoelectric layer as possible. Using laser machining, the
piezoelectric layer
may be patterned with a fine pitch and maintain mechanical integrity.
[0083] Laser micromachining can be used to extend the plurality of first
and/or second
kerf slots to their predetermined depth into the stack. Laser micromachining
offers a non-
contact method to extend or "dice" the kerf slots. Lasers that can be used to
"dice" the kerf
slots include, for example, visible and ultraviolet wavelength lasers and
lasers with pulse
lengths from 100ns-1 fs, and the like. In one aspect of the disclosed
invention, the heat
affected zone (HAZ) is minimized by using shorter wavelength lasers in the UV
range
and/or picosecond-femtosecond pulse length lasers.
[0084] Laser micromachining can direct a large amount of energy in as small a
volume
as possible in as short a time as possible to locally ablate the surface of a
material. If the
absorption of incident photons occurs over a short enough time period, then
thermal
conduction does not have time to take place. A clean ablated slot is created
with little
residual energy, which avoids localized melting and minimizes thermal damage.
It is
desirable to choose laser conditions that maximize the consumed energy within
the
vaporized region while minimizing damage to the surrounding piezoelectric
laver.
[0085] To minimize the HAZ, the energy density of the absorbed laser pulse can
be
maximized and the energy can be prevented from dissipating within the material
via thermal
conduction mechanisms. Two exemplified types of lasers that can be used are
ultraviolet
(UV) lasers and femtosecond (fs) lasers. UV lasers have a very shallow
absorption depth in
ceramic and therefore the energy is contained in a shallow volume. Fs lasers,
which have a
very short time pulse (about 10-15 s) and therefore the absorption of energy
takes place on
this time scale. In one example, any need to repole the piezoelectric layer
after laser cutting
is not required.
[0086] UV excimer lasers are adapted for the manufacturing of complex micro-
structures for the production of micro-optical-electro-mechanical-systems
(MOEMS) units
such as nozzles, optical devices, sensors and the like. Excimer lasers provide
material
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processing with low thermal damage and with high resolution due to high peak
power
output in short pulses at several ultraviolet wavelengths.
[0087] In general, and as one skilled in the art will appreciate, the ablated
depth for a
given laser micromachining system is strongly dependent on the energy per
pulse and on the
number of pulses. The ablation rate can be almost constant and fairly
independent for a
given laser fluence up to a depth beyond'which the rate decreases rapidly and
saturates to
zero. By controlling the number of pulses per position incident on the
piezoelectric stack, a
predetermined kerf depth as a function of position can be achieved up to the
saturation depth
for a given laser fluence. The saturation depth can be attributed to the
absorption of the
laser energy by the plasma plume (created during the ablation process) and by
the walls of
the laser trench. The plasma in the plume can be denser and more absorbing
when it is
confined within the walls of a deeper trench; in addition, it may take longer
for the plume to
expand. The time between the beginning of the laser pulse and the start of the
plume
attenuation is generally a few nanoseconds at a high fluence. For lasers with
pulse lengths
of 10's of ns, this means that the later portion of the laser beam will
interact with the plume.
The use of picosecond - femtosecond lasers can avoid the interaction of the
laser beam with
the plume.
[0088] In one aspect, the laser used to extend the first or second kerf slots
into or
through the piezoelectric layer is a short wavelength laser such as, for
example, a KrF
Excimer laser system (having, for example, about a 248nm wavelength). Another
example
of a short wavelength laser that may be used is an argon fluoride laser
(having, for example,
about a 193 nm wavelength). In another aspect, the laser used to cut the
piezoelectric layer
is a short pulse length laser. For example, lasers modified to emit a short
pulse length on
the order of ps to fs can be used.
[0089] A KrF excimer laser system (UV light with a wavelength of about 248nm)
with a
fluence range of about and between 0-20 J/cm2 (preferably about and between
0.5 - 10.0
J/cm2 for PZT ceramic) can be used to laser cut kerf slots about and between 1-
30 m wide
(more preferably between 5-10 m wide) through the piezoelectric layer about
and between
1-200 m thick (preferably between 10-150 m thick). The actual thickness of
the
piezoelectric layer is most commonly based on a thickness that ranges from 1/4
A to % X
based on the speed of sound of the material and the intended center frequency
of the array
transducer. As would be clear to one skilled in the art, the choice of backing
layer and
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matching layer(s) and their respective acoustic impedance values dictate the
final thickness
of the piezoelectric layer. The target thickness can be fiuther fine-tuned
based on the
specific width to height aspect ratio of each sub-element of the array, which
would also be
clear to one skilled in the art. The wider the kerÃwidth and the higher the
laser fluence, the
deeper the excimer laser can cut. The number of laser pulses per unit area can
also allow for
a well-defined depth control. In another aspect, a lower fluence laser pulse,
i.e., less than
about 1 J/cm2-10 J/cm2 can be used to laser ablate through polymer based
material and
through thin metal layers.
[0090] As noted above, the plurality of layers can further include a signal
electrode layer
112 and a ground electrode layer 110. The electrodes can be defined by the
application of a
metallization layer (not shown) that covers the dielectric layer and the
exposed area of the
piezoelectric layer. The electrode layers can comprise any metalized surface
as would be
understood by one skilled in the art. A non-limiting example of electrode
material that can
be used is Nickel (Ni). A metalized layer of lower resistance (at 1-100 MHz)
that does not
oxidize can be deposited by thin film deposition techniques such as sputtering
(evaporation,
electroplating, etc.). A Cr/Au combination (300 / 3000 Angstroms respectively)
is an
example of such a lower resistance metalized layer, although thinner and
thicker layers can
also be used: The Cr is used as an interfacial adhesion layer for the Au. As
would be clear
to one skilled in the art, it is contemplated that other conventional
interfacial adhesion layers
well known in the semiconductor and microfabrication fields can be used.
[0091]. At least a portion of the top surface of the signal electrode layer is
connected to
at least a portion of the bottom surface of the piezoelectric layer and at
least a portion of the
top surface of the signal electrode layer is connected to at least a portion
of the bottom
surface of the dielectric layer. In one aspect, the signal electrode is wider
than the opening
defined by the dielectric layer and covers the edge of the dielectric layer in
the areas that are
above the conductive material 404 used to surface mount the stack to the
interposer, as
described herein.
[0092] In one aspect, the signal electrode pattern deposited is one that
covers the entire
surface of the bottom surface of the piezoelectric layer or is a predetermined
pattern of
suitable area that extends across the opening defined by the dielectric layer.
The original
length of the signal electrode may be longer than the fmal length of the
signal electrode.
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The signal electrode may be trimmed (or etched) into a more intricate pattern
that results in
a shorter length.
[0093] A laser (or other material removal techniques such as reactive ion
etching (RIE)
etc.) can be used to remove some of the deposited electrode to create the
final intricate
signal electrode pattern. In one aspect, a signal electrode of simple
rectangular shape, that is
longer than the dielectric gap, is deposited by sputtering (300/3000 Cr/Au
respectively -
although thicker and thinner layers are contemplated). The signal electrode is
then patterned
by means of a laser.
[0094] A shadow mask and standard 'wet bencll' photolithographic processes can
also
be used to directly create the same, or similar, signal electrode pattern,
which is of more
intricate detail.
[0095] In another aspect, at least a portion of the bottom surface of the
ground electrode
layer is connected to at least a portion of the top surface of the
piezoelectric layer. At least a
portion of the top surface of the ground electrode layer is connected to at
least a portion of
the bottom surface of a first matching layer 116. In one aspect, the ground
electrode layer is
at least as long as the second predetermined length of the opening defined by
the dielectric
layer in a lengthwise direction substantially parallel to the longitudinal
axis of the stack. In
another aspect, the ground electrode layer is at least as long as the first
predetermined length
of each first kerf slot in a lengthwise direction substantially parallel to
the longitudinal axis
of the stack. In yet another aspect, the ground electrode layer connectively
overlies
substantially all of the top surface of the piezoelectric layer.
[0096] In one aspect, the ground electrode layer is at least as long as the
first
predetermined length of each first kerf slot (as described above) and the
third predetermined
length of each second kerf slot in a lengthwise direction substantially
parallel to the
longitudinal axis of the stack. In one aspect, part of the ground electrode
typically remains
exposed in order to allow for the signal ground to be connected from the
ground electrode to
the signal ground trace (or traces) on the interposer 402 (described below).
[0097] In one example, the electrodes, both signal and ground, can be applied
by a
physical deposition technique (evaporation or sputtering) although other
processes such as,
for example, electroplating, can also be used. In a preferred aspect, a
conformal coating
technique is used, such as sputtering, to achieve good step coverage in the
areas in the
vicinity to the edge of the dielectric layer.
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[0098] As noted above, in the regions where there is no dielectric layer, the
f-ull potential
of the electric signal applied to the signal electrode and the ground
electrode exists across
the piezoelectric layer. In the regions where there is a dielectric layer, the
full potential of
the electric signal is distributed across the thickness of the dielectric
layer and the thickness
of the piezoelectric layer. In one aspect, the ratio of electric potential
across the dielectric
layer to electric potential across the piezoelectric layer is proportional to
the thickness of the
dielectric layer to the thiclrness of the piezoelectric layer and is inversely
proportional to the
dielectric constant of the dielectric layer to the dielectric constant of the
piezoelectric layer.
[0099] The plurality of layers of the stack can further comprise at least one
matching
layer having a top surface and an opposed bottom surface. In one aspect, the
plurality of
layers comprises two such matching layers. At least a portion of the bottom
surface of the
first matching layer 116 can be connected to at least a portion of the top
surface of the
piezoelectric layer. If a second matching layer 126 is used, at least a
portion of the bottom
surface of the second matching layer is connected to at least a portion of the
top surface of
the first matching layer. The matching layer(s) can be at least as long as the
second
predetermined length of the opening defined by the dielectric layer in a
lengthwise direction
substantially parallel to the longitudinal axis of the stack.
[00100] The matching layer(s) has a predetermined acoustic impedance and
target
thickness. For example, powder (vol%) mixed with epoxy can be used to create a
predetermined acoustic impedance. The matching layer(s) can be applied to the
top surface
of the piezoelectric layer, allowed to cure and then lapped to the correct
target thickness.
[00101] One skilled in the art will appreciate that the matching layer(s) can
have a
thickness that is usually equal to about or around equal to %4 of a wavelength
of sound, at
the center frequency of the device, within the matching layer material itself
The specific
thickness range of the matching layers depends on the actual choice of layers,
their specific
material properties, and the intended center frequency of the device. In one
example and not
meant to be liniiting, for polymer based matching layer materials, and at 30
MHz, this
results in a preferred thickness value of about 15-25um.
[001021 In one aspect, the matching layer(s) can comprise PZT 30% by volume
mixed
with 301-2 Epotek epoxy having an acoustic impedance of about 8 Mrayl. In one
aspect, the
acoustic impedance can be between about 8-9 Mrayl, in another aspect, the
impedance can
be between about 3-10 Mrayl, and, in yet another aspect, the impedance can be
between
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about 1-33 Mrayl. The preparation of the powder loaded epoxy and the
subsequent curing
of the material onto the top face of the piezoelectric layer such that there
are substantially no
air pockets within the layer is known to one skilled in the art. The epoxy can
be initially
degassed, the powder mixed in and then the mixture degassed a second time. The
mixture
can be applied to the surface of the piezoelectric layer at a setpoint
temperature that is
elevated from room temperature (20 - 200 C) with 80 C being used for 301-2
epoxy. The
epoxy generally cures in 2 hours. In one aspect and not meant to be limiting,
the thickness
of the first matching layer is about %4 wavelength and is about 20 m thick
for 30% by
volume PZT in 301-2 epoxy.
[00103] The plurality of layers of the stack can further comprise a backing
layer 114
having a top surface and an opposed bottom surface. In one aspect, the backing
layer
substantially, fills the opening defined by the dielectric layer. In another
aspect, at least a
portion of the top surface of the backing layer is connected to at least a
portion of the bottom
surface of the dielectric layer. In a further aspect, substantially all of the
bottom surface of
the dielectric layer is connected to at least a portion of top surface of the
backing layer. In
yet another aspect, at least a portion of the top surface of the backing layer
is connected to at
least a portion of the bottom surface of the. piezoelectric layer.
[00104] As one skilled in the art will appreciate, the matching and backing
layers can be
selected from materials with acoustic impedance between that of air and/or
water and that of
the piezoelectric layer. In addition, as one skilled in the art will
appreciate, an epoxy or
polymer can be mixed with metal and/or ceramic powder of various compositions
and ratios
to create a material of variable acoustic impedance and attenuation. Any such
combinations
of materials are contemplated in this disclosure. The choice of matching
layer(s), ranging
from 1-6 discrete layers to one gradually changing layer, and backing
layer(s), ranging from
0-5 discrete layers to one gradually changing layer alters the thickness of
the piezoelectric
layer for a specific center frequency.
[00105] In one aspect, for a 30 MHz piezoelectric array transducer with two
matching
layers and one backing layer the thickness of the piezoelectric layer is
between about 50 m
to about 60 ,um. In other non-limiting examples, the thickness can range
between about 40
m to 75 m. For transducers with center frequencies in the range of 25-50 MHz
and for a
different number of matching and backing layers, the thickness of the
piezoelectric layer is
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scaled accordingly based on the knowledge of the materials being used and one
skilled in
the art of transducer design can determine the appropriate dimensions.
[00106] A laser can be used to modify one (or both) surface(s) of the
piezoelectric layer.
One such modification can be the creation of a curved ceramic surface prior to
the
application of the matching and backing layers. This is an extension of the
variable depth
control methodology of laser cutting applied in two dimensions. After curving
the surface
with the 2-dimentional removal of material, a metallization layer (not shown)
can be
deposited. A re-poling of the piezoelectric layer can also be used to realign
the electric
dipoles of the piezoelectric layer material.
[00107] rn one aspect, a lens 302 can be positioned in substantial overlying
registration
with the top surface of the layer that is the uppermost layer of the stack.
The lens can be
used for focusing the acoustic energy. The lens can be made of a polymeric
material as
would be known to one skilled in the art. For example, a preformed or
prefabricated piece
of Rexolite which has three flat sides and one curved face can be used as a
lens. The radius
of curvature (R) is determined by the intended focal length of the acoustic
lens. For
example not meant to be limiting, the lens can be conventionally shaped using
computerized
numerical control equipment, laser machining, molding, and the like. In one
aspect, the
radius of curvature is large enough such that the width of the curvature (WC)
is at least as
wide as the opening defined by the dielectric layer.
[00108] In one preferred aspect, the minimum thickness of the lens
substantially overlies
the center of the opening or gap defined by the dielectric layer. Further, the
width of the
curvature is greater than the opening or gap defined by the dielectric layer.
In one aspect,
the length of the lens can be wider than the length of a kerf slot allowing
for all of the kerf
slots to be protected and sealed once the lens is mounted on the top of the
transducer device.
[00109] In one aspect, the flat face of the lens can be coated with an
adhesive layer to
provide for bonding the lens to the stack. In one example, the adhesive layer
can be a SU-8
photoresist layer that serves to bond the lens to the stack. One will
appreciate that the
applied adhesive layer can also act as a second matching layer 126 provided
that the
thickness of the adhesive layer applied to the bottom face of the lens is of
an appropriate
wavelength in thickness (such as, for example 1/4 wavelength in thickness).
The thickness of
the exemplified SU-8 layer can be controlled by normal thin film deposition
techniques
(such as, for example, spin coating).
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[00110] A film of SU-8 becomes sticky (tacky) when the temperature of the
coating is,
raised to about 60-85 C. At temperatures higher than 85 C, the surface
topology of the SU-
8 layer may start to change. Therefore in a preferred aspect this process is
performed at a set
point temperature of 80 C. Since the SU-8 layer is already in solid form, and
the elevated
temperature only causes the layer to become taclcy, then once the layer is
attached to the
stack, the applied SU-8 does not flow down the kerfs of the array. This
maintains the
physical gap and mechanical isolation between the formed array elements.
[00111] To avoid trapping air in between the SU-8 layer and the first matching
layer, it is
preferred that this bonding process take place in a partial vacuum. After the
bonding has
taken place, and the sample cooled to room temperature, a UV exposure of the
SU-8 layer
(through the Rexolite layer) can be used to cross link the SU-8, to make the
layer more rigid,
and to improve adhesion.
[00112] Prior to mounting the lens onto the stack, the SU-8 layer and the lens
can be laser
cut, which effectively extends the array kerfs (first and/or second array kerf
slots), and in
one aspect, the sub-diced or second kerfs, through both matching layers (or if
two matching
layers are used) and into the lens. If the SU-8 and lens are laser cut, a pick
and place
machine (or an alignment jig that is sized and shaped to the particular size
and shape of the
actual components being bonded together) can be used to align the lens in both
X and Y on
the uppermost surface of the top layer of the stack. To laser cut the SU-8 and
lens the laser
fluence of approximately 1-5 J/cm2 can be used.
[00113] At least one first kerf slot can extend through or into at least one
layer to reach
its predetermined depth/depth profile in the stack. Some or all of the layers
of the stack can
be cut through or into substantially simultaneously. Thus, a plurality of the
layers can be
selectively cut through substantially at the same time. Moreover, several
layers can be
selectively cut through at one time, and other layers can be selectively cut
through at
subsequent times, as would be clear to one skilled in the art. In one aspect,
at least a portion
of at least one first and/or second kerf slot extends to a predetermined depth
that is at least
60% of the distance from the top surface of the piezoelectric layer to the
bottom surface of
the piezoelectric layer and at least a portion of at least one first and/or
second kerf slot can
extend to a predetermined depth that is 100% of the distance from the top
surface of the
piezoelectric layer to the bottom surface of the piezoelectric layer.
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[00114] At least a portion of at least one first kerf slot can extend to a
predetermined
depth into the dielectric layer and at least a portion of one first kerf slot
can also extend to a
predetermined depth into the backing layer. As would be clear to one skilled
in the art, the
predetermined depth into the backing layer can vary from 0 microns to a depth
that is equal
to or greater than the thickness of the piezoelectric layer itself. Laser
micromachining
through the backing layer can provide a significant improvement in isolation
between
adjacent elements. In one aspect, at least a portion of one first kerf slot
extends through at
least one layer and extends to a predetermined depth into the backing layer.
As described
herein, the predetermined depth into the backing layer may vary. The
predetermined depth
of at least a portion of at least one first kerf slot can vary in comparison
to the predeterrnined
depth of another portion of that same respective kerf slot or to a
predetermined depth of at
least a portion of another kerf slot in a lengthwise direction substantially
parallel to the
longitudinal axis of the stack. In another aspect, the predetermined depth of
at least one first
kerf slot can be deeper than the predetermined depth of at least one other
kerf slot.
[00115] As described above, at least one second kerf slot can extend through
at least one
layer to reach its predetermined depth in the stack as described above for the
first kerf slots.
The second kerf slots can extend into or through at least one layer of the
stack as described
above for the first kerf slots. If layers of the stack are cut independently,
each kerf slot in a
given layer of the stack, whether a first or second kerf slot can be in
substantial overlying
registration with its corresponding slot in an adjacent layer.
[00116] In a preferred methodology, the kerf slots are laser cut into the
piezoelectric layer
after the stack has been mounted onto the interposer and a backing layer has
been applied.
[00117] The ultrasonic transducer can further comprise an interposer 402
having a top
surface and an opposed bottom surface. In one aspect, the interposer defines a
second
opening extending a fourth predetermined length L4 in a direction
substantially parallel to
the longitudinal axis Ls of the stack. The second opening allows for easy
application of the
backing layer to the bottom surface of the piezoelectric stack.
[00118] A plurality of electrical traces 406 can be positioned on the top
surface of the
interposer in a predetermined pattern and the signal electrode layer 112 can
also define an
electrode pattern. The stack, including the signal electrode 112 with a
defined electrode
pattern, can be mounted in substantial overlying registration with the
interposer 402 such
that the electrode pattern defined by the signal electrode layer is
electrically coupled with
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the predetermined pattern of electrical traces positioned on the top surface
of the interposer.
The interposer can also act as a redistribution layer for electrical leads to
the individual
elements of the array. The ground electrode 110 of the array can be connected
to the traces
on the interposer reserved for ground connections. These connections can be
made in
advance of attaching the lens, if a lens is used. If the area of the lens
material is small
enough such that a part of the ground electrode is still exposed, however, the
connections
can be made after the lens is attached. There are many conducting epoxies and
paints that
can be used to make these connections that are well known by someone skilled
in the art.
Wirebonding can also be used to make these connections as would be clear to
one skilled in
the art. For example, wirebonding can be used to make connections from the
interposer to a
flex circuit and to make connections from the stack to the interposer. Thus,
it is
contemplated that surface mounting can be performed using methods known in the
art, for
example, and not meant to be limiting, by using, an electrically conducting
surface mount
material, including but not limited to solder, or by using wirebonding.
[00119] The backing material 114 can be made as described herein. In one non-
limiting
example, the backing material can be made from powder (vol%) mixed with epoxy
which
can be used to create a predetermined acoustic impedance. PZT 30% mixed with
301-2
Epotek epoxy has acoustic impedance of 8 Mrayl, and is non-conducting. When
using an
epoxy based backing, where some curing in-situ within the second opening
defined by the
interposer takes place, the use of a rigid plate bonded to the top surface of
the stack can be
used to help minimize warping of the stack. The epoxy-based backing layer can
be
composed of other powders such as, for example, tungsten, alumina, and the
like. It will be
appreciated that other conventional backing materials are contemplated such
as, for example
and not meant to be limiting, a conductive silver epoxy.
[00120] To reduce the amount of material that needs to be cured in-situ, a
backing layer
can be prefabricated and cut to an appropriate size after it has cured such
that it fits through
the opening defined by the interposer. The top surface of the prefabricated
backing can be
coated with a fresh layer of backing material (or other adhesive) and be
located in the
second opening defined by the interposer. By reducing the amount of material
curing in-
situ, the amount of residual stress induced within the stack can be reduced
and the surface of
the piezoelectric can remain substantially flat or planar. The rigid plate can
be removed after
the bonding of the backing is complete.
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[00121] The array of the present invention can be of any shape as would be
clear to one
of skill in the art and includes linear arrays, sparse linear arrays, 1.5
Dimensional arrays, and
the like.
Exemplified Methodology for Fabricating an Ultrasonic Array
[00122] Provided herein is a method of fabricating an ultrasonic array,
comprising cutting
a piezoelectric layer 106 with a laser, wherein said piezoelectric layer
resonates at a high
ultrasonic transmit frequency. Also provided herein, is a method of
fabricating an ultrasonic
array comprising cutting a piezoelectric layer with a laser, wherein the
piezoelectric layer
resonates at an ultrasonic transmit center frequency of about 30 MHz. Further
provided
herein, is a method of fabricating an ultrasonic array comprising cutting a
piezoelectric layer
with a laser, wherein said piezoelectric layer resonates at an ultrasonic
transmit frequency of
about and between 10-200 MHz, preferably about and between, 20-150 MHz, and
more
preferably about and between 25-100 MHz.
[00123] Also provided herein is, a method of fabricating an ultrasonic array
by cutting the
piezoelectric layer with a laser so that the heat affected zone is minimized.
Also discussed
is a method of fabricating an ultrasonic array comprising cutting the
piezoelectric layer with
a laser so that re-poling (post laser micromachining) is not required.
[00124] Provided herein is a method wherein the "dicing" of all functional
layers can be
achieved in one or a series of consecutive steps. Further provided herein is a
method of
fabricating an ultrasonic array that includes cutting a piezoelectric layer
with a laser so that
the piezoelectric layer resonates at a high ultrasonic transmit frequency. In
one example, the
laser cuts additional layers other than the piezoelectric layer. In another
example, the
piezoelectric layer and the additional layers are cut at substantially the
same time, or
substantially simultaneously. Additional layers cut can include, but are not
limited to,
temporary protective layers, an acoustic lens 302, matching layers 116 and/or
126, backing
layers 114, photoresist layers, conductive epoxies, adhesive layers, polymer
layers, metal
layers, electrode layers 110 and/or 112, and the like. Some or all of the
layers can be cut
through substantially simultaneously. Thus, a plurality of the layers can be
selectively cut
through substantially at the same time. Moreover, several layers can be
selectively cut
through at one time, and other layers can be selectively cut through at
subsequent times, as
would be clear to one skilled in the art.
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[00125] Further provided is a method wherein a laser cuts first though at
least a
piezoelectric layer and second through a backing layer where both the top and
bottom faces
of the stack are exposed to air. The stack 100 can be attached to a mechanical
support or
interposer 402 that defines a hole or opening located below the area of the
stack in order to
retain access to the bottom surface of the stack. The interposer can also act
as a
redistribution layer for electrical leads to the individual elements of the
array. In one
example, after the laser cuts are made through the stack mounted onto the
interposer,
additional backing material can be deposited into the second opening defined
by the
interposer to increase the thickness of the backing layer.
[00126] Of course, the disclosed method is not limited to a single cut by the
laser, and as
would be clear to one skilled in the art, multiple additional cuts can be made
by the laser,
through one or more disclosed layers.
[00127] Further provided is a method of fabricating an ultrasonic array that
includes
cutting a piezoelectric layer with a laser so that the piezoelectric layer
resonates. at a high
ultrasonic transmit frequency. In this embodiment, the laser cuts portions of
the
piezoelectric layer to different depths. The laser may, for example, cut to at
least one depth,
or several different depths. Each depth of laser cut can be considered as a
separate region of
the array structure. For example, one region can require the laser to cut
through the
matching layer, electrode layers, the piezoelectric layer and the backing
layer, and a second
region can require the laser to cut through the matching layer, the electrode
layers, the
piezoelectric layer, the dielectric layer 108, and the like.
[00128] In one aspect of the disclosed method, both the top and bottom
surfaces of a pre-
diced assembled stack are exposed and the laser machining can take place from
either (or
both) surface(s). In this example, having both surfaces exposed allows for
cleaner and
straighter kerf edges to be created by laser machining. Once the laser beam
"punches
through," then the beam can clean the edges of the cut since the machining
process no
longer relies on material being ejected out from the entry point and the
interaction with the
plume for the deepest part of the cut can be minimized:
[00129] Further provided is a method wherein the laser can also pattern other
piezoelectric layers. In addition to PZT piezoelectric ceramic, ceramic
polymer composite
layers can be fabricated and lapped to similar thicknesses as described about
using
techniques known in the art such as, for example, by interdigitation methods.
For example,
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2-2 and 3-1 ceramic polymer composites can be made with a ceramic width and a
ceramic-
to-ceramic spacing on the order of the pitch required for an array. The
polymer filler can be
removed and element-to-element cross talk of the array can be reduced. The
fluence
required to remove a polymer material is lower than that required for ceramic,
and therefore
an excimer laser represents a suitable tool for the removal of the polymer in
a polymer-
ceramic composite to create an array structure with air kerfs. In this case,
within the active
area of the array. (where the polymer is being removed), the 2-2 composite can
be used as a
1-phase ceramic. Alternatively, one axis of connectivity of the polymer in a 3-
1 composite
can be removed.
[00130] Another approach for the 2-2 composite can be to laser micro machine
the cuts
perpendicular to the orientation of the 2-2 composite. The result can be a
structure similar
to the one created using the 3-1 composite since the array elemeiits would be
a
ceramic/polymer composite. This approach can be machined with a higher fluence
since
both ceramic and polymer can be ablated at the same time.
[00131] The surface of the sample being laser ablated can be protected from
debris being
deposited on the sample during the laser process itself. In this example, a
protective layer
can be disposed on the top surface of the stack assembly. The protective layer
may be
temporary and can be removed after the laser processing. The protective layer
may be a
soluble layer such as, for example, a conventional resist layer. For example,
when the top
surface is a thin metal layer the protective layer acts to prevent the metal
from peeling or
flaking,off. As one skilled in the art will appreciate, other soluble layers
that can remain
adhered to the sample despite the high laser fluence and the high density of
laser cuts and
that can still be removed from the surface after laser cutting can be used.
Example
[00132] The following example is put forth so as to provide those of ordinary
skill in the
art with a complete disclosure and description of an ultrasonic array
transducer and the
methods as claimed herein, and is intended to be purely exemplary of the
invention and are
not intended to limit the scope of what the inventors regard as their
invention.
[00133] An exemplary method for fabricating an exemplary high-frequency
ultrasonic
array using laser micromachining is shown in figures 12a-12g. First, a pre-
poled
piezoelectric stru.cture with an electrode on its top and bottom surfaces is
provided. An
exemplary structure is model PZT 3203HD (part number KSN6579C), distributed by
CTS
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Communications Components Inc (Bloomingdale, IL). In one aspect, the electrode
on the
top surface of the piezoelectric becomes the ground electrode 110 of the array
and the
electrode on the bottom surface is removed and replaced with a dielectric
layer 108. An
electrode can be subsequently deposited onto the bottom surface of the
piezoelectric, which
becomes the signal electrode 112 of the array.
[00134] Optionally, a metalized layer of lower resistance (at 1-100 MHz) that
does not
oxidize is deposited by thin film deposition techniques such as sputtering,
evaporation,
electroplating, etc. A non-limiting example of such a metalized layer is a
Cr/Au
combination. If this layer is used, the Cr is used as an adhesion layer for
the Au.
Optionally, for ceramic piezolelectrics (such as PZT), the natural surface
roughness of the
structure form the manufacturer may be larger than desired. For improved
accuracy/precision in achieving the piezoelectric layer 106 target thickness,
the top surface
of the piezoelectric structure may be lapped to a smooth finish and an
electrode applied to
the lapped surface.
[00135] Next, a first matching layer 116 is applied to top surface of the
piezoelectric
structure. In one aspect, part of the top electrode remains exposed to allow
for the signal
ground to be connected from the top electrode to the signal ground trace (or
traces) on an
underlying interposer 402. The matching layer is applied to the top surface of
the
piezoelectric structure, allowed to cure and is then lapped to the target
thickness. One non-
limiting example of a matching.layer material used was PZT 30% mixed with 301-
2 Epotek
epoxy that had an acoustic impedance of about 8 Mrayl. In some examples a
range of 7-9
Myral is desired for the first layer. In other examples, a range of 1-33 Mryal
can be used.
The powder loaded epoxy is prepared and cured onto the top face of the
piezoelectric
structure such that there are substantially no air pockets within the first
matching layer. In
one non-limiting example, the 301-2 epoxy was first degassed, the powder was
mixed in,
and the mixture was degassed a second time. The mixture is applied to the
surface of the
piezoelectric structure at a setpoint temperature that is elevated from room
temperature. In
this aspect, the matching layer has a desired acoustic impedance of 7-9 Mryal
and target
thickness of about 114 wavelength which is about 20 m thick for 30% PZT in
301-2 epoxy.
Optionally, powders of different compositions and of appropriate (vol%) mixed
with
different epoxies of desired viscosity can be used to create the desired
acoustic impedance.
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[00136] Optionally, a metalized layer can be applied to the top of the lapped
matching
layer that connects to the top electrode of the piezoelectric structure. This
additional metal
layer serves as a redundant grounding layer that will help with electrical
shielding.
[00137] The bottom surface of the piezoelectric structure is lapped to achieve
the target
tliickness of the piezoelectric layer 106 suitable to create a device with the
desired center
frequency of operation when the stack is in its completed form. The desired
thickness is
dependent on the choice of layers of the stack, their material composition and
the fabricated
geometry and dimensions. The thickness of the piezoelectric layer is affected
by the acoustic
impedance of the other layers in the stack and by the width-to-height ratio of
the array
elements 120 that are defined by the combination of the pitch of the array and
the kerf width
of the array element kerfs 118 and of the sub-diced kerfs 122. For example,
for a 301VIHz
piezoelectric array with two matching layers and a backing, lay_er the target
thickness of
piezoelectric lay_er was about 60 m. In another exarnple, the target
thickness is about 50-70
m. For frequencies in the range of 25-50 MHz the values are scaled accordingly
based on
the knowledge of the materials being used as would be known to one skilled in
the art.
[00138] A dielectric layer 108 is applied to at least a portion of the bottom
surface of the
lapped piezoelectric layer. The applied dielectric layer defines an opening in
the central
region of the piezoelectric layer (underneath the area covered by the matching
layer). One
will appreciate, that the opening defined by the dielectric layer also defines
the elevation
dimension of the array. In one exemplified example, to form the dielectric
layer, SU-8 resist
formulations (MicroChem, Newton, MA) that are designed to be spin coated onto
flat
surfaces and represents are used. By controlling the spin speed, time of
spinning and
heating (all standard parameters known to the art of spin coating and thin
film deposition) a
uniform thickness can be achieved. SU-8 formulations are also photo-imageable
and thus
by means of standard photolithography, the dielectric layer is patterned and a
gap of desired
width and breath was etched out of the resist to form the opening in the
dielectric layer.
Optionally, a negative resist formulation is used such that the areas of the
resist that are
exposed to UV radiation are not removed during the etching process to create
the opening of
the dielectric layer (or any general pattern).
[00139] Adhesion of the dielectric layer to the bottom surface of the
piezoelectric layer is
enhanced by a post UV exposure. The additional UV exposure after the etching
process
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improves the cross linking within the SU-8 layer and increases the adhesion
and chemical
resistance of the dielectric layer.
[00140] Optionally, a mechanical support can be used to prevent cracking of
the stack
100 during the dielectric layer application process. In this aspect, the
mechanical support is
applied to the first matching layer by spinning an SU-8 layer onto the
mechanical support
itself. The mechanical support can be used during, the deposition of the SU-8
dielectric, the
spinning, the baking, the initial UV exposure and the development of the
resist. In one
aspect, the mechanical support is removed prior to the second UV exposure as
the SU-8
layer acts as a support unto itself.
[00141] Next, a signal electrode layer 112 is applied to the lapped bottom
surface of the
piezoelectric layer and to the bottom surface of the dielectric layer. The
signal electrode
layer is wider than the opening defined by the dielectric layer and covers the
edge of the
patterned dielectric layer in the areas that overlie the conductive material
used to surface
mount the stack to the underlying interposer. The signal electrode layer is
typically applied
by a conventional physical deposition technique such as evaporation or
sputtering, although
other processes can be used such as electroplating. In another example, a
conventional
conformal coating technique such as sputtering is used in order to achieve
good step
coverage in the areas in the vicinity to the edge of the dielectric layer. In
one example, the
signal electrode layer covers the entire surface of the bottom face of the
stack or forms a
rectangular pattern centered across the opening defied by dielectric layer.
The signal
electrode layer is then patterned by means of a laser.
[00142] In one aspect, the original length of the signal electrode layer is
longer than the
final length of the signal electrode. The signal electrode is trimmed (or
etched) into a more
intricate pattern to form a shorter length. One will appreciate that a shadow
mask or
standard photolithographic process can be used to deposit a pattern of more
intricate detail.
Further, a laser or another material removal technique, such as reactive ion
etching (RlE),
for example, can also be used to remove some of the deposited signal electrode
to create a
similar intricate pattern.
[00143] In the region where there is no dielectric layer, the full potential
of the electric
signal applied to the signal electrode and the ground electrode exists across
the piezoelectric
layer. In the regions where there is a dielectric layer, the full potential of
the electric signal
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is distributed across the thiclcness of the dielectric layer and the thickness
of the
piezoelectric layer.
[00144] Next, the staclc is mounted onto a mechanical support such that upper
surface of
the first matching layer is bonded to the mechanical support and the bottom
face of the stack
is exposed. In one aspect, the mechanical support is larger in surface
dimension than the
stack. In another aspect, in the areas of the mechanical support that are
still visible when
viewed from the top (i.e., the perimeter of the support) there are markings
that are used for
alignment purposes during surface mounting of the stack onto an interposer.
For example,
the mechanical support can be, but is not limited to, an interposer. One
example of such an
interposer is a 64-element 74 m pitch array (1.51ambda at 30MHz), part number
GK3907_3A, which can be obtained from Gennum Corporation (Burlington, Ontario,
Canada). When the mechanical support and the interposer are identical, the two
edges of
the opening defined by the dielectric layer can be oriented perpendicular to
the metal traces
on the support so that the stack can be properly oriented with respect to the
metal traces on
the interposer during a surface mounting step.
[00145] In one aspect, any (or all) external traces on the interposer are used
as aligmnent
markings. These markings allow for the determination of the orientation of the
opening
defined by the dielectric layer with respect to the markings on the mechanical
support in
both X-Y axes. In another aspect, the alignment markers on the mechanical
support are
placed on a portion of the surface of the stack itself. For example, alignment
marks can be
placed on the stack during the deposition of the ground electrode layer.
[00146] As noted above, an electrode pattern is created on the bottom surface
of the
signal electrode layer, which is located on the bottom face of the stack, and
is patterned with
a laser. The depth of the laser cut is deep enough to remove a portion of the
electrode. One
skilled in the art will appreciate that this laser micromachining process step
is similar to the
use of lasers to trim electrical traces on surface resistors and on circuit
boards or flex
circuits. In one aspect, using the markings on the perimeter of the mechanical
support as a
reference, the X-Y axes of the laser beam are defined with a known relation to
the opening
defined by the dielectric layer. The laser trimmed pattern is oriented in a
manner such that
the pattern can be superimposed on top of the metal trace pattern that is
defmed on the
interposer. The Y axis alignment of the trimmed signal electrode pattern to
the signal trace
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pattern of the interposer is important and in one aspect misalignxnent is no
more that 1 f-ull
array element pitch.
[00147] A KrF excimer laser used in projection etch mode with a shadow mask
can be
used to create a desired electrode pattern. For example, a Lumonics
(Farmington Hills, MI)
EX-844, FWHM = 20ns can be used. In one aspect, a homogenous central part of
the
excimer laser beam cut out by using a rectangular aperture passes through a
beam
attenuator, double telescopic system and a thin metal mask, and imaged onto
the surface of
the specimen mounted on a computer controlled x-y-z stage with a 3-lens
projection system
(<_1.5 ,m resolution) of 86.9mm effective focal length. In one aspect, the
reduction ratio of
the mask projection system can be fixed to 10:1.
[00148] In one aspect, two sets of features are trimmed into the signal
electrode on the
stack. Leadfinger features are trimmed into the signal electrode on the stack
to provide
electrical continuity from the interposer to the active area of the
piezoelectric layer defined
by the opening defined by the dielectric layer. In the process of making these
leadfingers,
the final length of the signal electrode can be created. Narrow lines are also
trimmed into
the signal electrode on the stack to electrically isolate each leadfinger.
[00149] By mounting the stack onto a mechanical support interposer (of exact
dimension
and form as the actual interposer) and orienting the laser trimmed signal
electrode pattern
with respect to the externally visible metal pattern on the mechanical support
allows the
trimmed signal electrode pattern to be automatically aligned to the traces on
the actual
interposer. This makes surface mounting alignment simple with the use of ajig
that aligns
the edges of the two mechanical support interposer and actual interposer
during surface
mounting. After the surface mounting process is complete, the mechanical
support
interposer is removed. For the surface mounting process, materials 404 can be
used that are
known in the art, including, for example, low temperature perform Indium
solder that can be
obtained from Indium Corporation of America (Utica, NY).
[00150] Next, backing material 114 is applied to the formed stack. If an epoxy
based
backing is used, and wherein some curing in-situ within the hole of the
interposer takes
place, the use of a rigid plate bonded to the top surface of the stack can be
used to avoid
warping of the stack. The plate can be removed once the curing of the backing
layer is
complete. In one aspect, a combination of backing material properties that
includes a high
acoustic attenuation, and a large enough thickness, is selected such that the
backing layer
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behaves as close to a 100% absorbing material as possible. The backing layer
does not
cause electrical shorting between array elements.
[00151] The ground electrode of the stack is connected to the traces on the
interposer
reserved for ground connections. There are many exemplary conducting epoxies
and paints
that can be used to make this connection that are well known by someone
skilled in the art.
In one aspect, the traces from the interposer are connected to an even larger
footprint circuit
platform made from flex circuit or other PCB materials that allows for the
integration of the
array with an appropriate beaniformer electronics necessary to operate the
device in real
time for generating a real time ultrasound image as would be known to one
skilled in the art.
These electrical connections can be made using several techniques known in the
art such as
solder, wirebonding, and anisotropic conductive films (ACF).
[001521 In one aspect, array elements 120 and sub-elements 124 can be formed
by
aligning a laser beam such that array kerf slots are oriented and aligned (in
both X and Y)
with respect to the bottom electrode pattern in the stack. Optionally, the
laser cut kerfs
extend into the underlying backing layer.
[00153] In one aspect, a lens 302 is positioned in substantial overlying
registration with
the top surface of the layer that is the uppemiost layer of the stack. In
another aspect, the
minimum thickness of the lens substantially overlies the center of the opening
defined by
the dielectric layer. In a further aspect, the width of the curvature is
greater than the opening
defined by the dielectric layer. The length of the lens can be wider than the
length of an
underlying kerf slot allowing for all of the kerf slots to be protected and
sealed once the lens
is mounted on the top of the transducer device.
[00154] In one aspect, the bottom, flat face of the lens can be coated with an
adhesive
layer to provide for bonding the lens to the formed and cut stack. In one
example, the
adhesive layer can by a SU-8 photoresist layer that serves to bond the lens to
the stack.
[00155] One will appreciate that the applied adhesive layer can also act as a
second
matching layer 126 provided that the thickness of the adhesive layer applied
to the bottom
face of the lens is of an appropriate wavelength in thickness (such as, for
example i/4
wavelength in thickness). The thickness of the exemplified SU-8 layer can be
controlled by
normal thin film deposition techniques (such as, for example, spin coating).
[00156] A film of SU-8 becomes sticky (tacky) when the temperature of the
coating is
raised to about 60-85 C. At temperatures higher than 85 C, the surface
topology of the SU-
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8 layer may start to change. Therefore, in a preferred aspect, this process is
performed at a
set point temperature of SO C. Since the SU-8 layer is already in solid form,
and the
elevated temperature only causes the layer to become tacky, then once the
adhesive layer is
attached to the stack, the applied SU-8 does not flow down the kerfs of the
array. This
maintains the physical gap and mechanical isolation between the formed array
elements. To
avoid trapping air in between the adhesive layer and the first matching layer,
it is preferred
that this bonding process take place in a partial vacuum. In one aspect, after
the bonding
has taken place, and the sample cooled to room temperature, a UV exposure of
the SU-8
layer (through the attached lens) is used to cross link the SU-8, to make the
layer more rigid,
and to improve adhesion.
[00157] In another aspect, prior to mounting the lens onto the stack, the SU-8
layer and
the lens can be laser cut, which effectively extends the array kerfs (first
and/or second array
kerf slots), and in one aspect, the sub-diced or second kerfs, through both
matching layers
(or if two matching layers are used) and into the lens.
[00158] Referring now to Figures 16 - 24, in an alternative embodiment of the
ultrasound
transducer of the present invention, a PZT stack is disclosed that allows for
a super wide
bandwidth response while maintaining a relatively simple combination of layers
within the
stack itself. For medical or research imaging transducers, one desired
characteristic of
transducer, or of the PZT stack design, is to have a broadband frequency
response (or a short
time response in the time domain).
[00159] In the present invention, as noted above, such a broadband frequency
response is
controlled by the use of a backing layer that is attached to the bottom face
of the
piezoelectric layer of the PZT stack to dampen the response of the transducer.
It is fiu-ther
controlled by the use of a properly designed set of wave matching layers onto
the top face of
the piezoelectric layer. Usually the number of matching layers varies from 1-3
layers,
although more layers are possible. As one skilled in the art will appreciate,
the material
properties of all these layers, including the acoustic impedance, speed of
sound, elastic
compliance and thickness play primary roles in the design of the piezoelectric
stack.
[00160] Further, the ability to fabricate a piezoelectric stack becomes
increasingly tricky
to manage as the number of layers increases and as the design centre frequency
of the
transducer increases. In one example and not meant to be limiting, at 30 MHz,
the thickness
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of the matching layers may be in the range of 1-60 microns in thickness and
depends on the
particular material parameters of each selected matching layer.
[00161] In this alternative embodiment, a design for a ultrasonic transducer
is provided
that comprises a matching layer, disposed within a PZT stack, which has the
same material
parameters, such as, for example, acoustic impedance, as the piezoelectric
layer itself. In
one exemplary aspect disclosed below, a PZT stack having a determined acoustic
impedance
is provided that is connected to an unpoled PZT matching layer. In this
aspect, the acoustic
impedance of the PZT stack and the unpoled PZT matching layer are
substantially equal.
[00162] Exemplary results are provided and illustrate the effectiveness of the
alternative
embodiment of the transducer. The analysis was conducted using PZFIex
(Weidlinger
Associates Inc.) finite element analysis ("FEA"). With the PZT-PZT stack of
the present
embodiment, 1-way, bandwidths of > 100% are possible. As one skilled in the
art will
appreciate, to achieve bandwidths of this nature usually requires stacks that
include 3
quarter wave matching layers, each layer of decreasing acoustic impedance.
[00163] Further, PZT-PZT stacks have previously been developed with a typical
goal to
create a structure that resonates at fo and 2fo. In such a conventional
design, both PZT layers
are poled and are active. However, in the alternative embodiment of the
ultrasonic
transducer described herein, the second PZT layer is unpoled (not active) and
is acting as a
passive interfacial layer between the active PZT layer and the ultrasound
medium.
[00164] For clarity, and referring to Figs. 13 and 14, a few key parameters of
the response
of the transducers are defined for use herein the application. These
parameters are either
related to the frequency response or the time response of the transducer and
validate the
performance of the alternative embodiment of the PZT-PZT stack.
[00165] As used herein, the term "bandwidth", annotated by the terms BW or df,
refers to
the passband of the transducer, or the range of frequencies that fall within
6dB of the
frequency point that is the most sensitive (or demonstrates the least amount
of insertion
loss).
[00166] As used herein, the phrase "center frequency", annotated by the
abbreviation Fo,
refers to the center frequency of the transducer and is usually defined as the
mid point in the
-6dB Bandwidth of the device. For the purposes of the test results of the
transducer
described below, a centre frequency of substantially 30 MHz is used.
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[00167] As used herein, for the purposes of comparing the performance of the
PZT-PZT
stack of the present embodiment to other stack designs, the phrase "insertion
loss" refers to
the strength of the acoustic response from 1 array element of the PZT-PZT
transducer stack
with respect to the acoustic response of 1 array element of the PZT stack
illustrated in
Figure 12G when both respective elements are excited with the same electrical
pulse. It is
noted that the IL < 24.5dB (IL stands for insertion loss) in Figure 15 is an
absolute value
that refers to the response of the transducer using an absolute energy scale.
[00168] As used herein, the term "ripple" refers to, or characterizes, the
small variation in
response of the transducer within the bandwidth of the device. This definition
does not take
into account any slope that may exist within the bandwidth of the transducer.
[00169] As used herein, the phrase "pulse response" refers to the time
interval for which
the transducer is emitting an acoustic response above a defined threshold
after it has been
excited with a drive pulse. The normal threshold levels quoted are usually at
the -6dB and
-20dB levels. The drive pulse is a broadband single cycle bipolar pulse with a
center
frequency equal to the centre frequency of the response of the transducer.
[00170] As used herein, the phrase "secondary pulse suppression" (or "sidelobe
pulse
suppression") refers to the suppression of the peak of the secondary lobe of a
pulse
response. In the pulse response, there is usually the initial pulse (or the
first lobe) response
followed by secondary lobes. For a well-designed stack, the secondary lobes
have much
less amplitude than the first lobe. A useful metric is to determine the peak
of the secondary
lobe. It is desirable to have this peak as low as possible. In this particular
embodiment of
the transducer, the relative difference between the initial lobe and the
second lobe has been
characterized and can be kept at a level that is 20dB below the initial peak.
[00171] As used herein, the phrase "shift in center frequency" refers to the
variation of
the center frequency of the device. In this aspect, and for experimentation,
the thickness of
the piezoelectric layer remains the same for all permutations of matching and
backing layers
used in the simulation. As one will appreciate, the variation in the layers
used for the FEA
simulations does. cause a change in the center frequency of the device. The
sensitivity of
this change is a useful metric for determining how reproducible a particular
PZT stack
design will be. This is represented as a ratio of the FEA determined Fo over
the designed F.
value. For example, a ratio of "one" means that for a particular stack design,
there is no
shift in center frequency.
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[00172] Referring again to Fig. 12G, an exemplary PZT stack is shown having a
backing
underlying a connected PZT layer. Two matching layers 126, 116 are mounted
thereon an
upper surface of the PZT layer 106. Finally, a lens is connected to the upper
surface of the
top most matching layer 126. An analysis of this exemplified design is
illustrated
graphically in Fig. 15. Here, the preferred area for design is illustrated by
the red coloring.
[00173] In one example of the alternative embodiment of the PZT stack for a
transducer,
as shown in cross-section in Fig. 16, two layers of PZT 502, 504 are provided
and
positioned in overlying relationship to each other. The upper layer of PZT 502
is unpoled
and the lower layer of PZT 504 is poled. In one aspect, the unpoled and
inactive upper PZT
layer can be formed of the same material as the poled and active lower PZT
layer. Of
course, it is contemplated that the upper PZT layer could be formed from other
materials
having similar acoustic impedance to the lower PZT layer.
[00174] In a farther aspect, a bonding layer 506 formed from, for example and
not meant
to be limiting, tin solder, and the like, is positioned therebetween and in
contact with the
two opposing surfaces of the two layers of PZT. The bottom surface of the
lower poled
layer of PZT is mounted thereon the top surface of a backing layer 508, which
is formed
from, for example and not meant to be limiting, PZT, epoxy, and the like.
Further, a lens
512 is positioned onto the top surface of the upper layer of PZT. In a further
aspect, a
bonding layer 510 formed from, for example and not meant to be limiting, SU-8,
is
interposed therebetween the lens 302 and the top surface of the upper layer of
PZT. In yet
another aspect, a ground electrode layer can be interposed therebetween the
lower poled
piezoelectric layer and the upper unpoled piezoelectric layer.
[00175] A spaced series of parallel first kerf slots 520 are cut into the
composite formed
from the bonded two layers of PZT and extend through the substantial thickness
of the
composite. Further, a spaced series of second kerf slots 522 is cut into the
composite, from
the upper surface of the unpoled upper PZT layer through approximately 75% of
the
thickness of the active PZT layer. A depth of about 75% is approximately the
minimum
depth through the active layer of the PZT layer that is required to achieve
the performance
illustrated in Figures 17-24. One skilled in the art will appreciate that it
is contemplated that
a depth exceeding 75% is contemplated as the deeper depth can improve the
performance
even more than what is presented in the figures.
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[00176] In the embodiment shown in Figure 16, and as shown in Figs. 17-24,
bandwidth,
passband ripple, sidelobe and pulse width are controlled by structural
parameters such as,
for example, element width (we), kerf width (wkl, wk2), kerf depth, thickness
of the bonding
layer positioned between the inactive and active PZT layers, and thickness of
the inactive
PZT layer (hPZT2).
[00177] In particular, Figs. 17 and 18 illustrate graphically the analysis of
the exemplified
PZT stack shown in Fig. 16. The preferred area for the transducer designs are
highlighted in
red coloring. In Fig. 16, the first kerf width is 8 m and the second kerf
width is 8 m. In
Fig. 18, the first kerf width is 8 m and the second kerf width is 5 m.
Further, Figures 21-
24 illustrate the affect of the width of the element and the thickness of the
upper unpoled
PZT layer affects bandwidth, pulse width at the -6 dB and -20dB threshold
levels, center
frequency, ripple in the passband, and pulse sidelobe suppression. In these
examples, the
first kerf width was constant at S m and the second kerf width was constant
at 5 m.
[00178] Referring now to Figures 25A-33, the present invention further
comprises a
circuit board that is adapted to accept an exemplary transducer and that is
further adapted to
connect to at least one conventional connector. As noted herein, the
conventional connector
is adapted to complementarily connect with a cable for transmission and/or
supply of
required signals. With regard to the figures, as one skilled in the at will
appreciate, due to
the fine detail of the circuit board and unless otherwise indicated, the
figures are merely
schematic representations of complementary circuit boards and associated multi
element
arrays. Figure 28 shows a top view of an exemplary circuit board for a 256-
element array
having a 75 micron pitch.
[00179] Referring now in particular to Figures 25A-27B, an exemplary
transducer for use
with the exemplary circuit board is illustrated. In Figures 25A-25C, exemplary
top, bottom
and cross-sectional views of an exemplary schematic PZT stack of the present
invention are
shown. Figure 25A shows a top view of the PZT stack and illustrates portions
of the ground
electrode layer 600 that extend from the top and bottom portions of the PZT
stack. In one
aspect, the ground electric layer extends the full width of the PZT stack.
Figure 25B shows
a bottom view of the PZT stack. In this aspect, along the longitudinally
extending edges of
the PZT stack, the PZT stack forms exposed portions of the dielectric layer
610 between
individual signal electrode elements 620. In another aspect, the signal
elements extend the
full width of the PZT stack. As one will appreciate, not shown in the
underlying "center
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portion" of the PZT stack are lines showing the individualized signal
electrode elements.
As one will further appreciate, there is one signal electrode per element of
the PZT stack,
e.g., 256 signal electrodes for a 256-element array.
[00180] Figure 26A is a top plan view of an interposer 650 for use with the
PZT stack of
Figures 25A-C, comprising electrical traces 652 extending outwardly from
adjacent the
central opening of the interposer. The interposer fiu-ther comprises ground
electrical traces
located at the top and bottom portions of the piece.
[00181] The interposer can further comprise a dielectric layer 656 disposed
thereon a
portion of the top surface of the interposer about the central opening of the
piece. In this
aspect, and referring also to Figure 26B, the dielectric layer defines two
arrays of staggered
wells 660, one array being on each side of the central opening and extending
along an axis
parallel to the longitudinal axis of the interposer. Each well is in
communication with an
electrical trace of the interposer. A solder paste 662 can be used to fill
each of the wells in
the dielectric layer such that, when a PZT stack is mounted thereon the
dielectric layer and
heat is applied, the solder melts to form the desired electrical continuity
between the
individual element signal electrodes and the individual trances on the
interposer. In use, the
well helps to retain the solder within the confines of the well.
[00182] Figure 27A is a top plan view of the PZT stack shown in Figure 25A
mounted
thereon the dielectric layer of the interposer shown in Figure 26A. To aid in
the
understanding of the invention, Figure 27B provides a top plan view of the PZT
stack
shown in Figures 25A mounted thereon the dielectric layer and interposer shown
in Figure
26A, in which the PZT stack is shown as a transparency. This provides an
illustration of the
mounting relationship between the PZT stack and the underlying dielectric
layer/interposer,
the solder paste mounted therebetween forming an electrical connection between
the
respective element signal electrodes and the electrical traces on the
interposer.
[00183] Referring now to Figures 28A-28C, a schematic top plan view of an
exemplary
circuit board 680 for mounting the transducer of the present invention thereto
is illustrated.
In one aspect, at least a portion of the circuit board is flexible. In one
embodiment, the
circuit board comprising a bottom copper ground layer and a Kapton layer
mounted to the
upper surface of the bottom copper ground layer. In one aspect, the circuit
board can also
comprise a plurality on underlying substantially rigid support structures. In
this aspect, a
central portion surrounding a central opening in the circuit board has a rigid
support
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structure mounted to the bottom surface of the bottom copper ground layer. In
a further
aspect, portions of the circuit board to which the connectors will be attached
also have rigid
support structures mounted to the bottom surface of the bottom copper ground
layer.
[00184] The circuit board further comprise a plurality of board electrical
traces formed
thereon the top surface of the Kapton layer, each board electrical trace
having a proximal
end adapted to couple to an electrical trace of the transducer and a distal
end adapted to
couple to a connector, such as, for example, a cable for communication of
signals
therethrough. In one aspect, the length of the circuit forming each electrical
trace has a
substantially constant impedance.
[00185] The circuit board also comprises a plurality of vias that pass though
the Kapton
layer and are in communication with the underlying ground layer so that signal
return paths,
or signal ground paths, can be formed. Further, the circuit board comprises a
plurality, of
ground pins. Each ground pin has a proximal end that is coupled to the ground
layer of the
circuit board (passing through one of the vias in the Kapton layer) and a
distal end that is
adapted to couple to the connector.
[00186] Figure 28B is a top plan view of an exemplary circuit board for
mounting of an
exemplary 256-element array having a 75 micron pitch and Figure 28C is a top
plan view of
the vias of the circuit board of Figure 288 that are in communication with an
underlying
ground layer of the circuit board. Figure 28B also defines bores in the
circuit board that are
sized and shaped to accept pins of the connectors such that, when the
connector is mounted
thereon portions of the circuit board, there will be correct registration of
the respective
electrical traces and ground pins with the connector.
[00187] Figure 29 illustrates a partial enlarged top plan view of a portion of
the
exemplified circuit board showing, in Region A, the ground electrode layer 600
of the
transducer being wire bonded to the ground electrical trace 654 on the
interposer 650, which
is, in turn, wire bonded to the ground pads 682 of the circuit board. An
enlarged exemplary
connection of the ground electrode layer of the transducer is shown in Figure
30A. The
ground pads of the circuit board are in communication, through vias in the
Kapton layer,
with the underlying bottom copper ground layer. As illustrated and as further
exemplarily
shown in Figure 30B, in Region B, the individual electrical traces 610 of the
transducer are
wire bonded to individual board electrical traces 684 of the circuit board.
Referring now to
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Figure 31A, in one aspect the central opening 686 of the circuit board 680
underlies the
backing material of the transducer.
[00188] Referring now to Figures 33-34B, the present invention contemplates
mounting a
transducer, as exemplarily shown in Figure 25A, that does not include an
interposer to the
substantially rigid central portion of the circuit board. This embodiment
allows for the
elimination of most oÃthe wire bonds. In this aspect, the exemplified PZT
stack is surface
mounted onto the circuit board directly by, for example, means of a series of
ball bumps
690, formed, for example and without limitation, from gold. The exemplified
gold ball
bump means is a conventional surface mounting technique and represents another
type of
surface mounting techniques consistent with the previously mentioned surface
mounting
techniques. In this example, the rigidized central portion of the circuit
board can optionally
provide the same functionality as the interposer. Wire bonds, or other
conventional
electrical connection, from the ground electrode of the PZT stack to the
ground of the circuit
board are still required to compete the signal return of the assembled device.
Figure 34A
shows the ground electrode layer of the transducer (without interposer) wire
bonded to the
ground pads of the circuit board.
[00189] Optionally, and as shown in Figures 31-33, the wires can be covered
with a
protective glob top coating that protects the wire bonds. In another aspect, a
glob top dam
that prevents the glob top material from flowing beyond the vicinity of the
wire bonds can
also be used. It is contemplated that the glob top dam can remain permanently
or it can be
removed once the glob top material has been properly cured.
[00190] In one aspect, the gold ball bumps are applied directly onto the
circuit board.
Each ball bump is positioned in communication with one electrical trace of the
circuit
board. When the PZT stack is applied, it is aligned with the electrical traces
of the circuit
board and electrical continuity is made via the ball bumps. The PZT stack is
secured to the
circuit board by, for example and not meant to be limiting, a) use of an
underfill, such as a
UV curable; b) use of an ACF tape; c) by electroplating pure Indium solder
onto the
electrodes of either the PZT or the circuit board and reflowing the Indium to
provide a
solder joint between the signal electrode on the PZT and the gold ball bump on
the circuit
board, and the like.
[00191] Referring now to Figures 35 - 48, an alternative methodology for
assembling a
transducer of the present invention is shown. It will be appreciated that
while the
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exemplified process for assembly the transducers would be used form eight
individual
transducers, the process could be used to form any desired number of
transducers, i.e., 1, 2,
3, 4... N transducers by application of the described assembly process.
[00192] The exemplified transducer assembly would include an interposer 800
having an
upper surface 802 and a lower surface 804 that is configured to mount to the
top surface of
the uppermost matching layer of the underlying PZT composite assembly. The
interposer
further defines at least one opening 810 that extends therethrough the
interposer from the
upper surface to the lower surface. In one aspect, the walls 812 that form the
opening in the
interposer can have a tapered shape in cross-section such that the cross-
sectional area of the
opening defined in the upper surface is greater than the cross-sectional area
of the opening
defined in the lower surface of the interposer. Further, the opening in the
interposer is
configured to substantially surround the active area of the underlying PZT
composite
assembly. That is, the opening has a longitudinal length dimension that is
greater than the
distance between the first and last array elements to be defined therein the
PZT composite
assembly and a width dimension that is greater than the length of the first
kerf slot. In a
fiuther aspect, it is contemplated that the interposer can be formed of a hard
ceramic, such
as, for example and not meant to be limiting, Alumina.
[001931 In a further aspect, the peripheral edge 815 of the interposer can
define at least
one alignment means for aiding in the alignment of the interposer with an
underlying PZT
composite assembly. In one exemplary aspect, each alignment means can comprise
a notch
817 defined in the peripheral edge of the interposer. In a further aspect, it
is contemplated
that pairs of notches 817A, 817B could be defined on the peripheral edge
adjacent each of
the corners of the interposer. Optionally, the interposer can have alignment
means, such as,
for example, alignment features that are provided on the lower surface of the
interposer to
aid in the alignment of the interposer to the underlying PZT stack. Similarly,
alignment
features can be provided on the upper surface of the interposer to aid in the
alignment of a
dicing assembly.
[00194] In this aspect, the PZT composite assembly 820 can comprise a
commercially
available PZT layer, or alternatively any of the PZT layer composite
assemblies described
above. In one aspect, the PZT layer has an electrode layer 821 deposited on a
top
substantially planar surface of the PZT layer. In this embodiment, the
electrode layer will
act as the ground electrode for the resulting array transducer. In an example
in which
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several transducer arrays are fabricated at the same time, the PZT stack has a
standard size
of 2.625" X 2.625". It is not important what the thiclcness of the PZT layer
is at this stage of
the assembly.
[00195] Next, at least one pair of troughs, bores, or vias 822 is formed that
extend
through the electrode layer and into the underlying PZT layer to a desired
depth. In one
aspect, each trough,.bore, or vias of the pair of troughs, bores, or vias is
positioned
substantially parallel to each other and are spaced a predetermined distance.
In the
illustrated example, two pairs of troughs are formed on the PZT composite
assembly. The
formed pairs of troughs, bores, or vias are filed with a conductive material,
such as, for
example, silver epoxy, solder and the like, and, as one skilled in the art
will appreciate, the
filed troughs, bores, or vias fomi a pair of ground bus lines that are in
electrical
communication with, and thus are an extension of, the ground electrode on the
top surface
of the PZY layer.
[00196] At least one matching layer 830 is mounted onto a portion of the upper
surface of
the electrode layer. In one aspect, the matching layer substantially covers
the desired
working surface of the electrode layer, i.e., the matching layer is mounted
onto the upper
surface of the electrode layer such that the portions of the electrode layer
that will form a
portion of the completed array assembly are covered. As one would appreciate,
and as
described above in the previous embodiments, the at least one matching layer
can
subsequently be lapped, if required, to a desired thickness.
[00197] The bottom surface of the interposer can subsequently be mounted to
the top
surface of the uppermost matching layer. A conventional adhesive, such as,
without
limitation, epoxy or an adhesive film, can be used to connect the interposer
to the matching
layer. It is preferred that, when the interposer is connected to the
underlying matching layer,
none of the adhesive is present on the portions of the matching layer that are
exposed via the
openings in the interposer. hi a fiirtlier aspect, the alignment means of the
interposer can be
used to aid in the positioning of the built up composite assembly and the
interposer by, in
this example, positioning the peripheral edges of the built up composite
assembly such that
they are substantially co-planar to the respective edges of the notches in the
peripheral edge
of the interposer. In this aspect, at least a portion of the lower surface of
the interposer
extends beyond the peripheral edge of the built up composite assembly, which
allows for the
measurement of the height of the built up composite assembly.
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[00198] Next, the lower surface of the PZT layer is conventionally ground or
lapped
down to a desired thickness. The thickness can be measured with respect to the
lower
surface of the exposed portions of the attached interposer. In this aspect,
the lower surface
of the PZT layer is lapped until the ground bus line 824 is exposed on the
lower, lapped,
surface of the PZT layer. As one will appreciate, this aspect acts to
communicate the
ground from the upper surface of the PZT layer to the lower surface of the PZT
layer.
[00199] Optionally, prior to lapping the lower surface of the PZT layer, the
opening in
the interposer can be temporarily filled to increase the structurally rigidity
of the built up
composite assembly as the lower surface of PZT layer is being lapped tQ the
desired
thickness. After the lapping step is completed, the material that filled the
opening of the
interposer can be removed.
[00200] Subsequently, a dielectric layer 840 is conventionally deposited onto
the lapped
lower surface of the PZT layer. In one example, the dielectric layer can be a
photoresist that
can be spin coated unto the lapped surface with a spin speed and spin cycle
suitable for
creating a dielectric layer of a desired thickness. The dielectric layer can
then be patterned
as desired by conventional photolithography techniques. Alternatively, the PZT
stack, prior
to lapping or grinding, could be diced to a controlled depth and filled with
epoxy such that,
upon lapping of the PZT stack, the epoxy itself would form the dielectric
layer. In this
aspect, the methodology would result in a substantially planar bottom surface
as opposed to
the initial method that would result in a dielectric step. As one skilled in
the art will
appreciate, although the two methods result in different surface morphology,
they produce a
PZT stack with.a dielectric layer that performs the identical function.
[002011 It is contemplated that a pair of opposing elongate strips of
dielectric material
840A, 840B will be defined for each array transponder being formed in the
assembly
process. In one aspect, the pairs of opposing elongate dielectric strips are
positioned
substantially parallel to each other and extend therebetween the exposed ends
on the ground
bus line on the lower surface of the PZT layer. In a further aspect, the
dielectric layer is
deposited such that at least a portion of the ground bus line on the lower
surface of the built
up composite assembly is exposed.
[00202] In a next operation, the signal electrodes 850 are formed on the lower
surface of
the built up composite assembly. As noted above for the previous embodiments,
a signal
trace or electrode is provided for each of the array element of the
transducer. Further, each
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signal trace 850 has a portion that is connected directly to the lower surface
of the PZT layer
and a portion that is deposited on the dielectric layer. In one aspect, a
portion of the signal
trace that is deposited on the dielectric layer forms a bond pad 852. One will
appreciate that
it is contemplated that the signal electrodes can be formed by any
conventional means such
as, for example and not meant to be limiting, sputtering to a desired depth
and pattezning via
laser machining and/or photolithography.
[00203] Optionally, the exposed portion of the matching layer therein the
opening on the
interposer can be covered with a shield electrode 860. In another aspect, at
least the wall
portions of the opening can also be covered to form a portion of the shield
electrode. It is
also contemplated that the shield electrode could extend onto the upper
surface of the
interposer and substantially surrounds the opening. It will be appreciated
that the shield
electrode is not in communication with the ground of the formed transducer,
but rather is
configured to be placed into electrical communication with a system or chassis
ground (not
shown) once the array is fully packaged into a housing with a medical cable
assembly.
[00204] Subsequently, the built up composite assembly can be diced to a
desired size. In
the illustrated example, the built up composite assembly can be diced into
eight separate
composite assemblies that can be subsequently formed into the eight
operational
transducers. In this aspect, if a conventional dicing saw is used, it is
preferred that the
dicing saw cut from the top of the composite assembly.
[00205] Next, the first and second kerfs slots are formed in the composite
assemblies to
define the array elements of the transducer. As one skilled in the art will
appreciate, the first
and second kerf slots can be fonned as described above for the other
embodiments. In an
altemative methodology, some backing nlaterial can be applied to the lower
surface of the
PZT layer during the process of forming the first and second kerf slots. In
this aspect, it is
contemplated that the sequence of application of backing and of formation of
the kerf slots
can be performed in several different combinations to achieve the array
structures that are
illustrated and described herein. Two exemplary examples are described below.
One skilled
in the art would appreciate that several more combinations within the scope
and spirit of this
invention are possible.
[00206] In a first example, laser alignment features can be laser cut from the
bottom side
of the PZT surface through the entire thickness of the stack in an area
adjacent to the signal
electrode pattern that is not part of the active array. A backing can be
subsequently applied
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to the bottom surface of the PZT that substantially covers the gap between the
dielectric
layers but leaves the bond pads of the signal electrodes exposed. The
composite assembly
can be flipped over and the laser can be registered to the formed alignment
features. After
registration, the first and second kerf slots can be laser machined to the
desired depth.
[00207] In anotlier example, laser alignment features can be laser cut from
the bottom
side of the PZT surface tlirough the entire thickness of the stack in an area
adjacent to the
signal electrode pattern that is not part of the array. Next, a portion of the
first kerf slots are
laser machined from the bottom surface of the PZT to a depth that is less than
the full
thickness of the composite PZT stack such that the first kerf slots do not
break the top
surface of the composite PZT stack. A thin layer of backing material can then
be applied to
the bottom surface of the PZT that substantially covers the gap between the
dielectric layers
but leaves the bond pads exposed. The composite assembly can be flipped over
to allow the
laser to be registered to the alignment features. After registration, both the
first kerf and
second kerf slots can be laser machined. In this example, because the first
kerf slots were
already partially formed from the bottom side, these kerfs exhibit less taper,
which is
intrinsic to laser machining. Of course, it is contemplated that the second
kerf slots may
extend to a different depth than the first kerf slots.
[00208] As described above, the first and second kerfs can be machined to
their desired
depths by the use of a laser. In one exemplified aspect, the first kerfs can
extend through the
shield electrode layer, through the at least one matching layer, through the
ground electrode
layer, and into a least a portion of the underlying PZT layer. The first and
second kerfs
define the array elements as described above.
[00209] Optionally, the portions of the exposed signal traces that are
positioned thereon
the lower surface of the PZT layer can be covered by a backing layer 870. In
this aspect, it
is preferred that the applied backing does not extend thereon the dielectric
layer and it is
more preferred that the applied backing does not cover any of the bond pads of
the signal
traces.
[00210] Referring now to Figure 49, a method of mounting the transponder shown
in
Figures 43 and 47 is illustrated. Initially, a substantially rigid substrate
900 is provided that
defines an opening configured for receipt of the transponder. In one example,
the substrate
can be formed of a conventional circuit board material such as, for example
and not meant
to be limiting, FR4 and the like. The opposing ends of the flex circuit, which
are
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exemplarily described above, are attached to the substrate on opposing sides
of the opening
in the substrate and define a pocket 902 for operative receipt of the
transponder.
[00211] A portion of the upper surface of the interposer of the transponder is
mounted
therein the formed pocket of the circuit. As one will appreciate, when the
flex circuit and
transponder are subsequently viewed from a top elevation view, the signal pads
and ground
pads of the flex circuit and the bond pads and ground bus pads of the
transponder are visible
and are readily accessible from that elevational perspective. hi this aspect,
the relative
position of the respective pads and grounds allows for the use of wire bonding
to form the
signal and ground wire bonds. After the wire bonding is completed, all of the
bonds are
covered with a conventional glob top material 904 to protect the integrity of
the wire bonds.
[00212] Subsequently and optionally, a ring enclosure 910 is mounted to a
portion of the
flex circuit. The mounted ring enclosure is configured to surround the array
transducer and
the glob top signal and ground wire bonds. The ring can then be filed with a
backing
material 912 to provide a backing layer of adequate thickness behind the
formed PZT stack
and to further protect the assembled transducer. In one preferred aspect, the
added backing
can be made of the identical composition to the existing backing already in
contact to the
PZT stack. In a further aspect, it is preferred that the original backing
material be partially
sanded or roughened to avoid any well defined interface between the two
backing layers.
[00213] In a final optional step, a lens, if used and not otherwise already
mounted, can be
mounted to a portion of the shield electrode that overlies the matching layer
within the
opening defined in the interposer.
[00214] It will be apparent to those skilled in the art that various
modifications and
variations can be made in the present invention without departing from the
scope or spirit of
the invention. Other embodiments of the invention will be apparent to those
skilled in the
art from consideration of the specification and practice of the invention
disclosed herein. It
is intended that the specification and examples be considered as exemplary
only.
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