Language selection

Search

Patent 2665111 Summary

Third-party information liability

Some of the information on this Web page has been provided by external sources. The Government of Canada is not responsible for the accuracy, reliability or currency of the information supplied by external sources. Users wishing to rely upon this information should consult directly with the source of the information. Content provided by external sources is not subject to official languages, privacy and accessibility requirements.

Claims and Abstract availability

Any discrepancies in the text and image of the Claims and Abstract are due to differing posting times. Text of the Claims and Abstract are posted:

  • At the time the application is open to public inspection;
  • At the time of issue of the patent (grant).
(12) Patent Application: (11) CA 2665111
(54) English Title: HYBRID PLANAR LIGHTWAVE CIRCUIT WITH REFLECTIVE GRATINGS
(54) French Title: CIRCUIT OPTIQUE PLANAIRE HYBRIDE A RESEAUX REFLECHISSANTS
Status: Deemed Abandoned and Beyond the Period of Reinstatement - Pending Response to Notice of Disregarded Communication
Bibliographic Data
(51) International Patent Classification (IPC):
  • G2B 6/13 (2006.01)
  • G2B 5/18 (2006.01)
  • G2B 6/12 (2006.01)
  • G2B 6/136 (2006.01)
(72) Inventors :
  • PEARSON, MATT (Canada)
  • BIDNYK, SERGE (Canada)
  • BALAKRISHNAN, ASHOK (Canada)
(73) Owners :
  • ENABLENCE INC.
(71) Applicants :
  • ENABLENCE INC. (Canada)
(74) Agent: OSLER, HOSKIN & HARCOURT LLP
(74) Associate agent:
(45) Issued:
(86) PCT Filing Date: 2007-10-03
(87) Open to Public Inspection: 2008-04-10
Examination requested: 2012-10-02
Availability of licence: N/A
Dedicated to the Public: N/A
(25) Language of filing: English

Patent Cooperation Treaty (PCT): Yes
(86) PCT Filing Number: 2665111/
(87) International Publication Number: CA2007001776
(85) National Entry: 2009-04-01

(30) Application Priority Data:
Application No. Country/Territory Date
60/828,080 (United States of America) 2006-10-04

Abstracts

English Abstract

The present document relates to a hybrid planar lightwave circuit (PLC) comprising a waveguide circuit chip (21) and a silicon reflective diffraction grating chip (29) which is mounted to the waveguide circuit chip (21), via a trench (27) formed in the waveguide circuit chip (21), wherein the waveguide circuit chip (21) comprises a high optical performance silica-on- silicon waveguide structure (22, 23, 24) formed on a silicon substrate (26) and wherein the silicon reflective diffraction grating chip (29) comprises a separate wafer grating substrate (31) and a reflective diffraction grating (28) formed therein. The reflective diffraction grating (28) is formed in the wafer grating substrate (31) using a highly accurate, deep reactive ion etching (DRIE) process thereby enabling a highly precise diffraction grating chip (29) to be fabricated. Consequently, the present hybrid planar lightwave circuit (PLC) includes a separately manufactured, highly precise, diffraction grating chip (29) and a separately manufactured, high quality, waveguide structure (22, 23, 24) onto which the diffraction grating chip (29) is mounted, thereby enabling both the use of new DRIE technologies in the processing of the diffraction grating chip (29) and the use of flip-chip bonding when performing the diffraction grating chip (29) mounting operation. The benefit of the disclosed diffraction grating-based, hybrid planar lightwave circuit (PLC) is that, not only is the device able to be fabricated with an equally complex configuration to that of prior art hybrid PLCs, the device is able to be fabricated more easily, using a technique (DRIE) that produces a very high-quality vertical etch with very low surface roughness. In particular, because the reflective diffraction grating chip (29) is fabricated separately, from silicon or like materials, the DRIE technique is able to be used, unlike prior art hybrid PLC fabrication methods which generally preclude the use of DRIE.


French Abstract

La présente invention concerne un circuit optique planaire hybride (PLC) comportant une puce de circuit de guide d'ondes (21) et une puce de réseau de diffraction réfléchissant au silicium (29) qui est montée sur la puce de circuit de guide d'ondes (21), via une tranchée (27) formée dans la puce de guide d'ondes (21). La puce de circuit de guide d'ondes (21) comporte une structure de guide d'ondes haute performance en silice sur silicium (22, 23, 24) formée sur un substrat de silicium (26) et la puce de réseau de diffraction réfléchissant au silicium (29) comporte un substrat de réseau à tranches séparé (31) et un réseau de diffraction réfléchissant (28) qui y est formé. Le réseau de diffraction réfléchissant (28) est formé dans le substrat de réseau à tranche (31) au moyen d'un procédé de gravure profonde par ions réactifs (DRIE)de haute précision permettant ainsi la fabrication d'une puce de réseau de diffraction de grande précision (29). Par conséquent, le circuit optique planaire hybride selon la présente invention comporte un réseau de diffraction de grande précision (29) fabriqué séparément et une structure de guide d'ondes (22, 23, 24) de grande qualité sur laquelle la puce de réseau de diffraction (29) est montée, ce qui permet à la fois d'utiliser de nouvelles technologies DRIE dans le traitement de la puce de réseau de diffraction (29) et d'utiliser la connexion par billes lors de la réalisation de l'opération de montage de la puce de réseau de diffraction (29). L'avantage du circuit optique planaire hybride (PLC) selon la présente invention est que, non seulement il est possible de fabriquer le dispositif avec une configuration aussi complexe que celle des circuits optiques planaires hybrides de l'art antérieur mais aussi que la fabrication du dispositif est rendue plus facile, grâce à une technique (procédé DRIE) qui produit une gravure verticale de grande qualité avec une très faible rugosité de surface. En particulier, étant donné que la puce de réseau de diffraction réfléchissant est fabriquée séparément, à partir du silicium ou d'autres matières analogues, il est possible d'utiliser la technique du procédé DRIE, au contraire des procédés de fabrication de circuits optiques planaires hybrides de l'art antérieur qui généralement interdisent l'utilisation du procédé DRIE.

Claims

Note: Claims are shown in the official language in which they were submitted.


WE CLAIM:
1. A planar lightwave circuit (PLC) device comprising:
an input port for launching an input beam of light;
a slab waveguide on a first substrate, defining a core layer between upper and
lower cladding,
having a trench formed therein down to the core layer;
a reflective diffraction grating provided on a second substrate mounted in the
trench optically
coupled with the input port for diffracting the input beam of light; and
a first output port optically coupled with the reflective diffraction grating
for outputting at least a
portion of the input beam of light redirected by the reflective diffraction
grating;
whereby the core layer and the reflective diffraction grating are fabricated
separately of different
materials.
2. The PLC device according to claim 1, wherein the reflective optical device
is a reflective
diffraction grating comprised a plurality of teeth etched in a material
selected from the group
consisting of silicon, a silicon-based material, and indium phosphide.
3. The PLC device according to claim 1 or 2, wherein the slab waveguide
comprises a silica
on silicon structure in which the core layer is silica.
4. The PLC device accord to claim 1, 2 or 3, further comprising an adhesive in
the trench
between the core layer and the reflective optical device; wherein the adhesive
has a refractive
index matched to that of the core layer.
5. The PLC device according to any one of claims 1 to 4, further comprising a
projection
extending from the second substrate, having a contact surface in contact with
a flat section of the
slab waveguide, for spacing the second substrate from the slab waveguide to
avoid surface
abnormalities on the slab waveguide.
12

6. The PLC device according to claim 5, wherein the contact surface is at an
acute angle to
the second substrate, whereby the second substrate is mounted at an acute
angle to the first
substrate for directing the input beam at an acute angle to the core layer.
7. The PLC device according to any one of claims 1 to 6, wherein the
reflective diffraction
grating separates the input beam of light into a plurality of constituent
wavelengths; wherein the
PLC device further comprises a plurality of output ports for outputting the
plurality of
constituent wavelengths.
8. The PLC device according to any one of claims 1 to 7, wherein the
reflective diffraction
grating comprises a curved, concave or parabolic reflective surface in the
second substrate.
9. The PLC device according to any one of claims 1 to 8, further comprising
first alignment
means on the reflective diffraction grating, and second alignment means in the
trench engaged
with the first alignment means for aligning the reflective diffraction grating
with the core layer.
10. The PLC device according to any one of claims 1 to 9, wherein the
reflective diffraction
grating has a plurality of reflective walls defined by a facet length, and a
plurality of sidewalls
defined by a sidewall length; and wherein an aspect ratio of the diffraction
grating, defined by
the facet length divided by the sidewall length, is greater than 3.
11. The PLC device according to claim 10, wherein the aspect ratio is greater
than 5.
12. The device according to claim 10, wherein the aspect ratio is greater than
10.
13. The device according to any one of claims 1 to 12, wherein the reflective
diffraction
grating has a plurality of reflective walls defined by a facet length, and a
plurality of sidewalls
defined by a sidewall length; and wherein the sidewall length is less than or
equal to two times
the average wavelength of the input beam of light.
13

14. The device according to claim 13, wherein the sidewall length is less than
or equal to the
average wavelength of the input beam of light.
15. A method of forming a planar lightwave circuit comprising the steps of:
a) forming a slab waveguide on a first substrate including a core layer
between upper and lower
cladding;
b) forming a trench in the slab waveguide down to the core layer;
c) forming a diffraction grating on a second substrate; and
d) mounting the diffraction grating in the trench.
16. The method according to claim 15, wherein step c) includes DRIE etching
the diffraction
grating in a suitable material different than the core layer; and coating the
diffraction grating
with a reflective material.
17. The method according to claim 16, wherein the suitable material is
selected from the
group consisting of silicon, a silicon based material, and indium phosphide.
18. The method according to claim 15, 16 or 17, wherein step a) includes
forming the core
layer of silica.
19. The method according to any one of claims 15 to 18, wherein step d)
includes flip chip
bonding the second substrate onto the slab waveguide with the diffraction
grating in the trench.
20. The method according to any one of claims 15 to 19, wherein step d)
includes positioning
an epoxy between the slab waveguide and the grating, the epoxy having a
refractive index
matched to the core layer of the slab waveguide.
21. The method according to any one of claims 15 to 20, wherein step c)
includes forming a
projection extending from the second substrate having a contact surface for
contacting a section
of the slab waveguide, for spacing the second substrate from the slab
waveguide to avoid surface
abnormalities on the slab waveguide.
14

22. The method according to any one of claims 15 to 21, wherein step b)
includes forming
first alignment means on the reflective diffraction grating; wherein step c)
includes forming
second alignment means in the trench; and wherein step d) includes engaging
with the first
alignment means with the second alignment means, for aligning the reflective
diffraction grating
with the core layer.
23. The method according to any one of claims 15 to 22, wherein step c)
includes forming a
projection extending from the second substrate having a contact surface for
contacting a section
of the slab waveguide; wherein the contact surface is at an acute angle to the
second substrate,
whereby the second substrate is mounted at an acute angle to the first
substrate for reflecting a
portion of the input beam of light at an acute angle to the core layer.

Description

Note: Descriptions are shown in the official language in which they were submitted.


CA 02665111 2009-04-01
WO 2008/040125 PCT/CA2007/001776
HYBRID PLANAR LIGHTWAVE CIRCUIT WITH REFLECTIVE
GRATINGS
TECHNICAL FIELD
[01] The present invention relates to planar lightwave circuits (PLC), and in
particular to
PLCs with reflective diffraction gratings hybridized onto a multi-layer
waveguide structure.
BACKGROUND OF THE INVENTION
[02] In optics, a diffraction grating is an array of fine, parallel, equally
spaced grooves
("rulings") on a reflecting or transparent substrate, which grooves result in
diffractive and mutual
interference effects that concentrate reflected or transmitted electromagnetic
energy in discrete
directions, called "orders, " or "spectral orders. "
[03] The groove dimensions and spacings are on the order of the wavelength in
question. In
the optical regime, in which the use of diffraction gratings is most common,
there are many
hundreds, or thousands, of grooves per millimeter.
[04] Order zero corresponds to direct transmission or specular reflection.
Higher orders result
in deviation of the incident beam from the direction predicted by geometric
(ray) optics. With a
normal angle of incidence, the angle 0, the deviation of the diffracted ray
from the direction
predicted by geometric optics, is given by the following equation, where m is
the spectral order,
X is the wavelength, and d is the spacing between corresponding parts of
adjacent grooves:
[05]
0 = :~in t d
(MA)
[06] Because the angle of deviation of the diffracted beam is wavelength-
dependent, a
diffraction grating is dispersive, i.e. the diffraction grating separates the
incident beam spatially
into its constituent wavelength components, producing a spectrum.
[07] The spectral orders produced by diffraction gratings may overlap,
depending on the
spectral content of the incident beam and the number of grooves per unit
distance on the grating.

CA 02665111 2009-04-01
WO 2008/040125 PCT/CA2007/001776
The higher the spectral order, the greater the overlap into the next-lower
order. Diffraction
gratings are often used in monochromators and other optical instruments. By
controlling the
cross-sectional shape of the grooves, it is possible to concentrate most of
the diffracted energy in
the order of interest. This technique is called "blazing. "
[08] Originally high resolution diffraction gratings were ruled. The
construction of high
quality ruling engines was a large undertaking. A later photolithographic
technique allows
gratings to be created from a holographic interference pattern. Holographic
gratings have
sinusoidal grooves and so are not as bright, but are preferred in
monochromators because they
lead to a much lower stray light level than blazed gratings. A copying
technique allows high
quality replicas to be made from master gratings, this helps to lower costs of
gratings.
[09] A planar waveguide reflective diffraction grating includes an array of
facets arranged in a
regular sequence. The performance of a simple diffraction grating is
illustrated with reference to
Figure 1. An optical beam 1, with a plurality of wavelength channels k1, X2,
X3 ..., enters a
diffraction grating 2, with grading pitch A and diffraction order m, at a
particular angle of
incidence 6;,,. The optical beam is then angularly dispersed at an angle Aout
depending upon
wavelength and the order, in accordance with the grating equation:
[1 o] mA= A(sine;n + sineou)
(1)
[11] From the grating equation (1), the condition for the formation of a
diffracted order
depends on the wavelength XN of the incident light. When considering the
formation of a
spectrum, it is necessary to know how the angle of diffraction 6LIoõt varies
with the incident
wavelength 6;,,. Accordingly, by differentiating the equation (1) with respect
to ONout, assuming
that the angle of incidence 0;,, is fixed, the following equation is derived:
[12] aeN,,u` aa, _ A cos 6Nour (2)
[13] The quantity d6Noõt/dk is the change of the diffraction angle 6Noõt
corresponding to a small
change of wavelength X, which is known as the angular dispersion of the
diffraction grating. The
angular dispersion increases as the order m increases, as the grading pitch A
decreases, and as
2

CA 02665111 2009-04-01
WO 2008/040125 PCT/CA2007/001776
the diffraction angle 91,i õt increases. The linear dispersion of a
diffraction grating is the product
of this term and the effective focal length of the system.
[14] Since light of different wavelengths kN are diffracted at different
angles A1=Ioõt, each order
m is drawn out into a spectrum. The number of orders that can be produced by a
given
diffraction grating is limited by the grating pitch A, because OrI ut cannot
exceed 90 . The
highest order is given by A/ kN. Consequently, a coarse grating (with large A)
produces many
orders while a fine grating may produce only one or two.
[15] A blazed grating is one in which the grooves of the diffraction grating
are controlled to
form right triangles with a blaze angle w, as shown in Figure 1. The selection
of the blaze angle
w offers an opportunity to optimize the overall efficiency profile of the
diffraction grating,
particularly for a given wavelength.
[16] Planar waveguide diffraction based devices provide excellent performance
in the near-IR
(1550 nm) region for Dense Wavelength Division Multiplexing (DWDM). In
particular,
advancements in Echelle gratings, which usually operate at high diffraction
orders (40 to 80),
high angles of incidence (approx 60 ) and large grading pitches, have lead to
large phase
differences between interfering paths. Because the size of grating facets
scales with the
diffraction order, it has long been considered that such large phase
differences are a necessity for
the reliable manufacturing of diffraction-based planar waveguide devices.
Thus, existing devices
are limited to operation over small wavelength ranges due to the high
diffraction orders required.
[17] Reflective diffraction gratings, etched directly into a planar lightwave
circuit, are
often used as wavelength filters due to their high performance and small size.
Conventional
PLCs can be fabricated on a number of different types of substrates, including
silica-on-silicon,
silicon-on-insulator (SOI), or indium phosphide (InP). A typical configuration
of a diffraction
grating filter formed at a side of a slab waveguide is shown in Fig. 1. It is
assumed that all the
action is in a two-dimensional plain parallel to the plane of the page, i.e.
the light is confined in
the vertical direction (perpendicular to the page).
[18] Another system is, illustrated in Figures 2 and 3, in which a concave
reflective diffraction
grating 10 is formed at an edge of a slab waveguide 11 provided in chip 12. An
input port is
3

CA 02665111 2009-04-01
WO 2008/040125 PCT/CA2007/001776
defined by an end of a waveguide 13, which extends from an edge of the chip 12
to the slab
waveguide 11 for transmitting an input wavelength division multiplexed (WDM)
signal,
comprising a plurality of wavelength channels (),l, ?,2, ),3 ...), thereto.
The light enters through
the input port into the two-dimensional slab waveguide 11, and expands
horizontally, i.e.
diverges in the horizontal plane. Subsequently, the light encounters the
reflective grating 10,
which is composed of a number of small reflective facets. The first-order
reflected signals
combine constructively at one location, based on the wavelength of light,
where an end of an
output waveguide 15 is positioned to capture the wavelength channel of
interest.
[19] The diffraction grating 10, as defined in United States Patent No.
7,151,635 issued
December 19, 2006 to Enablence Technologies Inc, which is incorporated herein
by reference,
and as illustrated in Figure 2, has an aspect ratio (F/S) greater than 3,
preferably greater than 5
and potentially greater than 10, and a sidewall length S less than or equal to
the average
wavelength of the wavelength channels (k1, ?,2, X3 ...). The input waveguide
13 is positioned to
ensure that the incident angle 8;,, is less than 45 , preferably less than 30
and potentially less
than 15 or even less than 6 , and the grating pitch A is selected to ensure
that the grating 10
provides diffraction in an order of 5 or less and preferably 3 or less. The
diffraction grating 10
disperses the input signal into constituent wavelengths and focuses each
wavelength channel on a
separate output port in the form of the ends of the output waveguide 15, which
are disposed
along a focal line 16 of the grating 10 defined by a Rowland circle, for
transmission back to the
edge of the chip 12. The illustrated device could also be used to multiplex
several wavelength
channels, input the waveguides 15, into a single output signal transmitted out
to the edge of the
chip 12 via the input waveguide 13. The input and output ports represent
positions on the slab
waveguide 11 at which light can be launched or captured; however, the ports
can be optically
coupled with other transmitting devices or simply blocked off.
[20] One of the greatest challenges in fabricating a reflective diffraction
grating, such as
that shown in Figs. 1 and 2, in a PLC, is the very high quality etching
required to produce the
small reflective facets. There are two main challenges which must be overcome
to fabricate an
efficient grating, i.e. a near perfect verticality of etch, and a very smooth
sidewall. The grating
teeth shown in Fig. 2 would typically be metallized to improve their
reflectivity. However, since
the light travels in the underlying silica, it is reflected off the inner
metal, which conforms
4

CA 02665111 2009-04-01
WO 2008/040125 PCT/CA2007/001776
around all the roughness and non-verticality of the silica etch, resulting in
performance problems
for the grating. The only way to eliminate this problem is to develop a very
high-quality vertical
etch, with very low roughness.
[21] Unfortunately, in most etch processes there is typically a tradeoff in
terms of etch
verticality versus roughness of the etched wall, contrary to what is necessary
for making a good
grating. This is true in most material systems; however, recent developments
in Deep Reactive
Ion Etching (DRIE) of Silicon have allowed for extremely deep, vertical,
smooth etches, when
implemented in silicon only. The DRIE process has become very common for use
in MEMs
components and many other applications.
[22] However, using silicon as a PLC waveguide is very restrictive, and
typically results
in a low-performance component. To achieve the high-performance, low-loss
components
required in modern telecommunication systems, most PLC filter chips are
fabricated in silica-on-
silicon substrates, where the light travels only in a thin glass layer on top
of the silicon. DRIE
technology can be applied to silica wafers, but the etch results are not
nearly as good as those
found in silicon. For that reason, virtually all reflective diffraction
gratings etched in silica suffer
from performance problems associated with the verticality and/or roughness of
the etched
mirrors.
[23] An object of the present invention is to overcome the shortcomings of the
prior art by
providing a hybrid PLC device in which a highly precise diffraction grating is
manufactured
separately from a high quality waveguide structure.
SUMMARY OF THE INVENTION
[24] Accordingly, the present invention relates to a planar lightwave circuit
(PLC) device
comprising:
[25] an input port for launching an input beam of light;
[26] a slab waveguide on a first substrate, defining a core layer between
upper and lower
cladding, having a trench formed therein down to the core layer;

CA 02665111 2009-04-01
WO 2008/040125 PCT/CA2007/001776
[27] a reflective diffraction grating on a second substrate mounted in the
trench for
diffracting the input beam of light; and
[28] a first output port for outputting at least a portion of the input beam
of light;
[29] wherein the core layer and the reflective diffraction grating are formed
separately of
different materials;
[30] whereby the reflective optical device is etched with higher precision
than possible in
the slab waveguide.
[31] Another embodiment of the present invention relates to a method of
forming a planar
lightwave circuit comprising the steps of:
[32] a) forming a slab waveguide on a first substrate including a core layer
between upper
and lower cladding;
[33] b) forming a trench in the slab waveguide down to the core layer;
[34] c) forming a diffraction grating on a second substrate; and
[35] d) mounting the diffraction grating in the trench.
BRIEF DESCRIPTION OF THE DRAWINGS
[36] The invention will be described in greater detail with reference to the
accompanying
drawings which represent preferred embodiments thereof, wherein:
[37] Figure 1 illustrates a conventional reflective diffraction grating;
[38] Figure 2 illustrates a conventional concave reflective diffraction
grating;
[39] Figure 3 illustrates a conventional PLC device with the concave
reflective diffraction
grating of Fig.2;
[40] Figure 4 is a cross-sectional view of a hybrid PLC device in accordance
with the
present invention;
6

CA 02665111 2009-04-01
WO 2008/040125 PCT/CA2007/001776
[41] Figure 5a is a top view of a alternate embodiment of a reflective
diffraction grating
of the device of Fig. 4 with alignment markers;
[42] Figure 5b is a side view of the reflective diffraction grating of Fig.
5a;
[43] Figure 6 is a top view of a PLC waveguide chip of the device of Fig. 4;
[44] Figure 7 is a cross-sectional view of an alternative embodiment of a
hybrid PLC
device in accordance with the present invention;
[45] Figure 8a is a top view of an alternate embodiment of a reflective
diffraction grating
of the device of Fig. 4 with spacer projections; and
[46] Figure 8b is a side view of the reflective diffraction grating of Fig.
8a;
DETAILED DESCRIPTION
[47] With reference to Figure 4, a PLC chip 21, e.g. silica-on-silicon, in
accordance with
the present invention, is fabricated to look and function very similar to the
layout shown in Fig. 3
with a silica (or some other high quality waveguiding material) core layer 22
between upper and
lower cladding layers 23 and 24 formed on silicon substrate 26. However, since
the etching of
high-quality grating teeth directly in the silica material system is very
difficult, a simple deep
trench 27 is etched down through the core layer 22 and into the lower cladding
layer 23 or deeper
for receiving a separate reflective diffraction grating 28, which is mounted
within the trench 27.
The trench 27 has an outline slightly larger than the intended grating 28, but
generally follows
the shape thereof, but has no grating teeth, just a continuous wall. The
verticality and the
smoothness of the etched walls of the trench 27 are not critical.
[48] On a separate wafer grating chip 29, using a pure substrate 31 of a
material different
than the core layer 22, e.g. silicon, a silicon based material or an indium-
phosphide (InP)
material, the intended grating 28 is etched using an advanced etching system
with much higher
precision, e.g. DRIE system, which results in very vertical, smooth sidewalls
for the teeth of the
grating 28. A thin layer of a reflective material, such as gold, is deposited
on the grating 28 to
create highly-reflective teeth sidewalls. Since the triangular teeth of the
grating 28 are relatively
small, typically several thousand such gratings will fit on a standard 6"
silicon wafer. Preferably,
7

CA 02665111 2009-04-01
WO 2008/040125 PCT/CA2007/001776
the grating 28 is similar or identical to the above-identified diffraction
grating 10 for separating
an input optical beam into a plurality, e.g. up to 8, 16, 40 or more, of
constituent wavelength
channels.
[49] The gratings 28 are diced out, flipped, and inserted in the etched trench
27 on the
silica PLC chip 21. The entire process is typically done using an automated
flip-chip bonder,
which aligns the grating chip 29 to the PLC substrate 26, drops the grating 28
into position in the
trench 27, and completes a solder bonding process, which involves placing
solder 32 between
corresponding solder pads on the substrate 31 and the PLC chip 21 or by simply
heating up an
exists solder bump pre-positioned therebetween, to lock the grating chip 29 in
place on the PLC
chip 21.
[50] Light traveling towards the grating 28 would normally experience a high
loss due to
scattering at the rough trench 27 etched in the silica PLC chip 21; however,
to eliminate the loss,
an index-matching epoxy 35 is dispensed near one end of the grating trench 27.
The grating chip
29 and the trench 27 are designed, e.g. with a constant gap therebetween, so
that the epoxy 35
will wick across the thin spacing between the grating 28 and the etched silica
wall of the trench
27, completely filling all cracks, effectively submerging the grating 28 in
the silica trench 27.
The index-matching epoxy 35 is then cured, for example through a 100 C bake,
during which
the epoxy 35 cures to a refractive index nearly identical to that of the
waveguide material, e.g.
silica, used in the core 22 of the PLC chip 21, thereby eliminating any
optical interface in the
waveguide material, including all the roughness and non-verticality of the
trench 27, creating a
continuous refractive index through the silica chip 21 directly to the
reflective grating 28.
[51] Accordingly, a hybrid PLC device using very low-loss silica or other high
quality
waveguiding material is created, while also taking advantage of the DRIE
capabilities available
using silicon or other high precision etching material to construct a highly
precise or smooth
optical grating 28. The result is the best of both material systems, hybridly
integrated to form
one component.
[52] The proposed configuration can also be implemented for a different number
of
material systems and grating configurations. As well as for reflective
gratings and concave
reflective grating, the same technique can be used for creating efficient
mirrors, in particular a
8

CA 02665111 2009-04-01
WO 2008/040125 PCT/CA2007/001776
very smooth concave, curved or parabolic mirror, by replacing the grating chip
29 with another
chip having one or more reflective or at least partially reflective surfaces
for efficiently routing
light around tight corners in a PLC chip.
[53] One of the most effective applications of such a filter is for
fabricating a diplexer or
triplexer for the access telecommunication market, in particular those
disclosed in United States
Patents Nos. 7,068,885 issued June 27, 2006 to Bidnyk et al, 7,149,387 issued
December 12,
2006 to Balakrishnan et al, and 7,209,612 issued April 24, 2007 to Pearson et
al, which are all
incorporated herein by reference, including a stepped diffraction grating
having triangular teeth
with alternating reflective faces and non-reflecting sidewalls, such as the
one disclosed in United
States Patent No. 7,151,635 issued December 19, 2006 to Enablence Technologies
Inc, which is
incorporated herein by reference. The diffraction grating disclosed in the
Enablence patent
requires a sidewall length S, which is less than or equal to two times the
average wavelength of
the input light, e.g. 1550 nm, and preferably less than or equal to the
average wavelength of the
input light, for the which the grating 28 is designed to
multiplex/demultiplex. Furthermore, an
aspect ratio of the diffraction grating, defined by the facet length divided
by the sidewall length,
is greater than 3, preferably greater than 5, and more preferably greater than
10. The
aforementioned specifications require highly accurate manufacturing processes,
which are
difficult to achieve in silica on silicon structures, but achievable in deep
reactive ion etching of
silicon.
[54] Preferably, the grating chip 29 includes a single-crystal silicon,
silicon-based or InP
substrate, etched using a Deep Reactive Ion Etching (DRIE) process. The DRIE
process is
relatively standard and readily available from wafer foundries throughout the
world, and
typically uses an etch process which alternates between a silicon etching
plasma (SF6) and a
passivating plasma (C4F8), which results in very high aspect ratio wells, with
smooth, vertical
etching of the grating 28.
[55] The grating wafer, since it comprises only the gratings 28 themselves,
can contain a
very high number of grating chips 29, often several thousand on a standard 6"
wafer. The single-
layer etch process can be used for defining the grating 28 and alignment marks
41, as shown in
9

CA 02665111 2009-04-01
WO 2008/040125 PCT/CA2007/001776
Figures 5a and 5b. The alignment marks 41 are recesses or holes etched in the
structure of the
grating 28 using the same mask, which defines the teeth of the grating 28, to
ensure that there is
no mask alignment error between the alignment marks 41 and the grating teeth.
The alignment
marks 41 have a specific shape, e.g. cross, triangular, corresponding with
markers 42, as in
Figure 5c, on the PLC chip 21, specifically in the trench 27.
[56] For gratings 28 that are hybridly attached to a PLC chip 21, as shown in
Fig. 4, the
verticality of the walls of the reflective grating 28 is established by the
flat horizontal upper
surface 30 of the PLC chip 21, where the grating chip 29, i.e. a lower surface
of the substrate 31,
is attached. In many PLC fabrication processes an upper surface 30, which is
flat all over, is not
always attainable; however, in many cases the topology of the top surface 30
of the PLC chip 21
is usually quite reproducible from chip to chip and wafer to wafer with
certain flat sections 45
separate from abnormal rough sections 46. Accordingly, an alternate embodiment
of the present
invention, illustrated in Figure 7 includes a grating chip 49 with one or more
bump or spacer
projection(s) 52 extending from a substrate 51 parallel to a reflective
diffraction grating 58,
which is similar to the diffraction gratings 28 hereinbefore described. The
spacer projection 52
can be formed in the same manufacturing step and/or process as the grating 58.
[57] A similar technique to that shown in Fig. 7 can be used to intentionally
angle the
grating 58 for a controlled vertical angle. For example, on a PLC chip 21 with
flat sections 25,
an intentional non-verticality of the grating 58 can be imposed by
incorporating an angled
surface to the bump 52 on the grating chip 49, whereby the substrate 51 is
mounted at an acute
angle to the substrate 26 and the core layer 22. The acute angle could be 45
or less to enable
light to be redirected from traveling in a horizontal direction to a vertical
direction; however,
angles of less than 20 or less than 10 are more practical. Typically, to
compensate for an
inaccurate etching processes, an angle of less than 6 is sufficient.
Accordingly, with the
higher angles some or all of the light can be reflected into the lower or
upper claddings 23 or 24,
providing a fixed attenuation of the reflected signal, or for other such
applications.
[58] An example application of the present invention is for hybrid filter
chips used to
separate wavelengths of light in a telecommunications system. A triplexer,
such as the ones
disclosed in United States Patent No. 7,068,885, used in fiber-to-the-home
(FTTH) systems

CA 02665111 2009-04-01
WO 2008/040125 PCT/CA2007/001776
would be one such component, wherein the hybrid grating 2 is used to separate
different
upstream and/or downstream wavelengths.
[59] This invention relaxes many of the very challenging etch requirements
associated
with planar lightwave circuit (PLC) reflective grating technologies, which
have been a major
issue for wafer foundries in the past. It transfers these etch requirements to
a hybrid grating,
which can take advantage of new DRIE technologies in silicon. This results in
lower wafer
fabrication costs, and a waveguide process which is much more simple and
easily portable to
other foundries.
[60] The present invention overcomes the shortcomings of the prior art, by
hybridly
integrating a low-loss silica waveguide PLC 1, with a high-quality DRIE-
etched, silicon grating
2. The hybrid integration is made possible by modem flip-chip bonding
techniques that are
typically used for attaching lasers and detectors onto PLC substrates. In
addition, the present
invention provides a means for intentionally altering the verticality of the
grating during
bonding.
11

Representative Drawing
A single figure which represents the drawing illustrating the invention.
Administrative Status

2024-08-01:As part of the Next Generation Patents (NGP) transition, the Canadian Patents Database (CPD) now contains a more detailed Event History, which replicates the Event Log of our new back-office solution.

Please note that "Inactive:" events refers to events no longer in use in our new back-office solution.

For a clearer understanding of the status of the application/patent presented on this page, the site Disclaimer , as well as the definitions for Patent , Event History , Maintenance Fee  and Payment History  should be consulted.

Event History

Description Date
Time Limit for Reversal Expired 2014-10-03
Application Not Reinstated by Deadline 2014-10-03
Deemed Abandoned - Failure to Respond to Maintenance Fee Notice 2013-10-03
Letter Sent 2012-10-11
Request for Examination Received 2012-10-02
Request for Examination Requirements Determined Compliant 2012-10-02
All Requirements for Examination Determined Compliant 2012-10-02
Revocation of Agent Requirements Determined Compliant 2011-11-29
Inactive: Office letter 2011-11-29
Inactive: Office letter 2011-11-29
Appointment of Agent Requirements Determined Compliant 2011-11-29
Appointment of Agent Request 2011-11-17
Revocation of Agent Request 2011-11-17
Inactive: Office letter 2011-09-07
Inactive: Adhoc Request Documented 2011-09-07
Revocation of Agent Request 2011-08-24
Appointment of Agent Request 2011-08-24
Inactive: Cover page published 2009-07-28
Inactive: Notice - National entry - No RFE 2009-06-15
Inactive: Inventor deleted 2009-06-15
Inactive: Inventor deleted 2009-06-15
Inactive: Inventor deleted 2009-06-15
Inactive: First IPC assigned 2009-05-29
Application Received - PCT 2009-05-28
National Entry Requirements Determined Compliant 2009-04-01
Application Published (Open to Public Inspection) 2008-04-10

Abandonment History

Abandonment Date Reason Reinstatement Date
2013-10-03

Maintenance Fee

The last payment was received on 2012-10-02

Note : If the full payment has not been received on or before the date indicated, a further fee may be required which may be one of the following

  • the reinstatement fee;
  • the late payment fee; or
  • additional fee to reverse deemed expiry.

Patent fees are adjusted on the 1st of January every year. The amounts above are the current amounts if received by December 31 of the current year.
Please refer to the CIPO Patent Fees web page to see all current fee amounts.

Fee History

Fee Type Anniversary Year Due Date Paid Date
Basic national fee - standard 2009-04-01
MF (application, 2nd anniv.) - standard 02 2009-10-05 2009-09-25
MF (application, 3rd anniv.) - standard 03 2010-10-04 2010-09-29
MF (application, 4th anniv.) - standard 04 2011-10-03 2011-10-03
MF (application, 5th anniv.) - standard 05 2012-10-03 2012-10-02
Request for exam. (CIPO ISR) – standard 2012-10-02
Owners on Record

Note: Records showing the ownership history in alphabetical order.

Current Owners on Record
ENABLENCE INC.
Past Owners on Record
ASHOK BALAKRISHNAN
MATT PEARSON
SERGE BIDNYK
Past Owners that do not appear in the "Owners on Record" listing will appear in other documentation within the application.
Documents

To view selected files, please enter reCAPTCHA code :



To view images, click a link in the Document Description column (Temporarily unavailable). To download the documents, select one or more checkboxes in the first column and then click the "Download Selected in PDF format (Zip Archive)" or the "Download Selected as Single PDF" button.

List of published and non-published patent-specific documents on the CPD .

If you have any difficulty accessing content, you can call the Client Service Centre at 1-866-997-1936 or send them an e-mail at CIPO Client Service Centre.


Document
Description 
Date
(yyyy-mm-dd) 
Number of pages   Size of Image (KB) 
Representative drawing 2009-03-31 1 6
Claims 2009-03-31 4 148
Drawings 2009-03-31 8 65
Description 2009-03-31 11 563
Abstract 2009-03-31 1 82
Cover Page 2009-07-27 2 62
Reminder of maintenance fee due 2009-06-14 1 110
Notice of National Entry 2009-06-14 1 192
Reminder - Request for Examination 2012-06-04 1 116
Acknowledgement of Request for Examination 2012-10-10 1 175
Courtesy - Abandonment Letter (Maintenance Fee) 2013-11-27 1 172
Fees 2011-10-02 1 156
PCT 2009-03-31 4 128
Fees 2009-09-24 1 200
Fees 2010-09-28 1 200
Correspondence 2011-08-23 3 97
Correspondence 2011-09-06 1 15
Correspondence 2011-11-16 3 91
Correspondence 2011-11-28 1 13
Correspondence 2011-11-28 1 21
Fees 2012-10-01 1 42