Language selection

Search

Patent 3106716 Summary

Third-party information liability

Some of the information on this Web page has been provided by external sources. The Government of Canada is not responsible for the accuracy, reliability or currency of the information supplied by external sources. Users wishing to rely upon this information should consult directly with the source of the information. Content provided by external sources is not subject to official languages, privacy and accessibility requirements.

Claims and Abstract availability

Any discrepancies in the text and image of the Claims and Abstract are due to differing posting times. Text of the Claims and Abstract are posted:

  • At the time the application is open to public inspection;
  • At the time of issue of the patent (grant).
(12) Patent: (11) CA 3106716
(54) English Title: PROGRAMMABLE MULTI-WAVEFORM RF GENERATOR FOR USE AS BATTLEFIELD DECOY
(54) French Title: GENERATEUR RF PROGRAMMABLE A FORMES D'ONDE MULTIPLES AUX FINS D'UTILISATION COMME LEURRE SUR LES CHAMPS DE BATAILLE
Status: Granted and Issued
Bibliographic Data
(51) International Patent Classification (IPC):
  • H04K 3/00 (2006.01)
  • F41H 3/00 (2006.01)
  • F41H 11/00 (2006.01)
  • F41H 13/00 (2006.01)
  • H04B 1/40 (2015.01)
  • H04B 7/15 (2006.01)
  • H04W 12/79 (2021.01)
(72) Inventors :
  • DUNN, JEFFREY M. (United States of America)
(73) Owners :
  • KWESST INC.
(71) Applicants :
  • KWESST INC. (United States of America)
(74) Agent: MBM INTELLECTUAL PROPERTY AGENCY
(74) Associate agent:
(45) Issued: 2023-08-15
(22) Filed Date: 2021-01-21
(41) Open to Public Inspection: 2022-07-21
Examination requested: 2021-01-21
Availability of licence: N/A
Dedicated to the Public: N/A
(25) Language of filing: English

Patent Cooperation Treaty (PCT): No

(30) Application Priority Data: None

Abstracts

English Abstract

The invention relates to a portable electronic signal generator, and in particular a programmable multi-waveform radiofrequency generator for use as battlefield decoy.


French Abstract

Il est décrit un générateur de signal électronique portable, et en particulier un générateur radiofréquence à forme donde multiple programmable destiné à être utilisé comme leurre de champ de bataille.

Claims

Note: Claims are shown in the official language in which they were submitted.


CLAIMS
I claim:
CLAIM 1. A battlefield decoy, comprising:
(1) an RF housing with a radio-opaque chassis disposed within the RF housing;
(2) a System on a Chip (SOC) mounted within the radio-opaque chassis, said SOC
having FPGA programmable logic, an application processing unit, a real-time
processing
unit, a platform management unit, a cybersecurity unit, a memory controller
connected to
local Double Data Rate (DDR) memory, and a peripheral controller connected to
peripheral components;
(3) software programming code for simultaneously transmitting a battlefield
waveform
signature set of at least four (4) battlefield waveforms, said software
programming code
saved to local DDR memory and executable by the application processing unit
(APU),
said battlefield wavefomis saved to local DDR memory in the SOC;
(4) a waveform re-programmer for changing from a first battlefield waveform
signature
set to a second battlefield waveform signature set contained in the SOC, said
waveform
reprogrammer comprising programming code saved to local memory and executable
by
the application processing unit;
(5) an RF controller contained in the SOC for controlling RF components in the
RF
housing, said RF controller comprising programming code saved to local memory
and
executable by the application processing unit, said RF components comprising a
duplexer, a power amplifier, a band pass filter, a mixer, a local oscillator,
an intermediate
frequency filter, a modulator, a baseband processor, a demodulator, a second
intermediate frequency filter, a second mixer, a second local oscillator, a
low noise
amplifier, and a second band pass filter;
Date Regue/Date Received 2022-05-27

(6) a spectrum manager contained in the SOC for communicating with a spectrum
manager in an external network to allocate and coordinate non-interfering
battlefield
communication channels;
(7) a GPS-denied network clocking synchronizer contained in the SOC for
maintaining
network clock synchronization in a GPS-denied environment;
(8) a transmission scheduler contained in the SOC for setting a schedule of
transmission
start times and transmission durations;
(9) an external RF antenna operationally connected to the RF components and
extending
outside the RF housing;
(10) a network interface controller connected to the SOC;
(11) a GPS receiver with integrated GPS antenna, connected to the SOC; and
(12) a power supply.
CLAIM 2. The battlefield decoy of claim 1, comprising a second System on a
Chip that
is configured in parallel to the System on a Chip but is positioned away from
the System
on a Chip and at a different orientation to provide RF hardening redundancy.
CLAIM 3. The battlefield decoy of claim 1, comprising wherein the RF
components is
implemented as a Software Defined Radio (SDR) on the System on a Chip.
CLAIM 4. The battlefield decoy of claim 1, wherein the RF housing is no larger
in
dimension than 14"x6"x6".
CLAIM 5. The battlefield decoy of claim 1, wherein said battlefield waveforms
are
selected from the group consisting of: (3.1) modern software defined radio
(SDR)
waveform, (3.2) CDL (Common Data Link), (3.3) TCDL (Tactical CDL), (3.4)
Bandwidth-Efficient CDL, (3.5) Digital Data Link (DDL), (3.6) Harris Adaptive
Networking Wideband (ANW2) Wavefoim, (3.7) a 30MHz-2GHz radio waveform
31
Date Regue/Date Received 2022-05-27

(ANW2), (3.8) Harris AN/PRC-152A waveform, (3.9) MAGTF CLT (Marine Air
Ground Task Force Company Landing Teams), (3.10) USA BCT (United States Army
Basic Combat Training), (3.11) Soldier Radio Waveform (SRW), (3.12) Wideband
Networking Waveform (WNW), (3.13) IV1UOS (Mobile User Objective System)
satellite
waveform, (3.14) Single Channel Ground and Airborne Radio System (SINCGARS),
(3.15) an electronic countermeasures frequency hopping waveform, (3.16) UHF
300M1Iz-3GHz, (3.17) VIEF 30MHZ-300MHz, (3.18) broadband Mobile Ad Hoc
Networking (MANET) waveform, (3.19) Wide Band Networking Radio Waveform
(WBNR), (3.20) European Secure Software Radio (ESSOR), and (3.21) Coalition
Wideband Networking Waveform (COALWNW).
CLAIM 6. The battlefield decoy of claim 1, comprising a repeater having
programming
code saved to memory and executable by the APU to receive and re-transmit a
battlefield
waveform signature set as a bent-pipe repeater without additional digital
signal
processing.
CLAIM 7. The battlefield decoy of claim 1, comprising a repeater having
programming
code saved to memory and executable by the APU to receive, process, and re-
transmit a
battlefield waveform signature set, wherein said processing comprises
demodulation-
remodulation using a MODEM, decompression-recompression using a CODEC,
decryption-re-encryption, noise reduction using a filter or software to reduce
or eliminate
noise, and amplification.
CLAIM 8. The battlefield decoy of claim 1, wherein the RF components are
implemented in the System on Chip (SOC).
CLAIM 9. The battlefield decoy of claim 1, wherein the SoC is a device having
a
single-core processor mated with 28nm programmable logic, at least one
6.25Gb/s to
12.5Gb/s transceiver, and hardened peripherals.
CLAIM 10. The battlefield decoy of claim 1, wherein the SoC is a
multiprocessor
system on a chip (IviPSoC) having an Application Processing Unit in
communication
with an FPGA programmable logic chip, the FPGA programmable logic chip is in
32
Date Regue/Date Received 2022-05-27

communication with a Real Time Processing Unit, a Platform Management Unit and
the
cyber security unit, the FPGA programmable logic chip is also in communication
with
peripheral controllers for peripherals, and with memory controllers for
multiple DDR
modules.
CLAIM 11. The battlefield decoy of claim 1, wherein the SoC is configured as a
High
Intermediate Frequency (IF) Heterodyne Receiver connected to a Direct RF
Sampling
receiver having an all programmable Radio Frequency System on a Chip (RFSoC)
with a Digital Down Conversion (DDC) connected to a Radio Frequency Analog
Digital Converter (RFADC), wherein a Local Oscillator (LO) feeds a signal into
the
RFADC which is in communication with a bandwidth Phase Filter (BPF) and an
Anti-
Aliasing Filter (AAF), the BPF and AAF feed into a low noise amplifier (LNA)
which
is connected to the external RF antenna.
CLAIM 12. A method for selecting a battlefield waveform signature set on a
battlefield
decoy, comprising the steps:
(i) selecting from a menu having a selection of multiple battlefield waveform
signature
sets a battlefield waveform signature set comprising at least four (4)
battlefield
waveforms;
(ii) pre-selecting an alternate battlefield wavefoiiii signature set for fast
re-programming;
(iii) selecting a duration and a periodicity of signal transmission of the
battlefield
waveform signature set; and
(iv) selecting signal characteristics including a control channel used for
encryption and a
type of encryption comprising Advanced Encryption Standard/Data Encryption
Standard
(AES/DES);
wherein the method is perfoimed using the battlefield decoy of claim 1.
3 3
Date Regue/Date Received 2022-05-27

CLAIM 13. The method of claim 12, further comprising the step of performing a
spectrum interference scan by executing software code in a spectrum manager
contained
in the System on Chip (SOC) for communicating with a spectrum manager in the
network to allocate and coordinate non-interfering battlefield communication
channels.
CLAIM 14. The method of claim 12, further comprising the step of perfouning a
GPS
availability scan by executing software code in the GPS-denied network
clocking
synchronizer contained in the SOC for maintaining network clock
synchronization in a
GPS-denied environment.
34
Date Regue/Date Received 2022-05-27

Description

Note: Descriptions are shown in the official language in which they were submitted.


TITLE OF THE INVENTION
Programmable Multi-Waveform RF Generator for Use as Battlefield Decoy
BACKGROUND OF THE INVENTION
FIELD OF THE INVENTION
The invention relates to a portable electronic signal generator, and in
particular a programmable
multi-waveform radiofrequency generator.
DESCRIPTION OF THE RELATED ART
Modern military formations use a variety of electronic devices, and, as a
result, modern military
formations emit a variety of electromagnetic signals.
It is well-known that military assets can be tracked and/or targeted by
capturing the
electromagnetic signals of such assets or formations, and triangulating, using
two or more
receivers, the location where the target signals are being generated.
Electronic equipment uses different signal frequencies, signal amplitudes, and
signal power
depending on the equipment being used. The specific characteristics are known
as the electronic
signature of a device. Hand-held communication equipment, radar equipment,
motors, engines,
and so forth each has their own electronic signature.
Furthermore, a collection of electronic equipment, can also have its own
collective signature.
Modern militaries are aware of the exact type of electronic equipment used by
their allies and
adversaries, including the signal characteristics, the quantity of certain
types of signals, the
timing and use of certain types of signals, and so forth. Accordingly, it is
possible to detect the
exact type of military formation, their size, their equipment, their location,
and their movement
by receiving and analyzing the electromagnetic signature of such a formation.
Electronic
warfare specialists can tell if a military unit is an artillery unit, a
mechanized unit, or a ground
troop formation.
1
Date Recue/Date Received 2021-01-21

Past airborne decoy systems involved the dispersal of physical chaff. More
recently,
sophisticated RF targeting by missiles and artillery demanded the next first
generation of
expendable electronic active decoys. However, these expendable active decoys
were limited to
generating a signal for a single aircraft. The first operational EAD was the
Primed Oscillator
Expendable Transponder (POET) developed by the US and first produced in 1978.
This device
evolved to become the Generic Expendable Decoy (GEN-X) which was developed in
the mid to
late 1980's. Due to the technology available at the time these devices had
limited capability.
During the late 1980s the Towed Radar Decoy (TRD) was developed. These provide
higher
jammer powers and have much greater capability because the jamming waveform is
generated
by a large and complex Digital RFMemory (DRFM) based jammer on-board the
aircraft. The
jamming signal is then fed to the decoy via an optical fibre in the tow cable.
This has been the
preferred active off board ECM solution for the last 20 years.
More recently a system disclosed in U.S. Pat. No. 8,049,656 B2 has been
proposed. This decoy
is disclosed as an expendable, stand-alone, off-board Electronic Counter-
Measure system,
airborne RF decoy aimed to provide airborne platforms with protection against
multiple radar-
based threats including Air-to-Air and Surface-to-Air missiles both active and
semi-active ones
by providing the mechanical outline of standard chaff and flare decoys, is
ejected from any
platform by pyrotechnic elements, and deceives enemy radar-based threats by
acquiring
illuminating radar signals and then altering the received signals to generate
an authentic false
target and transmitting a deceiving signal towards the radar threat. However,
these expendable
active decoys are limited to generating a signal for a single aircraft.
Accordingly, there is a need to be able to electronically protect large
formations from being
electronically identified, targeted, and attacked.
BRIEF SUMMARY OF THE INVENTION
In order to address these and other problems in this art, the invention
described and claimed
herein provides a device that can be used to establish battlefield decoys that
electronically emit
the same or similar electronic signature as a military asset or military
formation.
2
Date Recue/Date Received 2021-01-21

Accordingly, the invention provides in on non-limiting preferred embodiment a
battlefield
decoy, comprising: (1) an RF housing with a radio-opaque chassis disposed
within the RF
housing; (2) a System on a Chip (SOC) mounted within the radio-opaque chassis,
said SOC
having FPGA programmable logic, an application processing unit, a real-time
processing unit, a
platform management unit, a cybersecurity unit, a memory controller connected
to local DDR
memory, and a peripheral controller connected to peripheral components; (3)
software
programming code for simultaneously transmitting a set of at least four (4)
battlefield
waveforms, said battlefield waveforms contained in the SOC, said code
including a library of
saved battlefield waveforms selected from the group consisting of (3.1) modern
software defined
radio (SDR) waveform, (3.2) CDL (Common Data Link), (3.3) TCDL (Tactical CDL),
(3.4)
Bandwidth-Efficient CDL, (3.5) Digital Data Link (DDL), (3.6) Harris Adaptive
Networking
Wideband (ANW2) Waveform, (3.7) Harris AN/PRC-117G radio 30MHz-2GHz waveform
(ANW2), (3.8) Harris AN/PRC-152A waveform, (3.9) DDL, (3.10) MAGTF CLT, (3.11)
USA
BCT, (3.12) Soldier Radio Waveform (SRW), (3.13) SRW narrowband by Harris and
TrellisWare, (3.14) Wideband Networking Waveform (WNW), (3.15) MUOS satellite
waveform, (3.16) Single Channel Ground and Airborne Radio System (SINCGARS) at
30-
87.975 MHz e.g. at 111 hops per second, (3.17) the HAVE QUICK-I/II waveform
having
225MHz to 400MHz waveband, (3.18) UHF 300MHz-3GHz, (3.19) VHF 30MHZ-300MHz,
(3.20) broadband Mobile Ad Hoc Networking (MANET) waveform, (3.21) Wide Band
Networking Radio Waveform (WBNR), (3.22) European Secure Software Radio
(ESSOR), and
(3.23) Coalition Wideband Networking Waveform (COALWNW); (4) a re-programming
module
for changing from a first battlefield waveform signature set to a second
battlefield waveform
signature set contained in the SOC; (5) an RF module contained in the SOC for
controlling RF
components in the RF housing; (6) a spectrum manager module contained in the
SOC for
communicating with a spectrum manager in the network to allocate and
coordinate non-
interfering battlefield communication channels; (7) a GPS-denied network
clocking synchronizer
module contained in the SOC for maintaining network clock synchronization in a
GPS-denied
environment; (8) a transmission scheduler module contained in the SOC for
setting a schedule of
transmission start times and transmission durations; (9) an RF system mounted
within the RF
housing, said RF system having components selected from at least one antenna
operationally
connected to a duplexer, a power amplifier, a band pass filter, a mixer, a
local oscillator, an
3
Date Recue/Date Received 2021-01-21

intermediate frequency filter, a modulator, a baseband processor, a
demodulator, a second
intermediate frequency filter, a second mixer, a second local oscillator, a
low noise amplifier,
and a second band pass filter; (10) a network interface controller connected
to the SOC; (11) a
GPS receiver with integrated GPS antenna, connected to the SOC; and (12) a
power supply.
In another preferred embodiment, the invention provides a programmable
battlefield decoy that
further comprises a second System on a Chip that is configured in parallel to
the (first) System
on a Chip but is positioned away from the first System on a Chip and at a
different orientation to
provide RF hardening redundancy.
In another preferred embodiment, the invention provides a programmable
battlefield decoy
wherein the RF components are implemented in a Software Defined Radio (SDR) as
a software
module on a personal computer or as an embedded System on a Chip.
In another preferred embodiment, the invention provides a programmable
battlefield decoy
wherein the re-programming module for changing from a first waveform signature
to a second
waveform signature is operatively connected to a waveform update module that
is configurable
by receiving updated waveforms by direct hardware link through a update port
in the housing, or
by a wireless link through a wireless transceiver.
In another preferred embodiment, the invention provides a programmable
battlefield decoy that
has a small form factor housing that is no larger in dimension than 14"x6"x6".
In another preferred embodiment, the battlefield decoy comprises a repeater
module having
programming code to receive and re-transmit a specific waveform or signal
pattern as a bent-pipe
repeater without additional digital signal processing.
In another preferred embodiment, the battlefield decoy comprises a repeater
module having
programming code to receive, process, and re-transmit a specific waveform or
signal pattern,
wherein said processing comprises demodulation-remodulation using a MODEM,
decompression-recompression using a CODEC, decryption-re-encryption, noise
reduction using
a filter or software to reduce or eliminate noise, and amplification.
4
Date Recue/Date Received 2021-01-21

In another preferred embodiment, the battlefield decoy comprises wherein the
non-antenna RF
components including duplexer, power amplifier, band pass filter, mixer, local
oscillator,
intermediate frequency filter, modulator, baseband processor, demodulator,
second intermediate
frequency filter, second mixer, second local oscillator, low noise amplifier,
and second band pass
filter, are implemented in the System on Chip (SOC).
In another preferred embodiment, the battlefield decoy comprises an SoC that
is a Xilinx Zynq-
7000 or 7000S device having a single-core ARM CortexTm-A9 processor mated with
28nm
Artix0-7 or Kintex0-7 based programmable logic, at least one 6.25Gb/s to
12.5Gb/s transceiver,
and hardened peripherals.
In another preferred embodiment, the battlefield decoy comprises an SoC that
is an MPSoC
having an Application Processing Unit Quad Arm A53 in communication with an
FPGA
programmable logic chip, the FPGA programmable logic chip is in communication
with a Real
Time Processing Unit Dual Arm R5, a Platform Management Unit and a Cyber
Security
Unit/Module, the FPGA programmable logic chip is also in communication with
peripheral
controllers for peripherals, and with memory controllers for multiple DDR
modules.
In another preferred embodiment, the battlefield decoy comprises an SoC that
is configured as a
High Intermediate Frequency (IF) Heterodyne Receiver connected to a Direct RF
Sampling
receiver having an all programmable RFSoC with a DDC connected to a RFADC,
wherein a
Local Oscillator (LO) feeds a signal into an RF A-D converter which is in
communication with a
bandwidth Phase Filter (BPF) and an Anti-Aliasing Filter (AAF), the BPF and
AAF feed into a
low noise amplifier (LNA) which is connected to an antenna assembly.
In another preferred embodiment, the invention comprises a Method for
deploying a battlefield
decoy comprising the step: (i) selecting the type of military formation that a
user wishes to
emulate from a menu having a selection of battlefield waveform signature sets,
at least one of
said battlefield waveform signature sets comprising at least four (4)
battlefield waveforms; (ii)
selecting a battlefield waveform signature set; (iii) pre-selecting an
alternate battlefield
waveform signature set for fast re-programming; (iv) selecting the duration
and periodicity of
signal transmission of the battlefield waveform signature set; (v) selecting
the type of desired
Date Recue/Date Received 2021-01-21

signal characteristics such as the control channel used for encryption and the
type of encryption
such as AES/DES; and (vi) deploying the activated decoy to the field and
running any
networking and collaboration routines/programming to establish the desired
global or system-
wide arrangement of decoys.
In another preferred embodiment, the method is performed using the battlefield
decoy of claimed
herein.
In another preferred embodiment, the method further comprises the step of
performing a
spectrum interference scan by executing software code in a spectrum manager
module contained
in the SOC for communicating with a spectrum manager in the network to
allocate and
coordinate non-interfering battlefield communication channels.
In another preferred embodiment, the method further comprises the step of
performing a GPS
availability scan by executing software code in a GPS-denied network clocking
synchronizer
module contained in the SOC for maintaining network clock synchronization in a
GPS-denied
environment.
BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF DRAWING
FIG. 1 is an illustration of one non-limiting example of a single decoy unit
having multiple
antennas and mounted on a foldable tripod base.
FIG. 2 is a schematic diagram that illustrates the generic components of the
system of the
invention.
FIG. 3 is a schematic diagram that illustrates an example of a User
interaction in setting up one
of the devices of the system.
FIG. 4 is an illustration of one non-limiting example of a single decoy unit
having articulating
tripod legs and multiple antennas.
FIG. 5 is non-limiting example of an electrical block diagram of an RF decoy
of the invention.
6
Date Recue/Date Received 2021-01-21

FIG. 6 is non-limiting example of a layout of the RF board inside an RF decoy
of the invention.
FIG. 7 is non-limiting example of a depicts a top view and a bottom view
layout of the digital
board inside an RF decoy of the invention.
FIG. 8 is a graphic illustration of an example of an electromagnetic (EM)
footprint of a set of
hypothetical U.S. units, before the inventive decoy device is deployed.
FIG. 9 is a graphic illustration of an example of an electromagnetic (EM)
footprint of a set of
hypothetical U.S. units combined with the deployment of eight (8) decoy
devices.
FIG. 10 is a multi-part series of four (4) graphic illustrations of an example
of an electromagnetic
(EM) footprint of a set of hypothetical U.S. units combined with the an
increasing number of
deployed decoy devices and shows the decreasing chances by percentage that a
friendly unit will
be successfully targeted when an increasing number of decoys are used.
FIG. 11 is a multi-part series of four (4) graphic illustrations of an example
of an electromagnetic
(EM) footprint of a set of hypothetical U.S. units combined with the an
increasing number of
deployed decoy devices and shows the increasing chances by percentage that a
friendly unit will
successfully evade targeting when an increasing number of decoys are used.
FIG. 12 is a integrated circuit chip block diagram for a Zynq-7000S device and
shows a single-
core ARM CortexTm-A9 processor mated with 28nm Artix0-7 based programmable
logic,
6.25Gb/s transceivers and outfitted with commonly used hardened peripherals.
FIG. 13 is a integrated circuit chip block diagram for a Xilinx Zynq-7000
device and shows
dual-core ARM Cortex-A9 processors integrated with 28nm Artix-7 or Kintex0-7
based
programmable logic, up to 6.6M logic cells, and with transceivers ranging from
6.25Gb/s to
12.5Gb/s.
FIG. 14 is an illustration of a block diagram in accordance with the present
invention. Figure 14
shows an MPSoC having an Application Processing Unit Quad Arm A53 in
communication with
an FPGA programmable logic chip. The FPGA programmable logic chip is in
communication
with a Real Time Processing Unit Dual Arm R5, and a Platform Management Unit
and a Cyber
7
Date Recue/Date Received 2021-01-21

Security Unit/Module. The FPGA programmable logic is also in communication
with peripheral
controllers for peripherals, and with memory controllers for multiple DDR
modules.
FIG. 15 is an illustration of a circuit diagram in accordance with the present
invention. Figure 15
shows a High Intermediate Frequency (IF) Heterodyne Receiver connected to a
Direct RF
Sampling receiver having an all programmable RFSoC with a DDC connected to a
RFADC. The
Local Oscillator (LO) feeds a signal into the RF A-D converter which is in
communication with
a bandwidth Phase Filter (BPF) and an Anti-Aliasing Filter (AAF). The BPF and
AAF feed into
the low noise amplifier (LNA) which is connected to the antenna assembly.
FIG. 16 is an illustration of a electronics chassis used in the decoy of the
present invention.
FIG. 17 is a graph showing operating frequencies of commercial cellular
transmissions compared
to battlefield waveforms.
DETAILED DESCRIPTION OF THE INVENTION
The embodiments herein and the various features and advantageous details
thereof are explained
more fully with reference to the non-limiting embodiments that are illustrated
in the
accompanying drawings and detailed in the following description. Descriptions
of well-known
components and processing techniques are omitted so as to not unnecessarily
obscure the
embodiments herein. The examples used herein are intended merely to facilitate
an
understanding of ways in which the embodiments herein may be practiced and to
further enable
those of skill in the art to practice the embodiments herein. Accordingly, the
examples should not
be construed as limiting the scope of the embodiments herein.
Rather, these embodiments are provided so that this disclosure will be
thorough and complete,
and will fully convey the scope of the invention to those skilled in the art.
Like numbers refer to
like elements throughout. As used herein the term "and/or" includes any and
all combinations of
one or more of the associated listed items.
The terminology used herein is for the purpose of describing particular
embodiments only and is
not intended to limit the full scope of the invention. As used herein, the
singular forms "a", "an"
8
Date Recue/Date Received 2021-01-21

and "the" are intended to include the plural forms as well, unless the context
clearly indicates
otherwise. It will be further understood that the terms "comprises" and/or
"comprising," when
used in this specification, specify the presence of stated features, integers,
steps, operations,
elements, and/or components, but do not preclude the presence or addition of
one or more other
features, integers, steps, operations, elements, components, and/or groups
thereof.
Unless defined otherwise, all technical and scientific terms used herein have
the same meanings
as commonly understood by one of ordinary skill in the art. Nothing in this
disclosure is to be
construed as an admission that the embodiments described in this disclosure
are not entitled to
antedate such disclosure by virtue of prior invention. As used in this
document, the term
"comprising" means "including, but not limited to."
Many modifications and variations can be made without departing from its
spirit and scope, as
will be apparent to those skilled in the art. Functionally equivalent methods
and apparatuses
within the scope of the disclosure, in addition to those enumerated herein,
will be apparent to
those skilled in the art from the foregoing descriptions. Such modifications
and variations are
intended to fall within the scope of the appended claims. The present
disclosure is to be limited
only by the terms of the appended claims, along with the full scope of
equivalents to which such
claims are entitled. It is to be understood that this disclosure is not
limited to particular methods,
reagents, compounds, compositions or biological systems, which can, of course,
vary. It is also to
be understood that the terminology used herein is for the purpose of
describing particular
embodiments only, and is not intended to be limiting.
With respect to the use of substantially any plural and/or singular terms
herein, those having skill
in the art can translate from the plural to the singular and/or from the
singular to the plural as is
appropriate to the context and/or application. The various singular/plural
permutations may be
expressly set forth herein for sake of clarity.
It will be understood by those within the art that, in general, terms used
herein, and especially in
the appended claims (e.g., bodies of the appended claims) are generally
intended as "open" terms
(e.g., the term "including" should be interpreted as "including but not
limited to," the term
"having" should be interpreted as "having at least," the term "includes"
should be interpreted as
9
Date Recue/Date Received 2021-01-21

"includes but is not limited to," etc.). It will be further understood by
those within the art that
virtually any disjunctive word and/or phrase presenting two or more
alternative terms, whether in
the description, claims, or drawings, should be understood to contemplate the
possibilities of
including one of the terms, either of the terms, or both terms. For example,
the phrase "A or B"
will be understood to include the possibilities of "A" or "B" or "A and B."
In addition, where features or aspects of the disclosure are described in
terms of Markush groups,
those skilled in the art will recognize that the disclosure is also thereby
described in terms of any
individual member or subgroup of members of the Markush group.
As will be understood by one skilled in the art, for any and all purposes,
such as in terms of
providing a written description, all ranges disclosed herein also encompass
any and all possible
subranges and combinations of subranges thereof. Any listed range can be
easily recognized as
sufficiently describing and enabling the same range being broken down into at
least equal
subparts. As will be understood by one skilled in the art, a range includes
each individual
member.
DEFINITIONS
The phrase "radiofrequency or RF components" refers to antenna(s), duplexer,
power amplifier,
bandpass filter, 1st mixer, 1st Local Oscillator, intermediate frequency
filter, modem, baseband
processor, 2d IF filter, 2d mixer, 2d LO, Low Noise Amplifier, 2d BP filter,
and optionally may
include one or more accelerometers, codec, GPS unit, and repeaters.
The phrase "System on Chip", or SoC, refers to an integrated circuit chip that
integrates all or
most of the components of a computer or electronic system. SoC usually
includes (i) one or
more microcontroller, microprocessor or digital signal processor (DSP)
core(s), (ii) memory
blocks including a selection of ROM, RAM, EEPROM and flash memory, (iii)
timing
sources/clock signal generators, including oscillators and phase-locked loops
to control
execution of SoC functions, (iv) peripherals including counter-timers, real-
time timers and power-on reset generators, (v) external interfaces and
programming for
communication protocols including WiFi, Bluetooth, cellular, USB, FireWire,
Ethernet, USART,
SPI, and HDMI, (vi) analog interfaces including analog-to-digital converters
and digital-to-
Date Recue/Date Received 2021-01-21

analog converters, (vii) voltage regulators and power management circuits,
and/or (viii)
a computer bus to connect the different components, also called "blocks", of
the System-on-
Chip, and/or (ix) direct memory access controllers to route data directly
between external
interfaces and memory, bypassing the CPU or control unit, thereby increasing
the
data throughput (the amount of data processed per time) of the SoC.
Waveform Processing Example - SoC Xilinx Zynq
Xilinx SoCs are processor-centric platforms that offer software, hardware and
I/O
programmability in a single chip. The Zynq-7000 family is based on the SoC
architecture. Zynq-
7000 products incorporate a dual core ARM Cortex-A9 based Processing System
(PS) and
Xilinx Programmable Logic in a single device.
Waveform Processing Example - Xilinx Zynq-70005
Zynq-70005 devices feature a single-core ARM CortexTm-A9 processor mated with
28nm
Artix0-7 based programmable logic, 6.25Gb/s transceivers and outfitted with
commonly used
hardened peripherals.
Waveform Processing Example - Xilinx Zynq-7000
Zynq-7000 devices are equipped with dual-core ARM Cortex-A9 processors
integrated with
28nm Artix-7 or Kintex0-7 based programmable logic, up to 6.6M logic cells,
and with
transceivers ranging from 6.25Gb/s to 12.5Gb/s.
The phrase "RF generator" refers to an electronic component capable of
generating, transmitting,
and/or receiving radiofrequency communication signals of varying types. In one
embodiment,
the RF generator can generate 3-4 waveforms to mimic military communications.
In non-
limiting preferred embodiments, the waveforms include modern software defined
radio (SDR)
waveforms, CDL (Common Data Link), TCDL (Tactical CDL), Bandwidth-Efficient
CDL,
Digital Data Link (DDL), Harris Adaptive Networking Wideband (ANW2) Waveform,
Harris
AN/PRC-117G radio 30MHz-2GHz waveform (ANW2), Harris AN/PRC-152A waveform,
MAGTF CLT, USA BCT, Soldier Radio Waveform (SRW), SRW narrowband by Harris and
11
Date Recue/Date Received 2021-01-21

TrellisWare, Wideband Networking Waveform (WNW), MUOS satellite waveform,
Single
Channel Ground and Airborne Radio System (SINCGARS) at 30-87.975 MHz e.g. at
111 hops
per second, the HAVE QUICK-I/II waveform having 225MHz to 400MHz waveband, UHF
300MHz-3GHz, VHF 30MHZ-300MHz, broadband Mobile Ad Hoc Networking (MANET)
waveform, and Wide Band Networking Radio Waveform (WBNR), European Secure
Software
Radio (ESSOR), and Coalition Wideband Networking Waveform (COALWNW).
Example - CDL Waveform
Common Data Link (CDL) is a secure U.S. military communications protocol. It
was established
by the U.S. Depai intent of Defense in 1991 as the U.S. military's primary
protocol for imagery
and signals intelligence. CDL operates within the Ku band at data rates up to
274 Mbit/s. CDL
allows for full duplex data exchange. CDL signals are transmitted, received,
synchronized,
routed, and simulated by Common data link (CDL) Interface Boxes (CIBs).
Example - Tactical CDL Waveform
The Tactical Common Data Link (TCDL) is a secure data link being developed by
the U.S.
military to send secure data and streaming video links from airborne platforms
to ground
stations. The TCDL can accept data from many different sources, then encrypt,
multiplex,
encode, transmit, demultiplex, and route this data at high speeds. It uses a
Ku narrowband uplink
that is used for both payload and vehicle control, and a wideband downlink for
data transfer. The
TCDL uses both directional and omnidirectional antennas to transmit and
receive the Ku band
signal. The TCDL is designed for UAVs, specifically the MQ-8B Fire Scout, as
well as manned
non-fighter environments. The TCDL transmits radar, imagery, video, and other
sensor
information at rates from 1.544 Mbit/s to 10.7 Mbit/s over ranges of 200 km.
It has a bit error
rate of 10e-6 with COMSEC and 10e-8 without COMSEC. It is also intended that
the TCDL will
in time support the required higher CDL rates of 45, 137, and 274 Mbit/s.
Example - DDL waveform
The Army developed digital data link (DDL) system for use in unmanned aircraft
systems
(UAVs). The DDL design incorporates aspects of a software-defined radio with
the ability to
12
Date Recue/Date Received 2021-01-21

"field-select" the frequency band in which to operate, the channel frequency
within that band, the
bandwidth of each channel, and the radiated power level.
Example - SRW waveform
The Soldier Radio Waveform (SRW) supports a discrete a set of bandwidths, has
a frequency
range fomr 225 MHz to 420 MHz; and from 1.350 GHz to 2.500 GHz, has a maximum
data rate
of 2 Mbps, and uses a multiple access channel (MAC) method of hybrid
CSMA/TDMA.
Example - WNW waveform
The Wideband Networking Waveform (WNW) uses a selection of operating modes
including
Orthogonal Frequency Domain Multiple Access (OFDM-WB) mode, Anti-jam (WB)
mode,
BEAM (NB) mode, and LPI/LPD (Low Probability of Intercept/Detection¨spread)
mode, has a
Frequency Range from 225 to 420 MHz; 1.350 to 1.390 GHZ 1.755 to 1.850 GHz,
has a
Maximum data rate of 5 Mbps, and uses MAC method USAP / TDMA.
Example - ANW2
The Harris Networking Waveform (ANW2) has a range of bandwidths from 500 KHz
to 5 MHz,
a range of data rates up tp 10 Mbps
RF generators may also be equipped to include cellular signals and their
graphically visible
waveforms, such as LTE, TDMA, FDMA, CDMA, WiMax, HSPA+, EV-DO, etc.
The term "RF", as used herein, is intended to be understood in its broad sense
as including the
full spectrum of radio frequencies from about 1 megahertz (MHz) to about 300
gigahertz (GHz).
The term "decoy" as used herein refers to a device that generates false RF
signals that look like
the collective signal signature of a group, the electronic "chatter" that is
generated by a military
formation such as a military command (>100,000 persons), a corps (20,000-
50,000), a division
(6000-20,000), a brigade/regiment (3000-5000), a battalion (300-1000), a
company/squadron/battery (80-250), a platoon/troop (26-55), a section/patrol
(12-24), a squad
(8-12), or a team (2-4). The term decoy as used herein does not refer to a
physical structure that
13
Date Recue/Date Received 2021-01-21

gives a false radar signature, or to an electronic reflector/transmitter that
transmits a false radar
signature of a physical structure.
Referring now to the drawings, FIGURE 1 is an illustration of one non-limiting
example of a
single decoy unit having multiple antennas and mounted on a base having
foldable support legs.
Figure 1 shows base support leg(s) 102 attached to folding hinge connector 104
to connect the
support leg(s) 102 to the extendable central support post 106. The main
electronics housing 108
is mounted on top of the central support post 106, and the antenna(s) 110, 112
and control knob
118 are mounted on top of the housing 108. Pedestal footer 114 is attached to
the bottom of
central support post 106. Battery 116 is stored within central cavity 122
inside of the hollow
cylinder of central support post 106. Battery 116 supplies power to the RF
components 120 and
SOC 124 via power supply 126. The RF components 120 include antenna interface,
duplexer,
power amplifier, BP filter, 1st mixer, 1st LO, IF filter, ADC, modem/DSP, DAC,
baseband
processor, 2d IF filter, 2d mixer, 2d LO, LNA, and 2d BP filter - notionally
represented as RF
circuit/electronics 140. The RF components may also optionally include memory
128, network
card-ports-processor 130, accelerometer, a CODEC, a GPS receiver and processor
132, repeater,
network antenna 134, GPS-denied network clocking synchronizer 136, pre-
programmed remote
activation scheduler 138, and duplicate, redundant electronic pathways and
circuitry to make the
unit radiation-hardened. In one preferred embodiment, the RF components are
provided using a
System on Chip (SoC). The SoC may include one or more processor(s), memory,
I/O, storage,
WiFi module programming for transmit- receive RF module, waveform signature(s)
module, RF
control module, and a power supply module.
FIGURE 2 is a schematic diagram that illustrates the generic components of the
system of the
invention. Figure 2 shows in a non-limiting example, the system may comprise a
housing 202,
RF components 204, an RF generator 208, antennas 206, processing such as a
System on Chip
210, and a power source 212. The housing 202 includes external controls, I/O
ports, antenna
ports, a display screen, and stabilizer supports (legs). The RF components 204
include antenna
interface, duplexer, power amplifier, BP filter, 1st mixer, 1st LO, IF filter,
ADC, modem/DSP,
DAC, baseband processor, 2d IF filter, 2d mixer, 2d LO, LNA, and 2d BP filter.
The RF
components may also optionally include memory, network card-ports-processor,
accelerometer,
a CODEC, a GPS receiver and processor, repeater, and duplicate, redundant
electronic pathways
14
Date Recue/Date Received 2021-01-21

and circuitry to make the unit radiation-hardened. The System on Chip (SoC)
210 includes
processor(s), memory, I/O, storage, WiFi module programming for transmit-
receive RF module,
waveform signature(s) module, RF control module, and a power supply module.
FIGURE 3 is a schematic diagram that illustrates an example of a User
interaction in setting up
one of the devices of the system. Figure 3 shows in a non-limiting example,
the process may
comprise the steps of (i) selecting the type of military formation that a user
wishes to emulate
302, (ii) selecting the type of waveform that is representative of those types
of formations from a
programmed sub-menu 304, (iii) pre-selecting alternate waveforms for fast re-
programming 312,
(iv) selecting the duration and periodicity of signal transmission 306, (v)
selecting the type of
desired signal characteristics such as the control channel used for encryption
and the type of
encryption such as AES/DES 308, and (vi) deploying the activated decoy to the
field and running
any networking and collaboration routines/programming to establish the desired
global or
system-wide arrangement of decoys 310.
FIGURE 4 is an illustration of one non-limiting example of a single decoy unit
having
articulating tripod legs and multiple antennas. Figure 4 shows an example unit
that has a "pop-
up" storage and deployment feature where the unit is stored in a closed
cannister configuration,
and is activated by sliding the bottom footer 402 away from the decoy body 404
and deploying
the articulating stabilizer legs 406. This example shows a device have two
different types of
antennas 408, 410, two control knobs 412, 414, a display window 416 in a
cylindrical housing
404 having a center post 418 for sliding the unit between the open and closed
positions, a
circular base or footer 402, and multiple (3-6) articulating legs 406 that
each have a contact
pad420 connected to an adjustment arm 422 that is (slidably) connected to a
vertical support
member 424 mounted within the cylinder of the housing.
FIGURE 5 is non-limiting example of a generic electrical block diagram of an
RF decoy of the
invention. Figure 5 shows an antenna 502, a battery 504, antenna interface
506, and receiver
module 508. Digital Radio Frequency Modulation and other DSP processing is
handled at
generator 510. Waveform external control module 512 and WiFi and GPA location
module 514
are shown in communication with generator system 510. Repeater unit 516 and
rad-hard
redundancy module 518 are shown also in communication with generator system
510.
Date Recue/Date Received 2021-01-21

Transmitter 520 is in circuit and any transmission signal is transferred to
the antenna 502 through
interface 506.
FIGURE 6 is non-limiting example of a layout of the RF board inside an RF
decoy of the
invention. Figure 6 shows antenna 602 attached to antenna interface and/or
duplexer 604.
Antenna interface 604 on the receive channel connects to a low noise amplifier
606, a band pass
filter 608 and a LO/balanced mixer 610. The transmit channel includes a
DSP/synthesizer unit
612 and a processor unit 614 that may contain ADC/DAC, MODEM, and other
secondary DSP
aspects, including I/O outputs at 614. The transmit channel then continues
with the second
LO/balanced mixer 618, optional phase shifter or IF filter 620, a band pass
filter 622, a high
power amplifier 624 and then back to the antenna interface 604/switch.
FIGURE 7 is non-limiting example of a top view and a bottom view layout of an
example of a
digital board inside an RF decoy of the invention. Figure 7 shows an example
of a layout of the
Digital Board including digital processors, analog to digital converters,
digital to analog
converters, memory units and programmable gate arrays. The real time software
that controls the
mission of the RF decoy resides in this Digital Board.
FIGURE 8 is a graphic illustration of an example of an electromagnetic (EM)
footprint of a set
of hypothetical U.S. units, before the inventive decoy device is deployed.
FIGURE 9 is a graphic illustration of an example of an electromagnetic (EM)
footprint of a set
of hypothetical U.S. units combined with the deployment of eight (8) decoy
devices.
FIGURE 10 is a multi-part series of four (4) graphic illustrations of an
example of an
electromagnetic (EM) footprint of a set of hypothetical U.S. units combined
with the an
increasing number of deployed decoy devices and shows the decreasing chances
by percentage
that a friendly unit will be successfully targeted when an increasing number
of decoys are used.
FIGURE 11 is a multi-part series of four (4) graphic illustrations of an
example of an
electromagnetic (EM) footprint of a set of hypothetical U.S. units combined
with the an
increasing number of deployed decoy devices and shows the increasing chances
by percentage
16
Date Recue/Date Received 2021-01-21

that a friendly unit will successfully evade targeting when an increasing
number of decoys are
used.
FIGURE 12 is a integrated circuit chip block diagram for a Zynq-7000S device
and shows a
single-core ARM CortexTm-A9 processor mated with 28nm Artix0-7 based
programmable logic,
6.25Gb/s transceivers and outfitted with commonly used hardened peripherals.
FIGURE 13 is a integrated circuit chip block diagram for a Xilinx Zynq-7000
device and shows
dual-core ARM Cortex-A9 processors integrated with 28nm Artix-7 or Kintex0-7
based
programmable logic, up to 6.6M logic cells, and with transceivers ranging from
6.25Gb/s to
12.5Gb/s.
FIGURE 14 is an illustration of a block diagram in accordance with the present
invention.
Figure 14 shows an MPSoC having an Application Processing Unit Quad Arm A53 in
communication with an FPGA programmable logic chip. The FPGA programmable
logic chip is
in communication with a Real Time Processing Unit Dual Arm R5, and a Platform
Management
Unit and a Cyber Security Unit/Module. The FPGA programmable logic is also in
communication with peripheral controllers for peripherals, and with memory
controllers for
multiple DDR modules.
FIGURE 15 is an illustration of a circuit diagram in accordance with the
present invention.
Figure 15 shows a High Intermediate Frequency (IF) Heterodyne Receiver
connected to a Direct
RF Sampling receiver having an all programmable RFSoC with a DDC connected to
a RFADC.
The Local Oscillator (LO) feeds a signal into the RF A-D converter which is in
communication
with a bandwidth Phase Filter (BPF) and an Anti-Aliasing Filter (AAF). The BPF
and AAF feed
into the low noise amplifier (LNA) wich is connected to the antenna assembly.
FIGURE 16 is an illustration of an electronics chassis in accordance with the
present invention.
Fig. 16 shows chassis laying on its side and viewing down the interior cavity
from the top end
towards the bottom end. The chassis is configured as a rectangular open-ended
box having four
side panels.
17
Date Recue/Date Received 2021-01-21

Three of the four exterior side panels have an array of longitudinal radiative
fins running the
length of the chassis from top to bottom. The fourth exterior side panel is
smooth and includes
openings for input, output, control, access, and so forth. The interior of the
chassis includes ribs
and channels for mounting the RF components and other electronics. The
radiative fins are used
to radiate excess heat that is generated by the RF broadcast away from the
decoy unit to protect
the electronics from thermal damage.
In a preferred embodiment, the chassis (or sections thereof) is constructed
using radio-opaque
composites. Radio-opaque composites according to the present invention include
a base chassis
material infused with a radio-opaque additive such as barium sulfate, bismuth
compounds, and
tungsten compounds. Base materials include polymers, glasses, ceramics,
metals, metal alloys,
and composite materials.
Non-limiting examples of polymers may include polycarbonates, HD- and LD-
polyethylenes,
polypropylenes, polyvinylchlorides, polystyrenes, nylons,
polytetrafuoroethylenes, thermoplastic
polyurethanes, polyacrylates, polyamides, polysulfides, polysulfones,
polysilicones,
polysiloxanes, polyaramids, polyimides, halogenated polymers,
polyacrylonitrile, carbon
polymers, carbon sheets, carbon nanomaterials, and co-polymers of the above.
Non-limiting
examples of glass may include silica glass, fused-silica glass, soda-lime
glass, lead glass,
borosilicate glass, aluminosilicate glass, and fiberglass. Non-limiting
examples of metals and
metal alloys may include aluminum, steel, nickel, copper, titanium, and zinc.
Non-limiting
examples of composite materials may include a homogenous material having
fibers of a second
material, a first material coated by a second material, and combinations and
permutations of
materials doped and/or coated in multiple layers having radio-opaque
functionality.
HOUSING
Referring to the housing, it is contemplated as within the scope of the
invention that the housing
may be constructed of metal, metal alloy, polymer, ceramic, and composite
materials. The
housing may be a unitary construction or may be assembled in a modular manner.
The housing
may be weather-proofed using gaskets, seals, and coating.
18
Date Recue/Date Received 2021-01-21

The housing has one or more antenna ports for attaching the external portion
of antennas, as well
as external user controls, I/O ports, an optional display screen, as well as
attachment hardware
for stabilizer supports.
In one embodiment, the device is folded into a compact form factor and upon
deployment is
manually or automatically unfolded and opened. In one embodiment, the unit has
foldable
stabilizer legs, such as tripod. In another aspect, the legs may be
articulatable and adjustable. In
some preferred embodiments the articulatable legs may be adjustable along an x-
axis, or along
both an x- and y-axis (up/down, side-to-side), or along an x-, y-, and z-axis
(up/down, side-to-
side, rotationally).
In a non-limiting preferred embodiment, the housing dimensions are no larger
than
approximately 12" h x 6" w x 6" d, although the unit itself may be
asymmetrical. In another
non-limiting embodiment, the housing is no larger than 18" h x 9" w x 9" d. In
another non-
limiting embodiment, the housing is no larger than 24" h x 12" w x 12" d.
In a non-limiting, preferred embodiment, the housing includes a chassis as
shown in Figure 16.
OPERATING FREQUENCIES
Referring now to Figure 17, there is a graph showing operating frequencies of
commercial
cellular transmissions compared to battlefield waveforms. Mobile phones in the
United States
operate at different frequencies based on carrier, uplink/downlink, and
generation. In general, 2G
and 3G cellular phones operate at 850 MHz uplink, and 1,900 MHz downlink with
average
transmission speeds of 0-5 Mbps. 4G cellular phones operate mainly at 1700 MHz
uplink, and
2100 MHz downlink with average transmission speeds of 5-12 Mbps. To compare to
military-
based operations, we overlay these frequencies and data rates on a chart
displaying demonstrated
throughput of the various MANET waveforms of interest. The 4G waveforms exist
in a desirable
section of the tradespace with higher data rates than achieved by both legacy
and MANET
waveforms, but in the same frequency range as both the SRW and WNW systems.
19
Date Recue/Date Received 2021-01-21

ANTENNA
Referring to the antenna, it is contemplated as within the scope of the
invention that the antenna
is selected from the group consisting of: a phase array antenna, Wire Antennas
selected from a
Short Dipole Antenna, a Dipole Antenna, a Half-Wave Dipole, a Broadband
Dipoles, a
Monopole Antenna, a Folded Dipole Antenna, a Loop Antenna, and a Cloverleaf
Antenna,
Travelling Wave Antennas selected from a Helical Antenna, a Yagi-Uda Antenna,
and a Spiral
Antenna, Reflector Antennas selected from a Corner Reflector, and a Parabolic
Reflector (Dish
Antenna), Microstrip Antennas selected from a Rectangular Microstrip (Patch)
Antenna, and a
Planar Inverted-F Antenna (PIFA), Log-Periodic Antennas selected from a Bow
Tie Antenna, a
Log-Periodic Antenna, and a Log-Periodic Dipole Array, Aperture Antennas
selected from a Slot
Antenna, a Cavity-Backed Slot Antenna, a Inverted-F Antenna, a Slotted
Waveguide Antenna, a
Horn Antenna, a Vivaldi Antenna, and Other Antennas selected from a NFC
Antenna, and a
Fractal Antenna.
RF COMPONENTS/CIRCUIT
Referring to the RF components it is contemplated as within the scope of the
invention that the
RF components may include a clocking circuit, a duplexer, a power amplifier, a
band pass filter,
a mixer, a local oscillator, an intermediate frequency filter, a
modulator/demodulator, digital
signal processor and DSP programming, analog-to-digital (ADC) and digital-to-
analog (DAC)
converters, a baseband processor, a second intermediate frequency filter, a
second mixer, a
second local oscillator, a low noise amplifier, a second band pass filter.
Additional optional RF components may include memory, including PROM, Flash,
SDRAM,
EEPROM, DSP components, an accelerometer, a CODEC, GPS, repeater circuit, and
networking
hardware and programming for communicating with other local decoy devices.
It is also contemplated that the RF components may include may include
specialized processors
such as Field Programmable Gate Arrays (FPGAs) and Application Specific
Integrated Chips
(ASICs).
Date Recue/Date Received 2021-01-21

The RF components may also include radiation hardening designs such as
providing multiple
redundant logic and chip components arrayed in a non-linear spatial
arrangement, and temporal
latch technology with multiple parallel redundant processes running at off-set
times and using a
voting feature.
NETWORKED DECOYS
The networking aspect of the decoy system also contemplates that each decoy
within an array or
constellation may be programmed to transmit a specific waveform or signal
pattern. In one non-
limiting example, the system may be comprised of a 1st decoy or 1st group of
decoys that is
broadcasting a ground troop formation signal or signal set/waveform, a 2d
decoy or 2d group of
decoys is broadcasting an artillery signal or signal set/waveform, a 3d decoy
or 3d group of
decoys is broadcasting a reconnaissance signal or signal set/waveform, and a
4th decoy or 4th
group of decoys is broadcasting a command signal or signal set/waveform.
DECOYS AS REPEATERS
The repeater aspect of the decoy system also contemplates that each decoy
within an array or
constellation may be programmed to receive and re-transmit a specific waveform
or signal
pattern. In one embodiment, the signal may be received, processed, amplified,
and re-
transmitted. Processing may include demodulation-remodulation using a MODEM,
decompression-recompression using a CODEC, decrypted-re-encrypted, and noise
reduced using
a filter or software to reduce or eliminate noise such as gaussian white
noise, etc.
In one non-limiting example, the system may be comprised of a 1st decoy or 1st
group of decoys
that is broadcasting a military waveform signal or signal set/waveform, a 2d
decoy or 2d group
of decoys receives and re-transmits the military waveform signal or signal
set/waveform.
In another non-limiting example, the battlefield decoy comprises a repeater
module having
programming code to receive and re-transmit a specific waveform or signal
pattern as a bent-pipe
repeater without additional digital signal processing.
21
Date Recue/Date Received 2021-01-21

In another non-limiting example, the battlefield decoy comprises a repeater
module having
programming code to receive, process, and re-transmit a specific waveform or
signal pattern,
wherein said processing comprises demodulation-remodulation using a MODEM,
decompression-recompression using a CODEC, decryption-re-encryption, noise
reduction using
a filter or software to reduce or eliminate noise, and amplification.
RADIO TRANSMITTER
As contemplated within the scope of the invention, a radio transmitter
consists of these basic
components:
(i) A power supply circuit to transform the input electrical power to the
higher voltages needed to
produce the required power output;
(ii) An electronic oscillator circuit to generate the radio frequency signal,
or carrier wave;
(iii) A modulator circuit to add the information to be transmitted to the
carrier wave produced by
the oscillator, such as by using different modulation methods including
amplitude modulation,
frequency modulation, etc.;
(iv) ) A radio frequency (RF) amplifier, to increase the power of the signal,
to increase the range
of the radio waves; and
(v) An impedance matching (antenna tuner) circuit, to match the impedance of
the transmitter to
the impedance of the antenna (or the transmission line to the antenna), to
transfer power
efficiently to the antenna.
SOFTWARE DEFINED RADIO
Software-defined radio (SDR) is a radio communication system where components
that have
been traditionally implemented in hardware (e.g. mixers, filters, amplifiers,
modulators/demodulators, detectors, etc.) are instead implemented by means of
software on a
computer or embedded system. An SDR includes RF hardware, a Low-Noise
Amplifier (LNA),
and Intermediate Frequency (IF) Filter, analog-digital converter (ADC), a
digital channel
22
Date Recue/Date Received 2021-01-21

converter, a sampling rate converter, a Base Band processing system that
includes a Base Band
hardware processor such as a Field Programmable gate Array (FPGA), Digital
Signal Processor
(DSP), and/or an Application Specific Integrated Circuit (ASIC), and a Base
Band software
processor that may include a Virtual Radio Machine, one or more algorithms,
Common Object
Request Broker Architecture (CORBA), and other programming modules such as
those provided
in the GNU Radio software development toolkit (sdk) that provides signal
processing blocks to
implement software-defined radios and signal-processing systems with external
RF hardware to
create software-defined radios.
SDR TRANSMITTER
An SDR transmitter is simply (1) an RF front-end (hardware) that includes an
antenna, amplifier,
filter, and optionally a D/A converter, coupled to (2) programming software
code instructions for
performing some or all of the following functions using a processor: modem,
codec, encryption,
network connection, routing, graphical user interface, and optionally ADC.
RF GENERATOR
Referring to the programmable multi-waveform RF generator, it is contemplated
as within the
scope of the invention that the the programmable multi-waveform RF generator
is a configured
to fit within a small form factor. The RF generator described herein is used
for mimic'ing the
signals, signal sets, or waveforms of military formations.
MULTIPLE RF WAVEFORMS
In a non-limiting preferred embodiment, the device is capable of producing up
to 16 different
signals simultaneously. In another preferred embodiment, waveforms are
collected and saved in
waveform sets. Waveforms sets include the typical waveform profile of a
specific military
formation or unit; one set per organization unit. For example, the invention
includes a waveform
set of frequencies for a Marine infantry unit, or an Army squad, platoon,
company, artillery
battery, battalion, regiment, brigade, army special forces, or a Navy ship,
task unit, task group,
task force, fleet, or Navy special forces, or Air Force flight group,
squadron, wing, brigade,
division, or Air Force special forces.
23
Date Recue/Date Received 2021-01-21

In a preferred embodiment, the device is programmable to transmit 4 waveform
sets
simultaneously.
In another preferred embodiment, the device allows for the waveform sets to be
re-
programmable to other groups of waveform sets. The programming can be
established from
local memory in the device, or it can be remotely downloaded from a network
control, or custom
set grouping using both local and remote waveform sets.
EXAMPLE -4 waveform sets
In a non-limiting illustration, a decoy unit may be programmed to broadcast 4
simultaneous
waveforms: a Marine infantry waveform set, an Artillery waveform set, a
Special Forces
waveform set, and an Air Force squadron waveform set.
Specifications that are contemplated as within the scope of the invention
include an RF
transmitter having a programmable and extensible wireless channel transmitter
accommodating
networks of 8 to 100 radio nodes operating in a frequency range of 2 MHz to 2
GHz. The
transmitter should be high fidelity, broadband, have good delay and
attenuation resolutions, a
large dynamic range, low minimum latency, provide high isolation between
radios, and emulate
propagation delays of up to 1 second. The transmitter should handle radio
networks using
multiple protocols and waveforms, including full duplex, frequency agile, and
power adaptable
radios, through a single RF port per radio. The transmitter should be capable
of running
programmed protocols with time-varying losses, delays, multipath, Doppler, and
statistical
fading. It should also have a modular and scalable design that has 400 MHz
input, and 250 MHz
output bandwidths over 2-2000 MHz while offering a large transmitted receive
signal dynamic
range and high isolation full duplex operation with transmit powers from 1 mW
to 200 W. The
transmitter is waveform agnostic, may handles frequency agile radios, and may
be configured to
transmit up to 64 time-varying, high fidelity multipath channels. The
transmitter may also
establish and work in a radio network of 2-50 devices, with transmit and
receive channels
reserved for digital links to external controllers.
SoC
24
Date Recue/Date Received 2021-01-21

Referring to the System on a Chip, it is contemplated as within the scope of
the invention that the
SoC may contain software programming code for receiving and transmitting
battlefield
waveforms, a re-programming module for changing from a first waveform
signature to a second
waveform signature, an RF module for controlling the RF components in the RF
housing. As
stated, in a non-limiting preferred embodiment, the device is capable of
producing up to 16
different signals simultaneously.
GPS
In a preferred embodiment, the unit is equipped with GPS receiver and location
memory for
recovery and re-use. Upon deployment, the unit can be programmed to receive
GPS coordinates,
which are then saved to memory. The unit may also be programmed to report it's
GPS location
to a central decoy operator or decoy operation server.
POWER SUPPLY
Referring to the power supply, it is contemplated as within the scope of the
invention that the
power supply may include an electric battery to provides the current and the
voltage required for
the entire period of operation of the RF decoy.
In a preferred embodiment, the power supply provides over 48 hours of
continuous decoy
transmission. Optionally, the device may be configured with a solar trickle
charge unit and the
unit may be programmed to temporarily power down during re-charging of the
battery, and then
re-initiate transmissions once the battery is charged.
In one preferred aspect, the preferred battery is a thermal battery that can
be maintenance-free for
a period of at least 10-15 years, being rechargeable or replaceable
afterwards. The thermal
battery is activated at the instance of the deployment by an appropriate
mechanism.
Alternatively, an alkaline battery, a lithium battery, NiCad battery, a
hydrogen fuel cell, a
polymer battery, a solar panel charged battery system, or a separate external
battery linked to a a
power charging port, may be used instead of the thermal battery.
Date Recue/Date Received 2021-01-21

It is contemplated as within the scope of the invention that the power supply
unit is a DC to DC
converter which accepts the voltage of the battery (at a nominal value of 12V)
and transforms it
to several regulated voltages (such as 8V, 5V, 3.3V, 1.8V, 1.2V etc).
RADIATION HARDENING
In another preferred embodiment, the invention provides a programmable
battlefield decoy that
further comprises a second System on a Chip that is configured in parallel to
the (first) System
on a Chip but is positioned away from the first System on a Chip and at a
different orientation to
provide RF hardening redundancy.
SOFTWARE DEFINED RADIO
In another preferred embodiment, the invention provides a programmable
battlefield decoy
wherein the RF components are implemented in a Software Defined Radio (SDR) as
a software
module on a personal computer or as an embedded System on a Chip.
PROGRAMMABLE
In another preferred embodiment, the invention provides a programmable
battlefield decoy
wherein the re-programming module for changing from a first waveform signature
to a second
waveform signature is operatively connected to a waveform update module that
is configurable
by receiving updated waveforms by direct hardware link through a update port
in the housing, or
by a wireless link through a wireless transceiver.
In another preferred embodiment, the invention provides a programmable
battlefield decoy that
has a small form factor housing that is no larger in dimension than 12"x6"x6".
NETWORK CLOCKING
Clocking determines how individual decoys or entire decoy networks sample
transmitted data.
As streams of information are received by a decoy in a network, a clock source
specifies when to
sample the data.
26
Date Recue/Date Received 2021-01-21

In asynchronous networks, the clock source is derived locally, whereas in
synchronous networks
a central, external clock source is used. Interface clocking indicates whether
the decoy uses
asynchronous or synchronous clocking. In a battlefield situation it is highly
probable that that
GPS signals, which are often used for clocking, will be jammed resulting in a
GPS-denied
communication environment. In this situation, the decoys will need to be able
to maintain
successful communications. Accordingly, a clocking synchronization module is
provided to
allow, in one preferred embodiment, decoy networks that are designed to
operate as an
asynchronous network, where each decoy generates its own clock signal, or
decoys use clocks
from more than one clock source. The clocks within the network are not
synchronized to a single
clock source, such as GPS. By default, decoys generate their own clock signals
to send and
receive traffic.
A system clock allows the decoy to sample (or detect) and transmit data being
received and
transmitted through its interfaces. Clocking enables the device to detect and
transmit the Os and
is that make up digital traffic through the interface. Failure to detect the
bits within a data flow
results in dropped traffic. Short-term fluctuations in the clock signal are
known as clock jitter.
Long-term variations in the signal are known as clock wander. Asynchronous
clocking can either
derive the clock signal from the data stream or transmit the clocking signal
explicitly.
Data Stream Clocking
Common in Ti links, data stream clocking occurs when separate clock signals
are not
transmitted within the network. Instead, devices must extract the clock signal
from the data
stream. As bits are transmitted across the network, each bit has a time slot
of 648 nanoseconds.
Within a time slot, pulses are transmitted with alternating voltage peaks and
drops. The receiving
device uses the period of alternating voltages to determine the clock rate for
the data stream.
Explicit Clocking Signal Transmission
Clock signals that are shared by hosts across a data link must be transmitted
by one or both
endpoints on the link. In a serial connection, for example, one host operates
as a clock master
and the other operates as a clock slave. The clock master internally generates
a clock signal that
27
Date Recue/Date Received 2021-01-21

is transmitted across the data link. The clock slave receives the clock signal
and uses its period to
determine when to sample data and how to transmit data across the link.
This type of clock signal controls only the connection on which it is active
and is not visible to
the rest of the network. An explicit clock signal does not control how other
devices or even other
interfaces on the same device sample or transmit data.
NETWORK INTERFACE CONTROLLER
A network interface controller (NIC, also known as a network interface card,
network
adapter, LAN adapter or physical network interface) is a computer hardware
component that
connects a computer to a network. The network controller implements the
electronic circuitry
required to communicate using a specific physical layer and data link layer
standard such
as Ethernet or Wi-Fi. This provides a base for a full network protocol stack,
allowing
communication among computers on the same local area network (LAN) and large-
scale
network communications through routable protocols, such as Internet Protocol
(IP). The NIC
allows computers to communicate over a computer network, either by using
cables or wirelessly.
The NIC is both a physical layer and data link layer device, as it provides
physical access to a
networking medium and, for IEEE 802 and similar networks, provides a low-level
addressing
system through the use of MAC addresses that are uniquely assigned to network
interfaces.
Example
Android or PC user interface
Supported Frequency Bands: 16 GHz Bandwidth presence (VHF, UHF, L, S, C, Ku,
etc.)
Receiver Sensitivity: -86 dB (current configuration)
56 MHz channel bandwidth, 2 channels
Supported waveforms: Multiple STD-CDL, BE-CDL, DDL, ANW2 data rates
Message Types: Video, Voice, Data, Text
28
Date Recue/Date Received 2021-01-21

All waveform processing resides on single Xilinx Zynq SoC
Example
RFSoC: Integrates data converters into Zynq UltraScale + SoC
8x 12-bit 4 GSPS A/D Converters and 8x 14-bit 6 GSPS DACs
Uses 16% of power compared to discrete data converter designs
Allows for continuous spectral coverage and identification of LPI signals in
small form factor
Various of the above-disclosed and other features and functions, or
alternatives thereof, may be
combined into many other different systems or applications. Various presently
unforeseen or
unanticipated alternatives, modifications, variations or improvements therein
may be
subsequently made by those skilled in the art, each of which is also intended
to be encompassed
by the disclosed embodiments.
Having described embodiments for the invention herein, it is noted that
modifications and
variations can be made by persons skilled in the art in light of the above
teachings. It is therefore
to be understood that changes may be made in the particular embodiments of the
invention
disclosed which are within the scope and spirit of the invention as defined by
the appended
claims. Having thus described the invention with the details and particularity
required by the
patent laws, what is claimed and desired protected by Letters Patent is set
forth in the appended
claims.
29
Date Recue/Date Received 2021-01-21

Representative Drawing
A single figure which represents the drawing illustrating the invention.
Administrative Status

2024-08-01:As part of the Next Generation Patents (NGP) transition, the Canadian Patents Database (CPD) now contains a more detailed Event History, which replicates the Event Log of our new back-office solution.

Please note that "Inactive:" events refers to events no longer in use in our new back-office solution.

For a clearer understanding of the status of the application/patent presented on this page, the site Disclaimer , as well as the definitions for Patent , Event History , Maintenance Fee  and Payment History  should be consulted.

Event History

Description Date
Inactive: Office letter 2024-03-28
Inactive: Grant downloaded 2023-08-15
Inactive: Grant downloaded 2023-08-15
Letter Sent 2023-08-15
Grant by Issuance 2023-08-15
Inactive: Cover page published 2023-08-14
Pre-grant 2023-06-08
Inactive: Final fee received 2023-06-08
Letter Sent 2023-02-09
Notice of Allowance is Issued 2023-02-09
Inactive: Approved for allowance (AFA) 2022-11-04
Inactive: Q2 passed 2022-11-04
Inactive: Cover page published 2022-08-19
Application Published (Open to Public Inspection) 2022-07-21
Amendment Received - Response to Examiner's Requisition 2022-05-27
Amendment Received - Voluntary Amendment 2022-05-27
Examiner's Report 2022-01-28
Inactive: Report - No QC 2022-01-27
Common Representative Appointed 2021-11-13
Inactive: IPC assigned 2021-04-21
Inactive: First IPC assigned 2021-04-21
Inactive: IPC assigned 2021-04-21
Inactive: IPC assigned 2021-04-21
Inactive: IPC assigned 2021-04-21
Inactive: IPC assigned 2021-04-20
Inactive: IPC assigned 2021-04-20
Inactive: IPC assigned 2021-04-20
Filing Requirements Determined Compliant 2021-02-02
Letter sent 2021-02-02
Letter Sent 2021-02-01
Common Representative Appointed 2021-01-21
Request for Examination Requirements Determined Compliant 2021-01-21
Inactive: Pre-classification 2021-01-21
All Requirements for Examination Determined Compliant 2021-01-21
Small Entity Declaration Determined Compliant 2021-01-21
Application Received - Regular National 2021-01-21
Inactive: QC images - Scanning 2021-01-21

Abandonment History

There is no abandonment history.

Maintenance Fee

The last payment was received on 2022-12-23

Note : If the full payment has not been received on or before the date indicated, a further fee may be required which may be one of the following

  • the reinstatement fee;
  • the late payment fee; or
  • additional fee to reverse deemed expiry.

Please refer to the CIPO Patent Fees web page to see all current fee amounts.

Fee History

Fee Type Anniversary Year Due Date Paid Date
Application fee - small 2021-01-21 2021-01-21
Request for examination - small 2025-01-21 2021-01-21
MF (application, 2nd anniv.) - small 02 2023-01-23 2022-12-23
Final fee - small 2021-01-21 2023-06-08
MF (patent, 3rd anniv.) - small 2024-01-22 2023-12-15
Owners on Record

Note: Records showing the ownership history in alphabetical order.

Current Owners on Record
KWESST INC.
Past Owners on Record
JEFFREY M. DUNN
Past Owners that do not appear in the "Owners on Record" listing will appear in other documentation within the application.
Documents

To view selected files, please enter reCAPTCHA code :



To view images, click a link in the Document Description column. To download the documents, select one or more checkboxes in the first column and then click the "Download Selected in PDF format (Zip Archive)" or the "Download Selected as Single PDF" button.

List of published and non-published patent-specific documents on the CPD .

If you have any difficulty accessing content, you can call the Client Service Centre at 1-866-997-1936 or send them an e-mail at CIPO Client Service Centre.


Document
Description 
Date
(yyyy-mm-dd) 
Number of pages   Size of Image (KB) 
Representative drawing 2023-07-28 1 6
Cover Page 2023-07-28 1 32
Cover Page 2022-08-19 1 31
Drawings 2021-01-21 17 2,396
Description 2021-01-21 29 1,472
Abstract 2021-01-21 1 6
Claims 2021-01-21 5 182
Claims 2022-05-27 5 189
Representative drawing 2022-08-19 1 6
Courtesy - Office Letter 2024-03-28 2 189
Courtesy - Acknowledgement of Request for Examination 2021-02-01 1 436
Courtesy - Filing certificate 2021-02-02 1 580
Commissioner's Notice - Application Found Allowable 2023-02-09 1 579
Final fee 2023-06-08 5 147
Electronic Grant Certificate 2023-08-15 1 2,527
New application 2021-01-21 9 260
Examiner requisition 2022-01-28 4 197
Amendment / response to report 2022-05-27 17 592
Maintenance fee payment 2022-12-23 1 26