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Patent 3212422 Summary

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Claims and Abstract availability

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(12) Patent Application: (11) CA 3212422
(54) English Title: CAVITY RESONANCE SUPPRESSION USING DISCRETE THERMAL PEDESTALS IN ACTIVE ELECTRONICALLY SCANNED ARRAY
(54) French Title: SUPPRESSION DE RESONANCE DE CAVITE A L'AIDE DE SOCLES THERMIQUES DISCRETS DANS UN RESEAU ACTIF A BALAYAGE ELECTRONIQUE
Status: Application Compliant
Bibliographic Data
(51) International Patent Classification (IPC):
  • H01L 23/367 (2006.01)
  • H01Q 1/02 (2006.01)
  • H01Q 1/40 (2006.01)
  • H01Q 3/26 (2006.01)
  • H01Q 15/24 (2006.01)
  • H01Q 21/06 (2006.01)
  • H05K 1/02 (2006.01)
(72) Inventors :
  • BUCKLEY, MICHAEL (United States of America)
  • WALTER, TOM (United States of America)
  • KOMANDURI, VARADA RAJAN (United States of America)
  • BHOWMIK, LAL MOHAN (United States of America)
  • LU, BINGQIAN (United States of America)
(73) Owners :
  • HUGHES NETWORK SYSTEMS, LLC
(71) Applicants :
  • HUGHES NETWORK SYSTEMS, LLC (United States of America)
(74) Agent: PIASETZKI NENNIGER KVAS LLP
(74) Associate agent:
(45) Issued:
(86) PCT Filing Date: 2022-03-31
(87) Open to Public Inspection: 2022-10-06
Availability of licence: N/A
Dedicated to the Public: N/A
(25) Language of filing: English

Patent Cooperation Treaty (PCT): Yes
(86) PCT Filing Number: PCT/US2022/071452
(87) International Publication Number: WO 2022213096
(85) National Entry: 2023-09-15

(30) Application Priority Data:
Application No. Country/Territory Date
17/657,340 (United States of America) 2022-03-30
63/169,770 (United States of America) 2021-04-01
63/266,262 (United States of America) 2021-12-30

Abstracts

English Abstract

An AESA (Active Electronically Scanned Array), including: a PCB (Printed Circuit Board) substrate having an obverse surface; TRMs (Transmit/Receive Modules) disposed on the obverse surface; thermal pedestals wherein each thermal pedestal includes a wall, having a wall height, including wall surfaces and one of the wall surfaces being a contact surface; and a TIM (Thermal Interface Material), having a TIM height, disposed between a respective contact surface of the thermal pedestals and the obverse surface. The thermal pedestals are discrete with respect to one another, the contact surfaces of the thermal pedestals are interspersed about the TRMs, the thermal pedestals do not contact the TRMs, the TIM is electrically and thermally conductive, and the wall height plus the TIM height is sufficient to suppress resonances of the TRMs below a frequency greater than the Tx and Rx frequency bands of the TRMs.


French Abstract

Un réseau à balayage électronique actif (AESA), comprenant : un substrat à carte de circuit imprimé (PCB) ayant une surface avers ; des TRM (modules d'émission / réception) disposés sur la surface avers ; des socles thermiques, chaque socle thermique comprenant une paroi, ayant une hauteur de paroi, comprenant des surfaces de paroi et l'une des surfaces de paroi étant une surface de contact ; et un matériau d'interface thermique (TIM), ayant une hauteur de TIM, disposée entre une surface de contact respective des socles thermiques et la surface avers. Les socles thermiques sont discrets les uns par rapport aux autres, les surfaces de contact des socles thermiques sont intercalées autour des TRM, les socles thermiques n'entrent pas en contact avec les TRM, le TIM est électroconducteur et thermoconducteur, et la hauteur de paroi plus la hauteur de TIM est suffisante pour supprimer les résonances des TRM au-dessous d'une fréquence supérieure aux bandes de fréquence Tx et Rx des TRM.

Claims

Note: Claims are shown in the official language in which they were submitted.


PCT/ITS2022/071452
CLAIMS
We claim as our invention:
1. An AESA (Active Electronically Scanned Array) comprising:
a PCB (Printed Circuit Board) substrate having an obverse surface;
TRMs (Transmit/Receive Modules) disposed on the obverse surface;
thermal pedestals wherein each thermal pedestal cornprises a wall, having
a wall height, comprising wall surfaces and one of the wall
surfaces being a contact surface; and
a TIM (Thermal Interface Material), having a TIM height, disposed
between a respective contact surface of the thermal pedestals and
the obverse surface,
wherein the thermal pedestals are discrete with respect to one another,
the contact surfaces of the thermal pedestals are interspersed about the
TRMs,
the thermal pedestals do not contact the TRMs,
the TIM is electrically and thermally conductive, and
the wall height plus the TIM height is sufficient to suppress resonances of
the TRMs below a frequency greater than Tx and Rx frequency
bands of the TRMs.
2. The AESA of claim 1, further comprising a heat sink, wherein the
thermal pedestals extend from the heat sink.
3. The AESA of claim 2, further comprising fins extending from a
first surface of the heat sink, wherein the thermal pedestals extend from a
second surface of the heat sink different than the first surface of the heat
sink.
4. The AESA of claim 3, wherein the heat sink, the fins and the
thermal pedestals are of a unitary, one-piece construction.
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5. The AESA of claim 2, wherein the heat sink is connected to a
ground.
6. The AESA of claim 1, wherein the thermal pedestals are organized
with substantial bilateral symmetry along both a first axis and a second axis
orthogonal to the first axis.
7. The AESA of claim 1, wherein the TRMs are disposed in a non-
equilateral triangular lattice.
8. The AESA of claim 1, further comprising antenna elements and a
radorne layer disposed over a reverse surface of the PCB.
9. The AESA of claim 9, further comprising a polarizer layer
disposed between the radome layer.
10. The AESA of claim 1, wherein the thermal pedestals, the TIM and
the PCB together form a stack having a cross-section depth less than or equal
to
100 mils (2.54 millimeter).
11. The AESA of claim 1, wherein the thermal pedestals are shaped as
a cross.
12. The AESA of claim 1, wherein the thermal pedestals are
interspersed without contacting, the TRIVIs.
13. The AESA of claim 1, wherein the AESA is configured to operate
in Ku and X frequency bands.
11
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14. The AESA of claim 1, wherein an upper liinit of the Tx and Rx
frequency bands is less than or equal to 14.5 GHz and resonance frequencies
are
suppressed below 16 GHz.
15. The AESA of claim 1, wherein the AESA is configured to operate
with a scan angle 0 from 00 to 45 and a cp scan angle from 0 and 360 .
16. The AESA of claim 1, wherein an upper limit of the Tx and Rx
frequency bands is less than or equal to 14.5 GHz with a scan angle 0 from 0
to
45 and a cp scan angle from 0 < < 360 .
17. An AESA (Active Electronically Scanned Array), comprising:
a PCB (Printed Circuit Board) substrate having an obverse surface;
TRIVIs (Transmit/Receive Modules) disposed on the obverse surface;
thermal pedestals wherein each thermal pedestal comprises a wall, having
a wall height, comprising wall surfaces and one of the wall
surfaces being a contact surface;
a TIM (Thermal Interface Material), having a TIM height, disposed
between a respective contact surface of the thermal pedestals and
the obverse surface; and
a heat sink comprising fins,
wherein the thermal pedestals are discrete with respect to one another,
the contact surfaces of the thermal pedestals are interspersed about the
TRMs,
the thermal pedestals do not contact the TRMs,
the TIM is electrically and thermally conductive,
the wall height plus the TIM height is sufficient to suppress resonances of
the TRMs below a frequency greater than Tx and Rx frequency
bands of the TRMs,
12
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the fins extend from a first surface of the heat sink and the thermal
pedestals extend from a second surface of the heat sink different
than the first surface of the heat sink,
the heat sink, the fins and the thermal pedestals are of a unitary, one-piece
construction, and
an upper limit of the Tx and Rx frequency bands of the TRMs is less than
or equal to 14.5 GHz with a scan angle 0 from 00 to 45 and a y
scan angle from 00 < < 360 .
13
CA 03212422 2023- 9- 15

Description

Note: Descriptions are shown in the official language in which they were submitted.


WO 2022/213096
PCT/US2022/071452
Cavity Resonance Suppression Using Discrete Thermal Pedestals
in Active Electronically Scanned Array
FIELD
100011 A low-cost easy to manufacture solution to address thermal, EMI
(Electro-Magnetic Interference), volume and location requirements for an
AESA (Active Electronically Scanned Array) is presented. The AESA includes
passive thermal pedestals interspersed in an arrangement with the AESA active
devices. The thermal pedestals are electrically and thermally conductive. The
AESA may be used in satellite communications and radar systems.
BACKGROUND
100021 The prior art uses a combination of thermal pedestals, EMI
gasketing material, and EMI ground tape to address the thermal, EMI, and
AESA active device placement requirements. The manufacture of the prior art
is relatively more expensive and has relatively more fabrication complexity.
Moreover, the reliability of the EMI ground tape is questionable.
SUMMARY
100031 This Summary is provided to introduce a selection of concepts in a
simplified form that is further described below in the Detailed Description.
This Summary is not intended to identify key features or essential features of
the claimed subject matter, nor is it intended to be used to limit the scope
of the
claimed subject matter.
100041 The present teachings provide a low-cost easy to manufacture
solution to address thermal, EMI (Electro-Magnetic Interference), volume and
location requirements for an AESA (Active Electronically Scanned Array). The
AESA thermal pedestals meet the EMI performance requirements by
suppressing cavity resonances of the AESA below a frequency greater than the
Rx and Tx frequency bands of the AESA. For example, if the upper limit of the
RX and TX frequency bands is 14.5 GHz, resonances below 15.5, 16.5, 17.5 or
1
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the like GHz are suppressed. The present teachings are applicable to RF (Radio
Frequency) communication systems, for example, RF communications via LEO
(Low Earth Orbit), ME0 (Medium Earth Orbit) or GEO (Geosynchronous Earth
Orbit) satellites and radar systems.
[0005] An AESA (Active Electronically Scanned Array), including: a
PCB (Printed Circuit Board) substrate having an obverse surface; TRMs
(Transmit/Receive Modules) disposed on the obverse surface; thermal pedestals
wherein each thermal pedestal includes a wall, having a wall height, including
wall surfaces and one of the wall surfaces being a contact surface; and a TIM
(Thermal Interface Material), having a TIM height, disposed between a
respective contact surface of the thermal pedestals and the obverse surface.
The
thermal pedestals are discrete with respect to one another, the contact
surfaces
of the thermal pedestals are interspersed about the TRMs via the TIM, the
thermal pedestals do not contact the TRMs, the TIM is electrically and
thermally conductive, and the wall height plus the TIM height is sufficient to
suppress resonances of the TRMs below a frequency greater than the Tx and Rx
frequency bands of the TRMs.
[0006] The AESA may include a heat sink, wherein the thermal pedestals
extend from the heat sink.
100071 The AESA may include fins extending from a first surface of the
heat sink, wherein the thermal pedestals extend from a second surface of the
heat sink different than the first surface of the heat.
[0008] The AESA where the heat sink, the fins and the thermal pedestals
are of a unitary, one-piece construction.
[0009] The AESA where the heat sink is connected to a ground.
[0010] The AESA where the thermal pedestals are organized with
substantial bilateral symmetry along both a first axis and a second axis
orthogonal to the first axis.
[0011] The AESA where the TRMs are disposed in a non-equilateral
2
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triangular lattice, an equilateral triangular lattice, a rectangular lattice,
or an
aperiodic lattice.
[0012] The AESA may include antenna elements and a radome layer
disposed over a reverse surface of the PCB.
[0013] The AESA may include a polarizer integrated with the radome.
[0014] The AESA where the thermal pedestals, the TIM and the PCB
together form a stack having a cross-section depth less than or equal to 100
mils
(2.54 millimeter).
[0015] The AESA where the thermal pedestals are shaped as a cross.
[0016] The AESA where the AESA is configured to operate in Ku and X
frequency bands.
[0017] The AESA where an upper limit of the Tx and Rx frequency bands
is less than or equal to 14.5 GHz and resonances frequencies are suppressed
below 16 GHz.
[0018] The AESA is configured to operate with a scan angle 0 from 00 to
450 and a cp scan angle from 00 and 360 .
[0019] The AESA where an upper limit of the Tx and Rx frequency bands
is less than or equal to 14.5 GHz with a scan angle 0 from 00 to 45 and a cp
scan
angle from 0 < < 360 .
100201 An AESA (Active Electronic Scanned Array) , including: a PCB
(Printed Circuit Board) substrate having an obverse surface; TRMs
(Transmit/Receive Modules) disposed on the obverse surface; then-nal pedestals
wherein each thermal pedestal includes a wall, having a wall height, including
wall surfaces and one of the wall surfaces being a contact surface; a TIM
(Thermal Interface Material), having a TIM height, disposed between a
respective contact surface of the thermal pedestals and the obverse surface;
and
a heat sink including fins. In the AESA, the thermal pedestals are discrete
with
respect to one another, the contact surfaces of the thermal pedestals are
interspersed about the TRM, the thermal pedestals do not contact the TRMs, the
3
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TIM is electrically and thermally conductive, the wall height plus the TIM
height is sufficient to suppress resonances of the TRMs below a frequency
greater than the Tx and Rx frequency bands used by the TRMs, the fins extend
from a first surface of the heat sink and the thermal pedestals extend from a
second surface of the heat sink different than the first surface of the heat,
the
heat sink, the fins and the thermal pedestals are of a unitary, one-piece
construction, and an upper limit of Tx and Rx frequency bands of the TRMs is
less than or equal to 14.5 GHz with a scan angle 0 from 00 to 45 and a cp
scan
angle from 0 < < 360 .
100211 Additional features will be set forth in the description that follows,
and in part will be apparent from the description, or may be learned by
practice
of what is described.
DRAWINGS
[0022] In order to describe the manner in which the above-recited and
other advantages and features may be obtained, a more particular description
is
provided below and will be rendered by reference to specific embodiments
thereof which are illustrated in the appended drawings. Understanding that
these drawings depict only typical embodiments and are not, therefore, to be
limiting of its scope, implementations will be described and explained with
additional specificity and detail with the accompanying drawings.
100231 FIG. lA illustrates a top view of an exemplary thermal pedestals
encircling the transmit receive active devices of the AESA according to
various
embodiments.
[0024] FIG. 1B illustrates a perspective view of an exemplary thermal
pedestal arrangement according to various embodiments.
[0025] FIG. IC illustrates a top view of a surface of a PCB included in an
AESA according to various embodiments.
[0026] FIG. 2 illustrates a cross-sectional view of an AESA according to
various embodiments.
4
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100271 Throughout the drawings and the detailed description, unless
otherwise described, the same drawing reference numerals will be understood to
refer to the same elements, features, and structures. The relative size and
depiction of these elements may be exaggerated for clarity, illustration, and
convenience.
DETAILED DESCRIPTION
100281 Embodiments are discussed in detail below. While specific
implementations are discussed, this is done for illustration purposes only. A
person skilled in the relevant art will recognize that other components and
configurations may be used without parting from the spirit and scope of the
subject matter of this disclosure.
100291 The terminology used herein is for describing embodiments only
and is not intended to be limiting of the present disclosure. As used herein,
the
singular forms "a," "an" and "the" are intended to include the plural forms as
well, unless the context clearly indicates otherwise. Furthermore, the use of
the
terms "a," "an," etc. does not denote a limitation of quantity but rather
denotes
the presence of at least one of the referenced items. The use of the terms
"first,"
"second," and the like does not imply any order, but they are included to
either
identify individual elements or to distinguish one element from another. It
will
be further understood that the terms "comprises" and/or "comprising", or
"includes" and/or "including" when used in this specification, specify the
presence of stated features, regions, integers, steps, operations, elements,
and/or
components, but do not preclude the presence or addition of one or more other
features, regions, integers, steps, operations, elements, components, and/or
groups thereof. Although some features may be described with respect to
individual exemplary embodiments, aspects need not be limited thereto such
that features from one or more exemplary embodiments may be combinable
with other features from one or more exemplary embodiments.
100301 A low-cost solution to address thermal, electromagnetic
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interference (EMI), and AESA active device volume and location requirements
is disclosed. Thermal pedestals are a passive means to remove heat generated
by active devices of the AESA. The active devices may include an TRM or the
like.
100311 Thermal pedestals conduct the heat from the surface of a printed
circuit board to a metal surface enclosing an AESA cavity. The thermal
pedestals may serve as electromagnetic grounding vias. The EMI requirements
may be addressed by placing the thermal pedestals in an arrangement
throughout the AESA cavity. The density of the thermals suppresses in-band
resonances in the AESA cavity and removes heat. The resonance and heat
removal allow for safe operation of the AESA. The arrangement of the thermal
pedestals leaves adequate room to place the AESA active device. In some
embodiments, the AESA active devices may be placed per a Triangular shape
AESA geometrical arrangement.
100321 The present teachings provide a very low-cost approach that is easy
to fabricate into the AESA. An AESA's in band cavity resonance may be
suppressed without sacrificing the system performance. The AESA may be used
in RF communication systems including LEO and MEO satellite systems, and
GEO satellite systems with mobile or small form factor user terminals and in
radar systems.
100331 FIG. lA illustrates a top view of an exemplary thermal pedestal
according to various embodiments.
100341 A thermal pedestal 102 may be shaped as a cross, a plus sign, an X
or the like. The thermal pedestal 102 may have a first wall length a, a second
wall length b and a third wall length c. In exemplary embodiments, the first
wall length a, second wall length b and third wall length c may have a length
ranging from 1 (millimeters) to 20 mm, for example, 2 mm.
100351 FIG. 1B illustrates a perspective view of an exemplary thermal
pedestal arrangement according to various embodiments.
6
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100361 A thermal pedestal arrangement 100 may include the thermal
pedestal 102 and a TIM 110. The thermal pedestal 102 may include a contact
surface 104 to affix the thennal pedestal 102 with the TIM 110. The TIM 110
may include a PCB contact surface 112 to affix the TIM 110 to a PCB (not
shown; see FIG. 1C). The then-nal pedestal 102 may have a wall 106 having a
wall height e. In exemplary embodiments, the wall height c may be from 1 mm
to 20 mm, for example, 2 mm. The TIM 110 may have a wall height d. In
exemplary embodiments, the wall height d may be from 5 mils to 100 mils (a
mil is a unit of length equal to 0.001 inches or 0.0254 mm), for example, 5,
10,
11, 12, 13, 14, 15, 16, 17, 18 or 20 mils.
100371 FIG. 1C illustrates a top view of a surface of a PCB included in an
AESA according to various embodiments.
100381 An AESA 120 may include a PCB 126 including a surface 124.
An arrangement of thermal pedestals 102 may be interspersed with TRIVIs 122.
The TIM 110 (not visible in FIG. IC) may be disposed between the thermal
pedestals 102 and the surface 124 of the PCB 126. The thermal pedestals 102
may be arranged to encircle in a ring 128 one of the TRMs 122. The ring 128
may be virtual. The ring 128 may be non-contiguous. In some embodiments,
the TRMs 122 may be a microchip. The TRMs 122 may be electrically
connected to the PCB 126. The PCB 126 may include an exposed ground wire
(not shown). Portions of the exposed ground wire of the PCB 126 may be
electrically connected to the TRMs 122. Portions of the exposed ground wire of
the PCB 126 may correspond to each of the TIMs 110 which are electrically
connected thereto. The then-nal pedestals 102 may be electrically connected to
the exposed ground wire of the PCB 126 via the TIM 110. The thermal
pedestals 102 may be thermally connected to the TRMs 122 via the PCB 126
and TIM 110. In order to be a discrete thermal pedestal, a first one of the
thermal pedestals 102 may not share a fragment of its defining wall 106 (see
FIG. 1B) with a fragment of the wall 106 defining a second one of the thermal
7
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pedestals 102.
[0039] Some of the thermal pedestals 102 may be arranged in a row 132.
Some of the thermal pedestals may be arranged in a column 134. The row 132
may be orthogonal to the column 134. The row 132 may be non-orthogonal to
the column 134 to form a triangular grid 136 for with the then-nal pedestals
and
the TRMs. The triangular grid may form a non-equilateral triangle.
[0040] FIG. 2 illustrates a cross-sectional view of an AESA according to
various embodiments.
[0041] An AESA 200 may include a plurality of layers including a radome
202, a polarizer 204, an air gap 206, a PCB 208, and a heat sink 214. TRMs
210 may be disposed on the PCB 208. A TIM 212 may contact the PCB 208
and thermal pedestals 218. Thermal pedestals 218 may extend from a heat sink
214. Fins 216 may extend from the heat sink 214. Heat from the TRMs 210
may be exchanged (convectively) with an ambient environment via the heat
sink 214. In some embodiments, the heat may be conducted from the TRMs
210 to the TIM 212 to the thermal pedestals 218 to the heat sink 212 to the
fins
216. The heat sink 214 may be a heat sink.
[0042] Metal manufacturing processes such as casting (expendable or
permanent mold casting), powder metallurgy, deformation, material removal,
nontraditional (lasers, electron beams, chemical erosion, electric discharge
and
electrochemical energy), or joining and assembly may be used to form the
thermal pedestals along with the heat sink and fins as desired.
[0043] Although the subject matter has been described in language
specific to structural features and/or methodological acts, it is to be
understood
that the subject matter in the appended claims is not necessarily limited to
the
specific features or acts described above. Rather, the specific features and
acts
described above are disclosed as example forms of implementing the claims.
Other configurations of the described embodiments are part of the scope of
this
disclosure. Further, implementations consistent with the subject matter of
this
8
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disclosure may have more or fewer acts than as described or may implement
acts in a different order than as shown. Accordingly, the appended claims and
their legal equivalents should only define the invention, rather than any
specific
examples given.
9
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Representative Drawing
A single figure which represents the drawing illustrating the invention.
Administrative Status

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Event History

Description Date
Inactive: Cover page published 2023-11-01
Inactive: First IPC assigned 2023-10-19
Inactive: IPC assigned 2023-10-19
Inactive: IPC assigned 2023-10-19
Inactive: IPC assigned 2023-10-19
Inactive: IPC assigned 2023-10-19
Priority Claim Requirements Determined Compliant 2023-09-18
Letter Sent 2023-09-18
Compliance Requirements Determined Met 2023-09-18
Priority Claim Requirements Determined Compliant 2023-09-18
Request for Priority Received 2023-09-15
Application Received - PCT 2023-09-15
National Entry Requirements Determined Compliant 2023-09-15
Request for Priority Received 2023-09-15
Priority Claim Requirements Determined Compliant 2023-09-15
Letter sent 2023-09-15
Inactive: IPC assigned 2023-09-15
Inactive: IPC assigned 2023-09-15
Inactive: IPC assigned 2023-09-15
Request for Priority Received 2023-09-15
Application Published (Open to Public Inspection) 2022-10-06

Abandonment History

There is no abandonment history.

Maintenance Fee

The last payment was received on 2023-12-11

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Fee History

Fee Type Anniversary Year Due Date Paid Date
Registration of a document 2023-09-15
Basic national fee - standard 2023-09-15
MF (application, 2nd anniv.) - standard 02 2024-04-02 2023-12-11
Owners on Record

Note: Records showing the ownership history in alphabetical order.

Current Owners on Record
HUGHES NETWORK SYSTEMS, LLC
Past Owners on Record
BINGQIAN LU
LAL MOHAN BHOWMIK
MICHAEL BUCKLEY
TOM WALTER
VARADA RAJAN KOMANDURI
Past Owners that do not appear in the "Owners on Record" listing will appear in other documentation within the application.
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Document
Description 
Date
(yyyy-mm-dd) 
Number of pages   Size of Image (KB) 
Description 2023-09-15 9 397
Drawings 2023-09-15 2 53
Claims 2023-09-15 4 112
Abstract 2023-09-15 1 21
Representative drawing 2023-11-01 1 7
Cover Page 2023-11-01 1 50
Courtesy - Certificate of registration (related document(s)) 2023-09-18 1 353
Priority request - PCT 2023-09-15 31 3,945
Assignment 2023-09-15 1 68
Patent cooperation treaty (PCT) 2023-09-15 2 80
Priority request - PCT 2023-09-15 45 1,983
International search report 2023-09-15 3 80
Patent cooperation treaty (PCT) 2023-09-15 1 65
Priority request - PCT 2023-09-15 20 1,042
Courtesy - Letter Acknowledging PCT National Phase Entry 2023-09-15 2 53
National entry request 2023-09-15 10 230