Note : Les descriptions sont présentées dans la langue officielle dans laquelle elles ont été soumises.
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PROCESS FOR THE PRODUCTION OF A MA~RIX OF ELECTRONIC
_ _ . . _ . _ _ _ . . . . .
COMPON~NTS
BACKGROUND OF THE INVENTION
.
The present invention relates to a process
for the production of a matrix of electronic components.
It is applicable to any matrix arrangement of electronic
components and in particular to a matrix of elements
used for the control of a display screen, such as
transistors controlling a liquid crystal or electro-
luminescent display screen, or such as optical detectors.
In a matrix of components having p rows andq columns of components, which are electrically inter-
connected, the electrical excitat30n of a component
ij located at the intersection of row i, i being
an integer such that 1 ~i ~p, and column j, j being
an integer such that 1 ~j ~q, is carried out by
exciting (applying a voltage) simultaneously to the
row i of components and the column j of components.
When it is wished to successively excite all the
components, excitation generally takes place by
simultaneously exciting all the columns and whilst
seguentially exciting the rows, i.e. by carrying out
a line-by-line scan.
Consequently, in such a matrix of components,
the presence of a defective component leads to
disturbances, not only at said component, but also
at the row and column of components correspondîng
thereto, which creates a much more serious fault.
In order to obviate ~ese problems, use is
made of a redundancy at each component, i.e. the number
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of components at each intersection between rows
and columns is multiplied. Consequently, if one of
the compon~nts of a given crossing or intersection
is defective, it can be replaced by another component
corresponding to the same crossing.
The formation of a matrix of electronic
components, starting from several series of components
consists, after the production of the component, the
testing of the components of the same crossing, choosing
the non-defective component for each crossing and
electrically interconnecting the chosen components.
This redundancy procedure has numerous
disadvantages, because all the components which have
to form the matrix must be tested and are then inter-
connected. Thus9 this test causes pro~lems of~ccessto each component. Moreover, it is a long and irksome
task to test each component. In addition, the use of
several components for an intersection of a row and
column causes a certain number of technical problems
and particularly problems regarding the overall
dimensions.
SUMMARY OF THE INVENTION
The invention relates to a process for
the production of a matrix of electronic components
making it possible to obviate these disadvantages.
In particular, it makes it possible to test the
various components having to form the matrix in a
relatively simple manner.
More specifically, the present invention
relates to a process for the production of a matrix
s~
of electronic components comprising p rows and q
columns, making it possible toobtain a matrix of
components, whereof all the components function
correctly, wherein it comprises:
- forming n groups of r submatrixes of not electrically
interconnected components, the electronic components
of the same submatrix being electrically interconnected;
- determining in each group of submatrixes, a non-
defective submatrix and interconnecting the thus
determined submatrixes, in such a way as to form the
matrix of components having p rows and q columns.
In orded to obtain a high probability of
finding a non-defectiYe submatrix in the submatrixes
of one group, use is preferably made of at least three
submatrixes per group.
According to the invention9 the determination
and connection of the non-defective submatrixes comprises:
- choosing in an arbitrary manner one of the r
submatrixes of each group of submatrixes;
- interconnecting the chosen submatrixes;
- testing the thus obtained matrix in order to
determine the possibly defective submatrixes;
- destroying the connections of these defective
submatrixes;
- connecting the non-defective submatrixes to other
submatrixes, chosen in an arbitrary manner from the
groups including defective submatrixes; and
- repeating the aforementioned operations until a
matrix is obtained, whereof all the components function
completely correctly.
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This process makes it possible to limit
the number of operations to be carried out for
determining the non-defective submatrixes to be
connected. Thus, the obtaining of a matrix, whereGf
all the components function correctly takes place
by choosing groups of non-defective components,
i.e. non-defective submatrixes, and not by choosing
each individual component.
Preferably, the connections of the defective
submatrixes are destroyed by using a laser beam.
According to preferred embodiments of
the process according to the invention9 the testing
of the matrix obtained consists of:
- sequentially exciting each row of components and
sequentially collecting the output signal for each
row, so as to test each row;
- sequentially excit;ng each column of components
and sequentially collecting the output signal at each
column, so as to test each column, and
- sequentially exciting each row of components and
collecting the output signal in parallel on the
columns, so as to perform a test between the rows and
the columns.
This test makes it possible to detect defects
in the rows and columns of the matrix obtained.
In order to test each component of the
matrix obtained, according to the invention, it is
possible to carry out a supplementary testing stage.
This stage consists of sequentially exciting each row
of components and collecting the output signal in parallel
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on the columns, by supplying a beam of delocalized
electrons over the entire matrix obtained, so as to
test the satisfactory operation of each component.
ESCRIPTION OF THE DRAWING AND THE PREFERRED EMBODIMENTS
The invention is described in greater detail
hereinafter relative to a non-limitative embodiment
and the attached drawing, which shows the different
stages of the process according to the invention.
With reference to the single drawing, the
production process according to the invention consists
of firstly producing n groups 2 of r submatrixes 4
of electronic component 6, r and n being positive
integers. The drawing shows 12 groups of submatrixes
to 21, 22..... 212, each ~rmed by three subtnatrixes
4a, 4b and 4c. In the same submatrix 4, the electronic
components 6 are electrically interconnected by means
of electrical conductors 8. The construction of each
submatrix of electronic components takes place in a
conventional manner. Then, in each group 2 of sub-
matrixes 4, is determined a submatrix 4 which functionscorrectly and the chosen submatrixes 4 are interconnected.
The connectîon of the submatrixes chosen takes place
by means of switches or interrupters 10 having a
plurality of branches, in this case three possible
branches.
The drawing shows a possible connection of
submatrix 4a of group 21 to submatrix 4b of group 2~,
the latter being connected to submatrix 4a of 23, etcO
Part A of the drawing is a diagrammatic plan view of
the matrix, which makes it easier to see the connection
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between the different submatrixes.
The submatrixes 4a, 4b, 4c of the same
group 2 constitute a redundancy of submatrixes making
it possible to reliably obtain a final matrix of
electronic component 6, whereof all the components
function correctly. This final matrix, such as for
example that shown in the drawing and carrying
reference 12, has p rows i of components and q columns
j of components.
In order to have a high probability that
in each group 2 of submatrixes, there is a submatrix
4 whereof all the points flmction correctly, i.e. a
probability close to 1, preferably use is made of a
redundancy at least equal to 3, i.e. the number r is
at least equal to 3.
The realisation of a matrix, according to
the invention, can advantageously be used for obtaining
a matrix of electronic components, such as transistors,
used in the addressing of elements, e.g. liquid
crystal in a display screen. These transistors can
either be thin layer transistors, or MOSFET transistors
(metal oxide semiconductor field effect transistor).
A description will now be given of the way
of determining, according to the invention, the
non-defectlve submatrixes of each group to be
electrically interconnected.
The first stage of this termination consists
of choosing in an arbitrary manner, within each group 2
of submatrixes, a submatrix 4 and electrically inter
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connecting the chosen submatrixes. In the case of
three submatrixes per group, there are 12 possible
combinations for connecting a submatrix of one group
to one o the three submatrixes of the four adjacent
groups.
The second stage consists of testing, in
the manner to be shown hereinafter, the matrix
obtained in this way, so as to determine the possibly
defective submatrixes, said matrix possibly being
that shown in the drawing. Then, the connections of
the submatrixes shown to be defective by the test
are destroyed. They are destroyed e.g. by subjecting
the faulty connections to a laser beam action. For
example, if the test reveals that submatrix 4b of
group 22 does not function correctly or at all, the
three connections of said submatrix 4b connecting it
to submatrix 4a of group 21, to submatrix 4a of
group 23 and of submatrix 4a of group 26 are destroyed.
The following stage of the process consists
of choosing in an arbitrary manner from within the
group having the defective submatrixes, e.g. in the
group 22 having the defective submatrix 4b, another
submatrix, e.g. submatrix 4c of group 22 and connecting
these new chosen submatrixes to the other submatrixes,
e.g. connecting submatrix 4c o~ group 22 respectively
to submatrix 4a of group 21 (part A of the drawing)~
to submatrix 4a of group 23 and to submatrix 4a of
group 26.
These operations must be repeated until a
final matrix is obtained, whereof all the components
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function correctly. Obviously, it may happen that
the first matrix is completely satisfactory.
A description will now be given of the
way of testing the matrix obtained, during the
connection of the submatrixes in an arbitrary manner,
in order to determine the possibly defective
submatrixes.
The first stage of this test consists of
determining the electrical continuity of each row i
of electronic component 6 of the matrix obtained.
This can be carried out by sequentially exciting the
rows i, in the same way as it will be done during
the subsequent operation of the matrix, and by
collecting the output signal for each row. For example,
lS the excitation signal can be supplied by the inputs
EQ , to the left of the drawing, and the output
signal can be collected on outputs S~ to the right
of the drawing. If no defect is detected, the following
stage of the test is carried out.
The second stage of the test consists of
determining the electrical continuity of each column
j of electronic components. As in the case of the
control of the rows, this can be carried out by
sequentially exciting the columns and by collecting
the output signal for each column. For example~ th~
excitation signal can be supplied by inputs Ec, at
the top of the drawing, and the output signal can
be collected on outputs Sc, at the bottom of the
drawing. As hereinbefore, if no defect is detected,
it is possible to pass to the following stage of the test.
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The third stage of the test consists
of carrying out a control between the rows and
columns of the matrix obtained. This can be
carried out by sequentially exciting rows i and
by collecting the output signal in parallel on
columns j. For example, it is possible to supply
the excitation signal by inputs E~ and collect the
output signal simultaneously on outputs Sc.
These three testing stages are adequate
for detecting defects in the rows and columns and
which are most serious for a matrix of electronic
components. These three testing stages can be carried
out by a simple potential difference reading between
the output and input signals. A large potential
difference between the input and output of the signal
corresponds to a defect in the matrix obtained.
In the case of electronic components used
in the control of a display screen~ e.g. transistors,
these three testing stages can be carried out by
addressing the display elements, e.g. liquid crystal,
and by carrying out an optical reading. In this case,
the appearance of black display elements (i.e. non-
excited) corresponds to a defect in the matrix obtained.
Another test procedure which can be used consists of
an electron beam, or infrared thermography.
In order to more thoroughly test each
electronic component of the matrix, it is possible to
carry out a supplementary testing stage, which consists
of sequentially exciting rows i and collecting the
output signal in parallel on columns j, as in the
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preceding stage by supplying, simultaneously
with the excitation, a beam of delocalized elec~rons
to the entire matrix of components. This supplementary
stage corresponds to the subsequent operation of the
matrix, when the latter is completely produced.
The not shown electrical circuit making
it possible to carry out the different stages of
the testing of the matrix obtained, can be the same
as those used for the subsequent operation of the
matrix, or can be other circuits which are easily
realisable by the Expert.
