INDICATEUR DE MINUTERIE INTEGRE AVEC UN RECIPIENT DE MEDICAMENT

TIMING INDICATOR INTEGRATED WITH A MEDICATION CONTAINER

Abrégé anglais

A low power consumption timing device using an
oscillator and chained CMOS flip-flop devices providing
all time-dependent functions, with an audible and/or
visual alarm which signals after a predetermined elapsed
time and continues until deliberately reset especially
useful for repetitively timed events such as reminders
for taking medication at fixed intervals. When reset the
elapsed timer begins the next timed interval. A minor
circuit revision, makes possible an automatic reset of
the timer mechanism after each elapsed interval without
disturbing the signal latch. This alternate method can
produce constant period cycles without regard to other
signal reset mechanisms.

Revendications

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CLAIMS:
1. A medication timer assembly for attachment to a
medication container cap comprising,
an electronic timing circuit,
an end-of-time interval indicator connected to the
output of said electronic timing circuit,
attaching means for attaching the assembly to a
medication container cap,
a battery,
and a powering mechanism for selectively connecting
the battery to the electronic timing circuit characterized by a
shipping position in which the battery current is zero, a reset
position in which the battery delivers resetting energy to the
electronic timing circuit that resets the electronic timing
circuit to an initial condition and a run position in which the
batter delivers electric power to the electronic timing circuit
at least until the electronic timing circuit provides an output
signal to the indicating means signifying the end of a
predetermined timed interval.
2. Apparatus in accordance with claim 1 and further
comprising,
a medication container cap attached to said assembly.
3. Apparatus in accordance with claim 1 wherein said
mechanism comprises structure defining three rotational detent
positions corresponding to said shipping, reset and run
positions respectively.

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4. Timer circuitry comprising,
an oscillator,
cascaded flip-flops coupled to said oscillator for
providing output pulses on a plurality of outputs in response

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to a predetermined different number of input pulses from
said
oscillator and arranged to be reset by a common reset
signal,
an R-S flip-flop having a latched output and
arranged to be set by the last of said output pulses
following
a reset signal and reset by said common reset signal,
an R-S flip-flop battery readiness indicator
having
a latched output arranged to be set by said common reset
signal and reset after the last of said output pulses,
diodes coupling said latched outputs
preventing
interaction therebetween,
a triple input AND gate having a first input
for
receiving an audible tone signal, a second input for
receiving
one of said output pulses and a third input coupled to
one of
said latched outputs,
and an end-of-time-interval indicator coupled
to the
output of said AND gate.
5. Timing circuitry in accordance with claim
4 and further comprising a mechanical reset mechanism
comprising
structure defining three detent positions a
first of which is arranged for removing power for
shipping and storage in a first extreme position, a
second of which is arranged to provide said reset signal,
and a third of which is arranged to provide continuous
supply power to said circuitry.

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6. Timer circuitry in accordance with claim
wherein said circuitry consists of not more than four
standard CMOS integrated circuits, two diodes, four
resistors, a capacitor, an indicator, and a reset
mechanism.
7. Latching circuitry in accordance with
claim 4 wherein said circuitry includes means for
indicating a supply battery readiness upon each reset
cycle.
8. Latching circuitry in accordance with
claim 5 wherein said circuitry maintains continuous
output until said reset mechanism is intentionally reset.
9. A medication timer assembly in accordance
with claim 1 wherein said electronic timing circuit
comprises,
an oscillator,
cascaded flip-flops coupled to said oscillator
for providing output pulses on a plurality of outputs in
response to a predetermined different number of input
pulses from said oscillator and arranged to be reset by a
common reset signal,
an R-S flip-flop having a latched output and
arranged to be set by the last of said output pulses
following a reset signal and reset by said common reset
signal,
an R-S flip-flop battery readiness indicator
having a latched output arranged to be set by said common
reset signal and reset after the last of said output
pulses,
diodes coupling said latched outputs
preventing interaction therebetween,
a triple input AND gate having a first input
for receiving an audible tone signal, a second input for
receiving one of said output pulses and a third input
coupled to one of said latched outputs,

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and an end-of-time-interval indicator coupled
to the output of said AND gate.
10. A medication timer assembly in accordance
with claim 9 and further comprising a mechanical reset
mechanism comprising,
structure defining three detent positions a
first of which is arranged for removing power for
shipping and s;orage in a first extreme position, a
second of which is arranged to provide said reset signal,
and a third of which is arranged to provide continuous
supply power to said circuit.
11. A medication timer assembly in accordance
with claim 9 wherein said electronic timing circuit
consists of not more than 4 standard CMOS integrated
circuits, 2 diodes, 4 resistors, a capacitor, an
indicator and a reset mechanism.
12. A medication timer assembly in accordance
with claim 9 wherein said electronic timing circuit
includes means for indicating a supply battery readiness
upon each reset cycle.
13. A medication timer assembly in accordance
with claim 10 wherein said electronic timing circuit
includes means for maintaining continuous output until
said reset mechanism is intentionally reset.

Description

60412-2059 CA 02020528 2000-07-14
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TIMING INDICATOR INTEGRATED WITH A MEDICATION CONTAINER
BACKGROUND OF THE INVENTION
The present invention relates in general to timing
and in particular to improved apparatus for providing
repetitive timed events of predetermined duration that create a
signal for indication of elapsed time, preferably within a
mechanism attachable to a cap, such as for a medication
container, for signalling the time for taking a medication
therein.
The present invention has as an important object the
provision of timing periods and signalling frequencies using a
minimum of component size and complexity with minimal operating
current and without the use of multiple oscillators or
independent time-bases. This is accomplished by using a master
CMOS Schmitt-trigger oscillator connected to chained CMOS
logical flip-flops providing binary divided frequency/time-
bases which are then connected to other CMOS logic to yield the
final desired signal through a piezo effect audible transducer
and/or a liquid crystal visual indicator.
Another important object of the invention is to latch
the signalling device until deliberately reset by the operator.
This is accomplished by connecting the final duration time base
output to an R-S (Reset-Set) flip-flop (latch) comprised of two
dual input CMOS logical NOR gates.
Another important object of the invention is to
provide an indication of battery readiness at the time of
deliberate operator reset. This is accomplished by connecting
an intermediate time base output to an R-S flip flop comprised

60412-2059 cA 02020528 2000-07-14
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of a pair of dual input CMOS logical NOR gates. The output of
the signal latch flip flop and the battery readiness indicator
flip flop are connected through diodes before coupling to
prevent interaction.

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It is a further object of the invention to achieve the
foregoing objects with reliably operating apparatus yielding re-
peatable output indications and virtually insensitive to all but
the most severe variations in the battery supply.
SUMMARY OF THE INVENTION
According to the inventions means are provided to accept
a reset signal which stops the signalling mechanism, triggers a
two pulse battery readiness indication ands in one embodiments re-
sets the master time base. In another embodiment of the inven-
tion. the time base is reset automatically by the output of the
final duration flip-flop without interrupting the signal latch or
battery readiness latch.
Preferably there is a mechanical reset device having
three rotational detent positions. In a first extreme position
which is typically most counterclockwise and is locked out of the
rotation after a first typically clockwise rotations the device
removes positive supply power from the circuits and is in the idle
or shipping position. In the middle position the device provides
power to the circuit and connects positive potential (logical high
or one) to the reset input. This middle position becomes the
extreme typically most counterclockwise position after the initial
typically clockwise twist of the mechanism. In all angular
positions between and including the reset input position and the -
most second extreme typically clockwise position the device
provides constant input of power to the circuit. In the second

60412-2059 CA 02020528 2000-07-14
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extreme typically clockwise preferably detent position the
device provides mechanical stability for continuous power on.
According to a broad aspect of the invention there is
provided a medication timer assembly for attachment to a
medication container cap comprising,
an electronic timing circuit,
an end-of-time interval indicator connected to the
output of said electronic timing circuit,
attaching means for attaching the assembly to a
medication container cap,
a battery,
and a powering mechanism for selectively connecting
the battery to the electronic timing circuit characterized by a
shipping position in which the battery current is zero, a reset
position in which the battery delivers resetting energy to the
electronic timing circuit that resets the electronic timing
circuit to an initial condition and a run position in which the
battery delivers electric power to the electronic timing
circuit at least until the electronic timing circuit provides
an output signal to the indicating means signifying the end of
a predetermined timed interval.
According to another broad aspect of the invention
there is provided timer circuitry comprising,
an oscillator,
cascaded flip-flops coupled to said oscillator for

- 2b - 60412-2059
providing output pulses on a plurality of outputs in response
to a predetermined different number of input pulses from said
oscillator and arranged to be reset by a common reset signal,
an R-S flip-flop having a latched output and arranged to
be set by the last of said output pulses following
a reset signal and reset by said common reset signal,
an R-S flip-flop battery readiness indicator having
a latched output arranged to be set by said common reset signal
and reset after the last of said output pulses,
diodes coupling said latched outputs preventing
interaction therebetween,
a triple input AND gate having a first input for
receiving an audible tone signal, a second input for receiving
one of said output pulses and a third input coupled to one of
said latched outputs,
and an end-of-time interval indicator coupled to the
output of said AND gate.
Other features, objects and advantages of the invention
will become apparent from the following

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specification when read in connection with the
accompanying drawing in which:
BRIEF DESCRIPTION OB THE DRAWINti
FIG. 1 is a combined block-schematic diagram
illustrating the logical arrangement of an embodiment of
the invention;
FIG. 2 is an exploded view of the mechanical
assembly of an embodiment of the invention especially
suitable for attachment to a medication container cap;
and
FIG. 3 is an edge sectional view of components of
the mechanical assembly.
DETAILED DESCRIPTION
With reference now to the drawing and more
particularly FIG,. 1 thereof, there is shown a combined
block-schematic circuit diagram of an exemplary
embodiment of the invention. Capacitor C1 and resistor
R1 provide a master oscillator time base of t=2.2 x R1 x
C1 into a Schmitt-trigger inverter. Resistor R2 provides
a stable feedback to the first chained oscillator
inverter il which is gated by the absence of a reset
signal on terminal 12. The output of the oscillator is
NOR-ed by NOR gate 13 with the reset signal and inputted
to the flip-flop chain comprising fourteen flip-flops
FF1-FF14 shown as input flip-flop 14, output flip-flop 15
and intermediate flip-flops 16 of integrated circuit U1
and input flip-flop 21, output flip-flop 22 and
intermediate flip-flops 23 of integrated circuit U2.
Resistor R4 pulls down the~reset input to prevent false
signalling.
The output Q4 from flip-flop FF4 provides the base
frequency for the audible tone which is pulsed by the
output Q13 of flip-flop FF13 through triple-input AND
gate U3-A and gated through triple-input AND gate U3-A
either by the high output from the battery readiness

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latch (set by the reset signal on terminal 12 and reset on line
28 by the output Q15 of flip-flop FF15) or by the high condition
of the final output latch set by outputs Q28, Q27, Q26, or Q25 of
flip-flops FF28-25, respectively, and reset by the reset signal on
terminal 12. The output of triple-input AND gate U3-A provides
the signal on the piezo audible transducer 17.
The battery readiness latch comprises the two lower
NOR gates in U4 while the final output latch comprises the two
upper NOR gates in U4.
Diodes D1 and D2 couple the battery readiness flip-
flop with the final duration output flip-flop to prevent interac-
tion and allow independent signalling through the triple-input AND
gate U3-A. Resistor R3 pulls down the coupled input to U3-A during
a no-latch condition. Diodes D1 and D2 eaith resistor R3 constitutes
a logical OR gate.
The Schmitt-trigger inverter and associated logic
between flip-flops FF14 and FF15 are not required for proper
operation of the circuit but are advantageously used in this em-
bodiment because integrated circuit U1 then may be a standard CMOS
2p logic circuit and integrated circuit U2 may be a slighter simpler
standard CMOS logic circuit.
The output Qn at each chained flip-flop provides a time
delay of 1.1 x R1 x C1 x 2n. If the oscillator frequency is chosen
to yield an output at inverter Q28 of 8 hours, then inverter Q27
would provide a 4-hour timer, inverter Q26 a 2-hour timer, and
inverter Q25 a 1-hour timer. Thus for the common medication

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intervals of 12-, 8-, 6-, 4-, 3-, 2- and 1-hours, only two master
oscillator frequencies are sufficient.
To provide a repetitive fixed interval timer described as
an alternate embodiment, the final duration timer output (from the
selected one of inverters Q28, Q27, Q26, or Q25) is connected to
the reset terminal 12 of integrated circuit Ul and reset line 24 of
integrated circuit U2 and the final output latch SET-input 26. The

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mechanical reset switch is only connected to the battery
readiness latch SET-input 27 and tlhe final output latch
RESET-input 28 as shown and not to the reset inputs of
integrated circuits U1 and U2.
The term reset signal is used in the description
to denote a potential at or near the supply potential
which is recognized as a logical one. The terms high and
low are used in 'the description to denote the potential
xelative to ground with low being at or near ground
potential and high being of sufficient potential to cause
an inverter to be held in a high input condition.
Referring to FIG. 2, there is shown an exploded
view of an exemplary embodiment of a mechanical assembly
according to the invention especially suitable for
attachment to the cap of a medication container so that
unscrewing (or screwing on) the medication container cap
resets the timing circuit to begin counting pulses during
the next interval between recommended contiguous times
for taking the medication in the container.
The assembly includes a stationary assembly to the
left and a rotating assembly to the right.
The stationary assembly includes an adhesive pad
31 for attachment to a medication container cap, an
insulating disk 32, a positive sweeper 36, a coin cell
battery 33, a bottom ratchet and insulator 34 and a
negative (ground) sweeper 35. The rotating assembly
comprises a top ratchet and power p?ane 41, a circuit
card 42 with power via openings 42A, 42~ and 42C, an
insulating spacer 43, a piezo electric element 44 and a
cap and piezo electric chamber 45 in which the elements
to the left nest when assembled. Positive sweeper 36
contacts the positive terminal of coin cell battery 33 at
the left and passes through circumferential groove 34A in
bottom ratchet and insulator 34. Negative (ground)
sweeper 35 contacts the negative terminal of coin cell

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60412-2059
m
battery 33 seated in opening 34B of bottom ratchet zand
insulatar 34 for contacting groumd track 41A of top
ratchet and power plans 41. Reset track 418, power track
41C and ground track 41A contact via openings 428, 42C
and 42A respectively corresponding to terminals 12, and
ground, reap~ctively, of FIG. 1. Piezo electric element
44 (17) is coneect~d to the output of gate U3-A of
FIG. 1.
Referring to FIG. 3, there is shown an edge
sectional view of bottom ratchet and insulator 34 and top
ratchet and pow~r plane 41 helpful in understanding the
mode of operation. Ratchet arm 34C rides up in one of
ship channels 41D, reset channel 41E or run channel 41F.
Ratchet arm 34C initially resides in the ship extreme
counterclockwise channel as shown wh~n the assembly is
initially shipped before using so that the batt~ry
remains disconnected from the circuitry. A pharmacist
may then attach adhesive pad 31 to the top of a
medication cap. When the patient takes th~ first
medication dose and replaces the cap screwing it on
clockwise, the patient continues rotating rotating
assembly cap and piezo electric chamber 45 so that
ratchet arm 34C first moves into reset thermal 41E
causing positive sweeper 36 to engage reset track 41B and
apply a reset potential to terminal 1a and then move to
run channel 41F to cause positive sweeper 36 to engage
power track 41C and energize the circuitry to cause
counting to occur until gate U3-A provides an output
signal that energizes piezo electric element 17 at the
end of the counting interval, providing an audible signal
to the patient that it is time to take the next dose of
medication in the medication container.

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TABLE I (FOR 8 HOUR MdAXIMUM TIMER)
C1 0.01 MFD 25 VOLT CERAMIC CAPACITOR
D1-D2 1N914 SMALL SIGNAL DIODE
R1 10 K-OHM METAL FILM RESISTOR
TRIMMED TO 9.753 K-OHM
R2-R4 47 K-OHM METAL FILM RESISTOR
U1 CD4060 CMOS INTEGRATED CIRCUIT
U2 CD4020 CMOS TNTEGRATED CIRCUIT
U3 CD4073 TRIPLE THREE-INPUT AND GATE
U4 CD4001 QUAD DUAL-INPUT NOR GATE IC
PIEZO PIEZO EFFECT AUDIBLE TRANSDUCER
There has been described a novel apparatus and
techniques for economically and reliably providing a
repetitive fixed duration timer with audible and/or
visual indication of a predetermined elapsed time
transpired with reliable economical compact circuitry
that dissipates negligible power. Attached Table I sets
forth specific parameter values in a preferred
embodiment. It is evident that those skilled in the art
may now make numerous uses and modifications of and
departures from the specific embodiments described herein
without departing from the inventive concepts.
Consequently, the invention is to be construed as
embracing each and every novel feature and novel
combination of features present in or possessed by the
apparatus and techniques herein disclosed and limited
solely by the spirit and scope of the appended claims.
What is claimed is:

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