Note: Descriptions are shown in the official language in which they were submitted.
1037~7
BACKGROUND OF THE INVENTION
The invention relates to a Time Division Multiple Access
(TDMA) synchronisation systemO The invention i8 particularly con-
cerned with communications satellite relay systems.
In TDMAsy8tem8 currently envisaged for commercial communi-
cation satellites, the earth stations would transmit their re-
spective digital data traffic at specified respectively correspond-
ing times within an overall time frameO In such proposals, a
special carrier frequency burst transmitted from a reference station
defines the start of the time frame and must be received by all
other earth stationsO Comparison of the measured time difference
between the received refercnce burst and a particular ~tation's own
received traffic data burst is used as a basis for the control of
that station's transmitted traffic data burst timing. In such
system~, special transmissions, which do not interfere with the
TDMA traffic data transmissions of the other earth stations must
al80 be made by any earth station de~iring to initiate its entry
into the operating TDMA systemO However, provisions may also be
made for rapid re-entry after short interruptions without going
through such an init-ial acquisition procedure.
Such a system requires each ground station to be able to
receive its own TDMA traffic data transmissionO In satellite~
which have spot beam antenna~ for the majority of the traffic
thiq prior art the above synchronisation scheme may not be possible
; ~ or de~irable~
In future satellite relay systems there may be situations
where the constraints imposed by the system demand an alternative
synchronisation ~ystem such as the invention described below~
-- 1 -- ~
~ '
- ~03716~7
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a TDMA
synchronisation system for a satellite relay system 80 that each
ground station ha~ a frame rate controlled in frequency and phase
to ensure that its transmission, as received by the satellite, is
synchronised with the other ground stations transmissions at the
satellite.
It is another object of the present invention to provide
a synchronisation system for a satellite relay system in which only
a small proportion of the frequency capacity of a global trans-
ponder of the satellite i8 utiliaed for synchronisation signals.
It is still another object of the present invention to pro-
vide a synchroni~ation system for a ~atellite relay system which
eliminates the need for special intitial acquisition procedures
throughout the communications system.
Finally it is an object of the present invention to pro-
vide synchronisation for a satellite relay system in which certain
of the synchronisation control functions are simplified.
These and other objects and features of the present in-
vention are realised and described below in a specific illustrativenon-limiting embodiment of a satellite relay system which has been
simplified to include one reference station and only two further
ground stations. According to the present invention there is pro-
vided a synchronisation system for a satellite relay system in
which all ground stations modulate a carrier signal, the frequency
of which is specific to each station, with a periodic signal having
a fixed phase relationship to the frame rate at that station, and
by a comparison of the periodic ~ignal from a designated "Reference"
station transmitted via the satellite with its periodic signal as
-- 2 --
~037~
received after transmi~sion to and return from the ~atellite at
all non-reference stations there is produced thereat a control
signal which re-tLmes the frame rate at the non-reference stations
until the compared periddic signal-~ are in pha~e and ~ynchronisation
is achieved at the satellite.
Preferably the periodic signal is a sine wave which i8
frequency modulated onto the carrier signal. The preferred re-
lationship between the frame timing and the periodic signal is
~ such that unidirectional zero cros~ings (iOe. positive or negative-
going zero cros~ings) coincide with the commencement of a frameO
~RI~F DESCRIPTION OF THE DRAWINGS
A complete understanding of the pre~ent invention and the
above and other objects and advantages thereof may be gained from
the consideration of the following detailed de~cription presented
in connection with the accompanying drawings which are described
as follows:-
Figure 1 shows ~chematically a communication satelliterelay systemO
Figure 2 shows a synchronisation sy~tem for the satellite
system of Figure 1.
Figure 3 shows graphically the error in zero c~ossing
due to noi~e~
Figure 4 shows graphically the relationship between occupied
rOf. bandwidths needed to values of timing error exceeded with
given probability.
Figure 5 shows in greater detail a logic unit forming part
of Figure 20
03716~7
DETAILED DESCRIPTION
TDMA systems are well-known and their application to com-
munication satellite relay systems is also known and so will not
be described in detail for the purposes of the present invention.
Figure 1 however shows the necessary operating integers of a TDMA
communication satellite relay system to which the invention is ap-
~plied. Figure 1 shows a satellite geostat~nary relative to a re-
ference station and a first and a second ground station. The trans-
~ mission paths for the synchronising signals (transmitted via at
least one transponder in the satellite capable of communicating
with all ground stations, i.e., a Uglobal transponder.")are also
illustrated on Figure 1 and these will be dealt with in greater
detail later in the description. As shown, the reference station
transmissions on frequency fl are received by all other ground
~tations which, in turn, transmit and receive similar synchronisa-
tion Jignals via independent channels f2, f3, etcO
In a practical satellite system each ground station will
contain a synchronising system as shown in Figure 2 however the
reference station which may be any one of the ground stations will
be modified 80 that no change is made to the frame timing. This
enables the reference station to accept its own frame timing
arrangement for the transmission of data without reference to any
other station~ The non-reference ground stations each include a
synchronising system as shown in Figure 2 which operates to re-time
the frame commencement at that station until the frame commence-
ments of the reference station and that ground station are
synchronised at the satellite~
Referring now to Figure 2 the synchronisation system in-
cludes demodulator means, detection andlogic arrangement means,
1037~
a tLming wave generator means and a modulator mean~. ~he de-
modulator means derives its input from the IF stage 1 of the
synchronisation signa~ receiver of a ground stationO For illustra-
tion Figure 2 depicts the situation at the "first ground station"
shown in Figure 1 where channels fl and f2 are pertinent~ The FM
signal from the reference station (eOgO via carrier fl) i8 separated
from the FM signal of the local station (eOgO via carrier f2) by
means of filters 2 and 3 respectively, the outputs of which are de-
modulated by FM demodulators 4 and 5 respectively. The units 1 to
5 form the demodulator meansO The two outputs from the demodulator
means are applied by way of noise rejection filters 6 and 7 to
pulse squares 8 and 9 and mon3stable circuits 10 and 11 respectively.
The squarer and monostable act a~ a zero-crossing detector unit
for the periodic synchronisation signal and produce an output which
is fed to a controlled counter 12 which counts clock pulses from
the symbol clock 13~ The counter is arranged 80 that pulses from
the symbol clock are counted and subsequently gated to the out-
put line 14 starting upon the occurrence of a pulse from the re-
ference channel monostable 10 and terminating upon the occurrence
of av~pulse from the "own channel" monostable 11~
Thus~ if the "reference channel" start pulse briefly pre-
cedes the "own channel~ stop p~lse, a relatively few symbol clock
pulses will have been counted in counter 12 indicating the magni-
tude of "own channel~ phase lag in terms of symbol clock pulse
time~perioas. On the other hand, if the "own channel" stop pulse
briefly precedes the "reference channel" start pulse, a relatively
large number of symbol clock pulses will have been counted in
counter 120 The difference between the maximum number of such clock
pulses possibly occurring between desired ~ynchronisation signal
- 5
~037~7
pulses and the actual counted number will thus indicate the magni-
tude of "own channel~ phase lead in terms of symbol clock pulse
time periodsO The contents of counter 12 is fed on lead 14 to a
logic unit 15 to be described in greater detail below. Unit 15
aerives phase advance or retard signals which are then fed through
respective lead~ 16 and 17 to a frequency divider unit 18 which
divides an input pulse train on lead 19 which is another output
(same frequency) of symbol clock 13. The signals on leads 16 and
17 decrea~e or increase respectively the divisor of unit 18 and
thus advance or retard respectively the phase of the divider output
on lead 200 The divider output on lead 20 is fed via narrow-band
pass filter 21 to an FM m~dulator 220 Modulator 22 is fed with a
carrier ~ignal from a carrier source unit 23 and delivers a
frequency-modulated output to the IF stage of the ground station
synchroni~ation ~ignal transmitter. The output of divider 18 on
load 20 i~ al~o fed via a delay unit 25 and a monosta~le 26 to a
conventional TDMA Burst Control Sub-system 27. In addition, the
~ignal on lead 20 is fed via a level buffer 28 to pr,ovide a timing
pulse on lead 29 for logic unit 150
~, 20 Logic unit 15 is described in greater detail in Figure
5 to which reference will now be made~ The contents of counter
12 is fed via lead 14 to AND-gate 30 which receives a second input
on lead 31. The output of gate 30 i8 fed directly via lead 32 and
indirectly via a complementor 33 to a comparator and signer unit
34. If the number in counter 12 is greater than 11,256, which is
half the number of symbols in a frame, this indicate~ a phase
: lead situation as described above and then the complement of this
number with re~pect to 22,512 (via complementor 33) is stored in
a value register 35O Comparator 34 determines whether a number
-- 6 --
~ ~3716~7
in the counter 12 is greater than 11,256 and stores a correspond-
ing sign in a sign register 360 If the comparison in unit 34
shows the number in counter 12 to be 11,256 or less (iOeO, a phase
lag situation as described above) then the number itself is stored
in value register 35. The contents of register 35 is fed via lead
36 to a detector 37 which also receives a timing pulse on lead 38
which is in turn derived from a frame pulse unit 39 which delivers
the pulses supplied on lead 29 in Figure 20 The output of detector
~ 37 is fed via lead 40 directly to form one input on lead 41 to a
flip-flop 42 and via an inverter 43 to form a second input in
OppO8 ite sense on lead 44. Provided the number in register 35 i9
greater than zero, detector 37 provides a "one"level input on lead
40 keeping flip-flop 42 in the and after "set" conditionO The
set output of flip-flop 42 is delivered via lead 45 to AND-gate 46
thus enabling a subtraction loop formed by subtractor 47 register
48 gate 49 and gate 46~ Gate 49 is timed by pulses on lead 50
derived from the frame pul~e unit 390 When the number in register
35 is zero, detector 37 provides a "zero" level input on lead 40
which "resets" flip-flop 42 thus providing a "one" level input on
lead 51 ~ich in turn is fed via delay element 52 to lead 31 to
enable a new count to be transferred from counter 12~ Successive
"one" level inputs from detector 37 are also fed via lead 53 to
output selector 54 which provides a "one" level signal on lead 16
or 17 in accordance with the sign delivered on lead 55 from sign
register 36. A count le~s than 11,256 in counter 12 will cau~e
a negative sign to be stored in sign register 36 and hence cause
the output from selector 54 to be delivered on lead 17; a count
greater than 11,256 in counter 12 will cause a positive sign
to be stored in sign register 36 and accordingly the signal from
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1037~
output selector 54 to be delivered on lead 160 The signals on
leads 16 and 17 are used to control the operation of the divider 18
as described in connection with Figure 2.
The operation of the Figure 5 circuit will be described
starting from an assumed zero error situation where the contents of
value register 35 is zero, the output of detector 37 is a "zero"
level, a null output is on lines 16, 17 and an enabling "reset" i5
output from flip-flop 420 Then, after delay 52, gate 30 is enabled
to pass the then existing contents of counter 120 Assume that such
contents is x, a number les~ than 11,2560 Then x will be passed
through directly to value register 35 while sign regi~ter 36 will
be set to a ~negative" contentsO Detector 37 will sense the greater
than zero contents of value regi~ter 35 and produce a "one" level
output at 53 which will result in an output on line 17 decreasing
the divisor of divider 18, thus increasing the phase of the synchron-
ising ~ignal on f2 to compensate for the detected phase lag thereofO
The amount of phase advance for the first frame will be about equal
to one symbol clock period since, in the exemplary embodiment, the
divi~or of 18 is decrea~ed by only one unit from the total number
of clock pulses per frameO
Upon the next frame pulse occurrence from line 50, gate
49 in the subtraction loop will be enabled to qubtract one unit
from the then existing contents of the value register 35. If the
remaining value register contents are ~till greater than zero, the
detector 37 will maintain its ~one" level output thu maintaining
the output on line 17 and causing another phase advance in the local
synchroni~ation æignal on f2 by about one clock pulse periodO Pro-
gressive phase advance is thu~ produced in the local synchronisation
until the value register 35 contents goes to zero whereupon the
-- 8 --
``-` 1037~ j
detector 37 output goes to the "zero" level thereby removing the
output on line 17 and resetting flip-flop 420 After a tLme delay
52 to insure that fresh phase comparison data iB available, gate
30 is again enabled to pass the contents of counter 12 and re~tart
the phase correction cycleO
If the detected phase error is leading rather than lagging,
the procedure is substantially as just described with the except-
ion that the sign register wil} store a positive contents thus caus-
ing output lead 16 to be energised rather than lead 17 and the
contents of value register will comprise the complement of the
counter 12 contents with respect to 22,5120 In this case, the
divi~or of divider 18 will be increased by one unit thus retarding
t~h~,phase of the local synchronisation signal on f2 by about one
clock pulse period to compensate for the detected leading phase
errorO
In a specific satellite system the synchronisation system
; according to this invention had its parameters limited by the
~atellite system requirementsO Details of this specific system
will now be de~cribedO
The divider 18 must divide the symbol clock waveform from
the output 19 by 22,512 (iOeO, in the exemplary system there are
22,512 clock pulses per frame) when no external enabling signals
are applied. It must change this divisor to either 22511 or 22513
when the relevant control wires 16 or 17 are enabledO The nominal
frequency of the output of the divider will therefore be 1333 1/3
Hz. The divided clock waveform is passed to the low-pass filter
21. The response of this filter should be chosen so that it
attenuates the third and higher harmonics by at least 40 dB more
than the fundamental.
_ g _
~03716~7
The delay element 25 between the output 20 of the divider
18 and the input of the monostable 26 is arranged to equalise the
delay of the path followed by the synchronising sinusoid and the
path followed by the TDMA signals themselves.
The timing signals for the TDMA burst control sub-system
27 are obtained from the monostable 26, the output o which re-
mains positive for 33 ns following a positive-going edge on its
inputO The repetition frequency is 1333 1/~ Hz and is in syn-
chronism with the output of the divider 180
. The rise and fall times of the monostable output are less
than 3 ns between 10% and 90% levelsO The FM modulator 22 accepts
the 1333 1/3 Hz sinusoidal waveform from the timing-wave generator.
This waveform fr~quency modulates an externally-supplied carrier
which lies within the range 52 MH& to 88 MHz.
The receiver channel filters 2 and 3 limit the total noi~e
entering the demodulators 4 and 5 to keep the C/N ratio well above
the FM thresholdO If the carrier spacing is not less than 1.25
times the peak-to-peak deviation, the filters 2 and 3 preferably
have 005 dB bandwidth not less than 40 KHz and give at least 20
~0 dB rejection beyond 33 KHz from band centre and at least 30 dB
rejection beyond 80 KHz from band centreO
; The phase response of the filter i9 such that the delay
experienced by that part of the FM wave which corresponds to the
zero crossings of the modulating sinusoid does not vary by an
amount which contributes significantly to the overall permitted
timing error, for variations in carrier centre frequency of
+ 500 Hz~
By counting positive going edges of the 30 MHz symbol
clock it is possible to measure (in units of one symbol clock pulse
-- 10 --
- 103716 7
period) the timing differences between the two received sinusoids.
The counter 12 is started by the pulse originating from the zero-
crossing detector of the reference channel (e.gO fl) and stopped
by the corresponding pulse from the local channel (eOg. f2) received
back from the satellite. If the reference pulse arrives a small
number of symbols before the local-looped-back pulse then the con-
tents of the counter indicate by how much the local station lags
the reference station at the satelliteO If the local-looped-back
. pulse arrives a small number of symbols before the reference pulse
then the resulting large number contained within the counter should
be subtracted by the logic unit 15 from 22512 to give the number of
symbols by which the local station leads the reference station at
the satellite. The counter unit 12 and the logic unit 15 generates
a number and a sign indicating the relative positions of the re-
ference and local station sinusoids at the satellite measured
in symbol periodsO
It will be appreciated that although the sinusoid waveform
period i~ directly related to the TDMA frame period it could be
a multiple or sub multiple of the frame rate (iOe~ frame period)0
The invention will operate provided the signals are harmonically
related in a predetermined manner~
The narrow band noise rejection filters 6 and 7 following
the FM demodulators 4 and 5 respectively give a very high signal
to noise ratioO The small residual noise however produces a random
error in the timing of the zero crossing as shown in Figure 30
If the instantaneous value of noise in the vicinity of the
- zero crossing is n volts, then, ~ince the gradient of the sinu-
soidal synchronisation signal at the zero crossing is A volts per
radian, the phase shift of the zero crossing due to the noise will
-- 11 --
~ 037i6~7
be approximately n radiansO
Although the noise waveform appears sinusoidal in the short
term due to the narrow band filters 6 and 7 in the longer term
it will have a Gaussian distribution of amplitude. If the rms
noise voltage iscrthe probability,~ , of the zero crossings
beinq ~hifted by an amount exceeding some specified value + e
radians is given by:
g = erfc[ A ~ ] = erfc~ es] O O O . . . O O , O O (1)
where erfc ~x) is defined as 1~ dt
d S 1 A (rms signal to rms noise ratio)
With the parameters of a known communication TDMA system one
symbol corresponds to 208 x 10 4 radian~0
Although the carrier/noise power ratio (C/N) before the
demodulator might fall to as low as 10 dB for some of the time,
the demodulated signal/noise power ratio s2 after the noise-
rejection filters 6 and 7 can be maintained in the region of 70-80
dB by suitable choice of the parameters. The relationship between
these two ratio~ is
82 = C 0 B ~? o o . . . o o o o o o o o o o o o o ( 2 )
N b f~
where B (= 2 ~ fd + 2 f) is the rOf. noise bandwidth, is the
bandwith of the postdetection filters, 6 and 7 fd is the rOmOs.
frequency deviation and f is the frequency of the modulating wave-
form.
The timing error T can be measured in symbol periods and
is related directly to the pha~e error e (by T = 22512e/2qr for
the example chosen of 22512 bits per frame)0 T can then be re-
` 10371~7
lated to the occupied radio-frequency bandwith B by use of eqns.
1 and 2. The result i9 plotted in FigO 4 for a cO/n./ratio of 10
dB and for a probability of 10-6 that the error exceeds T symbolsO
Several possible values of post-detection filter bandwith b are
assumedO Over the range of interest, T is given by the approxi-
mate relationship T = 470b~ (B-2) symbol periods, where b is
in Hz and B is in kHzo T is reduced by a factor of ~ for each 3
dB by which the cOn. ratio exceeds 10 dB.
The choice of the value of b is determined mainly by
practical design considerations and by the allowable response
time of the sy~temO The response time i9 bound to exceed 270 ms,
this being the typical delay due to the satellite linkO
The carrier-to noise ratio available from a global beam
transponder when backed-off for multi-carrier working i8 approxi-
mately 13 dBo If it is assumed that the power allocated to the
synchronising signals i8 pro-rata to the bandwidth they use,
then their C/N ratio will also be 13 dBo Allowing for a 3 dB
degradation in the downpath component of the noise and 0.5 dB
for transponder output power variation results in a C/N ratio of
about 10.5 dB exceeded for all but a very small proportion of
the time. In the case of the reference station and standby re-
ference station (for example the second ground station shown in
Figure 1) tran~mi~sions it would be appropriate to increase the
; power allocated by say 6 dB to provide added safety margin and
improved accuracy of timingO
The ~ignal-to-noise ratio of the demodulated signal i9
given by:
`~03716t7
S/N = C/N ~ 10 log10 (B/b) + 20 log10 (fd/~)dB 0 0 0 0 (3)
where B = RF noise bandwith (B=2~ fd + 2f),
b = noise bandwidth of baseband filter,
fd= rms deviation,
f = frequency of modulating sinusoid,
The bandwidth b of the filter after the demodu}ator~is chosen
to have as small a value as is practicable to permit high S/N
ratio to be achieved, but not 80 small that it cannot pass the
small ~ariations in frequency of the synchronising periodic wave
occurring in normal operations or that it takes an excessive time
for its output to respond to changes occurring in its input signal.
The error in clock frequencies (specified maximum offset 1 in 107)
and the effect of Doppler shift (maximum rate about 20 nY/s) would
together cause a maximwm shift of about 0000016 Hz in the frequency
of the 1333 Hz wave, which can be considered negligible. The
re~pon e time of the filter will be of the order of the re-
ciprocal of its bandwidth, e.gO of the order of 1 second for a
1 Hz filter. This would be the time for which any error due to
the presence of noise would persist and also the time it would
take for corrections to make themselves felt at the outputO Thus,
during this period, further timing corrections should be inhibited
by the control logic 15 after one correction ha~ been completed.
It is felt that choice of a bandwidth much less than lHz would
cause response times which could prove inconveniently long for
normal operationsO A bandwidth of 1 Hz on the other hand would
have acceptable response time and also give adequate S/N ratioO
From the practical point of view stable filters with band-
widths of the order of lHz at 1333 Hz centre frequency are quite
feasibleO Attention will be necessary to achieve a reasonably
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''- 1037~
constant phase shift around the centre of the passband and to
ensure that this phase shift does not vary with time (or more
particularly that the difference between the phase shifts of the
two receiving channel chains in the synchronisation circuits does
not vary)0
In practice, the reference-station's transmission could
be allocated more power than the others, so that most of the
error would be due to the noise associated with the station's own
looped-back transmissionO For example, if there were 50 stations
in the TDMA system, and allowing 25% guard bands, the total band-
width occupied by the synchronising signals would be 205 MHzo
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