Note: Descriptions are shown in the official language in which they were submitted.
13ACK(IROUND OE Tl~ L~IVEN'['~O~I
This invention rela-tes in general to e ectrical
devices employed for pro-tec-tion of alternating cu:Arent networks.
In electrical quantity sensing devices ~ the prior
art, the current information and relay circuit operatingpower
was derived from two current transformers. Under some conditions
at least one of the transforrners was designed to saturate with-
in the expected range of the curren-t magnitudes. Other prior
art devices utilized a current transformer in combination with
a separate power source.
In static time delay relay circuits of the prior
art it is common to employ a curve shaping device for pro-
viding relay characteristics similar to those of prior widely
32~:~
used electromechanical devices. Curve shaping arrangements
are illustrated in U.S. Patent 3,496,417 to N. D. Tennebaum
dated February 17, 1970; and U.S. Patent 3,544,846 to F. T.
Thompson dated Decernber 1, 1970.
BRIEF SUMMARY OF THE INVENTION
The invention provides a novel electrical
quanti-ty responsive device for the pro-tection of an alter-
nating current network. In its more specific form, the
invention utilizes a transformer to alternately charge a
power supply and provide a control quantity having a magni-
tude proportional to the magnitude of the electrical quan-tity
in the alternating curren-t network which is to be sensed.
A detecting circuit is energized by the control quantity and
provides a time delayed output signal which has an inverse
time characteristic with respect to the magnitude of the
control quantity. The time delay circuit includes RC network
means and digital counting means for shaping a desired inverse
time-response curve.
BRIEF DESCRIPTION OF THE DRAWINGS
Figure 1 is a block diagram of an electrical
quantity responsive device protecting a three phase alterna-
ting current network and embodying the invention;
Figure 2 is a schematic diagram illustrating -the
input circuit shown in block form in Figure l;
Figure 3 is a schema-tic diagram illustrating -the
AC-DC conversion circuit and the time delay circuit shown
in block form in Figure l;
Figure 4 is a semilog plot showing the manner in
which curve- shaping of a desired inverse -time response
0 curve is achieved using a superposition technique;
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5~
Figure 5 is a schematic diagram useful in
describing the RC network used in the time delay circuit;
Figure 6 is a schema-tic diagram illustrating
the instantaneous comparator circui-t and the trip circuit
shown in block form in Figure l;
Figure 7 is a schematic diagram illustrating a
modified form of the input circuit illustrated in Figure 2;
Figure 8 is a schematic diagram illustrating
ano-ther modified form of the input circui-t illustrated in
Figure 2; and,
Figure 9 is a schema-tic diagram illustrating
an input overvoltage protection circuit and power supply
using a transformer having a single secondary winding.
DESCRIPTION OF THE PREFERRED EMBODIMENT
Figure 1 illustrates an electrical quantity
sensing device or protective relay that is associated with
an electrical network to be protected. This electrical net-
work may be of any type having a condition to which the
sensing device is -to respond. For present purposes, it will be
assumed -that the network is a three phase alternating current
network operating at a frequency of 60 Hertz and represented
by the line conductors Ll, L2, and L3. Thése line conductors
transmit an alternating curren-t from a suitable source -to a
load through a circuit breaker 4 having a trip coil 6. The
circui-t breaker 4 further comprises a plurality of separable
line contacts 8, 10 and 12 which are closed when the circuit
breaker 4 is closed and which are open when -the circuit
breaker 4 is open. Energization of trip coil 6 while circuit
breaker 4 is closed results in a tripping or opening operation
o:f the circuit breaker. I-t is to be dis-tinctly understood
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that while the invention is illustrated in connection with
a polyphase network, it is equally applicable to a single
phase network. It may be used to monitor total current in
either a single phase network or total curren-t in a poly-
phase network dependent upon de-tai]s of -the circuit which
combines the output of -the sensing windings of the current
-transformers.
Ln a preferred embodimen-t, the inven-tion is
shown as comprising a current relay which is responsive -to
the magnitudes of the line current flowing -through the line
conductors Ll, L2 and L3 and will respond to the highest
current magnitude flowing in the conductors Ll, L2 and L3.
When this curren-t magnitude exceeds a predetermined value for
a time interval depending on the current magnitude, the relay
energizes the trip coil 6 to open the circuit breaker ~ in
either a substantially instantaneous manner or af-ter a pre-
determined time delay depending upon the current magnitude.
As illustrated in Figure 2, an input circuit 100
comprises a plurality of substantially similar current trans-
formers CTl, CT2 and CT3 with -the prirnary windings of said
transformers being individually energized by the line curren-t
of conductors Ll, L2 and L3 respec-tively. Each current
transformer has a first ou-tpu-t winding 10~, referred to as
a power winding, and a second output winding 106, referred to
as an information winding. Both output windings are in-ter-
linked by the same flux and the number of winding -turns Nl in
each power winding is less than the number of winding turns
N2 in each information winding.
To facilitate explanation, only the opera-tion of
current transformer CTl and i-ts accompanying circui-try wi:Ll be
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described in detail. All three transformers and thei.r
accompanying circuitry operate in a similar fashion -to
each provide first and second output currents, Iol and
Io2, which are proportional -to the line current energizing
the respective -transformer.
The current transformer CTl has its primary
winding 102 energized in accordance with the line current
in line conduc-tor Ll. The power winding 104 and informa-
tion winding 106 are connected respec-tively to the input
terminals of the full wave bridge rectifiers RE108 and
REllO having outpu-t terminals 112-114 and, 116-118 respec-
tively. Terminals 112 and 116 are connected to a common bus
which is shown as being grounded. Terminals 114~and 118 are
connected to first and second input terminals of a control
circuit 120.
Control circuit 120 comprises a voltage ac-tuated device
which is illustrated as being in the form of a Zener diode
Z122, a first switch device T124 which is shown as a PNP
transistor, a plurality of diodes D126, D128 and D130,
a second switch device SCR136 which is shown as a thyristor,
capacitors C137, C166 and C168, and a plurality of resistors
R138, R140, R142, R144 and R146. The control circuit 120
provides the sequential operation of the power secondary
winding 104 and the informa-tion secondary winding 106.
Hereinafter, the word thyristor shall be used to
designate any switching device having a first or anode
terminal, a second or cathode terminal and a third or gate
terminal. Once conduction begins, the device will not cease
conducting unless the current flowing into the anode drops
0 and remains below a predetermined magnitude for at least a
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minimum period of time which shall be designated as theminimum shutof~ time.
Following each zero crossing of the line current
in conductor Ll, balancing of -the primary ampere-turns is
first achieved by the current flow IGl through the power
output winding 104. During this -time, the information
output winding 106 rernains open circuited and ineffective
due -to the non-conducting or deenergized condition of the
thyristor SCR136 which acts as an open swi-tch.
I0 The current Iol is rectified by rectifier RE108
and is used to charge a power supply 1~8. A portion of
current Iol flows between the terminals 112 and 11~ through
a diode D126 and an energy storage device or capacitor C150
to provide a positive (with respect to ground) voltage Vs
at terminal 152. A second portion of the rectified current
Iol flows between the ou-tput terminals 112 and 114 through a
diode D128 and an energy storage device or capacitor C162 to
provide a second power supply circuit 15~ having a substantially
ripple-free regulated voltage VR between ground and an output
terminal 156. The second power supplying circuit 15~ is
used to supply power for low current drain use. The reference
voltage power supplying circuit 15~ is connected in parallel
with capacitor C150 and comprises serially connected resistor
R158 and rheostat R160 connected in shun-t across the capa-
citor C162. The movable arm of the rheos-tat R160 is connected
to terminal 156. A filter capacitor C16~ is connected be-
tween the movable arm of rheostat R160 and ground.
When the voltage between terminal 11~ and ground
is below the breakover vol-tage Vzll2 of a temperature compen-
sated Zener diode Z122, no substantial magnitude of current
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Iol flows into the emitter of transistor T124 or -through
resistor R138. As the rectified current Iol charges the
capacitors Cl50 and C162, the voltage across the capacitors
C150 and C162 increases until it approaches a magnitude
equal to Vzl22 which is the regula-ted ou-tput vol-tage Vs.
Apart from preven-ting the discharge of -the capacitors C150
and C162, -the diodes D126 and D128 provide temperature
compensation for the regulated voltages since the diodes Dl26
and Dl28 tend to balance the base-emitter junction temperature
effect of the transistor T124.
When the voltage level across capacitors C150
and C162 substantially reach Vzl22, the Zener diode Zl22
will breakover and conduct current through resistor R138.
This reduces the potential of the base of transistor T124
and base drive current will then flow causing the transistor
Tl24 to conduct through its emitter and collector, diode Dl30,
and resistor Rl42 to energize the gate of the Thyristor SCR136.
In the embodiment illustrated in Figure 2, a resistor Rl~
and capacitors C166 and C168 have been connected so as to
prevent thyristor SCRl36 from being energized by noise signals
which may occur at the gate or by -temperature related leakage
current at the anode.
The energization of its gate causes -the thyristor
SCRl36 to conduct and cornple-te a pa-th for the rectified
current Io2 between -the output -terminals 116-118, through
the anode and cathode of thyris-tor SCR136, resis-tor R146 and
ground bus. This will produce a voltage across the resistor
R146 having a rnagnitude equal to (Io2) (R146).
Since both the ou-tpu-t windings 104 and 106 are
interlinked by the same flux, the rela-tive magni-tudes of -the
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voltages of the windings 104 and 106 must be the same as
their turn rat:io Nl to N2. Af-ter the thyristor SCR136
conducts, -the -terminals 116 and 118 will be subs-tantially at
that voltage which appears across -the resistor R146 and the vol-
tage level at output terminals 112 and 114 will drop from
approximately Vzl22 plus the emitter to base voltage magni-
tude of transistor T124 to approximately (Io2) (R1~6) (Nl).
N2
The values of Nl, N2 and of -the resistance of
R146 and of the maximum expected value of Io2 must be
selected such that the magni-tude of (Io2) (R146) (N1)
N2
for all expected magnitudes of line current in conductor Ll
will never exceed ~Z122 plus -the emitter to base voltage of
transistor T124. A suitable, but not critical design value
for the illustrated quantity sensing device is one in which
the magnitude of Io2 is limited -to the value corresponding
-to a maximum line curren-t magnitude in conductors L1, L2 and
L3 which is equal to forty times the magnitude of the minimum
pickup current. Minimum pickup current is defined as the
minimum magnitude of line curren-t which produces a pickup
voltage of the minimum magni-tude which will actua-te the
pickup comparator circuit 402. Limi-ting means to be more
clearly set out below have been included to limit the magni-
tude of Io2 at line currents which exceed forty times -the
pickup value.
When the -thyristor SCR136 is energized, the
magnitude of the voltage across R146 wil]. be greater -than
the voltage between output terminals 112 and 11~ thus back
biasing the diode D130. The rnagnitude of -the voltage between
terminals 112 and 114 will drop below the voltage Vzl22 and
current through the Zener diode Z122 termina-tes. The voltage
of the - 8 -
~s~
terminals 112 and 114 will drop below the voltage across
capaci-tors C150 and C162, however current will no-t discharge
because of back biased diodes D126 and D128. Thus the
conduction of the thyristor SCR136 effectively open-circuits
the winding 104.
The gate of thyristor SCR136 loses control of
the thyristor device once rec-tified current Io2 begins
to flow between its anode and cathode and the thyristor
SCR136 remains energized until the line current in conduc-tor
L1 experiences the nex-t zero crossing. Upon deenergization
of the thyristor SCR136, the information winding 106 is
open circuited. At that time, balancing of the primary
ampere-turns is achieved solely by the power winding 104
and the magnitude of -the voltage at output -terminals 112 and
114 jumps to a magnitude determined by the ampere-turns
balance principle of the windings 102 and 104. The power
winding 104 is again rendered effective to recharge the
capacitors C150 and C162 as described above.
The rectified current Io2 passing through
resistor R146 when the thyristor SCR136 is energized provides
a suitable information voltage regardless of whether the
signal is processed in RMS, peak or average form. The voltage
across resistors R170 and R172 respectively provide information
voltages respectively proportional -to the line currents in
conductors L2 and L3.
The power supply 148 is recharged during each
initial portion of each one half cycle of the line current
and thereafter provides information voltages for -the remaining
portion of the half cycle. The leng-th of time during each
half cycle of line current in conductor Ll that power
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winding 104 and information winding 106 are each effec-tive
will depend on the time necessary for the vol-tages across
capacitors C150 and C162 to recharge to a voltage magnitude
equal to Vzl22. If -the information vol-tages are to be
processed in RMS or average form, the accuracy of said
processed information voltages will vary inversely wi-th the
maximum charging time of capacitors C150 and C162 and the
circuit components should be chosen to recharge the power
supply 148 in as shor-t a time as is expedient eonsidering
the acceptable burden on the network being monitored. For
peak signal detection, it is only necessary to limit the
charging time to less than 90 of the sinusoidal line
current. ~The magnitudes of the resis-tors R1~6, R170 and R172
should be as low as is consistent with the desired sensiti~
vity to reduce the burden. A suitable value may be 50 ohms.
The polyphase overcurrent relay of Figure 2 responds
to the highest magnitude of the line current in conductors
Ll, L2 and L3. An auctioneering circuit 17~ provides a fi,rst
auctioneered voltage signal which is responsive only to -the
highest magnitude of the three voltages developed across
resistors R146, R170 and R172 and comprises diodes D175,
D176 and D177 which are respectively conneeted between -the
undergrounded ends of the resistors R1~6, R170 and R172 and
a common output conductor 178 which is connec-ted to -the
averaging circui-t 200. The vol-tage aeross the one of the
resistors P.1~6, R170 or R172 whieh is greatest determines the
magnitude of the voltage of the eonduc-tor 178. Two of the
three diodes D175, D176 and D177 will be reverse biased or
blocked.
The auctioneering circui-t 17~ provides a second
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auctioneered voltage which is similar to -the first
auc-tioneered vol-tage and comprises diodes D181, D182 and
.
D183 which respectively connect the ungrounded ends of
, -the resistors R145, Rl'70 and R172 -to a common output
conduc-tor 184 which is connected to a limi-ting circuit 186
, whereby a second auc-tioneered voltage signal is s~plied -to
the aforementioned limiting means.
, The limiting circuit 186 connects the conductor
184 to ground in parallel wi-th resistors R146, R170 and
R172. A vol-tage regulating device Z188 shown as a Zener
diode breaks over when the second auc-tioneered voltage has
a magnitude in excess of forty times pickup current. When
the device Z188 breaks over a Thyristor SCRlgO, having its
ea-thode connee-ted to the eommon bus at ground potential, is
rendered eonductive or energized. The shun-t circuit 186 will
thus render the whole input circuit 100 ineffective by shunting
, to ground subs-tantially all of current normally flowing through
resis-tors R146, R170 and R172. Resistor R192 is provided to
limi-t the current through the gate of Thyris-tor SCRl90 when the
Zener diode Z188 is in its conduc-ting s-tate. Resis-tor R194
and capacitor C196 have been connected so as -to prevent
-thyristor SCRl90 from being energized by noise signals,at
the gate.
A second form of limi-ting means is aceomplished
by designing the current transformers CTl, CT2 and CT3 -to
saturate a-t a predetermined level of line current such -that
the maximum magnitude of -the voltage between terminals 112 and
114 is limited to a value that is less than the voltage mag-
nitude Vzl22 plus the emitter -to base voltage of -the transistor
T124 when one or more of the windings 106 are energizing
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their respec-tive loading resis-tors Rl45, R170 and R172.
As shown in Figure 3, the conductor 178 supplies
the ~irst auctioneered voltage to a peak voltage averaging
circuit 200 which may take any form bu-t which is shown
comprising a ~ilter network including a ~ilter capacitor
C202 and resistor R204 connected in parallel. The circuit
200 energizes the output conductor 202 with a DC voltage
whose magnitude is proportional to the averages of the
peak values o~ the ~irst auctioneered voltage. The conductor
202 of the averaging circuit 200 is connected to a -time de-
layed detec-ting circuit 400 and to an instantaneous trip
detecting circuit 500.
TIME DELAYED CIRCUIT
The time delayed circuit 400, more completely
shown in Figure 3, comprises a pickup circui-t 402, a digital
counting circuit 406, a resetting RC delay network 410, an
inter~ace 412 and a monostable mul-tivibrator circuit 414.
At a predetermined time interval, TD, after -the magnitude
o~ the DC voltage ~rom circuit 200 exceeds i-ts minimurn
predetermined pickup value -the counting circui-t will supply
a control signal to energize the trip circuit 600 either
through the time delayed compara-tor circuit 400 or through
the instantaneous detecting circuit 500 depending upon the
magnitude o~ the pickup current supplying the pickup
voltage signal. The length o~ the time delay TD provided
by circuit 400 varies inversely wi-th -the magnitude O:r -the
DC pickup voltage, except -that a ~ixed minimum time delay is
provided by the time required ~or the multivibrator 414
to change its state. As will be more ~ully set out below,
0 the time delay circuit is capable o~ providing an
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output voltage according to any desired inverse timeresponse curve depending upon the values of R and C used
in the delay network 410 and the setting of the counting
circui-t 406.
The pickup circuit 402 inhibits the operation
of and resets the time delay circuit 400 whenever the
magnitude of the pickup DC voltage from the averaging
circuit 200 is less than the predetermined pickup value
and will initiate the operation of the circuit 400 when
-the pickup voltage exceeds the minimum magnitude. The
pickup circuit 402 comprises a comparator device 408 which
has its negative input terminal connected -to and energized
by said conversion circuit 200 and which has its positive
terminal connected to terminal 156 of the reference voltage
circui-t 154. The voltage VR determines the minimum pickup
voltage and may be adjusted by -the movable arm of rheostat
R]60. When the voltage output of the circuit 200 is less
than the value Vp, the comparator 408 does not draw current
from the supply terminal 152 and -the output conduc-tor 409 is
maintained at substantially the voltage Vs. When -the pickup
voltage exceeds the value Vp, the compara-tor 408 effectively
connects the conductor 409 to ground and the counters 444, 446
and 447 are conditioned to coun-t the pulses from the multi-
vibrator 414. A suitable pickup comparator 408 is the first
unit of a monolithic quad comparator in-tegrated circuit MC3302P
which is commercially available from Motorola, Inc. Device
MC3302P comprises four identical comparator units arranged in
a 14 lead dual in-line plastic package. The second, third
fourth units of device MC3302P are conveniently u-tilized
30 elsewhere in the circuits 400 and 500.
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Shaping of -the inverse time response curve is
first provided by a passive ne-twork 410 having resistive
and capacitive elements, the inter:~ace 412 and a monos-table
multivibrator or one-shot device 414. The capacitive
elements are deenergized each time that ou-tput voltage a-t
terminal 436 exceeds the voltage VR. The transistors T414,
T416, T418 and T420 are shunt connected across these
capacitive elements and have their bases connected to -the
output of the multivibrator 41~. Each time the multivibrator
414 is pulsed, the transistors will conduct and discharge
the capacitive elements, thus permi-tting the network 410 to
achieve cyclic operation to pulse the counters 444, 446
and 447.
There are two timing characteristics provided by
the pulse generating circuit 404, the time delay, TDl, pro-
vided by the RC network 410 which is a function of the line
current magnitude and the fixed time delay, TD2, of the one-
shot device 414.
The resetting delay network 410 comprises a
plurali-ty of parallel branches. Each branch includes capacitors
such -tha-t the charge on the capacitor of each branch is
charged along a different time rate which if plotted on
semilog paper results in the time curren-t relationships 426,
428, 430 and 432 shown in Figure 4. The curve 424 shows -the
inverse time current relationship obtained by -the network 410
when suddenly energized by the DC voltage signal which is pro-
portional to the highest peak magnitude of -the line currents
flowing through conduc-tors Ll, L2, and L3. :[t will be appreci-
ated tha-t curve 424 is -the sum of the time relationships
426-432. Thus the tirne required for the equivalen-t voltage
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response magnitude of the RC network 410 to rise from zero
to a predetermined magnitude will be inversely related to
the highest peak magnitude of said line currents.
Although four branches are shown in Figure 3,
any number of branches may be used. Each branch of the
illus-trated RC network 410 comprises two resis-tors serially
connected between an input terminal 434 and an output
terminal 436, and a capacitor connected from a
point between the two resistors to ground potential.
Figure 5 has been included for an analysis of the
RC network 410. It will be assumed that all of the capaci-
tive elements are initially deenergized and that the voltage
VIN between input terminal 434 and ground suddenly increases
to or above the minimum pickup magnitude. The capacitors of
the branches will charge at their individual rates. During
this time the voltage VIN will be determined by the magni-tude
of the fault current (which will be assumed to be of fixed
magnitude during a given fault) causing a charging current
IRCA to flow to the capacitors. A voltage VR will be main-
tained at the terminal 436 of the conversion circuit 200.
It will be apprecia-ted -that -the amplifier 413 will attemp-t to
maintain the po-tential VR at its input terminal 439. A
second component of charging curren-t IRCB flows to the net-
work 410 from the output terminal 438 -through -the Zener diode
Z440 and diode D442. When the capacitors O:r the network 410
reach their critical charge the current component IRCB will
be zero. However since the voltage at the -terminal 434 will
of necessity be greater, current will continue to flow to
charge the capacitors and the vol-tage at terminal 436 will
rise sufficiently to cause the opera-tional amplifier 413 to
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291
reduce the voltage at its output terminal 438 in an
endeavor to maintain the voltage magnitude VR at its
negative input terminal and consequentl~ the voltage
magnitude at terminal 436.
Identifying the voltage at terminal 434 as
VIN~ the voltage at the terminal 436 as VR~ the voltage
at the ungrounded terminal of the capac~tor as Vc~ the
resistance of the resistor between the capacitor and
terminal 434 as Rl, and the resi~tance o~ the resistor
between the capaci~or and the terminal 436 as R2, the mag-
nitude o~ the current flow to the capacitor ~rom the
terminal 436 as IRCB~ and using the direction of current flow
to the capacitor from the terminals 434 and 436, the follow-
ing mathematical formula for IRCB in terms of time t may
be derived either by calculus directly or with the use of
LaPlace transform~.
~ R ~ _ 1 2 ~ ~ (~1+R2)
RCB ~ ~ _ Ll~
By adding together the IRcBg ~or each or the RC
branche~ and equating the sum to zero, the time t at
which the network 410 ~11 actuate the operational ampllfier
413 of the interface 412 may be d~termlnedO
m e purpose Or the Zener Dlode Z440 is to raise
the voltage at the output terminal 438 of the operational
amplifier 413 sufficiently above the voltage V~ to prevent
the operation of the monostable vibrator 414 durlng the
charglng period of the network 410.
When the amplif'ier 413 re~ponds to network 410
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~513Z91
the potential of the termlnal 4~8 thereof will almost
instantaneously decrease in magnltude to provide an
operating signal to actuate the monostable multivibrator
41~ which9 at the expiration of its fixed time interval,
will supply a positiYe pulse to the counter 444 and to the
transistor T422, When transiator T42~ conducts it cau3es
the transistors T414, T4169 T~18 and T420 to conduct and
discharge the capacitors of the network 410. When the
capacitors discharge, the potential o~ the negative input
terminal 4~9 f'alls to and is maintained at the voltage
magnitude VR, At the end of ~he time delay interval TD2
of the multlvibrator 414 it will again revert to its low
output condition causing the transistors T414-T422 to cease
conducting and the network 410 will repeat its timing
operation,
The monostable multivibra$or 414 also provldes
it~ positlve golng pulse to the counting circuit 406,
which in turn provides an output voltage signal upon receipt
of a predetermined number o~ one-æhot pulæe signals, me
NE/SE 555 monolithic timlng circuit provides a sultable
monostable multivibrator 414 and is commercially available
from the Signetics Corporation,
AB illustrated in Flgure ~, the counting circuit
406 comprises counters 444, 446 and 447, and comparator
means 448 for cascading the three counter circuits in proper
sequence, A large number of counts obtained with a network
410 having a relatively low RC time constant is desired for
greater accuracy, A suitable RC time con~tant range for the
network 410 is ,5M.S, to 5M,S. and a suitable counting
range for the counter 444 is ~rom 500 to 4~,000, This
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relationship deter~ines the time scale reference. A
binary counter 444 is particularly desirable and a suitable
counter ls the RCA binary counter/di~ider CD4040AE which
advances on the negative transition of the one-shot pulse
and is commercially available rrom ~he RCA Corporation. The
second comparator unit 448 o~ the previously descr~bed
comparator device MC~302P (a first unit of which was used
for the comparator 408) has its negative lnput terminal
connected throu~h a selector s~itch 452 and its output
connected to the count input terminal oP the decade counter
446. The binary counter 444 is arranged to provide an output
pulse for each desired number of operations o~ the multivi-
bratorO me desired number is different for each of the
terminals o~ the switch 452. The counter 444 is reset to its
initial or starting condition by the positive signal received
from the comparator 408 and is released to count when the
output signal o~ the comparator 408 decreases.
The counters 41~ and 447 may take the form o~
decade counters whereby the number Or output pulse~ ~rom the
binary counter 444 reauired ~o actuate the tr~p circuit may
be selected. These counters 446 and 447 collectlvely select
the one o~ a fa~lly o~ ~ime curves w~ich con~rol~ the
actuation or the trip circult 600.
me ten position selector switches 450 and 451 are
respectively connected to said decade counters 446 and 447
such that one hundred di~ferent time curves based on the
time scale re~erence curve may be obtained for precision
~election, ~en the counters 446 and 447 each provlde a
positive output pulse at their respective selector switches
450 and 451, both ot~ the diodes D462 and D464 will be back
biased
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5~3Z~
to actuate the comparator 454, which may be the third unit o~
device MC~02P having the comparators 408 and 448. The
decade counters may be o~ the type supplied to the trade
by RCA Corporatlon as CD4017AE.
me tlme-current relationships 426-4~2 may be
chosen to provide a trip curve 424 having an almost
unlimited number of shapes to duplicate any existing inverse
tlme current curve o~ the more conventional electro~mechanical
over current rela~s such as the CO relays presently manufact-
ured and sold by Westinghouse Electric Corpora~ion. mevalues o~ the required resistors and capacitors may be obtained
by determining a number o~` time-current relationships on the
curve to be duplicated and simultaneously solving the time~
current relationships ~or each o~ the RC branches of the
network 410 in accordance with the IRCB formula set forth
above.
INSTANTANEOUS COMPARATOR CIRCUIT
The instantaneous detecting circuit 500 provides
an output voltage signal for tripping the brea~er 4
immediately after the magnitude o~ the current in any o~
the lines Ll, L2 or L3 and consequently the DC voltage from
circuit 200 exceeds a predstermined value.
AB shown in Figure 6, ~he instantaneous comparator
circult 500 consists of voltage divlding resistors R502, R504,
a rheostat R506, a filter capacitor C508, a resistor R510, a
comparator 512 (which may be the fourth unit of device
MC~302P), and an overvoltage protection Zener dlode Z514,
~hen the level o~ the voltage across capacitor C508 reaches
a magnitude e~ual to that o~ VR, the output of comparator 512
~0 will provide a negative going signal to said trip circuit 600.
- 19 -
~q3S8~
me movab~e arm o~ rheostat R506 adjusts the magnitude of
the DC voltage from circuit 200 which is required
to actuate the instantaneous compara~or circuit 5000
TRIP CIRCUIT
A suitable trip circuit 600 for energizing the
breaker trip coil in response to the ~egative going out-
put signals from either the time delay circuit 400 or the
lnstantaneous trip comparator circuit 500 is illustrated
in Figure 60 Trip circuit 600 comprises an indicating
circuit 602, a brea~er actuating circuit 604, and an
indicator reset circuit 606,
~ voltage drop at the output of the instantaneous
detecting circuit 500 causes base drive current to flow
through a PNP transistor T608, a Zener diode Z614, a resistor
R616 and the comparator 512. The ~low o~ th~s base current
causes the transistor T608 to raise the potential of
~unction 618 to substantially that o~ Vs+~ Current then
~lows through three separate conductors 620, 622 and 624.
me currenk in conductor 620 flows through a
diode D626, resistor R628 and the comparator 512 to ground,
This ~eedback loop keeps the comparator 512 energized until
the line current in conductors Ll, L2 and L3 is interrupted
by the breaker 4.
The current ln conductor 622 flows through diode
D630 and the breaker activating circuit 604 where it ~lows
through a reslstor R6~2, a diode D6~4 and into the gate of
a thyristor SCR6~6, The energized ~hyristor SCR636 when
conducting completes a path ~or current flow between the
positi~e termlnal 6~8 of a station battery 640 through diode
D642, the thyristor SCR636, diode D644, the 52a normally
- 20 -
~S~29: L
closed contacts of the breaker 4, the trip coll 6 and the
negative terminal 646 of battery 6400 me trip coil 6
when energized trips breaker 40 Capacitors C648 and C650
and resistor R652 are ~rovided to prevent thyristor
SCR636 from energization by noise or l:ealcage currents~ Th
52a contacts are located on the brea~er ~ and are open
circuited when the breaker 4 trips, thus inter~upting current
through the coil 6 and the thyristor SCR636.
me breaker actuating c~rcuit 604 further comprises
a resistor R654 having a negative voltage-resistance
characteristic to absorb transient energy signals at
terminal 638 of battery 640, and also a discharge circuit
656 con~prising resistor R658 and diode D660 ~or discharging
the indicutive energy stored in trip coil 6 should 1~ not
have dissipated when the breaker 4 is reclosed,
me indicating circuit 602 will lndicate only
a~ter the thyristor SCR636 has been energized. Indication
o~ an instantaneous trip is provided by the ~low o~ current
in conductor 6ZLI through diode ~662, and electrically
resettable indicating device 664, a two position switch 666
haYing an indicating de~ice re~et position and a Ret pos~tionJ
diodes D668, coil 6, battery 640, diode D642, thyristor
SCR636, and(the common bus 667 connected ko ground,
The indicating device 664 is shown as a li~;ht
re~3~ecting electromagnetic status indicator having an
inherent memory.whereby it will maintain its lndicating
status even though its energizing current is intensi~ied
by the opening of the contacts 52a, me device 664,
when once actuated, will continue to indicate until the
indicator device is reset, A suitable indicator devlce 664
-- 21 --
~s~g~
is commercially available ~rom Ferranti~Packard Ltd.
me operation of trip circuit 600 in response
to the negative going signal from the time delay circuit
400 is ~ubstantially similar. A voltage drop at the
output of comparator 454 causes base drive current to
flow through an PNP transistor T670, a resistor R678 and
Zener diode Z676~ me base current causes the transistor
to conduct current through transistor T670 to raise
the potential o~ ~unction 680 to substantiall~ that o~
Vs~. Currentthen flows through conductors 682 and 684.
me current of conductor 682 ~lows through
diode D686, resistor R632~ diode 634 and causes the
thyristor SCR636 to conduct and energlze the trip coil 6
in the manner previously described, The current ln
conductor 684 ~lows between Vs~ and ground bus 667
through diode D688, an electrically resettable indicating
device 689, the selector switch 666, the diode ~668,
contacts 52a, coil 6, bat~ery 640, dio~e 642~ and thyristor
SCR636. Indicating device 689 is substantially similar
to device 664 and when once actuated will remain actuated
until reset,,
The Zener d-lodes Z61~ and Z676 have been included
to prevent an undesired tripping of breaker 4 during the
initial period of relay operation when the voltage at
termlnal 152 of the power suppl~ circuit 148 and ground
has not yet reached its normal operating value Vs~, me
breakover voltage magnltude~ of Zener diodes Z614 and Z676
should be high enou~h to prevent current flow duri ng this
period.
A conductor 690 i~ connected to the conductor 68
- 22 -
~58'~
such that the llmitlng circuit l~6 and the breaker
actuating thyristor SCR636 are concurrently energiæed.
me limiting circuit 186 preven~s high voltage failure
Or circul.t components during the period be~ore the line
current is interrupted by khe opening o~ breaker contacts
8, lO and 12. Current flows be~ween terminal 680 and
ground through diode D686, conductor 690, a resistor
R691, a diode D692 and the gate of the thyristor SCRl90~
When thyristor SCRl90 conducts, it connects the conductor
184 to groundJ ~hus shunting the load resistors Rl46,
Rl70, Rl72.
h reset c~rcuit 606 for resetting -the devices
664 and 689 comprises a resistor R693 and a capaci-tor C694 which
is energized from battery 640, When switch 666 is in its
reset position~ the capacitor C594 discharges through the
indicating devices 664 and 689, r~sistors R695 and R696, a
Zener diode Z698 and the common bus connected to ground
potential. The Zener diode Z698 has a breakover voltage
level high enough to prevent conduction through to the
common bus except during reset operation of the trip circuit
600.
It is conceivable that the DC voltage signal
from circuit 200 will continue to rlse a~ter it activates
the time delay circuit 400 until it reacheQ a magnitude
sufficient to also activate the instantaneous co~parator
circuit 500. To prevent this from occurring, a diode
D699 is connected between the negative input -terminal
of the comparator 5l2 and the common connection o~ the
resistor T678 and Zener diode Z676. When the time delayed
- 23 -
~3SI~Z~l
detecting circuit comparator l~54 provides its negative
going signal, the cathode of the diode D699 goes to a
potential which is sufficiently low enough to prevent
the operation of the comparer 512 of the instan-taneous
detecting circuit 500. Consequently, the transistor
T608 is cut off and the energization of the instantaneous
trip indicator device 664 is prevented. Thus the indi-
cating circuit 602 is capable of indicating which of
the detecting circuits 400 or 500 initially actuated the
tripping circuit 600.
Figure 7 illustrates an input circuit 700 which
is a modified form of the input circuit 100 of Figure 2.
To simplify the explanation, only the apparatus associated
with phase transformer CTl is shownS as the phase transformers
CT2 and CT3 and their accompanying circuitry would be
similar. me thyristor SCR136 and its accompanying
circuitry, and two diodes of the rectifier bridge REllO have
been replaced with -thyristors SCR702 and SCR70L~ and
accompanying circuitr~ comprising capacitors C706, C708 and
C710 and resistor R712.
The modified imput circuit 700 assures that the
information winding 106 of transformer CTl will be rendered
ineffective after each zero crossing of the line current in
conductor Ll. As previously explained, the thyristor SCR136
shown in Figure 2 is designed to turn off when the rectified
current at its anode drops to and remains below a predetermined
magnitude for at least a minimum shutoff time. If the first
derivative of the anode current magni-tude with respect to time
is such that the current does not remain below said predeter-
mined level for the minimum shutoff time, the thyristor
SCR136 will never be deenergizedO If, however, a pair
_ ,~y_
J~
~6~S8~1
of' thyristors S~R702 and SCR704 are substituted for the
pair o~ the rectif'iers in the brid~e circuit RE110, as
illustrated in the bridge circuit RF710, each receives an
alternating potent~al at its anode. When energized the
thyristor SCR702 provides a path ~or current between the
inf'ormation winding 106 and the common bus connected to
ground potential through the thyristor SCR702 and the
resistor R146 when the upper terminal of the bridge RE710
is posltive. Similarly, when energized the thyristor
SCR704 provides a path f'or current between the in~ormation
winding 106 and the ground bus through the thyristor
SCR704 and the resistor R146, The operation o~' the input
circuit 700 is ln other respects similar to the input
circuit 100 of Figure 1 and its operation will be apparent
~rom the description thereof,
Figure 8 illustrates an input circuit 800, which
is a modified ~orm o~ the input circuit 100. me input
circuit 800 comprises a dual regulated power supply circuit
f'or providing positive and negative regulated supply voltages
to a detecting circuit 804 requiring said voltages. The
input circuit 800 ~urther provides an AC in~ormation signal
which is unrecti~ied and responsive to the line current
through conductors Ll, L2 and L3. For simpli~ication and
explanation only one phase oP the three phase design has been
shown and will be described.
me current trans~ormer CT4 has a power secondary
winding 806, an information ~econdary win~ing 808 and a
primary winding 810. me primary winding 810 is energized
in accordance with the line current ln conductor Ll. me
~0 number of' winding turns ~2 f the information winding 808
- 25 -
~ s~z~
is greater than the number of winding turns Nl of the
power windîng 806. A center tap 812 on the power winding
806 is connected to the common bus.
For simplification, it is assumed -that the line
current in conductor Ll has just experienced a zero crossing,
the power winding 806 is effective and the information winding
808 is non-conducting~ With line current flowing in conductor
Ll in a direction to make the upper terminal of the winding
806 positive with respect to the lower terminal (which will
be hereinaf-ter referred to as the "positive half cycle"),
current to charge the capacitor C816 will flow between the
grounded terminal of capacitor C816 and the grounded
center tap 812 oP the winding 806 through the capacitor
C816, diodes r818 and D820, and the lower half of the
power winding 806. Current for charging the capacitor C826
will flow between the grounded terminal of winding 806 and
capacitor C826 through the upper half of the winding 806,
the diodes D822 and D824, and the capacitor C826. During
the opposite or "negative" half cycle of the line current in
conductor L1 current will charge the capacitors C816 and
C824 from the power winding 806 through the diodes D828 and
D830 in place of the diodes D820 and D8220 Stated other-
wise, during the "positive'l half cycle the capacitor
C816 is charged from the lower hal~ of the winding 806 and
the ~apacitor C826 is charged from the upper half of the
winding 8060 During the "negative" half cycle the capacitor-
winding relationship is reversedO The current flowing in
the two halves of the winding 806 may or may not be equal
since it is merely necessary that the total ampere-turns
-~6-
~s~
in winding 806 e~ual the total am~ere-turns ln winding 810,
and the division of the current between the two halves is
dictated solely by the charged condition o~ the capacitors
C816 and C826.
A control circuit 814 is provided ~or regulating
said supply voltages and for controlling the sequential
operatlon of secondary windings 806 and 808. The control
circuit 814 co~prises a voltage regula~ing device Z832,
such as a Zener diode, a switch device T8~4 such as a NPN
transistor, a capacitor C836, resistors R838~ R840, and
R842, and a triac device 844. me term triac as used
herein designates any switching device having a ~irst or
anode terminal, a second or cathode terminal, a third or
gate terminal and the fo~lowing properties. Current
flowing from the gate permits the device to conduct current
in either direction between the anode and cathode terminals.
Once conduction beginsg the device will not deenergize unless
the curren~ ~lo~Jlng between the anode and cathode drops and
remains below a predetermined magnitu~e for at least a
minimum period o~ time.
As the capacitors C816 and C&6 charge, as above
describe~, they will e~entually both reach a predetermined
magnitude e~ual to the breakover voltage magnitude of the
Zener diode Z8~2. T~en this occurs current ~ill flow through
the Zener diode Z832, resistor R840 and the base of the
transistor T834, me transistor T834 will conduct and current
wlll flow through the gate of the triac device 844, the
resistor R842, the transistor T83~, diode D820~ or D822~ and
one half of the power winding 806. The conduction of
translstor T834 can occur in either the "positive" or
- 27 -
~s~
"negative" half c~cle o~ the trans~ormer,
The diodes D8l8 and D824 provlde temperature
compensation of the transistor T834 and thus ~urther
regulate the voltage across capacitors C816 and C826.
Diode D8l8 provides isolation ~or the capacitor
C816 f`rom leakage current of the transistor T834 or Zener
diode Z8~2.
me energized triac device 844 when donducting
renders the information winding 808 eff`ective by providing
a path for current through the in~crmation winding 808, the
triac 844 and a loading resistor R8~6. This in turn induces
a drop in the voltage across the powar winding 806 and
.~fectively terminates the flow o~ current therethrough in
the manner set ~orth above in connection with the description
of Figure 2. The ma~or difference between the ~orm o~
Figure 2 and Figure 8 is that the voltage acros~ the loading
resistor R846 provides an electrical quantlty responsive
to the line current in ~.onductor Ll which is alternating in
polarity,
The triac device 844 deenergizes each hal~ cycle
of the line current similarly to the thyristor SCRl36 of
F~gure 2 thus rendering the information winding ~o8 inef~ective
and open clrcuited and rendering the power winding 806
ef'~ectlve to recharge the capacitors C816 and C826 each
half' cycle,
SATURABLE CURRE~T TRANSFORMER OPERATION
Flgure 9 illustrates a form o~' the invention in
which an input circuit 900 utllizes a current transformer
CT5 having a single secondary winding. As illustrated~
the ~rinding-core relationship o~ the transf'ormer CT5 i6
such that the core will saturate
- 28 -
~ 5~Z 9 ~
within the expected range o~ network curren~ magnitudes.
Again~ for purposes o~ simplify1ng the explanation the
invention is shown as energized by onl~ one phase of the
input circuit,
me saturable current ~ansformer CT5 has a
primary winding 902 energized by a quantit~ proportional
to the curren~ in conductor Ll, and a secondary winding
904, The secondary winding energizes series connected
resistors R9o8 and R909 through a full wave rectifier
RE906. A power supply 148 is connected through a regulator
circuit 910 and an input overvoltage protection circuit
912 to one output of khe rectifier RE906 in shunt with the
resistors X908 and R909. Diodes D914 and D915 prevent any
po~er flow back ~rom the power supply circuit 148. me
trans~ormer CT5 is designed to saturate at a current
corresponding to twlce the magnitude of network current
(2PU), or any desired level~
For simplicity of explanation, it will be assumed
that the line current in conductor Ll has ~ust experienced
a zero crossing and that ~he energy storage devices C150
and C164 o~ the power supply 148 are initially deenergizea.
me energization o~ the primary winding 902 causes currenk
to flow ln the secondary winding 904 which is rectified b~
the full wave rectifier RE9o6, The output terminals 924 and
926 Or the rectifler RE906 are connecked between the ground
bus and a conductor 928.
Initially (with capacitors C150 and C164
discharged) the impedance of khe power supply 148 will be less
than the kokal impedance of the resistors R9o8 and R909
and substantially all o~ the rectified secondary current
- 29 -
1~5~2~311
flows from terminal 926 through the conductor 928 to the
power supply 148~ At magnltudes o~ line current below 2PU
current will flow for one or more cycles to charge the
power suppl~ 148~ The number o~ cycles ~Jhich are requlred
will depend on the magnitude of the line current and
the capacity of the capacitors C150 and C164. Eventually
the voltage across the capacitors (and across the series
connected resistors R9o8 and R909) will reach the desired
~alue to provide the Vs~ and VR outputs, ~en this occurs
the regulator circuit 910 will be actuated to cause current
to flow between conductor 928 and groun~ bus through the
register R940 and Zsner diode Z9~6~
The regulator circult 910 includes NPN transistors
T9~0, T932, and T934, the voltage regulating Zener diode
Z936 and resistors R938, R940 and R942. Initially, the
transistor T930 conducts to supply base current to transistor
T9~2 whereby it maintains a low impedance connection between
conductor 928 and the power suppl~ 148 for the flow of
charging current above discussed, Staging the transistors
as shown permits a large flow o~ current through transistor
T932 in response to a small magnitude of current flowing into
the base of transistor T9300 ~en the magnitude of the
voltage of the power supply 148 reaches lts desired value
the potential of the conductor 928 w111 be high enough for
Zener diode Z936 to breako~er and conduct, current through
resistor R940, This results ln the flow o* base current
in transistor T934 causing it to conduct,
l~en the transistor T934 conducts and lowers the
potential of the base of the transistor Tg3o~ this reduces
the conduction of the transistor T9~2~ and an equilibrium
- ~0 -
~L~51~2~1
conditi.on is reached such that -the current through the
transistor T932 drops to a magnitude requ.ired to maintain
the desired voltage magnitude of the power supply 148
as determined by the Zener diode Z936.
I~ the drain on the power supply lL~ is low in
comparison with the current supplied by the transformer CT5,
the major current flow is through the burden resistors R908
and R909. The resistors R908 and R909 provide a voltage
dividing circuit and the relative magnitudes thereo~ depend
upon the relative magnitudes o~ the voltage of the power
supply 148 and the desired output voltage range of the peak
voltage averaging circuit 200. The voltage across the
resistor R909 provides the information signal to the
auctioneering circuit 174 for providing an in~ormation signal
to the peak voltage averaging circuit 200 that is responsive to
the magnitude of the highest line current in any one o~ the
conductors Ll, L2 and L3.
The Zener diode Z936 is a temperature compensated
device and regulates the voltage of the power supply 148.
This occurs because the diodes D914 and D915 tend to cancel
the temperature ef~ect o~ the transistor T938 base-emitter
junction~
The input overvoltage protection circuit 912
prevents the breakdown of circuit components due to excessive
voltages caused by high ~ault currents. The protection
circuit 912 comprises a Zener diode Z946, NPN transistors
T948 and T950, and resistors R952, R954 and R956. The transis
tors T948 and T950 connect the conductor 928 to the ground bus
when the Zener diode Z946 conducts. A suitable magnitude ~or the
-3~-
~ [35~Z~
Zener breakover voltage VZ946 may be 200 volts.
The use of saturating current transformers
which are saturated substantially throughout their normal
operating range reduces the burden on the current transformer
while at the same time enabling an inverse time current
response at current input ranges well above the saturating
current magnitude. In this regard it should be remembered
that as the magnitude of the input current to the transformer
increases the saturating current value is reached in a shorter
time per~oa~ Since the magnitude of the current pulse in the
secondary wlnding is dependent upon the rate of cha~ge of the
transformer core flux (input current), an increasing peak value
of the voltage across the loading resistor will occur as the
input magnitude current increases. In the range below
saturation this will be a straight line relationship and,
of course, secondary current will floow the primary current
throughout each hal~-cyc~e~ As the magnitude of the input
current increases beyond the core saturation value the
current will flow at an increasing rate to follow the -lncreasing
rate o~ the input current but will only flow for a portion o~
each half cycle and of course the burden on the primary line
conductor is greatly if not completely reduced during the time
periods ~Ihen no current is flo~Jing in the secondary winding~
The operation of the current trans~ormers in
the saturating range provides a constant RMS current o~tput and
therefore such an arrangement utilizes the peak value magnitudes
to sense the input current magnitudes in the saturating range,
~ h~le the use of ~aturating c~rrent trans~ormers
- 32 -
45,373
-
~3S~g~L
has been discussed in connection with the apparatus of
Flgure 9, it may also be used with the double secondary
winding construction in which the windings are used in
sequence each hal~ c~cle. When used with the two secondary
winding construction, the transformer should saturate only
durlng the time periods that the magnitude sensing winding
is being utili&ed.
~33-
