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Patent 1075821 Summary

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(12) Patent: (11) CA 1075821
(21) Application Number: 257223
(54) English Title: TIMING ARRANGEMENT FOR COMPUTERS
(54) French Title: MINUTERIE POUR ORDINATEURS
Status: Expired
Bibliographic Data
Abstracts

English Abstract




ABSTRACT OF THE DISCLOSURE
The invention provides a timing arrangement for a
computer for determining timing of a microprogram and for deter-
mining starting times of operations performed in real time,
for example clock interrupt in the program. The arrangement
comprises a common clock oscillator which generates timing signals
for a control unit of the computer and for real time measuring
circuits. A frequency divider is arranged to divide the frequency
of the clock oscillator in such a manner that the frequency is
adapted to the period length between the operations performed in
real time, the frequency of the clock oscillator being an integral
multiple of the step pulse frequency intended for the time measur-
ing circuits. The dividing ratio of said frequency divider is
adjustable in such a way that it is possible, by carrying out
division of the frequency of the clock oscillator by an integer,
to maintain at a constant value the timing signals of the real
time measuring circuits, upon a frequency change of the timing
signals of the computer control unit depending on working
conditions. Thus the number of working cycles per step pulse
interval is always an integer.


Claims

Note: Claims are shown in the official language in which they were submitted.


THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:

1. A timing arrangement for a computer for determining
timing of a microprogram and for determining times for operations
performed in real time, comprising a common clock oscillator of
variable frequency for generating timing signals for a control
unit of the computer and for real time measuring circuits, a
frequency divider arranged to divide the frequency of the clock
oscillator by a variable integer in such a manner that the divided
frequency is adapted to the period length between the operations
performed in real time, the frequency of the clock oscillator
being an integral multiple of the step pulse frequency of the
time measuring circuits and the integer determining the dividing
ratio of said frequency divider being variable in such a way
that, by carrying out division of the frequency of the clock
oscillator by said integer, the timing signals are maintained
constant for the real time measuring circuits, upon a change of
the frequency of the timing signals for the control unit of the
computer depending on working conditions, and the number of
working cycles of the computer per step pulse interval of the
time measuring circuits is always an integral number.


Description

Note: Descriptions are shown in the official language in which they were submitted.


1~'75~Z~

The present invention relates to a timing arranyement
for a computer for determining timing of a microprogram and for
determining times for operations performed in real time, ~or
example clock interrupt in the program.
Computers Eor controlling times Eor operations performed
in real time, for instance computers for controlling switching
sequences in telecommunication installations, generally work
with two different time control processes namely, timing control
of a microprogram (for example, having a magnitude of several
hundred nanoseconds) and real time measurement of the program
(for example having a magnitude of 10 microseconds). In known
computers one clock oscillator is used for the micro program and
another clockosciallator for the real -time measurement. In this
connection the stepping of the counter chains for the real time
measurements has to be synchronized with the working cycles of the
control unit of the computer in order to prevent an uncertain
reading of the counters which can occur when stepping of the
counters coincide with the reading. In order to provide this
synchronization, extra circuits of a relatively complicated con-

struction are required, resulting in extra costs.
The reason why two oscillators have been previously usedand the timing frequency of the control unit has not been divided
to the real time frequencies has partly been due to the fact
that such a high-grade divididng has resulted in high costs in
the counters, especially if the intention was to achieve a greater
variation of the timing intervals for instance within 10 - 100 ms.
Another factor which also has been considered as an obstacle to
the use of one common oscillator for both timing controls is
that a possible change of the timing of the control unit must
not influence the step pulse frequency of the real time measure-
ments which are used by the program itself. Such changes of the

timing of the control unit can be forced by unexpected time co-




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1075~

operation problems between cli:Eferent function units i.n the
computer.
The present invention, at least in its preferred
embodiments, eliminates the disadvantages alluded to above and
achieves the two different timing controls with a common clock
oscillator by means of a simple circuit whereby a certain degree
of freedom js obtained concerning the choice of the timing of the
micrGprogram without influencing the real time measurement and
furthermore avoids uncertainty when reading the counters if their
stepping occurs at the same time as their reading within the
microcycle.
Furthermore the invention, at least in its preferred
embodiments, avoids an extra clock pulse transmission for the
real time measurements, when two computers are working synchronously
and in parallel and where the oscillator in one of the units is
feeding both computers.
~ccordingly, the present invention provides a timing
arrangement for a computer for determining timing of a microprogram
: and for determining times for operations performed in real time,
comprising a common clock oscillator of variable frequency for
generating timing signals for a control unit of the computer
and for real time measuring circuits, a frequency divider arranged
to divide the frequency of the clock oscillator by a variable
integer in such a manner that the divided frequency is adapted
to the period length between the operations performed in real
time, the frequency of the clock oscillator being an integral
multiple of the step pulse frequency of the time measuring
circuits and the integer determining the dividing ratio of said
frequency divider being variable in such a way that, by carrying
out division of the frequency of the clock oscillator by said
integer, the timing signals are maintained constant for the real
time measuring circuits, upon a change of the frequency of the


.~.,

1~75~3Z~

timing signals for the control unit of the computer depenclingon working conditions, and the number of working cycles of the
computer per step pulse interval of the time measuriny circuits
is always an integral number.
The invention is described below by way of example wi-th
reference to the accompanying drawing which shows a block diagram
of a computer to which the invention has been applied. The
computer shown in the drawing is of a conventional type, for
example, as described in U.S. Patent ~o. 3,517,174.
Referring to the drawings, different function units of
the computer are connected via logic circuits G to a bus system
BS through which information is transferred between the function
units. The function units comprise an arithmetic unit AE, an
instruction store IM, a data store Dm and a control unit SE.
The control units SE produces microprogram instructions and by
means of theseinstructions information is transferred between
the different function units. The instructions the computer has
to perform are stored in the store IM. These instructions which
are stored on specific addresses, can be read in an order
determined by the program. For each instruction which is




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transmitted from the instruction store the computer performs
one or more operations determined by a microprogram of the
computer. The microprogram may in~olve, for example, reading
or writing of instructions in -the different ~unc-tion units,
transferring of data between the function units, and performing
of logical operations in the arithmetical unit AE. The purpose
of the data store DM is to store instantaneous conditions of the
different function units, for example, to store digit signals.
The arrangement as described above is known per se.
The control unit is operated by a clock oscillator M the timing of
which determines the times of the micro instructions performed
after each other. According to the invention the clock oscilla~
tor M is also used for the timing control of the microprogram
; as well as for the determination of the times for the operations
performed in real time. In conventional computers a clock
interrupt arrangement CS is run by its own clock and at the
moment of clock interrupt the clock interrupt arrangement
activates an instruction with higher priority in the instruction
store in a manner known per se.
In accordance with the invention, thepossibility of
using the same oscillator for the control of the micro program
as well as for the control of real time measuring functions,
for instance clock interrupt, is achieved by means of the
dividing arrangement DL. Supposing that the real time measuring
circuits, for instance CS, are stepped by means of pulses having
an interval of 10 micro seconds, the pulse frequency corresponding
to this interval must always be obtained from the clock oscillator
of the control unit. Alternatively another length of the intervals
between the step pulses may be chosen. It is important, however,
that a chosen interval must be maintained due to the fact that
different types of real time measuring circuits are controlled by
the step pulses. It is desirable, however, that the length of the

~7~3~i
instructions of the microprograrn are able to be varied in
correspondence with different conditions and ~or that reason
it must be possible to change the timing of the clock oseillator.
Consequently it is necessary that the division effected
by means of the arrangement DL is made in sueh a way that the
step pulse frequency of the real time measuring eircuits remains
unchanged. The dividing arrangement DL eonsists in prineiple
of a counting ehain for dividing the frequency from the cloek
oseillator M to a step pulse frequeney whieh is appropriate for
the real time measuring eireuits. By means of strapping of the
dividing arrangement DL it is possible to obtain division of
the frequency by different integers in order to adjust the length
of the step pulse interval to a varying working eycle length~
If the above mentioned value of 10 mieroseeonds per step pulse
interval forthe real time pulses is taken as an example and if
it is assumed that the control unit is run by means of a cloek
frequeney of 20 MHz then division by 200 is neeesary in order
to aehieve the desired pulse interval of 10 microseeonds. It
is important that the stepping of the counters is effected in
a certain position within -the mierocyele, which position is
separated from the position within the microeyele in which the
reading is effeeted. Division by an arbitrary integer eannot
be performed but only certain integers can be used as divisors
in accordance with the fact that an integral number of working
cycles must take place during a step pulse interval. This
integral number of working cycles is in the example given above,
50 beeause a working cycle in this example has a length of
200 nanoseeonds, the pulse interval of 10 mieroseconds divided
by the working cycle time 200 nanoseeonds resulting in the number
50. Thus it will be appreciated that if it is desirable to
inerease the length of the working cycles this cannot be performed
in an arbitrary way but the length of the working cycle has




- 4 -

,. . ..

to be chosen in such a way that the length of the step pulse
interval divided by the len~th of the working cycle results in
an integer, whereby the length of the working cycle is unambig-
ously defined. If for example the length of the step pulse
interval divided by the length of the working cycle is 49, the
divisor is 196~ Thus it will be appreciated that it has
not been possible to use the integers between 200 and 196. In
this manner certain determined dividing conditions can be used
with main-tained step pulse frequency and in certain determined
steps varying lengths of working cycles can be used.
The clock interrupt arrangement CS which is influenced
by the step pulses from the dividing arrangement DL consists
of a counting chain having a feedback possibility in order to
obtain a clock interrupt signal at a certain time for calling
program instructions or higher priority whereby there is a possi~
; bility of choosing the length of the primary interval by means
of strapping in the clock interrupt arrangement CS, i.e.
of choosing the time interval between the clock interrupts, for
- example 5, 10 or 15 ms.
Thus, it will be appreciated that the invention enables
the oscillator of the control unit to run also the real time
measuring circuits with unchanged timing pulses irrespective of
whether the timing of the microprogram varies. The on7y condi-
tion is that certain determined integer divisions are used.




.' ' ' '

Representative Drawing

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Administrative Status

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Administrative Status

Title Date
Forecasted Issue Date 1980-04-15
(45) Issued 1980-04-15
Expired 1997-04-15

Abandonment History

There is no abandonment history.

Owners on Record

Note: Records showing the ownership history in alphabetical order.

Current Owners on Record
TELEFONAKTIEBOLAGET LM ERICSSON
Past Owners on Record
None
Past Owners that do not appear in the "Owners on Record" listing will appear in other documentation within the application.
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Document
Description 
Date
(yyyy-mm-dd) 
Number of pages   Size of Image (KB) 
Drawings 1994-04-05 1 19
Claims 1994-04-05 1 33
Abstract 1994-04-05 1 31
Cover Page 1994-04-05 1 21
Description 1994-04-05 6 264