Note: Descriptions are shown in the official language in which they were submitted.
Docket 6398 ~ 4
Background of the Invention
This invention relates to magnetic recorders and
recording methods and especially to such recorders adapted
to be used to record and reproduce individual video frames
for stop-action or slow motion video display. The standard
for video signals currently used in the United States requires
that a scanning pattern of 525 horizontal scanning lines per
frame be utilized. A complete frame consists of two inter-
laced fields, the first field including the even numbered
lines and the second field including the odd numbered lines
in the picture scan. All of the lines in the first field
are scanned in succession before the lines in the second
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field are scanned.
Magnetic disc recoxders have in the past been used
to produce high resolution images of single video frames.
An individual _rame may be reproduced repeatedly and supplied
to a monitor so that a stop-action effect is created.
Successive ~ideo frames each may be supplied to a video moni-
tor a number of times to create a slow motion effect. If the
subject portrayed in the video frame is in rapid motion,
however, the first and second fields may differ significantly
and interlaced display of these fields may therefore cause
significant distortion. An effect known as motion jitter may
occur due to the spatial displacement of the subject during
the elapsed time between the two interlaced fields~
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Docket 6398
One approach to this problem has been to record
only one field and to display this field repeatedly at the
field rate. A frame thus would consist of only one field
which is displayed twice in interlaced fashion. As shown
in U.S. Patent No. 3,636,255 to Netani et al, issued
October 23, 1969, this may be accomplished by using a field
recorder in which one field is recorded during one full
rotation of the magnetic disc. A frame is developed by
reproducing the field signal twice and by displacing the
second reproduced field by one-half horizontal line scan time
from the first reproduced field to create the proper conditions
for interlace. Since the first and second fields are identical,
however, vertical resolution is needlessly sacrificed in
displaying still subjects or subjects which are moving
relatively slowly.
To allow for high vertical resolution in the case
of still subjects and jitter-free operation in the case of
- rapidly moving subjectsl two methods have previously been
utilized. The first method is to xequire the disc recorder
to operate at two rotational speeds. If a rapidly moving
subject is to be displayed, the recorder is operated at the
field rate with one field repeatedly displayed in interlaced
fashion. If a still or slowly moving subject is displayed,
however, the disc recorder is operated at the frame rate
with both fields of a frame being recorded and displayed.
This method of operation is dificult to achieve and relatively
expensive. The disc drive servo-mechanism for two speed
operation is complicated and sophistica~ed controls are
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Docket 6398 ~ Z ~ 4
required. Further, differences in dynamic
performance of the recorder at the t~70 speeds must
be considered, both in the case of flying head hard
disc recorders and in the case of flexible disc
recorder~.
A second method shown in U.S. Patent No.
3,518,366 to Phan, issued June 30, 1972, involves
rerecording one field of a frame twice on a frame
recorder. To accomplish this, a frame recorder is
]0 modified by providing a second recording head
precisely displaced from the first head. The two
magnetic heads then record the single field
simultaneously and one head is used for playback of
the frame. If the disc is a multi-track disc, an
additional stepper mechanism is required for the
extra head. This method may also be costly and
complicated and may cause excessiYe disc wear.
Summary of the Invention
In accordance with the present invention, a
stop action recorder is provided for recording a
frame of video information consisting of interlaced
video fields of first and second field type and
further including horizontal and vertical sync
signals, and for providing a video frame consisting
of two interlaced fields to a monitor at a frame
rate without motion jitter. The recorder includes a
video source means for providing a signal to be
recorded, a disc means, including a magnetic disc
and a magnetic pick-up and record head adjacent the
magnetic discp for recording a video signal, and
means for rotating the disc at the rame rate o one
revolution per frame. The recorder further includes
a memory for storing a video signal applied thereto,
a switch for applying a video signal to the disc
means to be recorded on the magnetic disc, and
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Docket 6398 ~ ~
means, connected to the head, for reproducing the
video signals recorded on the magnetic disc and for
applying the reproduced signal to the memory, and
means, connected to the memory, for reapplying the
reproduced signal to the switch for re-recording the
signal on the disc. A control means is provided,
including a field discriminator providing a field
type output indicating the type of field being
reproduced, for selectively enabling the memory and
the switch such that a portion of a field of one of
the field types is stored in the memory during
playback and reapplied through the switch as a
corresponding portion of a field o the other of the
field types.
The control means may comprise a first
counter incremented once during each rotation of the
disc means and a second counter responsive to the
horizontal sync si~nals in the reproduced video
signal. The control means further includes a
comparator for comparing the count in the first
counter with the count in the second counter and for
applying an enabling signal to the switcha The
discriminator may comprise means for discriminating
between fields of the first field type and fields of
the second field type in dependence on the timing
between horizontal sync pulses and vertical ~ync
pulses at the beginning of each vertical sync
interval.
Other objects and advantages of the
: 30 invention will be apparent f rom the following
description, the accompanying drawings and the
appended claims.
Brief Description of the Drawings
~ig. 1 is a representation of the standard
interlaced video scanning pattern;
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Docket 639B ~ 4
Figs. 2A and 2B are representations of
portions of a video signal;
Fig. 3 is a simplified diagrammatic
representation of the preferred embodiment of the
invention;
Fig. 4 is a schematic representation of the
circuit arrangement of the present invention;
Fig. 5 is a schematic representation of the
circuit for the odd/even field discriminator of
Fiug. 4; and
Figs. 6 and 7 are timing diagrams useful in
explaining the operation of the device shown in Fig.
5.
Descrl~tion of the Preferred Embodiment
Referring now to Fig. 1, there is shown in
diagrammatic form the standard interlaced scanning
pattern utili~ed for video signals in the United
States. The video signal consists of a succession
of video pictures or frames which are presented at
the rate of 30 per second. Each frame is made up of
a number of horizontal scan lines with the United
States standard being 525 lines per frame. As shown
in Fig. 1, each borizontal line is slightly inclined
to the right. This occurs because during the
scanning process a vertical deflection signal is
generated which moves the scanning beam from the top
of the picture to the bottom of the picture at a
constant rate. The horizontal deflection is much
more rapid and acts to move the scanning beam from
left to right to scan a line and then very rapidly
to return the beam to the left edge of the picture
to begin the scan of the next succeeding line in the
fiel~.
As seen in Fig, 1, each frame consists of
two fields. Each odd numbered field begins at point
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Docket 6398 ~ 2~1~
20 and ends at point 25. After an odd nu~bered
field is scanned, the scanning beam is returned by a
vertical deflection signal to point 30 where an even
numbered field scan is begun. The even numbered
field scan ends at point 35 and the scanning beam is
then returned to point 20 for the initiation of the
scan of the next odd numbered field.
Referring now to Figs. 2A and 2B, two
portions of a standard video signal are shown. Fig.
2A illustrates the end of an even field, the
beginning of an odd field, and the vertical blanking
! between the fields. Fig. 2B is similar to Fig. 2A
except that the end of an odd field and the
beginning of an even field are shown. As seen in
~ig. 2A, the scanning beam intensity for each line
is provided by a wave form such as that indicated at
40. A level 45 is reached by the signal when a
white portion of the line is scanned and a level 50
is reached by the signal when a black portion of the
line is scanned. Timing information is provided on
the video signal by a series of pulses, the
amplitudes of which are not within the range used to
specify the intensity of the beam.
Specifically, horizontal sync pulses, such
as pulse 55~ are provided to synchronize the
horizontal beam deflection circuit in the video
monitor with the video information supplied to the
video monitor. Each of these pulses is outside the
limits of the video beam intensity signal and,
therefore, the picture displayed by the monitor is
unaffected.
Between each field is a vertical sync
pulse~ shown at 60O The vertical sync pulse is
serrated at 61, 62, 63, 64, 65 and 66 so that the
horizontal deflection circuit is provided with
information allowing it to remain synchronized with
Docket 6398 ~ ~ ~9 ~ ~
the incoming video signal. During the time period
between fields, the scanning beam is returned to the
top of the picture in preparation for scanning the
next field. The vertical sync pulses are repeated
at the field frequency of 60 per second and like the
horizontal sync pulses, are of an amplitude which
will leave the picture unaffected. Before and after
the vertical sync pulse 6~, six equalization pulses
are provided in the equalization pulse intervals.
The equalization pulses and serration pulses 61-66
appear at twice the horizontal line rate.
A comparison of Figs. 2A and 2B indicates
that diffrences exist in signal timing between even
and odd fields. Specifically~ when compared with
the timing of each vertical sync pulse, the
hori20ntal sync pulses used during an odd field are
out of phase with the horiæontal pulses used during
an even field by an amount equal to one-half of a
line scan. Since the initial line scan of an even
numbered field is only one-halÇ of a line and sinGe,
as seen in Fig. 1, the even and odd fields start at
the same vertical position, this half line phase
difference will cause each of the even field lines
to be positioned exactly midway between two adjacent
odd field scan lines.
Referring now to Fig~ 3~ there is shown the
preferred embodiment of the invention. Disc
recording means 70 includes a magnetic disc 71 and a
magnetic pick-up and record head 75. Record head 75
may be positioned by a device such as that disclosed
in U~S. Patent No. 3,814,441, issued June 4, 1974,
to Craggs. The recording disc may be mountPd as
shown in U.S. Patent No. 3,840,897, issued October
8, 1974, to Kelley et al or UOS. Patent No.
3,737,880, issued June 5, 1973~ to Kelley. Magnetic
disc 71 is rotated with respect to pick-up head 75
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Docket 6398 ~ ~ 2~
by a means for rotating the magnetic disc at the
frame rate of 30 rps. Such means may include the
disc drive devices disclosed in U.S. Patent No.
3,814~844, issued June 4, 1974, to Waldspurger et al
and U.S. Patent No. 3,583,0g0, issued May 13, 1975,
to Hall. A source of video siynals 78 supplies a
video signal, consisting of a succession of video
frames, to record electronics 80 which are of
standard design. Switches 85 and 86 comprise a
switching means which is initially set with both
switches in their A positions. Although illustrated
for the sake of simplicity as mechanical switches,
switches 85 and 86 will be implemented by means of
semiconductor switching arrangements or equivalent
high speed switching devices.
When the preerred embodiment of the
present invention is operating/ a rame comprised of
two interlocked fields, will be recorded on disc
71. When it is desired to record and display a
single frame, comprised of two identical fields,
from the video signal, the timing logic 88 is
actuated and causes switches 85 and 86 to switch
into their respective B positions. One of the two
interlocked fields recorded on disc 71 is then
reproduced by pick-up head 75 and standard reproduce
electronics 90. The reproduced field signal is
supplied via line 91 to a delay or buffer memory
means 95 which stores a portion o~ the signal.
Memory 95 may be in the form Qf a charge transport
device æuch as a charge coupled device, a buck~t
brigade~ charge injection device~ or a MOS diode
array. Alternatively, the memory may be digital
with an analog-to-digital converter at the input and
a digital-to analog converter at the output.
After a portion of the field has been
stored in the buff~r memory 95, switch 86 is
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Docket 6398 ~ 14
returned to its A position and the stored field
information is then reapplied to record electronics
80 via line 98. The stored portion of the 'ield is
applied through switch 86 to the record head 75 and
recorded by disc recorder 70. A portion of the
field signal is then rerecorded during each of a
plurality of successive rotations oE the disc
recorder until the entire field signal has been
rerecorded. The timing of this rerecording is such
that the rerecorded field is recorded directly over
the second of the two interlaced fields previously
recorded. The recording in FM erases the previously
recorded signals. Thus the same field signal will
be recorded on disc 71 as both the first and the
second field of a frame. Switch 86 may then be
switched into its B position and the recorded frame
supplied to monitor 100 where the frame may be
displayed. Since the first and sacond fields of the
~rame are identical, no motion jitter will occur.
The storage capacity of the memory
determines the speed of the rerecording operation.
If the memory has a capacity of N lines, N lines may
be rerecorded during each rotation of the disc.
Since there are, at most, 245 active video lines per
field, the number of di~c rotations required to
rerecord a Eield would be 245 divided by N (rounded
off to the next larger integer).
As mentioned previously, rerecording of a
single fi~ld signal takes place directly over a
previously recorded field signal to time precisely
the rerecording process. The timing logic B8 and
sync stripper 105 may monitor the horizontal sync of
the field to be replaced. Further these sync
signals of the origional video signal may be left
unmodified on disc 71 with only the active line
signal of the field to be rerecorded being stored in
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Docket 6398 ~ ~2~ ~ ~
memory. The logic will thus cause the stored lines
to be rerecorded onto the disc, replacing one for
one the lines complementary to this field.
The choice of fields for rerecording may be
made on either a first-come-first-serve basis or may
be previously determined. The timing logic may
rerecord only even or odd numbered fields into
complementary positions. Operating in a mode where
the field to be rerecorded is selected arbitrarily
may require that the playback rerecord sequence be
controlled by one of two separate control circuits
after it is determined whether an even numbered
field or an odd numbered field is to be rerecorded.
As previously mentioned, there is a one-half
horizontal line displacement between odd and even
fields and this may serve as a method of detecting
which of the two fields has been chosen for
rerecording~
If it is desired to increase the speed of
operation, the storage capacity of buffer memory 95
may be ;ncreased so that an entire field signal is
stored simultaneously. Such change would of course
materially increase the cost of the recording
apparatus. Wi~h such a memory, however, the
apparatus of Fig. 3 could also function as a ~ield
recorder having an expanded capacity. This would be
accomplished by only recording alternate fields on
recording disc 71. Since rotation is at the frame
rate, two non related fields would be stored on each
circular track on the disc~ When one of the
recorded ~ields is ~o be viewed on monitor 100,
transducer 75 is moved ~o the appropriate track and
switch 86 is switched into its B position. The
desired field signal is then supplied to monitor 100
via reproduce electronics 90. This same field
signal is simultaneously fed via line 91 to buffer
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Docket 6398 ~ 14
memory 95. The output o~ buffer memory 9S may t'nen
be applied by a switching arrangement (not shown) to
monitor 100. The second application of the field
signal is timed so as to create the necessary
conditions for interlace. Thus by storing only
alternate fields on the disc recorder, twice as many
frames would be available for reproduction with
acceptable definition.
To prevent moire effects that may occur as
one field is rerecorded over another field, the disc
71 may be rotated initially with one field being
erased prior to initiating of the rerecording
process. The erasure may extend into the horizontal
sync pulses so that the switching transients which
lS occur as the FM modulator is turned on and off will
be removed during sync processing. The sync must
not be completely erased.
Reference is now made to Fig. 4 in which a
schematic representation of the circuit of the
preferred embodiment of the invention is shown. The
disc recorder 70 includes a single transducer head
75 which cooperates to record on magnetic disc 71 in
the manner previously discussed. Transducer head 75
is used for recording and playback on the disc. ~n
FM modulated video signal to be recorded is supplied
to input A on line 110 which provides an input for
standard record driver electronics 117. The siynal
on line 110 will be continuously recorded on the
disc 71 by transducer head 75. Playback circuit 119
controls the playback of the video signals which
have been recorded on disc 71, Playback circuit
includes an FM demodulator and amplifiers and is
gated off by a signal on line 121.
When it is desired to rerecord a video
field on the disc 71 to produce a video frame having
identical fields~ the signal on input A is removed
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Docket 6398 ~ 9 ~ 4
and a record pulse applied by appropriate circuitry
to line 123. This resets counter 125 and sets
flip-flop 127, enabling circuit operation in a
manner to be described below~ ~he playback circuit
113 wlll also be enabled such that the frame which
has been recorded will be played back by electronics
119 and ~upplied to line 123.
Sync stripper 131 separates the vertical,
horizontal and composite sync signals from the video
signals and applies them to lines 133, 135, 136,
respectively. The vertical ~ync pulses on lines 133
will reset counter 137, divide~by-~ counter 139, and
divide-by-12 divider 141. The horiziontal sync
pulses on line 135 are supplied to gate Gl via
divide-by-N counter 139 and via divide-by-12 divider
141. The number N is set to equal the number of
video lines which are to be rerecorded during each
revolution of the recorder. Divider 141 supplies a
high signal on its output after receiving 12 input
pulses. The horizontal sync pulses are also
supplied to inverter 145 which disables AND gates
G2 and G3 upon receipt oE each horizontal sync
pulse.
Phase locked loop oscillator 147 with
feedback divider 149 provides a pulse train at the
rate of Q times the horizontal sync requency to
gata G2. Gate G2, when e~abled, supplies this
high frequency output to a buffex memory 151 and
counter 152. Bufer memory 151 may be a charge
transport memory or, alternatively, a digital memory
with an analog-to-digital converter at its input and
a digital-to-analog converter at its output. The
~: pulse train output from gate G~ controls the rate
at which the video signal information is shifted
through the buffer memory 151~ A conventional ~M
modulatox 153 receives the output from buff~r memory
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Docket 6398 ~ 4
151 and supplies it to gate ~4. Counter 152
counts the pulse train and supplies an output signal
on line 154 after Q pulses have been counted and the
active portion of the video line reproduced. The
output from inverter 145 resets counter 152 prior to
each video line.
The sync stripper 131 provides a composite
sync signal on line 136 which includes both the
vertical and horizontal sync information as well as
the equalization pulses and the serration pulses
which ocaur during the vertical pulse interval.
This composite signal is applied to odd/eYen
vertical interval discriminator 157 which also
receives the vertical sync signal on line 159.
Discriminator 157 provides output pulses on
lines 159 and 161 which indicatP when the odd and
even fields of the recorded material are being
reproduced. Output 159 will remain high for the
duration of each odd field and go low for the
duration of each even field. Similarly, output 161
will go high during each even field and low during
each odd field. Switch 163 is provided to permit
the operator to choose whether the odd field or the
even field on the disc 71 is to be replaced with the
opposite field information.
The output of the odd~even vertical
interval discriminator 157 is supplied on line 165
to gates G4 and G5 and, on line 167, to the
count input of binary counter 125. The parallel
3~ outputs of counters 125 and 137 are provided to
digital comparator 169. When comparator 169 senses
that the count in the two counters is equal, it
provides an output signal on line 171. The count in
counter 125, additionally, is sensed by decoder 173
which provides a reset pulse to flip-flop 127 when
counter 125 reaches a count state equalling 242
divided by N.
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Docket 6398 ~29~4
The operation of the circuit of Fig. 4 is
as follows. Initially, when an operator determines
that a frame is to be recorded, a single frame
signal will be applied to input A and, via line 110,
to the disc recorder 70. Since playback circuit 119
will not at this time be enabled, it will provide no
signal to line 129. The disc recorder 70 will now
have recorded on a single track a frame signal
consisting of two interlaced field signals. If the
operator should determine that it is desirable to
compose a video frame consisting of two interlaced,
identical fields, the operator will actuate
appropriate circuitry which will apply a pulse to
line 123, thus resetting counter 125, while setting
flip-flop 127. The Q output of flip-flop 127 will
then go high. Playback circuit 119 will also
receive a signal on its enabling input 175. Such an
enabling signal may conveniently be obtained from
the Q output of flip-flop 127~ A single video frame
consisting of two interlaced fields of non-identical
video information will have been recorded on the
disc 71. Switch 163 will have been set to either
the sdd or even switch position, thus determining
which of the two fields is to be replaced.
Assuming that an even field is then
reproduced, the signal on line 165 will ~e low and
playb~ck circuit 119 will not be inhibited by AND
gate GS. Circuit 119 will produce video signals
: stored by th~ recorder and apply this signal to line
129. Playback circuit 119 includes the appropriat~
standard FM demodulator and amplifiers. The video
signal which is played back will be applied by line
129 to sync stripper 131 and also to buffer memory
151. The line termination marked B at the input of
sync stripper 131 is connected to the line marked B
on the input of buffer memory 151 The buffer
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Docket 6398
memory 151 will begin to store the video signal.
Sync stripper 131 will separate the
vertical, horizontal, and composite sync pulses from
the video sign~l and apply them to lines 133, 135,
and 136, respectively. When the first vertical
interval is reached, a vertical sync pulse will be
applied to line 133. The trailing edge of the
vertical sync pulse will reset counter 137,
divide-by-N counter 139, and divide-by-12 counter
141. After the vertical blanking interval, the
horizontal sync pulses applied to line 135 will be
counted by divider 141 and counter 139. After
divider 141 has counted 1~ horiiontal sync pulses,
and the divide-by-N counter 139 has counted N
horizontal sync pulses, gate Gl will be enabled.
Counter 137 will have been initially reset
to a zero count. Counter 125 will have also been
reset but will have received a pulse on line 167
~uch that it will be at a "one" count. Only the
first set of N active lines of video will be clocked
into the buffer memory 151, thereEore. When the 8
bit counter 137 receives a second pulse from Gl,
line 171 from comparator 169 will be switched low
and gate~ G2 and G3 disabled. Thus only the
active lines o video information will be stored in
the buf~er memory and the first tw~lve inactive
lines ignored.
Asæuming that the field from which these
video horiziontal lines were taken was an even
field, gate G4 will be enabled by the odd/even
vertical interval discriminator 157 during the next
vertical interval, just prior to the succeeding odd
field. Counter 137 will be reset by the vertical
sync signal to a zero count and thus digital
comparator 169 will provide a high output signal
which will enabl~ AND gates G2 and G3 only after
~16-
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Docket 6398
the recorder has reproduced the desired number of
horizontal lines and the counts in counter 137 and
125 are again equal. Inverter 145 insures that only
active portions of the video ~ignal are stored in
memory 15 and rerecorded onto the disc. The stored
lines of video information will then be gated
through gate G4 and recorded onto the disc
recorder. The high signal on line 165 will be
transmitted to inhibit playback circuit 119 during
the rerecording process except when inhibited by
counter 152. Counter 152 will provide an output on
line 154 after each active line of video
information; the previously recorded sync signals
will therefore be applied to the line 129, The
counter 137 will thereafter increase its count by
one, disabling comparator 171 and gates G3 and
G2 .
During the next revolution counter 125 will
have been indexed such that its count is increased
by one. Counters 137 and 125 will be equal in count
twice during this revolution but during the next
successive group of N horizontal video lines. Thus
counter 125 will count the revolutions oE the disc
recorder and counter 137 and digital comparator 169
will insure that during each revolution a group of N
horizontal lines is stored in the buffer memory 151
and then rerecorded onto the disc.
The decoder 173 is responsive to the count
in counter 125 to provide a reset pulse to flip-flop
lZ7 when counter 125 reaches a count equal to 242
~the number of active video lines) divided by N,
rounded to the next larger integer. This will, by
definition, occur after all the groups of N
horizon~al lines have been properly rerecorded onto
the disc at the appropriate locations.
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Docket 6398
Referring now to Fig. 5, the odd/even
vertical interval discriminator 157 is shown in
greater detail. Figs. 6 and 7 are pulse diagrams
useful in explaining the manner in which this
circuit operates. Vertical sync signals are applied
to line 159 while the composite sync signals are
applied to line 136. Monostable multivibrator 179
is triggered by the leading edge of the vertical
sync pulse. The multivibrator is non~retriggerable
provides provides a pulse on its output 181 which is
equal in duration to 75~ of the horizontal line
period. The output of monostable multivibrator 179
is represented in FigsO 6 and 7 as pulses 183.
Monostable multivibrator 185 receives the
composite sync signal on line 136 and provides on
its output a series of pulses in phase with the
horizontal sync signal and at the horizontal sync
frequency but having a duration of 75~ of the
horizontal line period. These pulses are
represented in dashed lines in Figs. 6 and 7 as
pulses 187. The solid line pulses 189 illustrate
the relative width oE the horizontal sync pulses.
The composite sync signals 191 are shown in Figs. 6
and 7. It should be noticed that the vertical sync
portion of the composite signal is broken by a
plurality of serration pulses 193.
Fig. 6 indicates the relationship of the
three pulse trains during the vertical interval just
prior to an even field while Fig. 7 shows such a
time relationship during the vertical interval just
prior to an odd field~ A careful comparison of the
relationship among the pulse trains illustrated in
Figs. 6 and 7 will reveal that pulses 183', 193',
and 187' in Fig. 6 will all be high simultaneously.
In Figs. 7, however, pulse 193' will not be
coincident with any of the pulses 187.
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~ocket 6398
If the three pulse trains are applied to an
AND gate, such as AND gate 195 in Fig. 5, the AND
gate will supply pulse output at the beginning of
each even field. The gate will, however, not
provide such an output at the beginning of each odd
field. The output of gate 195 is supplied to a
flip Elop 1~7 which changes state in dependence upon
the signal applied to its D input at the time it
receives a cloclc input. AND gate 199 combines the
vertical sync pulse 183 with the composite sync
signal 191 such that it provides a high output at
the first serration pulse of each vertical
interval. IE an even field is about to occur, AND
gate 195 will also provide an output, thus causing
~lip-flop 197 to provide a high signal on its Q
output. If, on the other hand, an odd field is
about to occur, the flip-flop 197 will be clocked as
AND gate 195 provides a low output. Flip-flop 1~7
therefore provide a high output on its Q output.
Thus flip-flip ]97 will provide complementary pulse
trains in phase with the alternation between Eields
by the video disc recorder.
The embodiments of the invention in which
an exclusive property or privilege is claimed are
defined as follows:
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