Note: Descriptions are shown in the official language in which they were submitted.
For Logging While Drilling." According to phase shift keyed
(PSK) modulation, the data derived in response to the sensed
downho,le condition is initially encoded into binary format,
and the acoustic signal generator is driven at speeds so
that t-he phase of a constant frequency carrier wave gen-
erabed in the drilling fluid is indicative of the data. In
particular, a non-return to zero type PSK mode is used
wherein the phase of the carrier signal is changed only upon '
each receipt of data of a predetermined'value. For example,
for data encoded in binary, the phase of the carrier wave
may'be changed for each occurrence of a logic 1 data bit.
Ideally the phase change of the carrier signal would
be instantaneous upon occurrence of the data of the partic-
ular value. This is because the downhole telemetering unit
is continuously transmitting data to the uphole receiving
instruments where the data in turn is continuously decoded.
Any delays in effecting the phase change and in returning
the acoustic signal to its carrier frequency introduce
errors and/or inefficiencies into the system.
As a practical matter, however, the phase of the
acoustic signal cannot be changed instantaneously in re-
sponse to data of the predetermined value. Inherent delays
are introduced by the physics of the system. The motor
control circuitry which operates the motor-driven acoustic
generator is adjusted accordingly to effect optimum response
of the generator. Past proposals, such as the above-refer-
enced Godbey and Patton patent, and in U.S. Patent No.
3,820,063, issued June 25, 1974, to Sexton et al. entitled
"Logging While Drilling Encoder, '! have proposed several
circuits for implementing the motor control circuitry. In
the Patton and Sexton et al. patents, the speed of the motor
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was to be temporarily varied such that, upon returning of
the motor speed bac~ to the carrier frequency producing
speed, the desired amount of phase change would be accu-
mulated. ln the Sexton et al. patent, this was accomplished
by varying the speed of the motor in a first direction until
a predetermined amount of phase shift had been accumulated.
The motor speed was then returned in the other direction to
the carrier frequency producing speed for a predetermined
durati~n of time, thereby attempting to accumulate the
remainder of the desired amount of the phase change.
The above proposals failed to recognize the problems
associated with changes'in the enviromental operating con-
ditio~s of the logging-while-drilling system. For example,
changes in the loading on the acoustic generator drive motor
caused by changes in the pressure or the flow rate or the
viscosity or density of the drilling fluid varies the length
of time needed to return the motor speed back to the carrier
frequency producing speed. This time ~ariance varies the
amount of phase accumulated during the return to the carrier
frequency producing speed, causing a longer period of time
to be needed in generating the proper amount of phase change
at the carrier frequency,. This longer period of time allows
the introduction of inaccuracies into the system and/or
decreases the rate of data transmission which otherwise
would b,e obtainable.
SUM~qARY OF THE INVENTION
It is a general object of the present invention to
provide a new and improved apparat~s and method for
telemetering downhole well-drilling data during drilling
which features motor loading compensation to the motor driven
acoustic signal generator.
The above and other objects are attained, in
accordance with one aspect of the invention, by a
measuring-while-drilling system including an acoustic
generator having a driven moveable member disposed for
imparting to well fluid an acoustic signal having an
intermittently constant frequency and including controlled
drive means for changing the rate of movement of the member
to effect a change of phase of the acoustic signal thereby to
provide modulated data states to the acoustic signal, said
system including an improved control circuit for the drive
means comprising: first means for changing the rate of
movement of the moveable member from the substantially
constant frequency to a different phase accumulating
frequency; means, coupled to said changing means and
including a presettable accumulator circuit, for generating a
control signal when the amount of phase change reaches a
prescribed value; second means for returning the rate of
movement of the moveable member substantially to the constant
frequency upon the occurrence of the control signal thereby
accumulating phase change additional to said prescribed value
effecting a total amount of phase change in said acoustic
signal; and means, including a phase accumulator for
indicating said total amount of phase change, for adjusting
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said prescribed value in response to said total amount of
phase change.
A further aspect of the invention includes a
measuring-while-drilling system including an acoustic
generator having a moveable member driven at speeds for
imparting to well fluid an acoustic signal having modulated
phase states representative of data derived from measured
downhole conditions, and further including means for driving
the member at a substantially constant rate of operation to
thereby effect a substantially constant carrier frequency in
the acoustic signal and for temporarily changing the rate of
movement of the member to effect predetermined phase changes
in the carrier frequency according to the data, wherein the
rate of the member is temporarily changed from the constant
rate to a first value until a prescribed portion of the
predetermined phase change is accumulated, as indicated by an
internally generated control signal, and is then returned to
the substantially constant rate in response to the control
signal, the improvement wherein the driving means includes a
control circuit having feedback compensation comprising:
differential integrating circuit means for generating the
control signal when a predetermined value is exceeded by the
difference between (1) an integrated carrier frequency signal
representing the value of the carrier frequency integrated
over a time period beginning substantially upon the
occurrence of one data signal and (2) an integrated drive
frequency signal representative of the integral of the
instantaneous rate of movement of the member integrated over
said time period, wherein said differential integrating
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circuit means includes a presettable accumulator circuit
responsive to one of said integrating signals and having
programming inputs for receiving a targeting compensation
signal which sets the state of the counter to thereby
establish said predetermined value, and targeting
compensation means coupled to said driving mmeans for
generating said targeting compensation signal in response to
the rate of operation of said drive means.
Another aspect of the invention comprises a
measuring-while-drilling system disposed within a well for
imparting to well fluid an acoustic signal having modulated
phase states representative of data derived from measured
downhole conditions comprising: an acoustic generator
disposed within the flow of the well fluid for interrupting
the flow of the fluid at a controlled rate; a motor coupled
for driving the acoustic generator to effect the fluid
interruption; and a motor control circuit having feedback
compensation for driving the motor at a substantially
constant speed to thereby effect a substantially constant
carrier frequency in the acoustic signal and for temporarily
changing the speed of the motor to effect a predetermined
phase change in the acoustic signal according to the downhole
derived data wherein the speed of the motor is temporarily
changed from the carrier frequency producing speed to a
different value until a prescribed portion of the pre-
determined phase change is accumulated and is then returned
to the substantially constant speed, and wherein the control
circuit further includes a differential integrating circuit
for generating a control signal indicative of the
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accumulation of said prescribed portion when a predetermined
value is exceeded by the difference between (1) an integrated
carrier frequency signal representing the value of the
constant carrier frequency integrated over a time period
beginning substantially upon the occurrence of one data
signal and (2) an integrated drive frequency signal
representative of the integral of the instantaneous speed of
the motor integrated over said time period, said differential
integrating circuit including a presettable counter having
programming inputs for receiving a targeting compensation
signal which sets the state of the counter to thereby
establish said predetermined value, and targeting
compensation means coupled to the motor for generating the
targeting compensations signal in response to motor speed to
thereby compensate the value of the prescribed portion for
changing loading conditions on the motor.
Still another aspect of the invention is attained by
a well measuring-while-drilling system for measuring downhole
conditions and imparting a modulated acoustic signal
representative thereof to drilling fluid within the well and
which includes measuring apparatus adapted to be connected to
a drill string and disposed in the well, the measuring
apparatus incuding one or more sensors for sensing the
downhole conditions and generating modulated sensor signals
representative thereof, and including an acoustic generator
responsive to the sensor signals for imparting to the
drilling fluid an acoustic signal representative of one or
more of the downhole conditions; wherein said acoustic
generator comprises: a transmitter having a movable member
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disposed for selectively interrupting the downward passage of
the drilling fluid to thereby generate the encoded acoustic
signals, a motor for movably driving said member, a control
circuit coupled to the sensor and to the motor for
controlling energization thereof in response to the sensor
signals, thereby to effect periodic interruption of the
drilling fluid by the movable member, the control circui~
including a phase and frequency maintaining circuit operative
to drive the motor at a substantially constant speed in the
absence of a sensor signal of a predetermined value to
thereby provide the acoustic signal to have a substantially
constant carrier frequency and a first phase value, and a
modulation control circuit operative in response to said
predetermined value of said sensor signal to momentarily
change the speed of the motor away from said constant speed
and return it to said constant speed in response to a control
signal to thereby provide the acoustic signal to have a
second phase value relative to said first value, said
modulation control circuit including first circuit means for
integrating a carrier frequency signal representative of the
constant carrier frequency; second circuit means for
integrating a motor frequency signal representative of the
substantially instantaneous speed of the motor; third circuit
means, including a presettable accumulator circuit, for
generating said control signal when the difference between
the values of the integrated carrier and drive frequency
signals reaches a predetermined value, thereby represenative
of the difference between said first and second phase values
reaching a predetermined value during said momentary change
in frequency; and fourth circuit means coupled to said motor
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for providing a targeting compensation signal to said
presettable accumulator circuit for thereby establishing said
predetermined value as a function of the speed of the motor.
Yet another aspect of the invention comprises a
method of operating a measuring-while-drilling system which
includes an acoustic generator having a driven moveable
member disposed for imparting to well fluid an acoustic
signal having an intermittently constant frequency, to
momentarily change the rate of movement of the member to
effect a change of phase of the acoustic signal thereby to
provide modulated data states to the acoustic signal, the
method comprising the steps of: changing the rate of
movement of the moveable member from the substantially
constant frequency to a different, phase accumulating
frequency; generating a control signal when the amount of
phase change generated by said step of changing the rate
reaches a prescribed value; returning the rate of movement of
the moveable member to the constant frequency upon the
occurence of the control signal; and adjusting said
prescribed value in response to the amount of phase change
accumulated during said step of returning.
A further aspect of the invention is attained by a
method of operating a measuring-while-drilling system which
., ~
includes a motor for driving an acoustic generator at
predetermined speeds for imparting to well fluid an acoustic
signal having phase states representative of data derived
from measured downhole conditions and which further includes
a motor speed control circuit for driving the motor at a
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first substantially constant speed to effect a carrier
frequency for the acoust.ic signal and which momentarily
chanyes the speed of the motor to thereby change the phase of
the acoustic signal upon the occurrence of data, thereby to
provide the acoustic signal with encoded states, the method
comprising the steps of: generating a signal representative
of the carrier frequency; generating a signal representative
of the substantially instantaneous speed of the acoustic
generator; changing the speed of the motor to a different
value upon to occurrence of data; integrating the carrier
frequency signal and the instantaneous speed signal over a
time period beginnning substantially upon the occurrence of
said data; generating a control signal when the difference
between said integrated signals teaches a predetermined
value; returning the speed of the motor to substantially the
carrier freguency producing speed in response to said control
signal; and changing said predetermined value in response to
the amount of phase change accumulated in encoding the
acoustic signal for previously occurring data.
; Another aspect of the invention includes a method of
operating a measuring-while~drilling system which includes an
.:
acoustic generator having a driven moveable member disposed
for imparting to well fluid an acoustic signal having an
intermittently constant frequency, to momentarily change the
rate of movement of the member to effect a desired change of
phase of the acoustic signal thereby to provide modulated
data states to the acoustic signal, the method comprising the
steps of: changing the rate of movement of the moveable
member from the substantially constant frequency to a
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different, phase accumulating frequency thereby effecting a
phase change; generating a control signal when the amount of
phase change reaches a prescribed value; returning the rate
of movement of the moveable member to the constant frequency
upon the occurrence of the control signal; generating an
accumulator signal representative of the amount of phase
change accumulated due to said steps of changing and
returning; and adjusting said prescribed value in response to
said accumulator signal and thus to the amount of accumulated
phase change to thereby more precisely obtain said desired
change of phase.
Still another aspect of the invention is attained by
a method of measuring-while-drilling for momentarily changing
the speed of a motor-driven acoustic signal generator from a
normally constant rate providing a carrier frequency signal
to effect a selected phase change for modulating said carrier
signal comprising the steps of: (a) changing the generator
speed away from the normal rate to accumulate a portion of
the selected phase change, and tb) upon generation of a
control signal returning the generator speed to the normal
rate to thereby accumulate substantially the remainder of
said selected phase change; generating said control signal
when the phase change accumulated in one of steps (a) and (b)
reaches a prescribed value; and adjusting said prescribed
value in response to the phase change accumulated during the
other of steps (a) and (b) of a preceding modulation.
Yet another aspect of the invention comprises a
method of operating a measuring-while-drilling system for use
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downhole in a borehole, the method using a modulator for
encoding a data signal representative of downhole drilling
characteristics and comprising the steps of: controllably
operating the modulator to modulate the data signal in a
selected manner to thereby generate a modulated data signal
having a sequence of encoded data, the sequence of encoded
data being defined by a sequence of modulations said selected
manner being defined in an attempt to achieve desired
modulation characteristics; and during a given modulation,
altering said selected manner of operation in response to a
previously occurring modulation, thereby more nearly
achieving said desired modulation characteristics.
Still another aspect of the invention includes a
method of operatlng a measuring-while-drillin~ system for use
downhole in a borehole, the method using a modulator for
encoding a data signal representative of downhole drilling
characteristics and comprising the steps of: controllably
operating the modulator to modulate the data signal in a
selected manner in response to a compensation control signal
to thereby generate a modulated data signal having a sequence
of encoded data, the sequence of encoded data being defined
by a sequence of modulations, said selected manner being
defined in an attempt to achieve desired modulation
characteristics; and during a given modulation, adjustably
generating said compensation control signal in response to a
previously occurring modulation for altering the selected
manner of operation of the modulator during the given
modulation to more nearly achieve said desired modulation
characteristics.
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A further aspect of the invention includes a
measuring-while-drilling system for use downhole in a
borehole, comprising: a modulator responsive to a data
signal representative downhole d~illing characteristics for
providing a modulated signal having encoded states of data
representative of the downhole drilling characteristics;
means responsive to a compensation control signal for
operating the modulator to pro~ide said encoded states of
data in a selected manner to thereby define a series of
modulations, said selected manner being defined in an attempt
to achieve desired modulation characteristics; and
compensating means responsive to a previously occurring
modulation for generating said compensation control signal
during a given modulation to thereby alter the selected
manner of operation of the modulator during the given
modulation, whereby said desired modulation characteristics
are more nearly achieved during modulation subsequent to said
previous modulation.
Another aspect of the invention is attained ~y a
measuring-while-drilling system comprising: a modulator
adapted to be disposed in a flow of drilling fluid for
imparting encoded states of data to the drilling fluid; means
responsive to a compensation control signal for operating the
modulator in a selected manner to thereby define a
modulation, said selected manner defined in an attempt to
achieve desired modulation characteristics; and compensating
means responsive to a previously occurri.ng modulation for
generating said compensation control signal during a given
modulation to thereby alter the selected manner of operation
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of the modulator during the given modulation, whereby said
desired modulation characteristics are more nearly achieved
during modulation subsequent to said previous modulation.
Yet another aspect of the invention includes a
measuring-while-drilling system comprising: a modulator,
including means for operating the modulator at more than one
rate, adapted to be disposed in a flow of drilling fluid for
imparting encoded states of data to the drilling fluid;
~eans responsive to a compensation control signal for
changing the rate of the modulator between selected rate
values to thereby define at least part of a modulation; and
compensating means responsive to said changing of the
modulator rate during a previously occurring modulation for
generating said compensation control signal during a given
modulation to thereby alter one of said selected rate values
during the given modulation.
Still another aspect of the invention is attained by
a measuring-while-drilling system comprising: a modulator
adapted to be disposed in a flow of drilling fluid for
imparting encoded states of data to the drilling fluid; means
responsive to a compensation control signal for changing the
modulator rate between first and second rates to thereby
accumulate a value of phase change and define at least part
of a modulation; and compensating means responsive to said
value of phase change accumulated during a previously
occurring modulation for generating said compensation control
signal during a given modulation to thereby change the amount
of the phase change accumulated during the given modulation
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when the rate of the modulator is changed between
substantially said firs~ and second rates.
A still further aspect of the invention includes a
measuring-while-drilling system comprising: a modulator,
including means for operating the modulator at a normal rate,
adapted to be disposed in a flow of drilling fluid for
imparting encoded states of data to the drilling fluid; means
responsive to a compensation control signal for changing the
modulator rate away from the normal rate and returning it to
the normal rate, thereby to accumulate to value of phase
change and define at least part or a modulation; and
compensating means responsive to the value of phase change
accumulated during a previously occurring modulation for
generating said compensation control signal during a given
modulation to thereby change the amount of the phase change
accumulated during the given modulation.
BRIEF DESCRIPTION OF THE DRAWINGS
The above and other features and advantages of the
present invention will become more apparent in view of the
following description of a preferred embodiment when read in
conjunction with the drawings, wherein: :
Figure 1 is a schematic drawing showing a general
well drilling and data measuring system according to the
invention;
Figure 2 is a block diagram of downhole telemeter-
ing apparatus utilized in the system of Figure l;
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Figure 3 is a circuit schematic of logic circuitry
ut:ilized within the downhole telemetering apparatus of Figure 2;
E'igure 4 is a set of exemplary waveforms illustrating
operation of the downhole telemetering apparatus; and
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Figure 5 is a functional block diagram depicting tar-
geting compensation circuitry utilized in the apparatus of
'Figure 2.
DESCRIPTION OF A PREFERRED EMBODIMENT
.
' Referring now to the drawings, Fig. l shows a well
drilling system l0 in association with a measuring-while-
drilling system 12 embodying the invention. For convenience,
Figure l depicts a land based drilling system, but it is
understood that a,sea based system is also contemplated.
- As the drilling ,system l0 drills a well-defining bore-
hole 14, the measuring-while-drilling system 12 senses
downhole conditions within the well and generates an acoustic
signal which is modulated according to data generated to
represent the downhole conditions. The acoustic signal is
imparted to drilling fluid, commonly referred to as drilling
mud, in which the signal is communicated to ~he surface of
the borehole 14. At or near the surface of the borehole 14
the acoustic signal is detected and processed to provide
recordable data representative of the downhole conditions.
This basic system is now well-known and is described in
detail in the above referred U.S. Patent No. 3,309,656 to
Godbey,
The drilling system l0 is conventional and includes a
drill string 20 and a supporting derrick ~not shown) repre-
sented by a hook 22 which supports the drill string 20
within the borehole 14.
, The drill string 20 includes a bit 24, one or more
drill collars 26, and a length of drill pipe 28 extending
into the hole. The pipe 28 is coupled to a kelly 30 which
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extends through a rotary drive mechanism 32. ~ctuation of
the rotary drive mechanism 32 (by equipment not shown)
rotate~ the kelly 30 which in turn rotates the drill pipe 28
and the bit 24. The kelly 30 is supported by the hook via a
swivel 34.
Positioned near the entrance to the borehole 14 is a
conventional drilling fluid' circulating system 40 which
circulates drilling fluid, commonly referred to as mud,
downwardly into the borehole 14. The mud is circulated
downwardly through the drill pipe 28 during drilling, exits
through jets in the bit 24 into the annulus and returns
uphole where it is received by the system 40. The circu-
lating system 40 includes a'mud pump 42 coupled to receive
the mud from a mud pit 44 via a length of tubing 46. A
desur~er 48 is coupled to ~he exit end of the mud pump 42
for removing any surges in the flow of the mud from the pump
42, thereby supplying a continuous flow of mud at its output
orifice 50. A mud line 52 couples the output orifice 50 of.
the desurger to the kelly 30 via a gooseneck 54 coupled to
the swivel 34.
Mud returning from downhole exits near the mouth of the
borehole 14'from an aperture in a casing 56 which provides a
flow passage 58 between the walls of the borehole 14 and the
drill pipe 28. A mud return line 60 transfers the returning
mud from the aperture in the casing 56 into the mud pit 44
for recirculation.
,. The measuring-whi'le-drilling system 12 includes a'down-
hole acoustic signal generating unit 68 and an uphole data
receiving and decoding system 70. The acoustic signal
generating unit 68 senses the downhole conditions and im-
parts a modulated acoustic signal to the drilling fluid.
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The acous~ic signal is transmit~ed by the drilling fluid to
the uphole receivlng and decoding system 70 for processing
and display.
To this end, the receiving and decoding system 70
includes a signal processor 72 and a record and display unit
74. The processor 72 is coupled by a line 76 and a pressure
transducer 78 to the mud lines 52. The modulated acoustic
signal transmitted uphole by the drilling fluid is monitored
by the transducer 78, which in turn generates electrical
signals to the processor 72. These ~lectrical signals are
decoded into meaningful information representative of the
downhole conditions, and the decoded information is recorded
and displayed by the unit 74.
One such uphole data receiving and decodlng system 70
is described in U.S. Patent No. 3,886,495 to Sexton et al.,
issued May 27, 1975, entitled "Uphole Receiver For Logging-
While-Drillîng System,
The downhole acoustic signal generating unit 68 is
supported within one of the downhole drill collars 26 by a
suspension mechanism 79 and generally includes a modulator
80 having at least part of the flow of the mud passing
through it. The modulator 80 is controllably driven for
selectively interrupting the flow of the drilling fluid to
thereby impart the acoustic signal to the mud. A cartridge
82 is provided for sensing the various downhole conditions
and for driving the modulator 80 accordingly. .The gener-
ating unit 68 also includes a power supply 84 for energizing
the cartridge 82~ A plurality of centralizers 85 are pro-
vided to position the modulator 80, the cartridge 82, and
the supply 84 centrally within the collar 26.
.
L; 3
The power supply'84 is now well-known in the art and
includes a turbine 86 positioned within the flow of the
dril'liny fluid to drive the rotor of an alternator 88.
voltage regulator 90 regulates the output voltage of the
alternator 88 to a proper valuP for use by the cartridge'82.
The modulator 80 is also now well-known in the'art. It
includes a movable member in the form of a rotor 92 which is
rotatably mounted on a stator 94. At least part of the ~low
of the mud passes through 'apertures in the'rotor 92 and in
the stator 94, and rotation of the rotor selectively in-
terrupts 10w of the drilling fluid when the apertures are
in misalignment, thereby imparting the acoustic signal to
the drilling fluid. The rotor 92 is coupled to gear reduc-
tion drive linkage 96 which drives the rotor. The cartridge
82 is operably connected to the linkage 96 for rotating the
rotor 92 at speeds producing an acoustic signal in the
drilling fluid having (1) a substantially constant carrier
frequency which defines a reference phase value, and (2) a
selectively produced phase shift relative to the reference
phase value at the carrier frequency. The phase shift is
indicative of encoded data values representing the measured
downhole conditions.
In the preferred embodiment the drive linkage 96 and
~he designs of the rotor 92 and stator 94 ar~ chosen to
generate 1/5 of a carrier cycle in the acoustic signal for
each revolution of the motor 102.
suitable modulator 80 is shown and described in
detail in U.S. Patent No. 3,764,970 to Manning which is
assigned to the assignee of this invention. Other suitable
modulators 80 are described in the above-referenced Patton
and C,odbey patents, as well as in "Logging-While-Drilling
Tool" by Patton et al., U.S. 3,792,429, issued February 12,
1974, and in "Logging-While-Drilling Tool" by Sexton et al~,
U.S. 3,770,006, issued November 6, 1973,
Referring now to ~he cartridge'82, it includes one or
more sensors lOO and associated data encoding circuitry 101
for measuring the downhole conditions and generating encoded
data signals representative thereof. For example, the
sensors 100 may be provided for monitoring drilling para-
meters such as the direction of the hole (azimuth' of hole
deviation), weight on bit, torque, etc. The sensors 100 may
be provided for monitoring safety parameters, such as $or
detecting over pressure zones (resistivity measurements) and
fluid entry characteristics by measuring the temperature of
the drilling mud within the annulus 58. Additionally,
radiation sensors may be provided, such as gamma ray sensi-
tive sensors for discriminating between shale and sand and
f~r aepth correlation.
The data encoding circuitry 101 is conventional and
includes a multiplex arrangement for encoding the signals
from the sensors into binary and then serially transmitting
them over a data line. A suitable multiplex encoder ar-
' rangement is disclosed in detail in the above referencedSexton et al. patent, U.S. 3,820,063.
; The cartridge 82 also includes a
motor 102 coupled to the linkage 96, and motor control
circuitry 104 for controlling the speed of the motor 102 for
rotating the rotor 92 of the modulator 80 at the proper
speeds to effect the desired acoustic signal modula~ion.
The motor 102 is a conventional two-phase AC induction motor
whichr in the preferred embodimen~, is driven at 60 Hæ by
the motor control circuitxy 102. Use of an induction motor
for tne motor 102 is not critical, as other types of motors,
such as a d.c. servomotor, are suitable.
The motor control circuitry 104 is shown in relation to
the motor 102, to the sensors 100 and encoding circuitry 101
and to the modulator 80 in Fig. 2. The motor control
circuitry 104 includes circuitry (1) for maintaining the
substantially constant carrier frequency of the acoustic
signal transmitted in the drilling mud at the proper phase
and (2) for changing the frequency of the acoustic signal
and returning it to the carrier frequency to thereby change
the phase thereof by a predetermined value as rapidly as
possible in response to the encoded data. In the preferred
embodiments wherein the data from the sensors 100 is encoded
in binary, the phase change is one of 180 degrees.
The motor control circuitry 104 includes a motor
switching circuit 110, such as a conventional dc-ac in-
verter, for supplying two-phase power to the two-phase
motor 102.
A phase signal generator 112 and a voltage controlled
oscillator (VCO) circuit 114 are provided to generate to the
motor switching circuit 110 a pair of phase ~ignals ~A, ~B
and their complements ~A, ~B. The phase signals are 90
degrees out of phase from one another. The voltage control
oscillator circuit 114 is conventional, and the phase signal
generator 112 includes conventional circuitry for generating
approximately 50 percent duty cycle ~ave forms and their
complements. In the preferred embodiment the VCO circuit
114 operates at slightly higher than 240 Hertz during carrier
14-
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frequency oper~ion. This frequency accounts for inherent
l'slip" of the induction motor 102 and provides a frequency
multiplication factor of four necessary for the phase signal
generator 112 to provide the phase signals ~A, ~B at the
desired 60 Hertz frequency. For convenience of description,,
the slip of the motor will hereafter be assumed negligible.
In the preferred embodiment the circuitry for main-
taining the carrier frequency and phase of the acoustic
signal in the absence of selected data signals, in combina-
tion with the motor switching circuit 110, the phase signal
generator 112, and the voltage controlled oscillator circuit
114, advantageously implements a phase locked loop circuit.
The phase and frequency maintaining circuitry includes
a'tachometer 120 coupled to the motor 102 for producing a
series of pulses whose repetition rate is indicative of the
frequency at which the motor 102 is driven. In the pre-
ferred embodiment the tachometer 120 is selected to generate
six cycles per revolution of the motor. This ratio in
combination,with the design of the modulator 80, the design
of the drive linkage 96, and the 60 Hz speed of the motor
102, results in the generation of an acoustic signal within
the drilling mud having a 12 Hz carrier frequency and in the
generation of a tachometer output signal ~T having a 360 Hz
frequency.
A tachometer signal conditioning circuit 122 is coupled
to the,output of the tachometer 120 for providing a rela-
tively low frequency loop frequency signal, ~L~ and a rela-
tively high frequency motor frequency signal ~M. ~or ex-
ample, the loop fxequency signal ~L is produced at a 24 Hz,
frequency and the motor frequency signal ~L is produced at a
720 Hz frequency when the motor is operating at 60 Hz. The
15-
;l~ ` .,
conditioning circuit 122 is conventionally implemented using
zero crossing circuitry and frequency multiplying/dividing
circuitry.
The phase locked loop circuitry further includes a
phase detector circuit 124. The phase detector circuit 124
is responsive to the loop frequency signal ~L~ and to a
24 Hertz loop reference frequency signal ~LF to selectively
generate a VCo control signal on a line 126 which is oper-
ati~ely coupled to the VCO circùit 114 via a loop switch
128. The phase detector 124 is conventional and may include
a set/reset flip-flop (not shown) responsive to the slgnals
~L' ~LF and a low pass filter ~not shown) coupled to the
output of the flip-flop. The output of the detector 124
genexates the VCO control signal as a function of the dif-
ference per loop cycle between the ~L and ~LF signals to be
indicative of the motor 102 deviating from the constant
carrier frequency or phase. In response to the control
signal on the line 126, the VCO circuit 114 changes the
excitation frequency supplied to the motor 102 via the
inverter 110 to return the motor to and maintain it in
phase and frequency lock.
The above referred Sexton et al. patent, ~.S. 3,870,063
shows and describes another phase locked loop circuit oper-
ating on similar principles.
The circuitry for changing the speed of the motor 102
to thereby change the phase of the acoustic signal in re-
sponse to data from the sensors 100 is implemented digitally
in the illustrated and preferred embodiment. The digital
implementation effects a frequency and phase change in the
acoustic signal rapidly yet in an extremely accurate manner.
16-
~h~v~
The size of the package for the motor control circuitry has
been reduced over that of previously proposed analog systems
due to the digitaI implementation, and reliability over wide
environmental ranges is achieved. However, the invention is
also suitably im~ ~mented in analog systems i so desired.
As will be described, the circuitry for changing the
speed of the motor operates initially to decelerate the , -
speed of the motor 102 and then to accelerate it for accu-
mulating the'total phase change of 180 degrees. Although an
acceleration/deceleration sequence is operable, the decel-
eration/acceleration sequence resu,lts in the motor 102
operating in a higher torque range and thus in the modu-
lating of the acoustic signal more predictably and in a
shorter period of time.
The speed changing circuitry operates the,switch 128
and a set of acceleration and deceleration switches 130,
132, which respectively control the voltage input ~o the VCO
circuit 114. In the illustrated embodiment, the accelera-
tion switch 130 has one terminal commonly connected to the
input of the VCO circuit 114 and to one terminal of the ioop
switch 128. It has its other terminal commonly coupled to a
ramp voltage producing network and to the deceleration '
switch 132 via a resistor Rl. The ramp voltage need not be
limited to a linearally changing voltage. For example it
may change-substantially exponentially with time. 'As illus-
trated an RC timing circuit comprising the s,eries connection
o a resistor R2 and capacitor C between a voltage Vl and
circuit ground produces an exponentially increasing voltage.
Aocordingly, when the loop switch 128 is open, the accel-
exation switch 130 is in the closed position' and the decel-
aration switch is opened, the input to the VCO circuit 114
, .
. ~ .. i .
-17-
is a ramp voltage, effecting an output from the VCO circuit
114 which increases with time and thus effecting accelera-
tion of the motor which is an increasing function with time.
This assures that the phase change in the acoustic signal is
accomplished as rapidly as possible.
The deceleration switch 132 has one terminal commonly
connected to the resistor R1 and thus to the switch 130. It
has its other terminal connected to circuit ground. When
the acceleration switch 130 is closed and the deceleration
switch 132 is in the closed position, the capacitor C, which
had been discharged through the resistor Rl to circuit
ground by closing of the switch 132, remains discharged. In
the preferred embodiment upon closing of the switch 130, the
discharged capacitor C produces a voltage level at the input
of the VCO circuit 114 which causes the output of the VCO
circuit 114 to step down to approximately 180 Hz from its
otherwise constant carrier frequency producing output of
approximately 240 Hz.
The speed changing circuitry includes a targeting phase
accumulator 140, a motor frequency detector 142 and a con-
trol logic circuit 144. In response to input signals from
the targeting phase accumulator 140 and from the motor
frequency detector 142, the control logic circuit 144 gener-
ates a set of control signals, X, X, and Z on a set of lines
145, 146, 147 to the switches 128, 130, 132 respectively.
These signals are generated in a sequence, appropriately
initiated by data from the sensors 100, which: (1) initially
opens the loop switch 128 to take control away from the
phase lock loop; ~2) closes the acceleration switch 130 (the
deceleration switch 132 already having been closed) to cause
a low voltage level to be supplied to the VCO circuit 114 to
-18-
~h~
thereby cause rapid deceleration of the motox 102, and thus
change the frequency of the acoustic signal to approximately
9 Hz; (3)' to open the deceleration switch 132 while ieaving
closed the acceleration switch 130 to begin acceleration of
the speed of the motor 102 back'toward the carrier fxequency
producing speed; and, (4~ thereafter to open the'accelera-
tion switch 130 and to close'the loop switch 128 to return
control'of the motor 102 back to the phase lock loop when
the'carrier frequency producing speed has been achieved by
the motor 102.
In more detail and referring to the waveforms depicted
in Figure 4, the targeting phase accumulator 140 generates
a TPi control signal on the line 148 a period
of time, referred to as the integrating period IP, corresponding
to the accumulatio.n of the predetermined amount of phase change after a
transi';ion start (hereafter TS) timing signal has been generated on a line ~49.
At the beginnLng of one integrating.period, IP, the logic control circuit 144 is9 ~erating th~ X, X and Z c:ontrol signals to open the loop
switch 128 and to close the acceleration switch 130 and to
maintain closure of the deceleration switch 132, thereby
causing deceleration of the motor 102..
In effect, the targeting phase accumulator 140 is a
differe'ntial integrating circuit. That is, dur'ing the
integrating period, the targeting phase accumulator 140 is effectively
integrating the difference between a .720 Hert2 motor refer-
ence frequency signal, ~M~, on a line l50'and the motor
frequency signal, ~llM, on a line 152. In the illustrated embodiment, the
signals ~MR and ~M are integrated. The difference between these integrated
signal~ produces an indication of the amo~nt of phase which is being accumulateddue to speed changes of the motor 102. When th~ difference between the integrated
.~ .
' .
values of the signals on the lines 150, 152 reaches a pre-
determined value due to the deceleration of the motor speed,
the targeting phase accumulator 140 generates the TPA signal
on the line 1~6, causing the control logic circuit 144 to
open the switch i32. This permits the beginning of the
rapid acceleration of the speed of the motor back toward the
carrier frequency producing speed.
As above indicated for the illustrated embodiment, the
motor ref~rence frequency signal ~MR on the line 150 is a
720 Hz signal. This results in sixty cycles of the motor
reference frequency signal being produced for each cycle of
the 12 Hz carrier frequency. Accordingly, thirty cycles of
the ~MR signal correspond to 180 degrees of phase of the
12 Hz carrier.
Since a finite time is required to return the motor
speed to the 60 Hz~carrier frequency producing speed, phase
shift additional to that effected by the deceleration is
accumulated during the return. With a typical load on the
motor, it has been ascertained that approximately 65 degrees
of carrier phase change is accrued in the process of re-
turning the speéd of the motor 102 back from the 45 Hz
frequency to the carrier frequency producing speed of 60 Hz.
Accordingly, it is necessary to accumulate 115 degrees of
phase change in the targeting phase accumulator 140 prior to
the generation of the TPA si~nal and thus of the beginning
of the acceleration of the speed of the motor back towards
60 Hz. Since 30 cycles of the ~MR signal correspond to 180
degrees of carrier phase shift, the targeting phase accu- :
mulator 140 needs to accumulate
115~180 x 30 z 19 cycles or counts ~QN. 1
~; ............... .
-20-
- . .
~ 3
as the. difference between the integrated ~M and intesrated
~MR signals. The calculation in EQN. 1 is conditioned upon
the characteristic linear relationship between phase loss
and phase gain of the :acoustic signal as a unction of the
changing of the motor frequency signal ~M.
The amount of additional phase accumulated due to
return of the motor speed varies with motor loading.
However, because the phase and frequency maintaining cir-
cuitry operates with inputs at twice the carrier fre.quency
of 12 Hz, it acts to pull the motor speed into lock at
180 degrees of phase change even when the phase changing
circuitry results in a range of 91-269 degrees of phase
¦ change. However, as an outstanding feature of the inven-
tion, and as will be described subsequently, the targeted
value of 115 degrees of phase change is updated and modified
according to loading conditions on the motor 102. This
updating allows the frequency changing circuitry to effect
nearly the precise amount of phase change desired when it
returns the speed of the motor back to substantially the
.carrier frequency producing speed, at which time it gives
control back-to the phase and frequency maintaining cir-
.cuitry. This minimizes the time period required for the
phase locked loop circuit to precisely establish the pre-
determined amount of phase change in the acoustic signal at
the carrier frequency.
In the illustrated embodiment to provide the differ-
ential integration the targeting phase accumulator 140
includes a pair of digital accumulator circuits in the form
of a motor frequency counter 154 and a tach reference fre-
quency country 156. The motor frequency counter 154 is
.
-21-
. ...
presettable to a value indicative of a desired amount of
phase loss (i.e., the target value of 115 degrees) due to
the deceleration of the motor during the integrating period.
Ill the preferred embodiment the counter 154 is preset or
updated after every encoding by a targeting compensation
circuit 151 for adjusting the target valve according to
loading conditions on the motor 102. For purposes of sim-
plifying the description of the targeting phase accumul2tor,
it will be assumed that the targeting compensation circuit
157 is maintaining the target valve of 115; i.e., no changes
in the loading of the motor 102 are occurring.
The targeting phase accumulator 140 also includes a
digital comparator 158. The digital comparator 158 is
coupled to the outputs of the counters 154, 156 and deter-
mines when the tach reference frequency counter 156 has been
incremented by a value of 19 more than the motor frequency
counter 154. Upon this condition, the comparator 158 gen-
erates the TPA signal to the motor control logic circuit
144, indicating that the target value of 115 degrees of
phase change has been accumulated.
The motor frequency detector 142 and the control logic
circuit 144, as shown in detail in Fig. 3, effect accelera-
tion of the speed of the motor 102 back to the 60 Hz carrier
frequency producing speed. The detector 142 comprises a
digital integrator which includes a pair of presettable
counters 160/ 162 which are coupled to the output of an R/S
flip-flop 164. The flip-flop 164 has its clock input coupled
to the line 152 for receiving the motor frequency signal ~M
and generating an ENABLE signal through a palr of gates 166,
168 to the counters 160, 162 via a line 170. The ENA~LE
.
-
~ '''T'~ ~signal on the line 170 is generated upon the absence of the
z control signal on the line 147 to the reset terminal of
the flip-flop 164. The Z control signal on the llne 147 is
removed by the control logic circuit 144 upon generation of
the TPA signal (at the end of the integration period IP) on
the line 148 from the-targeting phase accumula~or 140.
Bécause the motor 102 has been decelerated to a speed
less than 60 Hz at the time of the occurrence of the TPA
signal, the period of the motor frequency signal ~M is
longer than normal. The purpose of the presettable counters
160, 162 is to determine when the period of the motor fre-
quency signal ~M is indicative that the speed of the motor
has been accelerated back to 60 Hz after generation of the
TPA signal. To this end, the counters 160, 162 have preset
lines (not shown) which determine the number of counts the
counters 160, 162 will achieve when the period o the ~M
signal is proper for 60 Hz operation. The counters 160, 162
are also responsive to a/24 KHz high frequency reference
signal on a line 172 which provides a high frequency clock-
ing signal to the counters for incrementing them. The
counters 160, 162 are preset to the value which cau~es a MFD
signal to be generated on a line 174 whenever the 24 KHz
reference signal on the lin~ 172 causes the number o counts
accumulated by the counters 160, 162 to exceed the preset
value. The period of the ENABLE signal on the line 170 is
decreasing with time due to the acceleration of the motor.
Eventually the M~D signal on the line 174 is not generated
for a given period of the ENABLE signal. Vpon this con-
dition, the motor 102 is operating once again at the carrier
requency producing speed.
~ ~ -23-
'-' ~, : ' .'' .
. . . , , . :: .
Oper~tion of the motor frequency detector 142 is ~etter
understood when considering the control logic circuit 144 as
shown in Fig. 3. The control logic circuit 144 includes
t:hree R/S flip-flops 180, 182, 184 and a NAND gate 186. The
flip-fiops 180, 184 respectively generate a Y signal on a
line 187 and the X and X signals on the lines 146, 145. The'
gate 186 is coupled to the lines 146, 187 for generating the
z signal on the line 147 as a function of the X and Y
signals.
The flip-flops 180, 184 are responsive to the TS
timing signal on the line 149 and are set upon the occur-
rence of data of a predetermined logic state as sensed by
the sensors 100. Setting of the flip-flop 184 causes a '
logic 1 and a logic 0 to be generated as the X and X sig-
nals, thereby closing and opening the acceleration and loop
switches 130, 128 respectively. The flip-flop 180 generates
a logic zero as the Y signal ~n the line 187 upon its being ~et by the,
TS ,ignal. The~Y signal is then coupled to the gate 186'
for generating a logic one state of the Z signal. ~on ~e
occurrence of the TPA signal, at ~e end of ~e in~gra~on ~riod IP,
t}~e TPA ~ignal o~ the line 148 clodc8 the flip-flop 180, changing the Y
signal to a logic one. During this interval, the Z signal
has mAintained closed the deceleratio~ switch 132 and has disabled
operations of the flip-flop 182 by way of the reset input.
Recapitulating, upon generation of the TS timing signal
and thus at the beginning of the integration period IP, ~he
X, X, and Z signals have respectively closed the switch 130,
opened the switch 128, and maintained closure of the switch
132, causing deceleration of the'motor 102.
. ~ , .
-24-
At the end of the integration period when the
targeting phase accumulator 140 has indicated that the
desired 115 degrees of phase has been accumulated, as
indicated by the TPA signal on the line 148, the flip-flop
180 changes state. This result as a logic 0 is applied to
its data input and the TPA signal is applied to its clock
input. This change of state generates a logic 1 as the Y
signal on the line 187, causing a logic 0 to be generated on
the line 147 as the Z signal. This opens the deceleration
switch 132, ending the deceleration phase of the motor speed
change and beginning the acceleration phase.
Referring now additionally to the motor frequency
detector 142, as is also illustrated in detail in Fig. 3,
when the Z signal on the line 147 changes to a logic 0, the
flip-flops 164 and 182 become unlatched. A logic 1 applied
to the data input of the flip-flop 164 is then clocked
thereinto by the motor frequency ~M/ producing a logic zero
at one input of the gate 166. Another input of the gate 166
receives the ~M signal on the line 152. The gates 166, 168
thereby generate the ENABLE signal on the line 170 to the
counters 160, 162 for presetting them at the beginning of
every cycle of the ~M signal. The counters then begin
counting at a 24 kHz rate, as determined by the 24 kHz signal
on a line 172.
At the end of the ENABLE signal, i.e., at the end of
one cycle of the motor frequency ~M~ if a carry has
occurred out of the counter 162, i.e., if a logic 0 has been
generated on the line 174 as the MFD signal, the flip-flop
182 remains in the reset state (having been placed into the
reset state by the Z signal on the line 147 upon the occur-
rence of the X signal going to the logic zero state, indi-
cating the end of the modulation). Only upon the conditions
~s~'
that a logic l is provided on the line l74 to the flip-flop 182
when a logic 1 ENABLE signal occurs, will a clock signal be
provided via a line 188 to the flip-flop ]~4. Unless a clock
signal is provided via the line l88, the ~lip-flop 184
maintains the X and ~ signals in the ]ogic 1, logic 0 states as
respectively set by the TS timing signals.
When the counters 160, 162 indicate that the period of
the ENABLE signal, i.e., the period of one cycle of the motor
frequency signal ~h has been reduced to a value corresponding
to a motor frequency of 60 ~z, no carry out of the counter 162
will occur. The logic 1 needed to change the state of the flip-
flop 182 upon the next occurring ENABLE signal is thereupon
generated. This provides a clock signal to and changes the
state of the flip-flop 184, which in turn changes the states of
the X and ~ signals, thereby closing the loop switch l28 and
opening the acceleration switch 130.
It is understood that, when viewing the MFD signal as
depicted in figure 4 in connection with the above description,
the value of the MFD signal is a logic 1 state during counting
by the counters 160, 162. Because this time period is very
small and the time scale of figure 4 is relatively large, these
pulses appear as spikes. Also, the breaks in the MFD and
ENABLE signals indicate that, when the motor 102 is back to
full speed and the MFD signal remains in a logic 1 state due to
no carry out from the counter 162, the ENABLE signal
subsequently changes to a logic 1 state in which it remains
until the next decoding state.
-26-
.
For purposes of simplifying the description of the phase
and frequency maintaining circu;try and of the carrier frequency
ma;ntaining circuitry, it has heretofore been assumed that the
targeting compensation c;rcuit l57 has been maintaining the
target value of the targeting phase accumulator l40 at a constant
~]5 degrees of phase. This corresponds to no changing in the
loading on the motor 102. During actual well drilling opera-
tions, however, there are loading changes on the motor 102.
These loading changes are quasi-static in that they usually
change only very slowly with time. The targeting compensation
circuit 157 detects these changes in loading on the motor 102
and adjusts the preset of the targeting phase accumulator 140,
i.e., the targeting value heretofore identified as ll~ degrees to
-26a-
C
. ; -
.
cause the total phase shift provided by first th~ decelex-
ation and then the 'acceleration,of the motor during encoding
t,o be thé total desired amount. Because the compensation
circuit operates continuously, no prior knowledge of the
loading conditions on the motor 102 is nece,ssary.
Referring now to Figure 5, the targeting compensation
circuit 157 includes a targeting correction circuit l9Q and
an end of transition (EOT) phase accumulator 192. The EOT
phase accumulator 192 computes the total amount of phase
accumulated during each encoding, i.e., that which is caused
by' the deceleration and acceleration of the motor 102, and
generates an EOT signal on a line 194 to the targeting
correction circuit 190 when the desired total phase shift
for the encoding has been accumulated. In the illustrated
and preferred embodiment, this phase shift is 180 deqrees
for binary encoded data. The targeting correction circuit
190 is responsive to the EOT signal and adjusts the preset
value of the targeting phase accumulator 140 via a line l9S
according to whether more or less than 180 degrees of phase
has been accumulated by the accumulator 192.
The EOT phase accumulator 192 is in effect another
di~ferential integrator circuit similar to that implemented
for the targeting phase accumulatar 140. The accumulator
I92 generates the EOT signal when the difference between the
integrated motor reference frequency signal ~MR and the
motor frequency signal ~M exceeds a'predetermined value
corresponding to the total desired amount of phase change.
In the illustrated and preferred embodiment, ,the differen-
tial integrating circuit includes a xeference counter 196, a
tachometer counter 198, and a comparator 200.
-27-
.
The reference counter 196 is responsive to the motor
reference frequency signal ~MR on the line 150 and to the TS
timing signal on the 'line 149 for generating an integrated
motor r~ference frequency signal on a line 202 to the com-
parator 200. The integrated motor reference frequency
signal is indicative of the value of the carrier frequency
integrated over the time'period beginning upon the'occur-
rence of the TS signal, i.e., upon the occurrence of se-
lected data from the encoding circuitry 101. The TS timing
signal resets the counter 196 at the beginning of each IP
integration period.
The tachometer counter 198 is responsive to the motor
frequency signal ~M and to the TS timing sign'al for pro-
ducing an integrated motor frequency signal on a line 204.
The integrated motor frequency signal ~M is indicative of
the value of the instantaneous motor speed integrated over
the IP integration period beginning upon the occurrence of
each TS timing signal. Similarly to the reference counter'
196, the tachometer counter 198 is reset by the TS signal.
Although not shown, the tachometer counter 198 is a program-
mable counter and has programming inputs set to a value
corresponding to a 180 degrees phase shift. According to
the described system, this value is a count of thirty.
PresettLng of the tachometer counter 198 allows a difference
of 180 degrees of phase to be indicated when the integrated
signals on the lines 202, 204 achieve the same digital
value.
The comparator 200 is'coupled to the lines 202, 204 for
detecting when the digital values of the integrated signals
~rom the counters 196, 198 become 'equal. This indicates
that 180 degrees of phase has been accumulated in the
' h - 28-
:
acoustic signal due to operation of the fre~uency changing
circuitry. A latch circuit (not shown) is coupled to the
output of the comparator 200. Upon the condition that the
digital values become equal, the comparator 200 sets the
latch circuit for generating the EOT signal on the line 194.
The latch circuit is reset by the TS timing signal.
The targeting correction circuit 190 includes a preset
counter 210, a correction pulse generator 212, up/down
steering logic 214, and an error pulse generator 216. The
targeting correction circuit 190 is responsive to the EO~
signal on the line lq4 and to the X signal on the line 145
: for generating a signal on the line 195 which updates the
preset value of the motor frequency counter 154 in the
targeting phase accumulator 140 according to whether more of
le~s than 180 degrees of phase shift has been accumulated
during the encoding. Accordingly, the motor loading com-
pensation for one encoding is based on a previous encoding;
orr stated in other terms, the correction for motor loading
during a given encoding is compensation for the next occur-
ring encoding.
The preset counter 210 is a conventional up/down
counter implemented using a pair of serially connected, four
bit, up~down counters. The preset counter 210 receives a
clock pulse on a line 217 from the correction pulse gener-
ator 212 whenever the total accumulated phase shift during
an encoding differs by more than a predetermined value from
the targeted value of 180 degrees. In the illustrated
e~bodiment, because each count of the motor fre~uency
counter 154 corresponds to 6 degrees of phase shift accu-
mulated, each CP pulse generated to the preset counter 210
either increments or decrements the target value of the
-'', ' - . : ~
motor i.~quency counter 154 by 6 degrees. Whether the
counter 210 increases ox decreases in value depends upon a
steering pulse SP generated on a line 220 from the up/down
steering logic 214.
The correction pulse generator 212 includes a pair of
serially connected four bit binary counters which are reset
by the TS timing signal. The counters are responsive to a
targeting compensation reference frequency signal ~TC on a
line 222 and to an error pulse, EP from the error pulse
generator 216. When the error pulse EP is of a sufficient
duration according to the frequency of the ~TC signal, a
pulse is generated from the output of the counters to
provide the CP clock pulse to the preset counter 210. The
CP pulse is also coupled to the counters for resetting them.
Accordingly, by choosing any of various frequencies for the
~TC signal, the amount of overshoot or undershoot of ihe
accumulated phase shift which triggers adjustment of the
targeting value of the preset counter 210 is adjustable. In
the preferred embodiment a frequency of approximately 380 Hz
is used for the targeting compensation reference frequency
signal ~TC
The error pulse generator 216 is responsive the the X
signal on the line 145 and to the EOT signal on the line
194. In the preferred embodiment the generator 216 is an
EXCLUSIVE-OR circuit for producing the EP signal having a
pulse width indicative of the time difference between the
returning of control to the phase and frequency and main-
taining circuitry (as indicated by the change of state of
the X signal) and achieving of the 180 degrees total phase
(as indicated by the EOT signal). The time difference
.
: '- ' ' '
translates into a specific number of degrees of phase shift
wnich either exceeds or is less than the targeted value of
180 degrees.
The up/down steering logic 214 is responsive to the EOT
signal on the line 194 and to the X signal on the line 145
for generating the SP signal on the line 220. The up/down
steerlng logic in the preferred embodiment is an RS-flip-
flop having its clock terminal coupled to receive the X
signal, having a logic 1 impressed on its data input ter-
minal and which is reset by the EOT signal. Accordingly,
the SP signal on the line 220 is generated as either a logic
1 or logic 0 depending on which of the X or EOT signals
first occurred, thereby indicating whether control has been
returned to the phase and frequency maintaining circuit,
i.e., the phase lock loop, before or after 180 degrees of
phase has been accumulated.
Referring again to Figure 2 the TS timing signal is
produced i5 a conventional way by a transition start circuit
230. The transistion start circuit 230 generates a pulse as
the TS timing signal upon the occurrence of data of a pre-
determined logic state as sensed by the sensors 100 and
encoded by the encoding circuitry 101. In the illustrated
and preferred embodiment, the encoding circuitry 101 encodes
the data from the sensors 100 into binary and the transition
start circuit 230 detects whenever a logic 1 signal has been
encoded by the encoding circuit 101 and generates the TS
timing signal accordingly.
The transistion start circuit 230 is suitably described
in the above-referenced Sexton et al. patent, U.S. 3,820,063,
31-
. h~;~h~; 3
Although a preferred embodiment of the invention has
bleen described in a substantial amount of detail, it is
understood that the specificity has been for example only.
Numerous changes and modifications to the circuits and
apparatus will be apparent without departing from the spirit
and scope of the invention.
What ~s cla}med is:
.
.
~: ' "~ ", ' ', ' ' ', ' ' ' '' '
~ ' .
.
., ~
..
-32- .
.
- . :
- . - . : . .
