Note: Descriptions are shown in the official language in which they were submitted.
li~5413
~NNUNCIATOR
SPECIFICATION
This invention relates to a first-out annunciator and shut-down device
useful for monitoring and shutting-down a remotely located internal com-
bustion engine or the like. Related devices have been proposed and are
described in patent literature. Some of the prior devices are electro-
mechanical and some are electronically implemented (See, for example, United
States Patents Nos. 3,965,469 and 3,960,011). This application relates to an
improved electronically operated first-out annunciator and shut-down device.
It is an advantage according to this invention that the device draws
- very low current under all operating conditions, thereby enabling it to be
operated from the self-powered ignition of the engine being monitored and a
small long life battery.
It is a further advantage of this invention that a numeral corres-
ponding to the sensor switch first sending a fault signal is displayed on a
digital display device.
It is yet another advantage according to this invention that all sensors
can be tested without shutting-down or causing shut-down of the engine with
which it is associated.
Briefly, according to this invention there is provided a shut-down and
first-out annunciator device for an internal com~?ustion engine or the like
comprising a plurality of parallel connected sensor switches. The sensor
switches change condition when a fault condition occurs in the monitored
device, such as low oil pressure, high coolant temperature, etc. A digital logiccircuit converts the change in condition on one of the sensor switches into a
binary output indicative of the sensor switch which has changed condition.
The logic circuit also creates a shut-down signal when any sensor switch
`?
:,: , . , ' ' '
li2~i3
changes condition. A digital display means converts the binary signal produced
by the logic circuit into a digital readout and ineludes the usual BCD-to-
seven-segment numeral drivers which have a latch terminal for fixing the
output when the latch terminal is provided a low signal. A shut-down circuit
is responsive to the shut-down signal produced by the logic circuit for
triggering an electronic or relay switching device which grounds the ignition
system, for example. The shut-down circuit also creates the la~ching signal
for latching the digital display.
According to preferred embodiments, the shut-down circuit can be
10 disabled to permit testing of the individual sensor switches without shut-down
of the engine and latching of the display. It is also preferred that the shut-
down circuit converts the shut-down signal produced by the logic circuit into
a continuous latch and shut-down signal with a slight time delay between the
start of the logic circuit shut-down signal and the continuous latch and shut-
down signal. It is also preferred according to this invention that the shut-
down circuit be provided with a delay circuit for providing a signal which
terminates the current drain through the control element of the shut-down
switch.
The shut-down and first-out annunciator device according to this
20 invention includes a first power supply. This may be the ignition system, for
example, supplying power from the storage capacitor of a capacitive discharge
ignition system or from the primary of an inductive break-type ignition
system. The first power supply operates the sensor switches, the logic circuit,
the display means and the shut-down means during normal operation. The
annunciator device is also provided with a second power supply circuit
comprising a battery for operating the display means in the shut-down circuit
after shut-down. In this way, after shut-down, the numeral corresponding to
,~
l~Z~i3
the first-out sensor switch remains displayed on the display and latched by the
shut-down circuit.
Further features and other objects and advantages of this invention
will become clear from the following detailed description made with reference
to the drawings in which
FIG. 1 is an overall schematic illustrating the interrelationship of the
various sections of the shut-down and first-out annunciator device according
to this invention,
FIG. 2 is a partial detail of the sensor switches section,
FIG. 3 is a schematic illustrating the logic section and the display
section in more detail than shown on Fig. 1,
FIG. 4 is a circuit diagram illustrating the first power supply circuit,
the second power supply circuit and the shut-down circuit according to this
invention, and
FIG. 5 is a circuit diagram of part of a circuit useful in an alternate
embodiment wherein a large number of sensor switches can be monitored.
Referring now to Fig. 1, there is shown a block diagram illustrating
the interconnection of various sections of the annunciator and shut-down
device according to this invention. Section 1 comprising the sensor switches
20 and logic gates provides discrete outputs for each of the plurality of activated
sensor switches (i.e., producing a fault signal). Hence, the output of section
1 is a bus 2 having a plurality of lines. In the particular embodiment discussed
hereafter, the bus contains 12 lines (0-9 and 10, 20) to carry a decimal signal
indicative of any one of at least 20 sensor switches. During start-up, it is
necessary to ignore the fault signals produced by certain sensors (i.e., oil
pressure) and hence, timer 3 outputs a disable signal that is used to cancel the
fault signal of certain sensors at start-up.
'rhe coding logic section 4 of the device converts the binary decimal
signals on bus 2 into binary coded decimal (BCD) signals. In the embodiment
--3--
.
,: : .. :
explained hereafter the sensors are assigned decimal numerals 2 through 21.
The bus carries these numbers to the logie circuit which encodes them to
BCD. The output bus 5 of the logic circuit comprises at least 6 lines (4 for
"units" and 2 for "tens") for a 20 sensor annunciator. The BCD signal is
applied by bus 5 to the display section 6. The logic circuit performs other
functions. It outputs a shut-down signal on line 7 if any sensor switch
generates a fault signal. The shut-down signal is applied to the shut-down
section 8. The logic circuit generates a "0" output when the timer is shutting-
out selected sensor fault signals. For this, line ~ connects timer 3 to logic
section 4. The logic section generates a "1" when there is no longer a disable
signal outputted from the timer and no sensor switches have changed
condition, that is are producing fault signals. To display only the first sensorto fault (on shut-down any number of sensor switches will change condition),
the display is latched by a latch signal produced by the shut-down section 8~
The device has two power supply sections. In a preferred embodiment,
the first power supply 10 derives energy from the ignition during operation and
provides power to the entire circuit during operation of the engine. The
battery power supply 11 provides power to the display section 6 after shut-
down to maintain the digital display and to the shut-down section to maintain
the latching signal.
The display section basically comprises a square wave oscillator, two
drivers and a two place liquid crystal display or LCD (one for the tens place
and one for the units place). The LCD is the preferred display means due to
its very low current requirement.
The shut-down circuit 8 basically comprises a triggerable switch such
as an SCR, triac or electromechanical relay which grounds the ignition circuit
when its control element is energized. The shut-down circuit also produces a
13
continuous shut-down and latching signal in response to the temporary shut-
down signal produced by the logic section which continuous signals can only be
terminated by a reset signal.
Fig. 2 illustrates the operation of the sensor switches section with
reference to only two sensors (one disabled during start-up and the other not
disaMed during start-up). A sensor switch Sg, say an oil pressure sensor,
normally outputs a high but outputs a low signal when the oil pressure is below
a safe level. A sensor switch S1g, say a coolant temperature sensor, normally
outputs a high but outputs a low signal when temperature of a coolant is too
high. Basically each sensor has associated therewith a normally closed switch
that opens on detection of a fault discontinuing the VDD voltage as an output.
Normally open switches may be easily adopted to perform the same function.
The timer ouputs a high during the start-up period which may be varied
according to the application from a few seconds to a number of minutes.
During normal start-up Sg outputs a low and S1g a high. The high output of
S1g is applied to both the two-input NAND 14 and the eight-input NAND 15.
If the remaining inputs to the NAND gates are high then their outputs are low.
During start-up the output of sensor Sg is low. The low is applied to OR gate
16. A high is applied to the other input of OR gate 16 by the timer during
the start-up period. Since at least one input of the OR gate 16 is high, the
output is high. The output of NAND 14 is low, unaffected by sensor Sg. If,
during or after start-up, Slg detects a fault and opens transferring a low to
NANDs 14 and 15, the output of the sensor section is a decimal signal "19"
i.e., a high on the output of NAND 15 and a high on the output of NAND 14.
If, after start-up, when the output of timer 3 has gone low, the sensor Sg has
not yet outputted a high (or goes from high to low) the low applied to NAND
14 will output a decimal signal "9" i.e., a high on the output of NAND 14. In
--5--
~,
.. : , ,
.,, -
: : , . ,
l~Z5~13
actual practice, the sensor switch section 1 includes sensors assigned S2 to
S21. No Sl is assigned for reasons that will become apparent later in this
description. Only sensor switches Sg and Slg were shown in Fig. 2 for
simplieity.
Fig. 3 illustrates the coding logic circuit 4 and display section 6. In
this embodiment, sensors S2-Sg are chosen to be disabled by the timer 3 during
start-up; sensors Slo-S21 are unaffected by the timer 3. The input to the
logic section is primarily the decimal signal on bus 2. The decimal unit signals
are converted to binary with an encoder shown as a single integrated circuit
(I.C.) 19. Actually, it is practical to use an eight digit (0-7) binary encoder
plus a Quad OR I.C. and one NOR I.C. to construct a 10 digit (0-9) binary
encoder. The output from the binary encoder comprises at least four lines
(binary "9" reads "1001"). The decimal "tens" do not require a binary encoder
circuit for the specific embodiment as the decimal "1" reads binary "01" and
the decimal "2" reads binary "10". Since the highest number assigned to a
sensor switch in this particular embodiment is S21 the binary "tens" encoder
is unnecessary. The sensor section 1 outputs a high on one line for sensors
10-19 and on another line for sensors 20-21 (both lines are low for sensors 2-
9).
With one exception, the BCD outputs are applied directly to the
drivers 23 and 24 in the display section. The binary "units" output line l9a
is first applied to OR gate 20. The output of the OR 20 is applied to the
driver 24. Thus a high on line l9a always results in a high on the driver
"units" line 24a.
The following is an explanation of how the logic section outputs binary
coded decimal "00" during the start-up when the timer is outputting a high to
cause disregard of sensors S2-Sg and how the logic section outputs a binary
~a
, ,
.: ' , .
. . .
- ; :
coded decimal "01" when all the sensors are on line: At start-up, if there are
no fault signals from sensors Slo to S21 there will not be a high on the shut-
down signal line l9b which is usually taken from the group select terminal of
the encoder 19. The output of the timer is high, however. Hence, the output
of NOR 21 is low and the input to the binary units terminal of the driver is
low. Thus the drivers cause "00" output on the two column LCD display.
When the timer stops outputting the high signal, the NO~ 21 outputs a high
signal which causes the OR gate 20 output to go high. Thus driver 24 has a
high on its "units" input line 24a and the resultant output on the display is
10 t'01". Now if a fault signal is sent by one of the sensor switches, it is
necessary to remove the high caused by NOR 21 from the binary units
terminal of the driver 24. This takes place because the shut-down signal l9b
applied to one input of NOR 21 goes high thus driving the output low. Thus
line 24a is at this point controlled solely by the "units" output line l9a from
the BCD encoder 19.
The drivers convert the binary input to a seven-segment LCD display
signal on two seven-line buses. Each seven-segment display signal is applied
to a seven-segment display in the digital display. A square wave oscillator 27
powers the drivers 23 and 24 and the LCD digital display 26. A low signal
20 applied to the LD (latch display) terminal of the drivers 23 and 24 latches the
display to the output present at the time the latch signal was applied.
With reference to Fig. 4, the shut-down 8 and power supply circuits 10
and 11 are described. Battery supply circuit 11 comprises a battery 30 and
a protective diode 31. The battery will only supply energy to the display
section 6 and the shut-down section 8 when the ignition power supply is no
longer capable of outputting power. During operation of the engine when the
power supply 10 is operating the voltage at the cathode of diode 31 is higher
llZ5~3L3
than the battery voltage and therefore the battery cannot discharge. The
battery operates only when the engine is shut-down to supply about 1 milliamp
for approximately 15 seconds and then only 15 microamps thereafter. This is
accomplished by having the battery supply only that part of the circuit that
latches the display and the display itself. It is also accomplished by
terminating the current to the control terminal of the electronic switch as
explained hereafter. Available lithium nonrechargeable batteries can give life
of five years under these circumstances and the use of such batteries or the
like is contemplated.
The power supply which supplies all the various sections of the shut-
down and first-out annunciator device according to this invention during
engine operation is comprised of diode 35, zener diode 36, resistor 37 and
capacitor 39 for supply line VDD1, 3, 4 and diode 35a, capacitor 33 and zener
diode 32 for supply line VDD6, 8. The input to the power supply 10 is the
ignition, for example, the storage capacitor of a capacitive discharge ignition
system or primary winding of an inductive break-type ignition system.
Because the device is designed to use very little power at all times, it is
possible to power the circuit from self-powered ignition systems, that is those
having no auxiliary power source (such as a battery). These ignition systems
20 are powered by DC current generators, alternators and magnetos.
The shut-down section receives the shut-down signal produced by the
logic circuit. This signal is created by the logic circuit when a sensor switch
changes condition. It is a temporary signal in the sense that since the logic
circuit is unpowered after shut-down, it must cease after shut-down. The
shut-down section produces a continuous shut-down and latch signal from the
temporary shut-down signal received from the logic circuit. This is
accomplished by NOR gate 44 and INVERTER 45. The shut-down signal is
,, y~
'.~
.
~54~3
applied to one input of the NOR gate. The ouput of the NOR gate is applied
to the INVERTER. The output of the INVERTER is fedback through a resistor
to the other input of the NOR gate 44. The feedback circuit is ground through
a very large resistor. Hence, during normal operation when no shut-down
signal is received from the logic section both inputs to the NOR gate are low
and the output is therefore high. The output of the NOR gate 44 is applied
to the latch terminals on the drivers in the display section placing the driversin the unlatched condition. When a shut-down signal is received, a high is
applied to one input of NOR gate 44, thus driving the output low. The low
output is inverted by the INVERTER 45 and fedback to the other input to the
NOR gate 44 thus latching the output of the NOR gate 44 low. The NOR gate
44 output remains low notwithstanding the shut-down signal received from the
logic circuit may no longer be high. The latched low output of NOR gate 44
is applied to the latching terminal on the drivers in the display section thus
latching the digital output so as to display the numeral corresponding to the
first-out sensor switch. To assure that the numeral of the faulting sensor
switch is displayed before the latched signal is applied, a small delay capacitor
46 is placed between the input terminal receiving the shut-down signal on the
NOR gate 44 and ground.
A mechanical reset and test switch 48 is provided to ground the
feedback input to the NOR gate 44 through a resistor thereby unlatching the
NOR gate 44 and INVEl~TER 45. The same mechanical switch 48 can be used
to ground the input to the NOR gate 44 which receives the shut-down signal
thus providing test condition. When the switch is in the test position, the
various sensor switches can be checked without shutting-down the engine or
latching the display. An operator, when the switch 48 is in the test position,
can manually change the condition of individual sensor switches and observe
_g _
"~
: ':
~125413
the numeral corresponding to that switch displayed on the digital output. The
above functions of switching the described points to ground may also be
accomplished by electronic means.
The basic shut-down element of the shut-down circuit of Fig. 4 is
electronic switch 50 which may be, for example, an SCR. The SCR is
connected with its cathode grounded and its anode connected through diodes
to the ignition system and the electrical fuel system if desirable. When the
SCR is triggered on by a positive going signal applied to its control electrode
51, a circuit to ground is provided for the ignition and fuel systems thus
shuttin~down the engine. Resistors 52, 53 and capacitor 54 are all common
elements in the control electrode circuit of the SCR and prevent it from being
triggered by transients. The output of INVERTER 45 could be applied directly
to the control electrode 51 since the output of 45 is a positive going signal
at shut-down; however, output of 45 is continuous and therefore there would
be a continuous current drain through the control electrode of SCR 50. A
delayed shut-down circuit is therefore imposed between the gate or control
electrode 51 and the output of INVERTER 45 comprising AND gate 56. The
output of the INVERTER 45 is applied to one input of the AND gate 56. The
output of the AND 56 is connected through resistor 52 to the control electrode
20 51 of the SCR 50.
A diode 58, capacitor 59 and bleed resistor 60 comprise a delay
circuit. The capacitor 59, dur;ng engine operation becomes charged and a
signal taken between the diode 58 and the capacitor 59 is a high which ;s
applied to the other input to the AND gate 56. During normal operation, the
output of the INVERTER 45 is a low. (The output of the delay circuit is high.)
Hence, the output of AND 56 is low maintaining the control electrode of the
SCR 50 in the nonconducting condition. When a latched shut-down signal is
--10-
, .
1~25~i3
outputted from the INVERTER 45, both inputs to AND gate 56 are high,
therefore the output is high triggering the SCR 50 into conduction. After
some period of time determined by the time constant of the resistor 60 and
the capacitor 59, preferably about 15 seconds to insure engine shut~own, the
capacitor 15 discharges and therefore a low is applied on one terminal of AND
gate 56. This in turn causes the output of AND gate 56 to go low thereby
preventing a current drain through the control electrode 51 of SCR 50.
As is known to anyone skilled in the art, the various NOR, OR, NAND,
AND and INVERTER gates as well as the BCD encoders and the timer,
10 oscillator and LCD drivers are available from various manufacturers as
integrated circuits. It is also well known that different combinations of the
logic gates can be functional equivalents of the specific combinations shown
in this specification. Set forth in the following table is a listing of the various
components which applicant has used in constructing one actual embodiment
of this invention.
ELEMENT COMMERCIAL I.C.
OR Gate Motorola MC 14071
NOR Gate Motorola MC 14001
NAND Gate Motorola MC 14011
AND Gate Motorola MC 14081 or
MC 14572 (NAND & INV.)
8-Input NAND Motorola MC 140G8 or
RCA CD 4048
Encoder Motorola MC 14532
Driver Motorola MC 14543
Timer Motorola MC 14541
Oscillator RCA CD 4047
Display Hamlin 3906
--11--
-.- . : : , . :
An alternate embodiment of this annunciator is illustrated in Fig. 5.
In this embodiment, each parallel sensor switch (S10-S17; S20-S27; S30-S37;
and S40--S47) is associated with one input of a multiplexer (71, 72, 73, 74)
which in response to a BCD input connects one of said multiplexer inputs to
a common output (71x, 72x, 73x, 74x). A suitable multiplexer has been found
to be the Motorola MC 14051. The BCD bus supplying bhlary inputs to the
multiplexers is controlled by a binary counter 76, clocked by oscillator 77. A
suitable binary counter has been found to be Motorola MC 1~520. The
oscillator 77 may also supply power for driving drivers 84 and 94 and liquid
crystal displays 85 and 95. Hence, each multiplexer continually and
sequentially poles the parallel inputs. During start-up, the start-up timer 70
disables one multiplexer.
The grounding of any sensor switch, say S30, causes the common
output 73x of the associated multiplexer 73 to be pulled down. It is normally
high due to a pull-up resistor, for example, as shown in the Figure connected
to VDD. This low is inverted and passed through the coding logic comprising
NAND gates 80, 81, and 82 to the tens display driver 84. Thus the tens
display driver is coded, in this example, to cause a three to be displayed on
a seven-segment display 85. Any high output of the coding network (80, 81
and 82) results in a high at the output of OR gate 91 as a result of the manner
in which OR gates 90 and 91 are connected. Thus a temporary shut-down
signal is produced. This signal is applied to gate 93 allowing the E~CD output
of the binary counter to be applied to the units display driver. The shut-down
signal is also applied to binary counter 76 to hold the count.
The NOR gate 121 and OR gate 120 work in the same manner as
described above for NOR gate 21 and OR gate 20 to apply a binary coded
signal resulting in a "00" display during the start-up when the timer is
-12-
11;~5413
outputting a high to cause disregard of sensors S10 to S17 and to provide a
binary coded decimal signal resulting in a "01" display when all the sensors are
on-line. The remainder of the circuit is as shown in Fig. 4. Hence a
temporary shut-down signal is converted into a latching signal which causes
the drivers S4, 94 to latch the display corresponding to the first-out sensor
switch. The latch signal is applied to the gate 9$ to isolate the binary counter
76 from the oscillator 77.
Having thus defined my invention in the detail and particularly
required by the Patent Laws, what is desired protected by l.etters Patent is
10 set forth in the following claims.
~13-
!
. . .
'~ ~
